LCOV - code coverage report
Current view: top level - gcc - combine.c (source / functions) Hit Total Coverage
Test: gcc.info Lines: 5792 6512 88.9 %
Date: 2020-03-28 11:57:23 Functions: 98 107 91.6 %
Legend: Lines: hit not hit | Branches: + taken - not taken # not executed Branches: 0 0 -

           Branch data     Line data    Source code
       1                 :            : /* Optimize by combining instructions for GNU compiler.
       2                 :            :    Copyright (C) 1987-2020 Free Software Foundation, Inc.
       3                 :            : 
       4                 :            : This file is part of GCC.
       5                 :            : 
       6                 :            : GCC is free software; you can redistribute it and/or modify it under
       7                 :            : the terms of the GNU General Public License as published by the Free
       8                 :            : Software Foundation; either version 3, or (at your option) any later
       9                 :            : version.
      10                 :            : 
      11                 :            : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
      12                 :            : WARRANTY; without even the implied warranty of MERCHANTABILITY or
      13                 :            : FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
      14                 :            : for more details.
      15                 :            : 
      16                 :            : You should have received a copy of the GNU General Public License
      17                 :            : along with GCC; see the file COPYING3.  If not see
      18                 :            : <http://www.gnu.org/licenses/>.  */
      19                 :            : 
      20                 :            : /* This module is essentially the "combiner" phase of the U. of Arizona
      21                 :            :    Portable Optimizer, but redone to work on our list-structured
      22                 :            :    representation for RTL instead of their string representation.
      23                 :            : 
      24                 :            :    The LOG_LINKS of each insn identify the most recent assignment
      25                 :            :    to each REG used in the insn.  It is a list of previous insns,
      26                 :            :    each of which contains a SET for a REG that is used in this insn
      27                 :            :    and not used or set in between.  LOG_LINKs never cross basic blocks.
      28                 :            :    They were set up by the preceding pass (lifetime analysis).
      29                 :            : 
      30                 :            :    We try to combine each pair of insns joined by a logical link.
      31                 :            :    We also try to combine triplets of insns A, B and C when C has
      32                 :            :    a link back to B and B has a link back to A.  Likewise for a
      33                 :            :    small number of quadruplets of insns A, B, C and D for which
      34                 :            :    there's high likelihood of success.
      35                 :            : 
      36                 :            :    LOG_LINKS does not have links for use of the CC0.  They don't
      37                 :            :    need to, because the insn that sets the CC0 is always immediately
      38                 :            :    before the insn that tests it.  So we always regard a branch
      39                 :            :    insn as having a logical link to the preceding insn.  The same is true
      40                 :            :    for an insn explicitly using CC0.
      41                 :            : 
      42                 :            :    We check (with modified_between_p) to avoid combining in such a way
      43                 :            :    as to move a computation to a place where its value would be different.
      44                 :            : 
      45                 :            :    Combination is done by mathematically substituting the previous
      46                 :            :    insn(s) values for the regs they set into the expressions in
      47                 :            :    the later insns that refer to these regs.  If the result is a valid insn
      48                 :            :    for our target machine, according to the machine description,
      49                 :            :    we install it, delete the earlier insns, and update the data flow
      50                 :            :    information (LOG_LINKS and REG_NOTES) for what we did.
      51                 :            : 
      52                 :            :    There are a few exceptions where the dataflow information isn't
      53                 :            :    completely updated (however this is only a local issue since it is
      54                 :            :    regenerated before the next pass that uses it):
      55                 :            : 
      56                 :            :    - reg_live_length is not updated
      57                 :            :    - reg_n_refs is not adjusted in the rare case when a register is
      58                 :            :      no longer required in a computation
      59                 :            :    - there are extremely rare cases (see distribute_notes) when a
      60                 :            :      REG_DEAD note is lost
      61                 :            :    - a LOG_LINKS entry that refers to an insn with multiple SETs may be
      62                 :            :      removed because there is no way to know which register it was
      63                 :            :      linking
      64                 :            : 
      65                 :            :    To simplify substitution, we combine only when the earlier insn(s)
      66                 :            :    consist of only a single assignment.  To simplify updating afterward,
      67                 :            :    we never combine when a subroutine call appears in the middle.
      68                 :            : 
      69                 :            :    Since we do not represent assignments to CC0 explicitly except when that
      70                 :            :    is all an insn does, there is no LOG_LINKS entry in an insn that uses
      71                 :            :    the condition code for the insn that set the condition code.
      72                 :            :    Fortunately, these two insns must be consecutive.
      73                 :            :    Therefore, every JUMP_INSN is taken to have an implicit logical link
      74                 :            :    to the preceding insn.  This is not quite right, since non-jumps can
      75                 :            :    also use the condition code; but in practice such insns would not
      76                 :            :    combine anyway.  */
      77                 :            : 
      78                 :            : #include "config.h"
      79                 :            : #include "system.h"
      80                 :            : #include "coretypes.h"
      81                 :            : #include "backend.h"
      82                 :            : #include "target.h"
      83                 :            : #include "rtl.h"
      84                 :            : #include "tree.h"
      85                 :            : #include "cfghooks.h"
      86                 :            : #include "predict.h"
      87                 :            : #include "df.h"
      88                 :            : #include "memmodel.h"
      89                 :            : #include "tm_p.h"
      90                 :            : #include "optabs.h"
      91                 :            : #include "regs.h"
      92                 :            : #include "emit-rtl.h"
      93                 :            : #include "recog.h"
      94                 :            : #include "cgraph.h"
      95                 :            : #include "stor-layout.h"
      96                 :            : #include "cfgrtl.h"
      97                 :            : #include "cfgcleanup.h"
      98                 :            : /* Include expr.h after insn-config.h so we get HAVE_conditional_move.  */
      99                 :            : #include "explow.h"
     100                 :            : #include "insn-attr.h"
     101                 :            : #include "rtlhooks-def.h"
     102                 :            : #include "expr.h"
     103                 :            : #include "tree-pass.h"
     104                 :            : #include "valtrack.h"
     105                 :            : #include "rtl-iter.h"
     106                 :            : #include "print-rtl.h"
     107                 :            : #include "function-abi.h"
     108                 :            : 
     109                 :            : /* Number of attempts to combine instructions in this function.  */
     110                 :            : 
     111                 :            : static int combine_attempts;
     112                 :            : 
     113                 :            : /* Number of attempts that got as far as substitution in this function.  */
     114                 :            : 
     115                 :            : static int combine_merges;
     116                 :            : 
     117                 :            : /* Number of instructions combined with added SETs in this function.  */
     118                 :            : 
     119                 :            : static int combine_extras;
     120                 :            : 
     121                 :            : /* Number of instructions combined in this function.  */
     122                 :            : 
     123                 :            : static int combine_successes;
     124                 :            : 
     125                 :            : /* Totals over entire compilation.  */
     126                 :            : 
     127                 :            : static int total_attempts, total_merges, total_extras, total_successes;
     128                 :            : 
     129                 :            : /* combine_instructions may try to replace the right hand side of the
     130                 :            :    second instruction with the value of an associated REG_EQUAL note
     131                 :            :    before throwing it at try_combine.  That is problematic when there
     132                 :            :    is a REG_DEAD note for a register used in the old right hand side
     133                 :            :    and can cause distribute_notes to do wrong things.  This is the
     134                 :            :    second instruction if it has been so modified, null otherwise.  */
     135                 :            : 
     136                 :            : static rtx_insn *i2mod;
     137                 :            : 
     138                 :            : /* When I2MOD is nonnull, this is a copy of the old right hand side.  */
     139                 :            : 
     140                 :            : static rtx i2mod_old_rhs;
     141                 :            : 
     142                 :            : /* When I2MOD is nonnull, this is a copy of the new right hand side.  */
     143                 :            : 
     144                 :            : static rtx i2mod_new_rhs;
     145                 :            : 
     146                 :            : struct reg_stat_type {
     147                 :            :   /* Record last point of death of (hard or pseudo) register n.  */
     148                 :            :   rtx_insn                      *last_death;
     149                 :            : 
     150                 :            :   /* Record last point of modification of (hard or pseudo) register n.  */
     151                 :            :   rtx_insn                      *last_set;
     152                 :            : 
     153                 :            :   /* The next group of fields allows the recording of the last value assigned
     154                 :            :      to (hard or pseudo) register n.  We use this information to see if an
     155                 :            :      operation being processed is redundant given a prior operation performed
     156                 :            :      on the register.  For example, an `and' with a constant is redundant if
     157                 :            :      all the zero bits are already known to be turned off.
     158                 :            : 
     159                 :            :      We use an approach similar to that used by cse, but change it in the
     160                 :            :      following ways:
     161                 :            : 
     162                 :            :      (1) We do not want to reinitialize at each label.
     163                 :            :      (2) It is useful, but not critical, to know the actual value assigned
     164                 :            :          to a register.  Often just its form is helpful.
     165                 :            : 
     166                 :            :      Therefore, we maintain the following fields:
     167                 :            : 
     168                 :            :      last_set_value             the last value assigned
     169                 :            :      last_set_label             records the value of label_tick when the
     170                 :            :                                 register was assigned
     171                 :            :      last_set_table_tick        records the value of label_tick when a
     172                 :            :                                 value using the register is assigned
     173                 :            :      last_set_invalid           set to nonzero when it is not valid
     174                 :            :                                 to use the value of this register in some
     175                 :            :                                 register's value
     176                 :            : 
     177                 :            :      To understand the usage of these tables, it is important to understand
     178                 :            :      the distinction between the value in last_set_value being valid and
     179                 :            :      the register being validly contained in some other expression in the
     180                 :            :      table.
     181                 :            : 
     182                 :            :      (The next two parameters are out of date).
     183                 :            : 
     184                 :            :      reg_stat[i].last_set_value is valid if it is nonzero, and either
     185                 :            :      reg_n_sets[i] is 1 or reg_stat[i].last_set_label == label_tick.
     186                 :            : 
     187                 :            :      Register I may validly appear in any expression returned for the value
     188                 :            :      of another register if reg_n_sets[i] is 1.  It may also appear in the
     189                 :            :      value for register J if reg_stat[j].last_set_invalid is zero, or
     190                 :            :      reg_stat[i].last_set_label < reg_stat[j].last_set_label.
     191                 :            : 
     192                 :            :      If an expression is found in the table containing a register which may
     193                 :            :      not validly appear in an expression, the register is replaced by
     194                 :            :      something that won't match, (clobber (const_int 0)).  */
     195                 :            : 
     196                 :            :   /* Record last value assigned to (hard or pseudo) register n.  */
     197                 :            : 
     198                 :            :   rtx                           last_set_value;
     199                 :            : 
     200                 :            :   /* Record the value of label_tick when an expression involving register n
     201                 :            :      is placed in last_set_value.  */
     202                 :            : 
     203                 :            :   int                           last_set_table_tick;
     204                 :            : 
     205                 :            :   /* Record the value of label_tick when the value for register n is placed in
     206                 :            :      last_set_value.  */
     207                 :            : 
     208                 :            :   int                           last_set_label;
     209                 :            : 
     210                 :            :   /* These fields are maintained in parallel with last_set_value and are
     211                 :            :      used to store the mode in which the register was last set, the bits
     212                 :            :      that were known to be zero when it was last set, and the number of
     213                 :            :      sign bits copies it was known to have when it was last set.  */
     214                 :            : 
     215                 :            :   unsigned HOST_WIDE_INT        last_set_nonzero_bits;
     216                 :            :   char                          last_set_sign_bit_copies;
     217                 :            :   ENUM_BITFIELD(machine_mode)   last_set_mode : 8;
     218                 :            : 
     219                 :            :   /* Set nonzero if references to register n in expressions should not be
     220                 :            :      used.  last_set_invalid is set nonzero when this register is being
     221                 :            :      assigned to and last_set_table_tick == label_tick.  */
     222                 :            : 
     223                 :            :   char                          last_set_invalid;
     224                 :            : 
     225                 :            :   /* Some registers that are set more than once and used in more than one
     226                 :            :      basic block are nevertheless always set in similar ways.  For example,
     227                 :            :      a QImode register may be loaded from memory in two places on a machine
     228                 :            :      where byte loads zero extend.
     229                 :            : 
     230                 :            :      We record in the following fields if a register has some leading bits
     231                 :            :      that are always equal to the sign bit, and what we know about the
     232                 :            :      nonzero bits of a register, specifically which bits are known to be
     233                 :            :      zero.
     234                 :            : 
     235                 :            :      If an entry is zero, it means that we don't know anything special.  */
     236                 :            : 
     237                 :            :   unsigned char                 sign_bit_copies;
     238                 :            : 
     239                 :            :   unsigned HOST_WIDE_INT        nonzero_bits;
     240                 :            : 
     241                 :            :   /* Record the value of the label_tick when the last truncation
     242                 :            :      happened.  The field truncated_to_mode is only valid if
     243                 :            :      truncation_label == label_tick.  */
     244                 :            : 
     245                 :            :   int                           truncation_label;
     246                 :            : 
     247                 :            :   /* Record the last truncation seen for this register.  If truncation
     248                 :            :      is not a nop to this mode we might be able to save an explicit
     249                 :            :      truncation if we know that value already contains a truncated
     250                 :            :      value.  */
     251                 :            : 
     252                 :            :   ENUM_BITFIELD(machine_mode)   truncated_to_mode : 8;
     253                 :            : };
     254                 :            : 
     255                 :            : 
     256                 :            : static vec<reg_stat_type> reg_stat;
     257                 :            : 
     258                 :            : /* One plus the highest pseudo for which we track REG_N_SETS.
     259                 :            :    regstat_init_n_sets_and_refs allocates the array for REG_N_SETS just once,
     260                 :            :    but during combine_split_insns new pseudos can be created.  As we don't have
     261                 :            :    updated DF information in that case, it is hard to initialize the array
     262                 :            :    after growing.  The combiner only cares about REG_N_SETS (regno) == 1,
     263                 :            :    so instead of growing the arrays, just assume all newly created pseudos
     264                 :            :    during combine might be set multiple times.  */
     265                 :            : 
     266                 :            : static unsigned int reg_n_sets_max;
     267                 :            : 
     268                 :            : /* Record the luid of the last insn that invalidated memory
     269                 :            :    (anything that writes memory, and subroutine calls, but not pushes).  */
     270                 :            : 
     271                 :            : static int mem_last_set;
     272                 :            : 
     273                 :            : /* Record the luid of the last CALL_INSN
     274                 :            :    so we can tell whether a potential combination crosses any calls.  */
     275                 :            : 
     276                 :            : static int last_call_luid;
     277                 :            : 
     278                 :            : /* When `subst' is called, this is the insn that is being modified
     279                 :            :    (by combining in a previous insn).  The PATTERN of this insn
     280                 :            :    is still the old pattern partially modified and it should not be
     281                 :            :    looked at, but this may be used to examine the successors of the insn
     282                 :            :    to judge whether a simplification is valid.  */
     283                 :            : 
     284                 :            : static rtx_insn *subst_insn;
     285                 :            : 
     286                 :            : /* This is the lowest LUID that `subst' is currently dealing with.
     287                 :            :    get_last_value will not return a value if the register was set at or
     288                 :            :    after this LUID.  If not for this mechanism, we could get confused if
     289                 :            :    I2 or I1 in try_combine were an insn that used the old value of a register
     290                 :            :    to obtain a new value.  In that case, we might erroneously get the
     291                 :            :    new value of the register when we wanted the old one.  */
     292                 :            : 
     293                 :            : static int subst_low_luid;
     294                 :            : 
     295                 :            : /* This contains any hard registers that are used in newpat; reg_dead_at_p
     296                 :            :    must consider all these registers to be always live.  */
     297                 :            : 
     298                 :            : static HARD_REG_SET newpat_used_regs;
     299                 :            : 
     300                 :            : /* This is an insn to which a LOG_LINKS entry has been added.  If this
     301                 :            :    insn is the earlier than I2 or I3, combine should rescan starting at
     302                 :            :    that location.  */
     303                 :            : 
     304                 :            : static rtx_insn *added_links_insn;
     305                 :            : 
     306                 :            : /* And similarly, for notes.  */
     307                 :            : 
     308                 :            : static rtx_insn *added_notes_insn;
     309                 :            : 
     310                 :            : /* Basic block in which we are performing combines.  */
     311                 :            : static basic_block this_basic_block;
     312                 :            : static bool optimize_this_for_speed_p;
     313                 :            : 
     314                 :            : 
     315                 :            : /* Length of the currently allocated uid_insn_cost array.  */
     316                 :            : 
     317                 :            : static int max_uid_known;
     318                 :            : 
     319                 :            : /* The following array records the insn_cost for every insn
     320                 :            :    in the instruction stream.  */
     321                 :            : 
     322                 :            : static int *uid_insn_cost;
     323                 :            : 
     324                 :            : /* The following array records the LOG_LINKS for every insn in the
     325                 :            :    instruction stream as struct insn_link pointers.  */
     326                 :            : 
     327                 :            : struct insn_link {
     328                 :            :   rtx_insn *insn;
     329                 :            :   unsigned int regno;
     330                 :            :   struct insn_link *next;
     331                 :            : };
     332                 :            : 
     333                 :            : static struct insn_link **uid_log_links;
     334                 :            : 
     335                 :            : static inline int
     336                 :  452735000 : insn_uid_check (const_rtx insn)
     337                 :            : {
     338                 :  452735000 :   int uid = INSN_UID (insn);
     339                 :  452735000 :   gcc_checking_assert (uid <= max_uid_known);
     340                 :  452735000 :   return uid;
     341                 :            : }
     342                 :            : 
     343                 :            : #define INSN_COST(INSN)         (uid_insn_cost[insn_uid_check (INSN)])
     344                 :            : #define LOG_LINKS(INSN)         (uid_log_links[insn_uid_check (INSN)])
     345                 :            : 
     346                 :            : #define FOR_EACH_LOG_LINK(L, INSN)                              \
     347                 :            :   for ((L) = LOG_LINKS (INSN); (L); (L) = (L)->next)
     348                 :            : 
     349                 :            : /* Links for LOG_LINKS are allocated from this obstack.  */
     350                 :            : 
     351                 :            : static struct obstack insn_link_obstack;
     352                 :            : 
     353                 :            : /* Allocate a link.  */
     354                 :            : 
     355                 :            : static inline struct insn_link *
     356                 :   23234600 : alloc_insn_link (rtx_insn *insn, unsigned int regno, struct insn_link *next)
     357                 :            : {
     358                 :   23234600 :   struct insn_link *l
     359                 :   23234600 :     = (struct insn_link *) obstack_alloc (&insn_link_obstack,
     360                 :            :                                           sizeof (struct insn_link));
     361                 :   23234600 :   l->insn = insn;
     362                 :   23234600 :   l->regno = regno;
     363                 :   23234600 :   l->next = next;
     364                 :   23234600 :   return l;
     365                 :            : }
     366                 :            : 
     367                 :            : /* Incremented for each basic block.  */
     368                 :            : 
     369                 :            : static int label_tick;
     370                 :            : 
     371                 :            : /* Reset to label_tick for each extended basic block in scanning order.  */
     372                 :            : 
     373                 :            : static int label_tick_ebb_start;
     374                 :            : 
     375                 :            : /* Mode used to compute significance in reg_stat[].nonzero_bits.  It is the
     376                 :            :    largest integer mode that can fit in HOST_BITS_PER_WIDE_INT.  */
     377                 :            : 
     378                 :            : static scalar_int_mode nonzero_bits_mode;
     379                 :            : 
     380                 :            : /* Nonzero when reg_stat[].nonzero_bits and reg_stat[].sign_bit_copies can
     381                 :            :    be safely used.  It is zero while computing them and after combine has
     382                 :            :    completed.  This former test prevents propagating values based on
     383                 :            :    previously set values, which can be incorrect if a variable is modified
     384                 :            :    in a loop.  */
     385                 :            : 
     386                 :            : static int nonzero_sign_valid;
     387                 :            : 
     388                 :            : 
     389                 :            : /* Record one modification to rtl structure
     390                 :            :    to be undone by storing old_contents into *where.  */
     391                 :            : 
     392                 :            : enum undo_kind { UNDO_RTX, UNDO_INT, UNDO_MODE, UNDO_LINKS };
     393                 :            : 
     394                 :            : struct undo
     395                 :            : {
     396                 :            :   struct undo *next;
     397                 :            :   enum undo_kind kind;
     398                 :            :   union { rtx r; int i; machine_mode m; struct insn_link *l; } old_contents;
     399                 :            :   union { rtx *r; int *i; struct insn_link **l; } where;
     400                 :            : };
     401                 :            : 
     402                 :            : /* Record a bunch of changes to be undone, up to MAX_UNDO of them.
     403                 :            :    num_undo says how many are currently recorded.
     404                 :            : 
     405                 :            :    other_insn is nonzero if we have modified some other insn in the process
     406                 :            :    of working on subst_insn.  It must be verified too.  */
     407                 :            : 
     408                 :            : struct undobuf
     409                 :            : {
     410                 :            :   struct undo *undos;
     411                 :            :   struct undo *frees;
     412                 :            :   rtx_insn *other_insn;
     413                 :            : };
     414                 :            : 
     415                 :            : static struct undobuf undobuf;
     416                 :            : 
     417                 :            : /* Number of times the pseudo being substituted for
     418                 :            :    was found and replaced.  */
     419                 :            : 
     420                 :            : static int n_occurrences;
     421                 :            : 
     422                 :            : static rtx reg_nonzero_bits_for_combine (const_rtx, scalar_int_mode,
     423                 :            :                                          scalar_int_mode,
     424                 :            :                                          unsigned HOST_WIDE_INT *);
     425                 :            : static rtx reg_num_sign_bit_copies_for_combine (const_rtx, scalar_int_mode,
     426                 :            :                                                 scalar_int_mode,
     427                 :            :                                                 unsigned int *);
     428                 :            : static void do_SUBST (rtx *, rtx);
     429                 :            : static void do_SUBST_INT (int *, int);
     430                 :            : static void init_reg_last (void);
     431                 :            : static void setup_incoming_promotions (rtx_insn *);
     432                 :            : static void set_nonzero_bits_and_sign_copies (rtx, const_rtx, void *);
     433                 :            : static int cant_combine_insn_p (rtx_insn *);
     434                 :            : static int can_combine_p (rtx_insn *, rtx_insn *, rtx_insn *, rtx_insn *,
     435                 :            :                           rtx_insn *, rtx_insn *, rtx *, rtx *);
     436                 :            : static int combinable_i3pat (rtx_insn *, rtx *, rtx, rtx, rtx, int, int, rtx *);
     437                 :            : static int contains_muldiv (rtx);
     438                 :            : static rtx_insn *try_combine (rtx_insn *, rtx_insn *, rtx_insn *, rtx_insn *,
     439                 :            :                               int *, rtx_insn *);
     440                 :            : static void undo_all (void);
     441                 :            : static void undo_commit (void);
     442                 :            : static rtx *find_split_point (rtx *, rtx_insn *, bool);
     443                 :            : static rtx subst (rtx, rtx, rtx, int, int, int);
     444                 :            : static rtx combine_simplify_rtx (rtx, machine_mode, int, int);
     445                 :            : static rtx simplify_if_then_else (rtx);
     446                 :            : static rtx simplify_set (rtx);
     447                 :            : static rtx simplify_logical (rtx);
     448                 :            : static rtx expand_compound_operation (rtx);
     449                 :            : static const_rtx expand_field_assignment (const_rtx);
     450                 :            : static rtx make_extraction (machine_mode, rtx, HOST_WIDE_INT,
     451                 :            :                             rtx, unsigned HOST_WIDE_INT, int, int, int);
     452                 :            : static int get_pos_from_mask (unsigned HOST_WIDE_INT,
     453                 :            :                               unsigned HOST_WIDE_INT *);
     454                 :            : static rtx canon_reg_for_combine (rtx, rtx);
     455                 :            : static rtx force_int_to_mode (rtx, scalar_int_mode, scalar_int_mode,
     456                 :            :                               scalar_int_mode, unsigned HOST_WIDE_INT, int);
     457                 :            : static rtx force_to_mode (rtx, machine_mode,
     458                 :            :                           unsigned HOST_WIDE_INT, int);
     459                 :            : static rtx if_then_else_cond (rtx, rtx *, rtx *);
     460                 :            : static rtx known_cond (rtx, enum rtx_code, rtx, rtx);
     461                 :            : static int rtx_equal_for_field_assignment_p (rtx, rtx, bool = false);
     462                 :            : static rtx make_field_assignment (rtx);
     463                 :            : static rtx apply_distributive_law (rtx);
     464                 :            : static rtx distribute_and_simplify_rtx (rtx, int);
     465                 :            : static rtx simplify_and_const_int_1 (scalar_int_mode, rtx,
     466                 :            :                                      unsigned HOST_WIDE_INT);
     467                 :            : static rtx simplify_and_const_int (rtx, scalar_int_mode, rtx,
     468                 :            :                                    unsigned HOST_WIDE_INT);
     469                 :            : static int merge_outer_ops (enum rtx_code *, HOST_WIDE_INT *, enum rtx_code,
     470                 :            :                             HOST_WIDE_INT, machine_mode, int *);
     471                 :            : static rtx simplify_shift_const_1 (enum rtx_code, machine_mode, rtx, int);
     472                 :            : static rtx simplify_shift_const (rtx, enum rtx_code, machine_mode, rtx,
     473                 :            :                                  int);
     474                 :            : static int recog_for_combine (rtx *, rtx_insn *, rtx *);
     475                 :            : static rtx gen_lowpart_for_combine (machine_mode, rtx);
     476                 :            : static enum rtx_code simplify_compare_const (enum rtx_code, machine_mode,
     477                 :            :                                              rtx, rtx *);
     478                 :            : static enum rtx_code simplify_comparison (enum rtx_code, rtx *, rtx *);
     479                 :            : static void update_table_tick (rtx);
     480                 :            : static void record_value_for_reg (rtx, rtx_insn *, rtx);
     481                 :            : static void check_promoted_subreg (rtx_insn *, rtx);
     482                 :            : static void record_dead_and_set_regs_1 (rtx, const_rtx, void *);
     483                 :            : static void record_dead_and_set_regs (rtx_insn *);
     484                 :            : static int get_last_value_validate (rtx *, rtx_insn *, int, int);
     485                 :            : static rtx get_last_value (const_rtx);
     486                 :            : static void reg_dead_at_p_1 (rtx, const_rtx, void *);
     487                 :            : static int reg_dead_at_p (rtx, rtx_insn *);
     488                 :            : static void move_deaths (rtx, rtx, int, rtx_insn *, rtx *);
     489                 :            : static int reg_bitfield_target_p (rtx, rtx);
     490                 :            : static void distribute_notes (rtx, rtx_insn *, rtx_insn *, rtx_insn *, rtx, rtx, rtx);
     491                 :            : static void distribute_links (struct insn_link *);
     492                 :            : static void mark_used_regs_combine (rtx);
     493                 :            : static void record_promoted_value (rtx_insn *, rtx);
     494                 :            : static bool unmentioned_reg_p (rtx, rtx);
     495                 :            : static void record_truncated_values (rtx *, void *);
     496                 :            : static bool reg_truncated_to_mode (machine_mode, const_rtx);
     497                 :            : static rtx gen_lowpart_or_truncate (machine_mode, rtx);
     498                 :            : 
     499                 :            : 
     500                 :            : /* It is not safe to use ordinary gen_lowpart in combine.
     501                 :            :    See comments in gen_lowpart_for_combine.  */
     502                 :            : #undef RTL_HOOKS_GEN_LOWPART
     503                 :            : #define RTL_HOOKS_GEN_LOWPART              gen_lowpart_for_combine
     504                 :            : 
     505                 :            : /* Our implementation of gen_lowpart never emits a new pseudo.  */
     506                 :            : #undef RTL_HOOKS_GEN_LOWPART_NO_EMIT
     507                 :            : #define RTL_HOOKS_GEN_LOWPART_NO_EMIT      gen_lowpart_for_combine
     508                 :            : 
     509                 :            : #undef RTL_HOOKS_REG_NONZERO_REG_BITS
     510                 :            : #define RTL_HOOKS_REG_NONZERO_REG_BITS     reg_nonzero_bits_for_combine
     511                 :            : 
     512                 :            : #undef RTL_HOOKS_REG_NUM_SIGN_BIT_COPIES
     513                 :            : #define RTL_HOOKS_REG_NUM_SIGN_BIT_COPIES  reg_num_sign_bit_copies_for_combine
     514                 :            : 
     515                 :            : #undef RTL_HOOKS_REG_TRUNCATED_TO_MODE
     516                 :            : #define RTL_HOOKS_REG_TRUNCATED_TO_MODE    reg_truncated_to_mode
     517                 :            : 
     518                 :            : static const struct rtl_hooks combine_rtl_hooks = RTL_HOOKS_INITIALIZER;
     519                 :            : 
     520                 :            : 
     521                 :            : /* Convenience wrapper for the canonicalize_comparison target hook.
     522                 :            :    Target hooks cannot use enum rtx_code.  */
     523                 :            : static inline void
     524                 :   14153500 : target_canonicalize_comparison (enum rtx_code *code, rtx *op0, rtx *op1,
     525                 :            :                                 bool op0_preserve_value)
     526                 :            : {
     527                 :   14153500 :   int code_int = (int)*code;
     528                 :   14153500 :   targetm.canonicalize_comparison (&code_int, op0, op1, op0_preserve_value);
     529                 :   14153500 :   *code = (enum rtx_code)code_int;
     530                 :     504450 : }
     531                 :            : 
     532                 :            : /* Try to split PATTERN found in INSN.  This returns NULL_RTX if
     533                 :            :    PATTERN cannot be split.  Otherwise, it returns an insn sequence.
     534                 :            :    This is a wrapper around split_insns which ensures that the
     535                 :            :    reg_stat vector is made larger if the splitter creates a new
     536                 :            :    register.  */
     537                 :            : 
     538                 :            : static rtx_insn *
     539                 :    6641560 : combine_split_insns (rtx pattern, rtx_insn *insn)
     540                 :            : {
     541                 :    6641560 :   rtx_insn *ret;
     542                 :    6641560 :   unsigned int nregs;
     543                 :            : 
     544                 :    6641560 :   ret = split_insns (pattern, insn);
     545                 :    6641560 :   nregs = max_reg_num ();
     546                 :   13283100 :   if (nregs > reg_stat.length ())
     547                 :          0 :     reg_stat.safe_grow_cleared (nregs);
     548                 :    6641560 :   return ret;
     549                 :            : }
     550                 :            : 
     551                 :            : /* This is used by find_single_use to locate an rtx in LOC that
     552                 :            :    contains exactly one use of DEST, which is typically either a REG
     553                 :            :    or CC0.  It returns a pointer to the innermost rtx expression
     554                 :            :    containing DEST.  Appearances of DEST that are being used to
     555                 :            :    totally replace it are not counted.  */
     556                 :            : 
     557                 :            : static rtx *
     558                 :   21822000 : find_single_use_1 (rtx dest, rtx *loc)
     559                 :            : {
     560                 :   26387800 :   rtx x = *loc;
     561                 :   26387800 :   enum rtx_code code = GET_CODE (x);
     562                 :   26387800 :   rtx *result = NULL;
     563                 :   26387800 :   rtx *this_result;
     564                 :   26387800 :   int i;
     565                 :   26387800 :   const char *fmt;
     566                 :            : 
     567                 :   26387800 :   switch (code)
     568                 :            :     {
     569                 :            :     case CONST:
     570                 :            :     case LABEL_REF:
     571                 :            :     case SYMBOL_REF:
     572                 :            :     CASE_CONST_ANY:
     573                 :            :     case CLOBBER:
     574                 :            :       return 0;
     575                 :            : 
     576                 :    4534320 :     case SET:
     577                 :            :       /* If the destination is anything other than CC0, PC, a REG or a SUBREG
     578                 :            :          of a REG that occupies all of the REG, the insn uses DEST if
     579                 :            :          it is mentioned in the destination or the source.  Otherwise, we
     580                 :            :          need just check the source.  */
     581                 :    4534320 :       if (GET_CODE (SET_DEST (x)) != CC0
     582                 :    4534320 :           && GET_CODE (SET_DEST (x)) != PC
     583                 :     583956 :           && !REG_P (SET_DEST (x))
     584                 :    4539310 :           && ! (GET_CODE (SET_DEST (x)) == SUBREG
     585                 :       1977 :                 && REG_P (SUBREG_REG (SET_DEST (x)))
     586                 :       1977 :                 && !read_modify_subreg_p (SET_DEST (x))))
     587                 :            :         break;
     588                 :            : 
     589                 :    4533280 :       return find_single_use_1 (dest, &SET_SRC (x));
     590                 :            : 
     591                 :      32596 :     case MEM:
     592                 :      32596 :     case SUBREG:
     593                 :      32596 :       return find_single_use_1 (dest, &XEXP (x, 0));
     594                 :            : 
     595                 :            :     default:
     596                 :            :       break;
     597                 :            :     }
     598                 :            : 
     599                 :            :   /* If it wasn't one of the common cases above, check each expression and
     600                 :            :      vector of this code.  Look for a unique usage of DEST.  */
     601                 :            : 
     602                 :   13269100 :   fmt = GET_RTX_FORMAT (code);
     603                 :   35533000 :   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
     604                 :            :     {
     605                 :   22264000 :       if (fmt[i] == 'e')
     606                 :            :         {
     607                 :   21735100 :           if (dest == XEXP (x, i)
     608                 :   21735100 :               || (REG_P (dest) && REG_P (XEXP (x, i))
     609                 :    1062280 :                   && REGNO (dest) == REGNO (XEXP (x, i))))
     610                 :            :             this_result = loc;
     611                 :            :           else
     612                 :   17201200 :             this_result = find_single_use_1 (dest, &XEXP (x, i));
     613                 :            : 
     614                 :   21735100 :           if (result == NULL)
     615                 :            :             result = this_result;
     616                 :      19895 :           else if (this_result)
     617                 :            :             /* Duplicate usage.  */
     618                 :            :             return NULL;
     619                 :            :         }
     620                 :     528854 :       else if (fmt[i] == 'E')
     621                 :            :         {
     622                 :      38874 :           int j;
     623                 :            : 
     624                 :     125345 :           for (j = XVECLEN (x, i) - 1; j >= 0; j--)
     625                 :            :             {
     626                 :      86498 :               if (XVECEXP (x, i, j) == dest
     627                 :      86498 :                   || (REG_P (dest)
     628                 :      86498 :                       && REG_P (XVECEXP (x, i, j))
     629                 :       3880 :                       && REGNO (XVECEXP (x, i, j)) == REGNO (dest)))
     630                 :            :                 this_result = loc;
     631                 :            :               else
     632                 :      86498 :                 this_result = find_single_use_1 (dest, &XVECEXP (x, i, j));
     633                 :            : 
     634                 :      86498 :               if (result == NULL)
     635                 :            :                 result = this_result;
     636                 :      10486 :               else if (this_result)
     637                 :            :                 return NULL;
     638                 :            :             }
     639                 :            :         }
     640                 :            :     }
     641                 :            : 
     642                 :            :   return result;
     643                 :            : }
     644                 :            : 
     645                 :            : 
     646                 :            : /* See if DEST, produced in INSN, is used only a single time in the
     647                 :            :    sequel.  If so, return a pointer to the innermost rtx expression in which
     648                 :            :    it is used.
     649                 :            : 
     650                 :            :    If PLOC is nonzero, *PLOC is set to the insn containing the single use.
     651                 :            : 
     652                 :            :    If DEST is cc0_rtx, we look only at the next insn.  In that case, we don't
     653                 :            :    care about REG_DEAD notes or LOG_LINKS.
     654                 :            : 
     655                 :            :    Otherwise, we find the single use by finding an insn that has a
     656                 :            :    LOG_LINKS pointing at INSN and has a REG_DEAD note for DEST.  If DEST is
     657                 :            :    only referenced once in that insn, we know that it must be the first
     658                 :            :    and last insn referencing DEST.  */
     659                 :            : 
     660                 :            : static rtx *
     661                 :    4683160 : find_single_use (rtx dest, rtx_insn *insn, rtx_insn **ploc)
     662                 :            : {
     663                 :    4683160 :   basic_block bb;
     664                 :    4683160 :   rtx_insn *next;
     665                 :    4683160 :   rtx *result;
     666                 :    4683160 :   struct insn_link *link;
     667                 :            : 
     668                 :    4683160 :   if (dest == cc0_rtx)
     669                 :            :     {
     670                 :          0 :       next = NEXT_INSN (insn);
     671                 :          0 :       if (next == 0
     672                 :          0 :           || (!NONJUMP_INSN_P (next) && !JUMP_P (next)))
     673                 :            :         return 0;
     674                 :            : 
     675                 :          0 :       result = find_single_use_1 (dest, &PATTERN (next));
     676                 :          0 :       if (result && ploc)
     677                 :          0 :         *ploc = next;
     678                 :          0 :       return result;
     679                 :            :     }
     680                 :            : 
     681                 :    4683160 :   if (!REG_P (dest))
     682                 :            :     return 0;
     683                 :            : 
     684                 :    4683160 :   bb = BLOCK_FOR_INSN (insn);
     685                 :    4683160 :   for (next = NEXT_INSN (insn);
     686                 :    5362930 :        next && BLOCK_FOR_INSN (next) == bb;
     687                 :     679767 :        next = NEXT_INSN (next))
     688                 :    5214010 :     if (NONDEBUG_INSN_P (next) && dead_or_set_p (next, dest))
     689                 :            :       {
     690                 :    5239710 :         FOR_EACH_LOG_LINK (link, next)
     691                 :    4964910 :           if (link->insn == insn && link->regno == REGNO (dest))
     692                 :            :             break;
     693                 :            : 
     694                 :    4809050 :         if (link)
     695                 :            :           {
     696                 :    4534250 :             result = find_single_use_1 (dest, &PATTERN (next));
     697                 :    4534250 :             if (ploc)
     698                 :    4534250 :               *ploc = next;
     699                 :    4534250 :             return result;
     700                 :            :           }
     701                 :            :       }
     702                 :            : 
     703                 :            :   return 0;
     704                 :            : }
     705                 :            : 
     706                 :            : /* Substitute NEWVAL, an rtx expression, into INTO, a place in some
     707                 :            :    insn.  The substitution can be undone by undo_all.  If INTO is already
     708                 :            :    set to NEWVAL, do not record this change.  Because computing NEWVAL might
     709                 :            :    also call SUBST, we have to compute it before we put anything into
     710                 :            :    the undo table.  */
     711                 :            : 
     712                 :            : static void
     713                 :  492592000 : do_SUBST (rtx *into, rtx newval)
     714                 :            : {
     715                 :  492592000 :   struct undo *buf;
     716                 :  492592000 :   rtx oldval = *into;
     717                 :            : 
     718                 :  492592000 :   if (oldval == newval)
     719                 :            :     return;
     720                 :            : 
     721                 :            :   /* We'd like to catch as many invalid transformations here as
     722                 :            :      possible.  Unfortunately, there are way too many mode changes
     723                 :            :      that are perfectly valid, so we'd waste too much effort for
     724                 :            :      little gain doing the checks here.  Focus on catching invalid
     725                 :            :      transformations involving integer constants.  */
     726                 :   55396200 :   if (GET_MODE_CLASS (GET_MODE (oldval)) == MODE_INT
     727                 :   34658200 :       && CONST_INT_P (newval))
     728                 :            :     {
     729                 :            :       /* Sanity check that we're replacing oldval with a CONST_INT
     730                 :            :          that is a valid sign-extension for the original mode.  */
     731                 :    1040050 :       gcc_assert (INTVAL (newval)
     732                 :            :                   == trunc_int_for_mode (INTVAL (newval), GET_MODE (oldval)));
     733                 :            : 
     734                 :            :       /* Replacing the operand of a SUBREG or a ZERO_EXTEND with a
     735                 :            :          CONST_INT is not valid, because after the replacement, the
     736                 :            :          original mode would be gone.  Unfortunately, we can't tell
     737                 :            :          when do_SUBST is called to replace the operand thereof, so we
     738                 :            :          perform this test on oldval instead, checking whether an
     739                 :            :          invalid replacement took place before we got here.  */
     740                 :    1040050 :       gcc_assert (!(GET_CODE (oldval) == SUBREG
     741                 :            :                     && CONST_INT_P (SUBREG_REG (oldval))));
     742                 :    1040050 :       gcc_assert (!(GET_CODE (oldval) == ZERO_EXTEND
     743                 :            :                     && CONST_INT_P (XEXP (oldval, 0))));
     744                 :            :     }
     745                 :            : 
     746                 :   55396200 :   if (undobuf.frees)
     747                 :   52722200 :     buf = undobuf.frees, undobuf.frees = buf->next;
     748                 :            :   else
     749                 :    2673980 :     buf = XNEW (struct undo);
     750                 :            : 
     751                 :   55396200 :   buf->kind = UNDO_RTX;
     752                 :   55396200 :   buf->where.r = into;
     753                 :   55396200 :   buf->old_contents.r = oldval;
     754                 :   55396200 :   *into = newval;
     755                 :            : 
     756                 :   55396200 :   buf->next = undobuf.undos, undobuf.undos = buf;
     757                 :            : }
     758                 :            : 
     759                 :            : #define SUBST(INTO, NEWVAL)     do_SUBST (&(INTO), (NEWVAL))
     760                 :            : 
     761                 :            : /* Similar to SUBST, but NEWVAL is an int expression.  Note that substitution
     762                 :            :    for the value of a HOST_WIDE_INT value (including CONST_INT) is
     763                 :            :    not safe.  */
     764                 :            : 
     765                 :            : static void
     766                 :    9128660 : do_SUBST_INT (int *into, int newval)
     767                 :            : {
     768                 :    9128660 :   struct undo *buf;
     769                 :    9128660 :   int oldval = *into;
     770                 :            : 
     771                 :    9128660 :   if (oldval == newval)
     772                 :            :     return;
     773                 :            : 
     774                 :    3856450 :   if (undobuf.frees)
     775                 :    3504980 :     buf = undobuf.frees, undobuf.frees = buf->next;
     776                 :            :   else
     777                 :     351474 :     buf = XNEW (struct undo);
     778                 :            : 
     779                 :    3856450 :   buf->kind = UNDO_INT;
     780                 :    3856450 :   buf->where.i = into;
     781                 :    3856450 :   buf->old_contents.i = oldval;
     782                 :    3856450 :   *into = newval;
     783                 :            : 
     784                 :    3856450 :   buf->next = undobuf.undos, undobuf.undos = buf;
     785                 :            : }
     786                 :            : 
     787                 :            : #define SUBST_INT(INTO, NEWVAL)  do_SUBST_INT (&(INTO), (NEWVAL))
     788                 :            : 
     789                 :            : /* Similar to SUBST, but just substitute the mode.  This is used when
     790                 :            :    changing the mode of a pseudo-register, so that any other
     791                 :            :    references to the entry in the regno_reg_rtx array will change as
     792                 :            :    well.  */
     793                 :            : 
     794                 :            : static void
     795                 :     838434 : do_SUBST_MODE (rtx *into, machine_mode newval)
     796                 :            : {
     797                 :     838434 :   struct undo *buf;
     798                 :     838434 :   machine_mode oldval = GET_MODE (*into);
     799                 :            : 
     800                 :     838434 :   if (oldval == newval)
     801                 :            :     return;
     802                 :            : 
     803                 :     838434 :   if (undobuf.frees)
     804                 :     795441 :     buf = undobuf.frees, undobuf.frees = buf->next;
     805                 :            :   else
     806                 :      42993 :     buf = XNEW (struct undo);
     807                 :            : 
     808                 :     838434 :   buf->kind = UNDO_MODE;
     809                 :     838434 :   buf->where.r = into;
     810                 :     838434 :   buf->old_contents.m = oldval;
     811                 :     838434 :   adjust_reg_mode (*into, newval);
     812                 :            : 
     813                 :     838434 :   buf->next = undobuf.undos, undobuf.undos = buf;
     814                 :            : }
     815                 :            : 
     816                 :            : #define SUBST_MODE(INTO, NEWVAL)  do_SUBST_MODE (&(INTO), (NEWVAL))
     817                 :            : 
     818                 :            : /* Similar to SUBST, but NEWVAL is a LOG_LINKS expression.  */
     819                 :            : 
     820                 :            : static void
     821                 :      58138 : do_SUBST_LINK (struct insn_link **into, struct insn_link *newval)
     822                 :            : {
     823                 :      58138 :   struct undo *buf;
     824                 :      58138 :   struct insn_link * oldval = *into;
     825                 :            : 
     826                 :      58138 :   if (oldval == newval)
     827                 :            :     return;
     828                 :            : 
     829                 :      58138 :   if (undobuf.frees)
     830                 :      55887 :     buf = undobuf.frees, undobuf.frees = buf->next;
     831                 :            :   else
     832                 :       2251 :     buf = XNEW (struct undo);
     833                 :            : 
     834                 :      58138 :   buf->kind = UNDO_LINKS;
     835                 :      58138 :   buf->where.l = into;
     836                 :      58138 :   buf->old_contents.l = oldval;
     837                 :      58138 :   *into = newval;
     838                 :            : 
     839                 :      58138 :   buf->next = undobuf.undos, undobuf.undos = buf;
     840                 :            : }
     841                 :            : 
     842                 :            : #define SUBST_LINK(oldval, newval) do_SUBST_LINK (&oldval, newval)
     843                 :            : 
     844                 :            : /* Subroutine of try_combine.  Determine whether the replacement patterns
     845                 :            :    NEWPAT, NEWI2PAT and NEWOTHERPAT are cheaper according to insn_cost
     846                 :            :    than the original sequence I0, I1, I2, I3 and undobuf.other_insn.  Note
     847                 :            :    that I0, I1 and/or NEWI2PAT may be NULL_RTX.  Similarly, NEWOTHERPAT and
     848                 :            :    undobuf.other_insn may also both be NULL_RTX.  Return false if the cost
     849                 :            :    of all the instructions can be estimated and the replacements are more
     850                 :            :    expensive than the original sequence.  */
     851                 :            : 
     852                 :            : static bool
     853                 :    2420380 : combine_validate_cost (rtx_insn *i0, rtx_insn *i1, rtx_insn *i2, rtx_insn *i3,
     854                 :            :                        rtx newpat, rtx newi2pat, rtx newotherpat)
     855                 :            : {
     856                 :    2420380 :   int i0_cost, i1_cost, i2_cost, i3_cost;
     857                 :    2420380 :   int new_i2_cost, new_i3_cost;
     858                 :    2420380 :   int old_cost, new_cost;
     859                 :            : 
     860                 :            :   /* Lookup the original insn_costs.  */
     861                 :    2420380 :   i2_cost = INSN_COST (i2);
     862                 :    2420380 :   i3_cost = INSN_COST (i3);
     863                 :            : 
     864                 :    2420380 :   if (i1)
     865                 :            :     {
     866                 :      53425 :       i1_cost = INSN_COST (i1);
     867                 :      53425 :       if (i0)
     868                 :            :         {
     869                 :       1439 :           i0_cost = INSN_COST (i0);
     870                 :       1387 :           old_cost = (i0_cost > 0 && i1_cost > 0 && i2_cost > 0 && i3_cost > 0
     871                 :       2821 :                       ? i0_cost + i1_cost + i2_cost + i3_cost : 0);
     872                 :            :         }
     873                 :            :       else
     874                 :            :         {
     875                 :      47168 :           old_cost = (i1_cost > 0 && i2_cost > 0 && i3_cost > 0
     876                 :      99093 :                       ? i1_cost + i2_cost + i3_cost : 0);
     877                 :            :           i0_cost = 0;
     878                 :            :         }
     879                 :            :     }
     880                 :            :   else
     881                 :            :     {
     882                 :    2366950 :       old_cost = (i2_cost > 0 && i3_cost > 0) ? i2_cost + i3_cost : 0;
     883                 :            :       i1_cost = i0_cost = 0;
     884                 :            :     }
     885                 :            : 
     886                 :            :   /* If we have split a PARALLEL I2 to I1,I2, we have counted its cost twice;
     887                 :            :      correct that.  */
     888                 :    2468870 :   if (old_cost && i1 && INSN_UID (i1) == INSN_UID (i2))
     889                 :       1058 :     old_cost -= i1_cost;
     890                 :            : 
     891                 :            : 
     892                 :            :   /* Calculate the replacement insn_costs.  */
     893                 :    2420380 :   rtx tmp = PATTERN (i3);
     894                 :    2420380 :   PATTERN (i3) = newpat;
     895                 :    2420380 :   int tmpi = INSN_CODE (i3);
     896                 :    2420380 :   INSN_CODE (i3) = -1;
     897                 :    2420380 :   new_i3_cost = insn_cost (i3, optimize_this_for_speed_p);
     898                 :    2420380 :   PATTERN (i3) = tmp;
     899                 :    2420380 :   INSN_CODE (i3) = tmpi;
     900                 :    2420380 :   if (newi2pat)
     901                 :            :     {
     902                 :     112565 :       tmp = PATTERN (i2);
     903                 :     112565 :       PATTERN (i2) = newi2pat;
     904                 :     112565 :       tmpi = INSN_CODE (i2);
     905                 :     112565 :       INSN_CODE (i2) = -1;
     906                 :     112565 :       new_i2_cost = insn_cost (i2, optimize_this_for_speed_p);
     907                 :     112565 :       PATTERN (i2) = tmp;
     908                 :     112565 :       INSN_CODE (i2) = tmpi;
     909                 :     112565 :       new_cost = (new_i2_cost > 0 && new_i3_cost > 0)
     910                 :     112565 :                  ? new_i2_cost + new_i3_cost : 0;
     911                 :            :     }
     912                 :            :   else
     913                 :            :     {
     914                 :            :       new_cost = new_i3_cost;
     915                 :            :       new_i2_cost = 0;
     916                 :            :     }
     917                 :            : 
     918                 :    2420380 :   if (undobuf.other_insn)
     919                 :            :     {
     920                 :     152443 :       int old_other_cost, new_other_cost;
     921                 :            : 
     922                 :     152443 :       old_other_cost = INSN_COST (undobuf.other_insn);
     923                 :     152443 :       tmp = PATTERN (undobuf.other_insn);
     924                 :     152443 :       PATTERN (undobuf.other_insn) = newotherpat;
     925                 :     152443 :       tmpi = INSN_CODE (undobuf.other_insn);
     926                 :     152443 :       INSN_CODE (undobuf.other_insn) = -1;
     927                 :     152443 :       new_other_cost = insn_cost (undobuf.other_insn,
     928                 :            :                                   optimize_this_for_speed_p);
     929                 :     152443 :       PATTERN (undobuf.other_insn) = tmp;
     930                 :     152443 :       INSN_CODE (undobuf.other_insn) = tmpi;
     931                 :     152443 :       if (old_other_cost > 0 && new_other_cost > 0)
     932                 :            :         {
     933                 :     152443 :           old_cost += old_other_cost;
     934                 :     152443 :           new_cost += new_other_cost;
     935                 :            :         }
     936                 :            :       else
     937                 :            :         old_cost = 0;
     938                 :            :     }
     939                 :            : 
     940                 :            :   /* Disallow this combination if both new_cost and old_cost are greater than
     941                 :            :      zero, and new_cost is greater than old cost.  */
     942                 :    2420380 :   int reject = old_cost > 0 && new_cost > old_cost;
     943                 :            : 
     944                 :    2420380 :   if (dump_file)
     945                 :            :     {
     946                 :        484 :       fprintf (dump_file, "%s combination of insns ",
     947                 :            :                reject ? "rejecting" : "allowing");
     948                 :        244 :       if (i0)
     949                 :          0 :         fprintf (dump_file, "%d, ", INSN_UID (i0));
     950                 :        257 :       if (i1 && INSN_UID (i1) != INSN_UID (i2))
     951                 :         13 :         fprintf (dump_file, "%d, ", INSN_UID (i1));
     952                 :        244 :       fprintf (dump_file, "%d and %d\n", INSN_UID (i2), INSN_UID (i3));
     953                 :            : 
     954                 :        244 :       fprintf (dump_file, "original costs ");
     955                 :        244 :       if (i0)
     956                 :          0 :         fprintf (dump_file, "%d + ", i0_cost);
     957                 :        257 :       if (i1 && INSN_UID (i1) != INSN_UID (i2))
     958                 :         13 :         fprintf (dump_file, "%d + ", i1_cost);
     959                 :        244 :       fprintf (dump_file, "%d + %d = %d\n", i2_cost, i3_cost, old_cost);
     960                 :            : 
     961                 :        244 :       if (newi2pat)
     962                 :         19 :         fprintf (dump_file, "replacement costs %d + %d = %d\n",
     963                 :            :                  new_i2_cost, new_i3_cost, new_cost);
     964                 :            :       else
     965                 :        225 :         fprintf (dump_file, "replacement cost %d\n", new_cost);
     966                 :            :     }
     967                 :            : 
     968                 :    2420380 :   if (reject)
     969                 :            :     return false;
     970                 :            : 
     971                 :            :   /* Update the uid_insn_cost array with the replacement costs.  */
     972                 :    2363410 :   INSN_COST (i2) = new_i2_cost;
     973                 :    2363410 :   INSN_COST (i3) = new_i3_cost;
     974                 :    2363410 :   if (i1)
     975                 :            :     {
     976                 :      50498 :       INSN_COST (i1) = 0;
     977                 :      50498 :       if (i0)
     978                 :       1422 :         INSN_COST (i0) = 0;
     979                 :            :     }
     980                 :            : 
     981                 :            :   return true;
     982                 :            : }
     983                 :            : 
     984                 :            : 
     985                 :            : /* Delete any insns that copy a register to itself.
     986                 :            :    Return true if the CFG was changed.  */
     987                 :            : 
     988                 :            : static bool
     989                 :     662939 : delete_noop_moves (void)
     990                 :            : {
     991                 :     662939 :   rtx_insn *insn, *next;
     992                 :     662939 :   basic_block bb;
     993                 :            : 
     994                 :     662939 :   bool edges_deleted = false;
     995                 :            : 
     996                 :    7263680 :   FOR_EACH_BB_FN (bb, cfun)
     997                 :            :     {
     998                 :   83995900 :       for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb)); insn = next)
     999                 :            :         {
    1000                 :   77395100 :           next = NEXT_INSN (insn);
    1001                 :   77395100 :           if (INSN_P (insn) && noop_move_p (insn))
    1002                 :            :             {
    1003                 :       3160 :               if (dump_file)
    1004                 :          0 :                 fprintf (dump_file, "deleting noop move %d\n", INSN_UID (insn));
    1005                 :            : 
    1006                 :       3160 :               edges_deleted |= delete_insn_and_edges (insn);
    1007                 :            :             }
    1008                 :            :         }
    1009                 :            :     }
    1010                 :            : 
    1011                 :     662939 :   return edges_deleted;
    1012                 :            : }
    1013                 :            : 
    1014                 :            : 
    1015                 :            : /* Return false if we do not want to (or cannot) combine DEF.  */
    1016                 :            : static bool
    1017                 :   26252700 : can_combine_def_p (df_ref def)
    1018                 :            : {
    1019                 :            :   /* Do not consider if it is pre/post modification in MEM.  */
    1020                 :   26252700 :   if (DF_REF_FLAGS (def) & DF_REF_PRE_POST_MODIFY)
    1021                 :            :     return false;
    1022                 :            : 
    1023                 :   24638100 :   unsigned int regno = DF_REF_REGNO (def);
    1024                 :            : 
    1025                 :            :   /* Do not combine frame pointer adjustments.  */
    1026                 :   24638100 :   if ((regno == FRAME_POINTER_REGNUM
    1027                 :          0 :        && (!reload_completed || frame_pointer_needed))
    1028                 :       2013 :       || (!HARD_FRAME_POINTER_IS_FRAME_POINTER
    1029                 :   24638100 :           && regno == HARD_FRAME_POINTER_REGNUM
    1030                 :            :           && (!reload_completed || frame_pointer_needed))
    1031                 :   24636000 :       || (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
    1032                 :          0 :           && regno == ARG_POINTER_REGNUM && fixed_regs[regno]))
    1033                 :       2013 :     return false;
    1034                 :            : 
    1035                 :            :   return true;
    1036                 :            : }
    1037                 :            : 
    1038                 :            : /* Return false if we do not want to (or cannot) combine USE.  */
    1039                 :            : static bool
    1040                 :   49649200 : can_combine_use_p (df_ref use)
    1041                 :            : {
    1042                 :            :   /* Do not consider the usage of the stack pointer by function call.  */
    1043                 :          0 :   if (DF_REF_FLAGS (use) & DF_REF_CALL_STACK_USAGE)
    1044                 :          0 :     return false;
    1045                 :            : 
    1046                 :            :   return true;
    1047                 :            : }
    1048                 :            : 
    1049                 :            : /* Fill in log links field for all insns.  */
    1050                 :            : 
    1051                 :            : static void
    1052                 :     662939 : create_log_links (void)
    1053                 :            : {
    1054                 :     662939 :   basic_block bb;
    1055                 :     662939 :   rtx_insn **next_use;
    1056                 :     662939 :   rtx_insn *insn;
    1057                 :     662939 :   df_ref def, use;
    1058                 :            : 
    1059                 :     662939 :   next_use = XCNEWVEC (rtx_insn *, max_reg_num ());
    1060                 :            : 
    1061                 :            :   /* Pass through each block from the end, recording the uses of each
    1062                 :            :      register and establishing log links when def is encountered.
    1063                 :            :      Note that we do not clear next_use array in order to save time,
    1064                 :            :      so we have to test whether the use is in the same basic block as def.
    1065                 :            : 
    1066                 :            :      There are a few cases below when we do not consider the definition or
    1067                 :            :      usage -- these are taken from original flow.c did. Don't ask me why it is
    1068                 :            :      done this way; I don't know and if it works, I don't want to know.  */
    1069                 :            : 
    1070                 :    7263680 :   FOR_EACH_BB_FN (bb, cfun)
    1071                 :            :     {
    1072                 :  161362000 :       FOR_BB_INSNS_REVERSE (bb, insn)
    1073                 :            :         {
    1074                 :   77380700 :           if (!NONDEBUG_INSN_P (insn))
    1075                 :   37919700 :             continue;
    1076                 :            : 
    1077                 :            :           /* Log links are created only once.  */
    1078                 :   39461000 :           gcc_assert (!LOG_LINKS (insn));
    1079                 :            : 
    1080                 :  280662000 :           FOR_EACH_INSN_DEF (def, insn)
    1081                 :            :             {
    1082                 :  241200000 :               unsigned int regno = DF_REF_REGNO (def);
    1083                 :  241200000 :               rtx_insn *use_insn;
    1084                 :            : 
    1085                 :  241200000 :               if (!next_use[regno])
    1086                 :  214948000 :                 continue;
    1087                 :            : 
    1088                 :   26252700 :               if (!can_combine_def_p (def))
    1089                 :    1616670 :                 continue;
    1090                 :            : 
    1091                 :   24636000 :               use_insn = next_use[regno];
    1092                 :   24636000 :               next_use[regno] = NULL;
    1093                 :            : 
    1094                 :   24636000 :               if (BLOCK_FOR_INSN (use_insn) != bb)
    1095                 :    1468960 :                 continue;
    1096                 :            : 
    1097                 :            :               /* flow.c claimed:
    1098                 :            : 
    1099                 :            :                  We don't build a LOG_LINK for hard registers contained
    1100                 :            :                  in ASM_OPERANDs.  If these registers get replaced,
    1101                 :            :                  we might wind up changing the semantics of the insn,
    1102                 :            :                  even if reload can make what appear to be valid
    1103                 :            :                  assignments later.  */
    1104                 :   23167700 :               if (regno < FIRST_PSEUDO_REGISTER
    1105                 :   23167100 :                   && asm_noperands (PATTERN (use_insn)) >= 0)
    1106                 :        636 :                 continue;
    1107                 :            : 
    1108                 :            :               /* Don't add duplicate links between instructions.  */
    1109                 :   23166400 :               struct insn_link *links;
    1110                 :   30235200 :               FOR_EACH_LOG_LINK (links, use_insn)
    1111                 :    7068790 :                 if (insn == links->insn && regno == links->regno)
    1112                 :            :                   break;
    1113                 :            : 
    1114                 :   23166400 :               if (!links)
    1115                 :   23166400 :                 LOG_LINKS (use_insn)
    1116                 :   23166400 :                   = alloc_insn_link (insn, regno, LOG_LINKS (use_insn));
    1117                 :            :             }
    1118                 :            : 
    1119                 :   89110300 :           FOR_EACH_INSN_USE (use, insn)
    1120                 :   96142400 :             if (can_combine_use_p (use))
    1121                 :   46493100 :               next_use[DF_REF_REGNO (use)] = insn;
    1122                 :            :         }
    1123                 :            :     }
    1124                 :            : 
    1125                 :     662939 :   free (next_use);
    1126                 :     662939 : }
    1127                 :            : 
    1128                 :            : /* Walk the LOG_LINKS of insn B to see if we find a reference to A.  Return
    1129                 :            :    true if we found a LOG_LINK that proves that A feeds B.  This only works
    1130                 :            :    if there are no instructions between A and B which could have a link
    1131                 :            :    depending on A, since in that case we would not record a link for B.
    1132                 :            :    We also check the implicit dependency created by a cc0 setter/user
    1133                 :            :    pair.  */
    1134                 :            : 
    1135                 :            : static bool
    1136                 :    6881560 : insn_a_feeds_b (rtx_insn *a, rtx_insn *b)
    1137                 :            : {
    1138                 :    6881560 :   struct insn_link *links;
    1139                 :    8550740 :   FOR_EACH_LOG_LINK (links, b)
    1140                 :    7162680 :     if (links->insn == a)
    1141                 :            :       return true;
    1142                 :            :   if (HAVE_cc0 && sets_cc0_p (a))
    1143                 :            :     return true;
    1144                 :            :   return false;
    1145                 :            : }
    1146                 :            : 
    1147                 :            : /* Main entry point for combiner.  F is the first insn of the function.
    1148                 :            :    NREGS is the first unused pseudo-reg number.
    1149                 :            : 
    1150                 :            :    Return nonzero if the CFG was changed (e.g. if the combiner has
    1151                 :            :    turned an indirect jump instruction into a direct jump).  */
    1152                 :            : static int
    1153                 :     687425 : combine_instructions (rtx_insn *f, unsigned int nregs)
    1154                 :            : {
    1155                 :     687425 :   rtx_insn *insn, *next;
    1156                 :     687425 :   rtx_insn *prev;
    1157                 :     687425 :   struct insn_link *links, *nextlinks;
    1158                 :     687425 :   rtx_insn *first;
    1159                 :     687425 :   basic_block last_bb;
    1160                 :            : 
    1161                 :     687425 :   int new_direct_jump_p = 0;
    1162                 :            : 
    1163                 :    2272480 :   for (first = f; first && !NONDEBUG_INSN_P (first); )
    1164                 :    1585060 :     first = NEXT_INSN (first);
    1165                 :     687425 :   if (!first)
    1166                 :            :     return 0;
    1167                 :            : 
    1168                 :     662939 :   combine_attempts = 0;
    1169                 :     662939 :   combine_merges = 0;
    1170                 :     662939 :   combine_extras = 0;
    1171                 :     662939 :   combine_successes = 0;
    1172                 :            : 
    1173                 :     662939 :   rtl_hooks = combine_rtl_hooks;
    1174                 :            : 
    1175                 :     662939 :   reg_stat.safe_grow_cleared (nregs);
    1176                 :            : 
    1177                 :     662939 :   init_recog_no_volatile ();
    1178                 :            : 
    1179                 :            :   /* Allocate array for insn info.  */
    1180                 :     662939 :   max_uid_known = get_max_uid ();
    1181                 :     662939 :   uid_log_links = XCNEWVEC (struct insn_link *, max_uid_known + 1);
    1182                 :     662939 :   uid_insn_cost = XCNEWVEC (int, max_uid_known + 1);
    1183                 :     662939 :   gcc_obstack_init (&insn_link_obstack);
    1184                 :            : 
    1185                 :    1325880 :   nonzero_bits_mode = int_mode_for_size (HOST_BITS_PER_WIDE_INT, 0).require ();
    1186                 :            : 
    1187                 :            :   /* Don't use reg_stat[].nonzero_bits when computing it.  This can cause
    1188                 :            :      problems when, for example, we have j <<= 1 in a loop.  */
    1189                 :            : 
    1190                 :     662939 :   nonzero_sign_valid = 0;
    1191                 :     662939 :   label_tick = label_tick_ebb_start = 1;
    1192                 :            : 
    1193                 :            :   /* Scan all SETs and see if we can deduce anything about what
    1194                 :            :      bits are known to be zero for some registers and how many copies
    1195                 :            :      of the sign bit are known to exist for those registers.
    1196                 :            : 
    1197                 :            :      Also set any known values so that we can use it while searching
    1198                 :            :      for what bits are known to be set.  */
    1199                 :            : 
    1200                 :     662939 :   setup_incoming_promotions (first);
    1201                 :            :   /* Allow the entry block and the first block to fall into the same EBB.
    1202                 :            :      Conceptually the incoming promotions are assigned to the entry block.  */
    1203                 :     662939 :   last_bb = ENTRY_BLOCK_PTR_FOR_FN (cfun);
    1204                 :            : 
    1205                 :     662939 :   create_log_links ();
    1206                 :    7263680 :   FOR_EACH_BB_FN (this_basic_block, cfun)
    1207                 :            :     {
    1208                 :    6600740 :       optimize_this_for_speed_p = optimize_bb_for_speed_p (this_basic_block);
    1209                 :    6600740 :       last_call_luid = 0;
    1210                 :    6600740 :       mem_last_set = -1;
    1211                 :            : 
    1212                 :    6600740 :       label_tick++;
    1213                 :    6600740 :       if (!single_pred_p (this_basic_block)
    1214                 :    6600740 :           || single_pred (this_basic_block) != last_bb)
    1215                 :    3151010 :         label_tick_ebb_start = label_tick;
    1216                 :    6600740 :       last_bb = this_basic_block;
    1217                 :            : 
    1218                 :  161362000 :       FOR_BB_INSNS (this_basic_block, insn)
    1219                 :   77380700 :         if (INSN_P (insn) && BLOCK_FOR_INSN (insn))
    1220                 :            :           {
    1221                 :   66981900 :             rtx links;
    1222                 :            : 
    1223                 :   66981900 :             subst_low_luid = DF_INSN_LUID (insn);
    1224                 :   66981900 :             subst_insn = insn;
    1225                 :            : 
    1226                 :   66981900 :             note_stores (insn, set_nonzero_bits_and_sign_copies, insn);
    1227                 :   66981900 :             record_dead_and_set_regs (insn);
    1228                 :            : 
    1229                 :   66981900 :             if (AUTO_INC_DEC)
    1230                 :            :               for (links = REG_NOTES (insn); links; links = XEXP (links, 1))
    1231                 :            :                 if (REG_NOTE_KIND (links) == REG_INC)
    1232                 :            :                   set_nonzero_bits_and_sign_copies (XEXP (links, 0), NULL_RTX,
    1233                 :            :                                                     insn);
    1234                 :            : 
    1235                 :            :             /* Record the current insn_cost of this instruction.  */
    1236                 :   66981900 :             INSN_COST (insn) = insn_cost (insn, optimize_this_for_speed_p);
    1237                 :   66981900 :             if (dump_file)
    1238                 :            :               {
    1239                 :       1671 :                 fprintf (dump_file, "insn_cost %d for ", INSN_COST (insn));
    1240                 :       1671 :                 dump_insn_slim (dump_file, insn);
    1241                 :            :               }
    1242                 :            :           }
    1243                 :            :     }
    1244                 :            : 
    1245                 :     662939 :   nonzero_sign_valid = 1;
    1246                 :            : 
    1247                 :            :   /* Now scan all the insns in forward order.  */
    1248                 :     662939 :   label_tick = label_tick_ebb_start = 1;
    1249                 :     662939 :   init_reg_last ();
    1250                 :     662939 :   setup_incoming_promotions (first);
    1251                 :     662939 :   last_bb = ENTRY_BLOCK_PTR_FOR_FN (cfun);
    1252                 :     662939 :   int max_combine = param_max_combine_insns;
    1253                 :            : 
    1254                 :    7263680 :   FOR_EACH_BB_FN (this_basic_block, cfun)
    1255                 :            :     {
    1256                 :    6600740 :       rtx_insn *last_combined_insn = NULL;
    1257                 :            : 
    1258                 :            :       /* Ignore instruction combination in basic blocks that are going to
    1259                 :            :          be removed as unreachable anyway.  See PR82386.  */
    1260                 :    6600740 :       if (EDGE_COUNT (this_basic_block->preds) == 0)
    1261                 :       1137 :         continue;
    1262                 :            : 
    1263                 :    6599610 :       optimize_this_for_speed_p = optimize_bb_for_speed_p (this_basic_block);
    1264                 :    6599610 :       last_call_luid = 0;
    1265                 :    6599610 :       mem_last_set = -1;
    1266                 :            : 
    1267                 :    6599610 :       label_tick++;
    1268                 :    6599610 :       if (!single_pred_p (this_basic_block)
    1269                 :    6599610 :           || single_pred (this_basic_block) != last_bb)
    1270                 :    3150940 :         label_tick_ebb_start = label_tick;
    1271                 :    6599610 :       last_bb = this_basic_block;
    1272                 :            : 
    1273                 :    6599610 :       rtl_profile_for_bb (this_basic_block);
    1274                 :    6599610 :       for (insn = BB_HEAD (this_basic_block);
    1275                 :   86897600 :            insn != NEXT_INSN (BB_END (this_basic_block));
    1276                 :   77934600 :            insn = next ? next : NEXT_INSN (insn))
    1277                 :            :         {
    1278                 :   80298000 :           next = 0;
    1279                 :   80298000 :           if (!NONDEBUG_INSN_P (insn))
    1280                 :   38162400 :             continue;
    1281                 :            : 
    1282                 :       2429 :           while (last_combined_insn
    1283                 :   42138100 :                  && (!NONDEBUG_INSN_P (last_combined_insn)
    1284                 :   35697600 :                      || last_combined_insn->deleted ()))
    1285                 :       2429 :             last_combined_insn = PREV_INSN (last_combined_insn);
    1286                 :   42135600 :           if (last_combined_insn == NULL_RTX
    1287                 :   35697000 :               || BLOCK_FOR_INSN (last_combined_insn) != this_basic_block
    1288                 :   77832400 :               || DF_INSN_LUID (last_combined_insn) <= DF_INSN_LUID (insn))
    1289                 :            :             last_combined_insn = insn;
    1290                 :            : 
    1291                 :            :           /* See if we know about function return values before this
    1292                 :            :              insn based upon SUBREG flags.  */
    1293                 :   42135600 :           check_promoted_subreg (insn, PATTERN (insn));
    1294                 :            : 
    1295                 :            :           /* See if we can find hardregs and subreg of pseudos in
    1296                 :            :              narrower modes.  This could help turning TRUNCATEs
    1297                 :            :              into SUBREGs.  */
    1298                 :   42135600 :           note_uses (&PATTERN (insn), record_truncated_values, NULL);
    1299                 :            : 
    1300                 :            :           /* Try this insn with each insn it links back to.  */
    1301                 :            : 
    1302                 :   64922300 :           FOR_EACH_LOG_LINK (links, insn)
    1303                 :   25089800 :             if ((next = try_combine (insn, links->insn, NULL,
    1304                 :            :                                      NULL, &new_direct_jump_p,
    1305                 :            :                                      last_combined_insn)) != 0)
    1306                 :            :               {
    1307                 :    2303140 :                 statistics_counter_event (cfun, "two-insn combine", 1);
    1308                 :    2303140 :                 goto retry;
    1309                 :            :               }
    1310                 :            : 
    1311                 :            :           /* Try each sequence of three linked insns ending with this one.  */
    1312                 :            : 
    1313                 :   39832500 :           if (max_combine >= 3)
    1314                 :   62269000 :             FOR_EACH_LOG_LINK (links, insn)
    1315                 :            :               {
    1316                 :   22546000 :                 rtx_insn *link = links->insn;
    1317                 :            : 
    1318                 :            :                 /* If the linked insn has been replaced by a note, then there
    1319                 :            :                    is no point in pursuing this chain any further.  */
    1320                 :   22546000 :                 if (NOTE_P (link))
    1321                 :         87 :                   continue;
    1322                 :            : 
    1323                 :   33141300 :                 FOR_EACH_LOG_LINK (nextlinks, link)
    1324                 :   10634200 :                   if ((next = try_combine (insn, link, nextlinks->insn,
    1325                 :            :                                            NULL, &new_direct_jump_p,
    1326                 :            :                                            last_combined_insn)) != 0)
    1327                 :            :                     {
    1328                 :      38749 :                       statistics_counter_event (cfun, "three-insn combine", 1);
    1329                 :      38749 :                       goto retry;
    1330                 :            :                     }
    1331                 :            :               }
    1332                 :            : 
    1333                 :            :           /* Try to combine a jump insn that uses CC0
    1334                 :            :              with a preceding insn that sets CC0, and maybe with its
    1335                 :            :              logical predecessor as well.
    1336                 :            :              This is how we make decrement-and-branch insns.
    1337                 :            :              We need this special code because data flow connections
    1338                 :            :              via CC0 do not get entered in LOG_LINKS.  */
    1339                 :            : 
    1340                 :   39793700 :           if (HAVE_cc0
    1341                 :            :               && JUMP_P (insn)
    1342                 :            :               && (prev = prev_nonnote_insn (insn)) != 0
    1343                 :            :               && NONJUMP_INSN_P (prev)
    1344                 :            :               && sets_cc0_p (PATTERN (prev)))
    1345                 :            :             {
    1346                 :            :               if ((next = try_combine (insn, prev, NULL, NULL,
    1347                 :            :                                        &new_direct_jump_p,
    1348                 :            :                                        last_combined_insn)) != 0)
    1349                 :            :                 goto retry;
    1350                 :            : 
    1351                 :            :               FOR_EACH_LOG_LINK (nextlinks, prev)
    1352                 :            :                   if ((next = try_combine (insn, prev, nextlinks->insn,
    1353                 :            :                                            NULL, &new_direct_jump_p,
    1354                 :            :                                            last_combined_insn)) != 0)
    1355                 :            :                     goto retry;
    1356                 :            :             }
    1357                 :            : 
    1358                 :            :           /* Do the same for an insn that explicitly references CC0.  */
    1359                 :   39793700 :           if (HAVE_cc0 && NONJUMP_INSN_P (insn)
    1360                 :            :               && (prev = prev_nonnote_insn (insn)) != 0
    1361                 :            :               && NONJUMP_INSN_P (prev)
    1362                 :            :               && sets_cc0_p (PATTERN (prev))
    1363                 :            :               && GET_CODE (PATTERN (insn)) == SET
    1364                 :            :               && reg_mentioned_p (cc0_rtx, SET_SRC (PATTERN (insn))))
    1365                 :            :             {
    1366                 :            :               if ((next = try_combine (insn, prev, NULL, NULL,
    1367                 :            :                                        &new_direct_jump_p,
    1368                 :            :                                        last_combined_insn)) != 0)
    1369                 :            :                 goto retry;
    1370                 :            : 
    1371                 :            :               FOR_EACH_LOG_LINK (nextlinks, prev)
    1372                 :            :                   if ((next = try_combine (insn, prev, nextlinks->insn,
    1373                 :            :                                            NULL, &new_direct_jump_p,
    1374                 :            :                                            last_combined_insn)) != 0)
    1375                 :            :                     goto retry;
    1376                 :            :             }
    1377                 :            : 
    1378                 :            :           /* Finally, see if any of the insns that this insn links to
    1379                 :            :              explicitly references CC0.  If so, try this insn, that insn,
    1380                 :            :              and its predecessor if it sets CC0.  */
    1381                 :   39793700 :           if (HAVE_cc0)
    1382                 :            :             {
    1383                 :            :               FOR_EACH_LOG_LINK (links, insn)
    1384                 :            :                 if (NONJUMP_INSN_P (links->insn)
    1385                 :            :                     && GET_CODE (PATTERN (links->insn)) == SET
    1386                 :            :                     && reg_mentioned_p (cc0_rtx, SET_SRC (PATTERN (links->insn)))
    1387                 :            :                     && (prev = prev_nonnote_insn (links->insn)) != 0
    1388                 :            :                     && NONJUMP_INSN_P (prev)
    1389                 :            :                     && sets_cc0_p (PATTERN (prev))
    1390                 :            :                     && (next = try_combine (insn, links->insn,
    1391                 :            :                                             prev, NULL, &new_direct_jump_p,
    1392                 :            :                                             last_combined_insn)) != 0)
    1393                 :            :                   goto retry;
    1394                 :            :             }
    1395                 :            : 
    1396                 :            :           /* Try combining an insn with two different insns whose results it
    1397                 :            :              uses.  */
    1398                 :   39793700 :           if (max_combine >= 3)
    1399                 :   62212100 :             FOR_EACH_LOG_LINK (links, insn)
    1400                 :   29394400 :               for (nextlinks = links->next; nextlinks;
    1401                 :    6897190 :                    nextlinks = nextlinks->next)
    1402                 :    6905330 :                 if ((next = try_combine (insn, links->insn,
    1403                 :            :                                          nextlinks->insn, NULL,
    1404                 :            :                                          &new_direct_jump_p,
    1405                 :            :                                          last_combined_insn)) != 0)
    1406                 :            : 
    1407                 :            :                   {
    1408                 :       8145 :                     statistics_counter_event (cfun, "three-insn combine", 1);
    1409                 :       8145 :                     goto retry;
    1410                 :            :                   }
    1411                 :            : 
    1412                 :            :           /* Try four-instruction combinations.  */
    1413                 :   39785600 :           if (max_combine >= 4)
    1414                 :   62202000 :             FOR_EACH_LOG_LINK (links, insn)
    1415                 :            :               {
    1416                 :   22488600 :                 struct insn_link *next1;
    1417                 :   22488600 :                 rtx_insn *link = links->insn;
    1418                 :            : 
    1419                 :            :                 /* If the linked insn has been replaced by a note, then there
    1420                 :            :                    is no point in pursuing this chain any further.  */
    1421                 :   22488600 :                 if (NOTE_P (link))
    1422                 :         87 :                   continue;
    1423                 :            : 
    1424                 :   33070900 :                 FOR_EACH_LOG_LINK (next1, link)
    1425                 :            :                   {
    1426                 :   10583400 :                     rtx_insn *link1 = next1->insn;
    1427                 :   10583400 :                     if (NOTE_P (link1))
    1428                 :         83 :                       continue;
    1429                 :            :                     /* I0 -> I1 -> I2 -> I3.  */
    1430                 :   17112400 :                     FOR_EACH_LOG_LINK (nextlinks, link1)
    1431                 :    6529890 :                       if ((next = try_combine (insn, link, link1,
    1432                 :            :                                                nextlinks->insn,
    1433                 :            :                                                &new_direct_jump_p,
    1434                 :            :                                                last_combined_insn)) != 0)
    1435                 :            :                         {
    1436                 :        802 :                           statistics_counter_event (cfun, "four-insn combine", 1);
    1437                 :        802 :                           goto retry;
    1438                 :            :                         }
    1439                 :            :                     /* I0, I1 -> I2, I2 -> I3.  */
    1440                 :   12864200 :                     for (nextlinks = next1->next; nextlinks;
    1441                 :    2281660 :                          nextlinks = nextlinks->next)
    1442                 :    2281820 :                       if ((next = try_combine (insn, link, link1,
    1443                 :            :                                                nextlinks->insn,
    1444                 :            :                                                &new_direct_jump_p,
    1445                 :            :                                                last_combined_insn)) != 0)
    1446                 :            :                         {
    1447                 :        159 :                           statistics_counter_event (cfun, "four-insn combine", 1);
    1448                 :        159 :                           goto retry;
    1449                 :            :                         }
    1450                 :            :                   }
    1451                 :            : 
    1452                 :   29384200 :                 for (next1 = links->next; next1; next1 = next1->next)
    1453                 :            :                   {
    1454                 :    6897060 :                     rtx_insn *link1 = next1->insn;
    1455                 :    6897060 :                     if (NOTE_P (link1))
    1456                 :          8 :                       continue;
    1457                 :            :                     /* I0 -> I2; I1, I2 -> I3.  */
    1458                 :    8552840 :                     FOR_EACH_LOG_LINK (nextlinks, link)
    1459                 :    1656090 :                       if ((next = try_combine (insn, link, link1,
    1460                 :            :                                                nextlinks->insn,
    1461                 :            :                                                &new_direct_jump_p,
    1462                 :            :                                                last_combined_insn)) != 0)
    1463                 :            :                         {
    1464                 :        300 :                           statistics_counter_event (cfun, "four-insn combine", 1);
    1465                 :        300 :                           goto retry;
    1466                 :            :                         }
    1467                 :            :                     /* I0 -> I1; I1, I2 -> I3.  */
    1468                 :    8455120 :                     FOR_EACH_LOG_LINK (nextlinks, link1)
    1469                 :    1558480 :                       if ((next = try_combine (insn, link, link1,
    1470                 :            :                                                nextlinks->insn,
    1471                 :            :                                                &new_direct_jump_p,
    1472                 :            :                                                last_combined_insn)) != 0)
    1473                 :            :                         {
    1474                 :        106 :                           statistics_counter_event (cfun, "four-insn combine", 1);
    1475                 :        106 :                           goto retry;
    1476                 :            :                         }
    1477                 :            :                   }
    1478                 :            :               }
    1479                 :            : 
    1480                 :            :           /* Try this insn with each REG_EQUAL note it links back to.  */
    1481                 :   62298100 :           FOR_EACH_LOG_LINK (links, insn)
    1482                 :            :             {
    1483                 :   22525900 :               rtx set, note;
    1484                 :   22525900 :               rtx_insn *temp = links->insn;
    1485                 :   22525900 :               if ((set = single_set (temp)) != 0
    1486                 :   22238100 :                   && (note = find_reg_equal_equiv_note (temp)) != 0
    1487                 :    1535860 :                   && (note = XEXP (note, 0), GET_CODE (note)) != EXPR_LIST
    1488                 :            :                   /* Avoid using a register that may already been marked
    1489                 :            :                      dead by an earlier instruction.  */
    1490                 :    1535860 :                   && ! unmentioned_reg_p (note, SET_SRC (set))
    1491                 :   23168300 :                   && (GET_MODE (note) == VOIDmode
    1492                 :       3213 :                       ? SCALAR_INT_MODE_P (GET_MODE (SET_DEST (set)))
    1493                 :     639218 :                       : (GET_MODE (SET_DEST (set)) == GET_MODE (note)
    1494                 :     639218 :                          && (GET_CODE (SET_DEST (set)) != ZERO_EXTRACT
    1495                 :          0 :                              || (GET_MODE (XEXP (SET_DEST (set), 0))
    1496                 :            :                                  == GET_MODE (note))))))
    1497                 :            :                 {
    1498                 :            :                   /* Temporarily replace the set's source with the
    1499                 :            :                      contents of the REG_EQUAL note.  The insn will
    1500                 :            :                      be deleted or recognized by try_combine.  */
    1501                 :     642431 :                   rtx orig_src = SET_SRC (set);
    1502                 :     642431 :                   rtx orig_dest = SET_DEST (set);
    1503                 :     642431 :                   if (GET_CODE (SET_DEST (set)) == ZERO_EXTRACT)
    1504                 :          0 :                     SET_DEST (set) = XEXP (SET_DEST (set), 0);
    1505                 :     642431 :                   SET_SRC (set) = note;
    1506                 :     642431 :                   i2mod = temp;
    1507                 :     642431 :                   i2mod_old_rhs = copy_rtx (orig_src);
    1508                 :     642431 :                   i2mod_new_rhs = copy_rtx (note);
    1509                 :     642431 :                   next = try_combine (insn, i2mod, NULL, NULL,
    1510                 :            :                                       &new_direct_jump_p,
    1511                 :            :                                       last_combined_insn);
    1512                 :     642431 :                   i2mod = NULL;
    1513                 :     642431 :                   if (next)
    1514                 :            :                     {
    1515                 :      12011 :                       statistics_counter_event (cfun, "insn-with-note combine", 1);
    1516                 :      12011 :                       goto retry;
    1517                 :            :                     }
    1518                 :     630420 :                   SET_SRC (set) = orig_src;
    1519                 :     630420 :                   SET_DEST (set) = orig_dest;
    1520                 :            :                 }
    1521                 :            :             }
    1522                 :            : 
    1523                 :   39772200 :           if (!NOTE_P (insn))
    1524                 :   39772200 :             record_dead_and_set_regs (insn);
    1525                 :            : 
    1526                 :          0 : retry:
    1527                 :   80298000 :           ;
    1528                 :            :         }
    1529                 :            :     }
    1530                 :            : 
    1531                 :     662939 :   default_rtl_profile ();
    1532                 :     662939 :   clear_bb_flags ();
    1533                 :     662939 :   new_direct_jump_p |= purge_all_dead_edges ();
    1534                 :     662939 :   new_direct_jump_p |= delete_noop_moves ();
    1535                 :            : 
    1536                 :            :   /* Clean up.  */
    1537                 :     662939 :   obstack_free (&insn_link_obstack, NULL);
    1538                 :     662939 :   free (uid_log_links);
    1539                 :     662939 :   free (uid_insn_cost);
    1540                 :     662939 :   reg_stat.release ();
    1541                 :            : 
    1542                 :     662939 :   {
    1543                 :     662939 :     struct undo *undo, *next;
    1544                 :    3733640 :     for (undo = undobuf.frees; undo; undo = next)
    1545                 :            :       {
    1546                 :    3070700 :         next = undo->next;
    1547                 :    3070700 :         free (undo);
    1548                 :            :       }
    1549                 :     662939 :     undobuf.frees = 0;
    1550                 :            :   }
    1551                 :            : 
    1552                 :     662939 :   total_attempts += combine_attempts;
    1553                 :     662939 :   total_merges += combine_merges;
    1554                 :     662939 :   total_extras += combine_extras;
    1555                 :     662939 :   total_successes += combine_successes;
    1556                 :            : 
    1557                 :     662939 :   nonzero_sign_valid = 0;
    1558                 :     662939 :   rtl_hooks = general_rtl_hooks;
    1559                 :            : 
    1560                 :            :   /* Make recognizer allow volatile MEMs again.  */
    1561                 :     662939 :   init_recog ();
    1562                 :            : 
    1563                 :     662939 :   return new_direct_jump_p;
    1564                 :            : }
    1565                 :            : 
    1566                 :            : /* Wipe the last_xxx fields of reg_stat in preparation for another pass.  */
    1567                 :            : 
    1568                 :            : static void
    1569                 :     662939 : init_reg_last (void)
    1570                 :            : {
    1571                 :     662939 :   unsigned int i;
    1572                 :     662939 :   reg_stat_type *p;
    1573                 :            : 
    1574                 :   82237700 :   FOR_EACH_VEC_ELT (reg_stat, i, p)
    1575                 :   81574700 :     memset (p, 0, offsetof (reg_stat_type, sign_bit_copies));
    1576                 :     662939 : }
    1577                 :            : 
    1578                 :            : /* Set up any promoted values for incoming argument registers.  */
    1579                 :            : 
    1580                 :            : static void
    1581                 :    1325880 : setup_incoming_promotions (rtx_insn *first)
    1582                 :            : {
    1583                 :    1325880 :   tree arg;
    1584                 :    1325880 :   bool strictly_local = false;
    1585                 :            : 
    1586                 :    5348350 :   for (arg = DECL_ARGUMENTS (current_function_decl); arg;
    1587                 :    2011240 :        arg = DECL_CHAIN (arg))
    1588                 :            :     {
    1589                 :    2011240 :       rtx x, reg = DECL_INCOMING_RTL (arg);
    1590                 :    2011240 :       int uns1, uns3;
    1591                 :    2011240 :       machine_mode mode1, mode2, mode3, mode4;
    1592                 :            : 
    1593                 :            :       /* Only continue if the incoming argument is in a register.  */
    1594                 :    2011240 :       if (!REG_P (reg))
    1595                 :    2011220 :         continue;
    1596                 :            : 
    1597                 :            :       /* Determine, if possible, whether all call sites of the current
    1598                 :            :          function lie within the current compilation unit.  (This does
    1599                 :            :          take into account the exporting of a function via taking its
    1600                 :            :          address, and so forth.)  */
    1601                 :    1566300 :       strictly_local
    1602                 :    1566300 :         = cgraph_node::local_info_node (current_function_decl)->local;
    1603                 :            : 
    1604                 :            :       /* The mode and signedness of the argument before any promotions happen
    1605                 :            :          (equal to the mode of the pseudo holding it at that stage).  */
    1606                 :    1566300 :       mode1 = TYPE_MODE (TREE_TYPE (arg));
    1607                 :    1566300 :       uns1 = TYPE_UNSIGNED (TREE_TYPE (arg));
    1608                 :            : 
    1609                 :            :       /* The mode and signedness of the argument after any source language and
    1610                 :            :          TARGET_PROMOTE_PROTOTYPES-driven promotions.  */
    1611                 :    1566300 :       mode2 = TYPE_MODE (DECL_ARG_TYPE (arg));
    1612                 :    1566300 :       uns3 = TYPE_UNSIGNED (DECL_ARG_TYPE (arg));
    1613                 :            : 
    1614                 :            :       /* The mode and signedness of the argument as it is actually passed,
    1615                 :            :          see assign_parm_setup_reg in function.c.  */
    1616                 :    1566300 :       mode3 = promote_function_mode (TREE_TYPE (arg), mode1, &uns3,
    1617                 :    1566300 :                                      TREE_TYPE (cfun->decl), 0);
    1618                 :            : 
    1619                 :            :       /* The mode of the register in which the argument is being passed.  */
    1620                 :    1566300 :       mode4 = GET_MODE (reg);
    1621                 :            : 
    1622                 :            :       /* Eliminate sign extensions in the callee when:
    1623                 :            :          (a) A mode promotion has occurred;  */
    1624                 :    1566300 :       if (mode1 == mode3)
    1625                 :    1566290 :         continue;
    1626                 :            :       /* (b) The mode of the register is the same as the mode of
    1627                 :            :              the argument as it is passed; */
    1628                 :         14 :       if (mode3 != mode4)
    1629                 :          0 :         continue;
    1630                 :            :       /* (c) There's no language level extension;  */
    1631                 :         14 :       if (mode1 == mode2)
    1632                 :            :         ;
    1633                 :            :       /* (c.1) All callers are from the current compilation unit.  If that's
    1634                 :            :          the case we don't have to rely on an ABI, we only have to know
    1635                 :            :          what we're generating right now, and we know that we will do the
    1636                 :            :          mode1 to mode2 promotion with the given sign.  */
    1637                 :          0 :       else if (!strictly_local)
    1638                 :          0 :         continue;
    1639                 :            :       /* (c.2) The combination of the two promotions is useful.  This is
    1640                 :            :          true when the signs match, or if the first promotion is unsigned.
    1641                 :            :          In the later case, (sign_extend (zero_extend x)) is the same as
    1642                 :            :          (zero_extend (zero_extend x)), so make sure to force UNS3 true.  */
    1643                 :          0 :       else if (uns1)
    1644                 :          0 :         uns3 = true;
    1645                 :          0 :       else if (uns3)
    1646                 :          0 :         continue;
    1647                 :            : 
    1648                 :            :       /* Record that the value was promoted from mode1 to mode3,
    1649                 :            :          so that any sign extension at the head of the current
    1650                 :            :          function may be eliminated.  */
    1651                 :         14 :       x = gen_rtx_CLOBBER (mode1, const0_rtx);
    1652                 :         14 :       x = gen_rtx_fmt_e ((uns3 ? ZERO_EXTEND : SIGN_EXTEND), mode3, x);
    1653                 :         14 :       record_value_for_reg (reg, first, x);
    1654                 :            :     }
    1655                 :    1325880 : }
    1656                 :            : 
    1657                 :            : /* If MODE has a precision lower than PREC and SRC is a non-negative constant
    1658                 :            :    that would appear negative in MODE, sign-extend SRC for use in nonzero_bits
    1659                 :            :    because some machines (maybe most) will actually do the sign-extension and
    1660                 :            :    this is the conservative approach.
    1661                 :            : 
    1662                 :            :    ??? For 2.5, try to tighten up the MD files in this regard instead of this
    1663                 :            :    kludge.  */
    1664                 :            : 
    1665                 :            : static rtx
    1666                 :          0 : sign_extend_short_imm (rtx src, machine_mode mode, unsigned int prec)
    1667                 :            : {
    1668                 :          0 :   scalar_int_mode int_mode;
    1669                 :          0 :   if (CONST_INT_P (src)
    1670                 :          0 :       && is_a <scalar_int_mode> (mode, &int_mode)
    1671                 :          0 :       && GET_MODE_PRECISION (int_mode) < prec
    1672                 :          0 :       && INTVAL (src) > 0
    1673                 :          0 :       && val_signbit_known_set_p (int_mode, INTVAL (src)))
    1674                 :          0 :     src = GEN_INT (INTVAL (src) | ~GET_MODE_MASK (int_mode));
    1675                 :            : 
    1676                 :          0 :   return src;
    1677                 :            : }
    1678                 :            : 
    1679                 :            : /* Update RSP for pseudo-register X from INSN's REG_EQUAL note (if one exists)
    1680                 :            :    and SET.  */
    1681                 :            : 
    1682                 :            : static void
    1683                 :   14646700 : update_rsp_from_reg_equal (reg_stat_type *rsp, rtx_insn *insn, const_rtx set,
    1684                 :            :                            rtx x)
    1685                 :            : {
    1686                 :   14646700 :   rtx reg_equal_note = insn ? find_reg_equal_equiv_note (insn) : NULL_RTX;
    1687                 :   14646700 :   unsigned HOST_WIDE_INT bits = 0;
    1688                 :   14646700 :   rtx reg_equal = NULL, src = SET_SRC (set);
    1689                 :   14646700 :   unsigned int num = 0;
    1690                 :            : 
    1691                 :   14646700 :   if (reg_equal_note)
    1692                 :     631900 :     reg_equal = XEXP (reg_equal_note, 0);
    1693                 :            : 
    1694                 :   14646700 :   if (SHORT_IMMEDIATES_SIGN_EXTEND)
    1695                 :            :     {
    1696                 :            :       src = sign_extend_short_imm (src, GET_MODE (x), BITS_PER_WORD);
    1697                 :            :       if (reg_equal)
    1698                 :            :         reg_equal = sign_extend_short_imm (reg_equal, GET_MODE (x), BITS_PER_WORD);
    1699                 :            :     }
    1700                 :            : 
    1701                 :            :   /* Don't call nonzero_bits if it cannot change anything.  */
    1702                 :   14646700 :   if (rsp->nonzero_bits != HOST_WIDE_INT_M1U)
    1703                 :            :     {
    1704                 :   12815400 :       machine_mode mode = GET_MODE (x);
    1705                 :   12815400 :       if (GET_MODE_CLASS (mode) == MODE_INT
    1706                 :   12815400 :           && HWI_COMPUTABLE_MODE_P (mode))
    1707                 :   12815300 :         mode = nonzero_bits_mode;
    1708                 :   12815400 :       bits = nonzero_bits (src, mode);
    1709                 :   12815400 :       if (reg_equal && bits)
    1710                 :     606727 :         bits &= nonzero_bits (reg_equal, mode);
    1711                 :   12815400 :       rsp->nonzero_bits |= bits;
    1712                 :            :     }
    1713                 :            : 
    1714                 :            :   /* Don't call num_sign_bit_copies if it cannot change anything.  */
    1715                 :   14646700 :   if (rsp->sign_bit_copies != 1)
    1716                 :            :     {
    1717                 :   12752500 :       num = num_sign_bit_copies (SET_SRC (set), GET_MODE (x));
    1718                 :   12752500 :       if (reg_equal && maybe_ne (num, GET_MODE_PRECISION (GET_MODE (x))))
    1719                 :            :         {
    1720                 :     606213 :           unsigned int numeq = num_sign_bit_copies (reg_equal, GET_MODE (x));
    1721                 :     606213 :           if (num == 0 || numeq > num)
    1722                 :      10412 :             num = numeq;
    1723                 :            :         }
    1724                 :   12752500 :       if (rsp->sign_bit_copies == 0 || num < rsp->sign_bit_copies)
    1725                 :   12282900 :         rsp->sign_bit_copies = num;
    1726                 :            :     }
    1727                 :   14646700 : }
    1728                 :            : 
    1729                 :            : /* Called via note_stores.  If X is a pseudo that is narrower than
    1730                 :            :    HOST_BITS_PER_WIDE_INT and is being set, record what bits are known zero.
    1731                 :            : 
    1732                 :            :    If we are setting only a portion of X and we can't figure out what
    1733                 :            :    portion, assume all bits will be used since we don't know what will
    1734                 :            :    be happening.
    1735                 :            : 
    1736                 :            :    Similarly, set how many bits of X are known to be copies of the sign bit
    1737                 :            :    at all locations in the function.  This is the smallest number implied
    1738                 :            :    by any set of X.  */
    1739                 :            : 
    1740                 :            : static void
    1741                 :   45785900 : set_nonzero_bits_and_sign_copies (rtx x, const_rtx set, void *data)
    1742                 :            : {
    1743                 :   45785900 :   rtx_insn *insn = (rtx_insn *) data;
    1744                 :   45785900 :   scalar_int_mode mode;
    1745                 :            : 
    1746                 :   45785900 :   if (REG_P (x)
    1747                 :   35727000 :       && REGNO (x) >= FIRST_PSEUDO_REGISTER
    1748                 :            :       /* If this register is undefined at the start of the file, we can't
    1749                 :            :          say what its contents were.  */
    1750                 :   34773300 :       && ! REGNO_REG_SET_P
    1751                 :            :            (DF_LR_IN (ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb), REGNO (x))
    1752                 :   17335700 :       && is_a <scalar_int_mode> (GET_MODE (x), &mode)
    1753                 :   60817900 :       && HWI_COMPUTABLE_MODE_P (mode))
    1754                 :            :     {
    1755                 :   14830100 :       reg_stat_type *rsp = &reg_stat[REGNO (x)];
    1756                 :            : 
    1757                 :   14830100 :       if (set == 0 || GET_CODE (set) == CLOBBER)
    1758                 :            :         {
    1759                 :      18532 :           rsp->nonzero_bits = GET_MODE_MASK (mode);
    1760                 :      18532 :           rsp->sign_bit_copies = 1;
    1761                 :      18532 :           return;
    1762                 :            :         }
    1763                 :            : 
    1764                 :            :       /* If this register is being initialized using itself, and the
    1765                 :            :          register is uninitialized in this basic block, and there are
    1766                 :            :          no LOG_LINKS which set the register, then part of the
    1767                 :            :          register is uninitialized.  In that case we can't assume
    1768                 :            :          anything about the number of nonzero bits.
    1769                 :            : 
    1770                 :            :          ??? We could do better if we checked this in
    1771                 :            :          reg_{nonzero_bits,num_sign_bit_copies}_for_combine.  Then we
    1772                 :            :          could avoid making assumptions about the insn which initially
    1773                 :            :          sets the register, while still using the information in other
    1774                 :            :          insns.  We would have to be careful to check every insn
    1775                 :            :          involved in the combination.  */
    1776                 :            : 
    1777                 :   14811600 :       if (insn
    1778                 :   13872900 :           && reg_referenced_p (x, PATTERN (insn))
    1779                 :   16368600 :           && !REGNO_REG_SET_P (DF_LR_IN (BLOCK_FOR_INSN (insn)),
    1780                 :            :                                REGNO (x)))
    1781                 :            :         {
    1782                 :     238541 :           struct insn_link *link;
    1783                 :            : 
    1784                 :     397311 :           FOR_EACH_LOG_LINK (link, insn)
    1785                 :     314426 :             if (dead_or_set_p (link->insn, x))
    1786                 :            :               break;
    1787                 :     238541 :           if (!link)
    1788                 :            :             {
    1789                 :      82885 :               rsp->nonzero_bits = GET_MODE_MASK (mode);
    1790                 :      82885 :               rsp->sign_bit_copies = 1;
    1791                 :      82885 :               return;
    1792                 :            :             }
    1793                 :            :         }
    1794                 :            : 
    1795                 :            :       /* If this is a complex assignment, see if we can convert it into a
    1796                 :            :          simple assignment.  */
    1797                 :   14728700 :       set = expand_field_assignment (set);
    1798                 :            : 
    1799                 :            :       /* If this is a simple assignment, or we have a paradoxical SUBREG,
    1800                 :            :          set what we know about X.  */
    1801                 :            : 
    1802                 :   14728700 :       if (SET_DEST (set) == x
    1803                 :   14728700 :           || (paradoxical_subreg_p (SET_DEST (set))
    1804                 :      14337 :               && SUBREG_REG (SET_DEST (set)) == x))
    1805                 :   14646700 :         update_rsp_from_reg_equal (rsp, insn, set, x);
    1806                 :            :       else
    1807                 :            :         {
    1808                 :      81993 :           rsp->nonzero_bits = GET_MODE_MASK (mode);
    1809                 :      81993 :           rsp->sign_bit_copies = 1;
    1810                 :            :         }
    1811                 :            :     }
    1812                 :            : }
    1813                 :            : 
    1814                 :            : /* See if INSN can be combined into I3.  PRED, PRED2, SUCC and SUCC2 are
    1815                 :            :    optionally insns that were previously combined into I3 or that will be
    1816                 :            :    combined into the merger of INSN and I3.  The order is PRED, PRED2,
    1817                 :            :    INSN, SUCC, SUCC2, I3.
    1818                 :            : 
    1819                 :            :    Return 0 if the combination is not allowed for any reason.
    1820                 :            : 
    1821                 :            :    If the combination is allowed, *PDEST will be set to the single
    1822                 :            :    destination of INSN and *PSRC to the single source, and this function
    1823                 :            :    will return 1.  */
    1824                 :            : 
    1825                 :            : static int
    1826                 :   35317600 : can_combine_p (rtx_insn *insn, rtx_insn *i3, rtx_insn *pred ATTRIBUTE_UNUSED,
    1827                 :            :                rtx_insn *pred2 ATTRIBUTE_UNUSED, rtx_insn *succ, rtx_insn *succ2,
    1828                 :            :                rtx *pdest, rtx *psrc)
    1829                 :            : {
    1830                 :   35317600 :   int i;
    1831                 :   35317600 :   const_rtx set = 0;
    1832                 :   35317600 :   rtx src, dest;
    1833                 :   35317600 :   rtx_insn *p;
    1834                 :   35317600 :   rtx link;
    1835                 :   35317600 :   bool all_adjacent = true;
    1836                 :   35317600 :   int (*is_volatile_p) (const_rtx);
    1837                 :            : 
    1838                 :   35317600 :   if (succ)
    1839                 :            :     {
    1840                 :    7656010 :       if (succ2)
    1841                 :            :         {
    1842                 :     966395 :           if (next_active_insn (succ2) != i3)
    1843                 :      82411 :             all_adjacent = false;
    1844                 :     966395 :           if (next_active_insn (succ) != succ2)
    1845                 :     125716 :             all_adjacent = false;
    1846                 :            :         }
    1847                 :    6689610 :       else if (next_active_insn (succ) != i3)
    1848                 :     900350 :         all_adjacent = false;
    1849                 :    7656010 :       if (next_active_insn (insn) != succ)
    1850                 :    1995890 :         all_adjacent = false;
    1851                 :            :     }
    1852                 :   27661600 :   else if (next_active_insn (insn) != i3)
    1853                 :    7790880 :     all_adjacent = false;
    1854                 :            :     
    1855                 :            :   /* Can combine only if previous insn is a SET of a REG, a SUBREG or CC0.
    1856                 :            :      or a PARALLEL consisting of such a SET and CLOBBERs.
    1857                 :            : 
    1858                 :            :      If INSN has CLOBBER parallel parts, ignore them for our processing.
    1859                 :            :      By definition, these happen during the execution of the insn.  When it
    1860                 :            :      is merged with another insn, all bets are off.  If they are, in fact,
    1861                 :            :      needed and aren't also supplied in I3, they may be added by
    1862                 :            :      recog_for_combine.  Otherwise, it won't match.
    1863                 :            : 
    1864                 :            :      We can also ignore a SET whose SET_DEST is mentioned in a REG_UNUSED
    1865                 :            :      note.
    1866                 :            : 
    1867                 :            :      Get the source and destination of INSN.  If more than one, can't
    1868                 :            :      combine.  */
    1869                 :            : 
    1870                 :   35317600 :   if (GET_CODE (PATTERN (insn)) == SET)
    1871                 :   34965600 :     set = PATTERN (insn);
    1872                 :    9077550 :   else if (GET_CODE (PATTERN (insn)) == PARALLEL
    1873                 :    9077550 :            && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
    1874                 :            :     {
    1875                 :   27327900 :       for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
    1876                 :            :         {
    1877                 :   18531000 :           rtx elt = XVECEXP (PATTERN (insn), 0, i);
    1878                 :            : 
    1879                 :   18531000 :           switch (GET_CODE (elt))
    1880                 :            :             {
    1881                 :            :             /* This is important to combine floating point insns
    1882                 :            :                for the SH4 port.  */
    1883                 :      67905 :             case USE:
    1884                 :            :               /* Combining an isolated USE doesn't make sense.
    1885                 :            :                  We depend here on combinable_i3pat to reject them.  */
    1886                 :            :               /* The code below this loop only verifies that the inputs of
    1887                 :            :                  the SET in INSN do not change.  We call reg_set_between_p
    1888                 :            :                  to verify that the REG in the USE does not change between
    1889                 :            :                  I3 and INSN.
    1890                 :            :                  If the USE in INSN was for a pseudo register, the matching
    1891                 :            :                  insn pattern will likely match any register; combining this
    1892                 :            :                  with any other USE would only be safe if we knew that the
    1893                 :            :                  used registers have identical values, or if there was
    1894                 :            :                  something to tell them apart, e.g. different modes.  For
    1895                 :            :                  now, we forgo such complicated tests and simply disallow
    1896                 :            :                  combining of USES of pseudo registers with any other USE.  */
    1897                 :      67905 :               if (REG_P (XEXP (elt, 0))
    1898                 :      67905 :                   && GET_CODE (PATTERN (i3)) == PARALLEL)
    1899                 :            :                 {
    1900                 :       3328 :                   rtx i3pat = PATTERN (i3);
    1901                 :       3328 :                   int i = XVECLEN (i3pat, 0) - 1;
    1902                 :       3328 :                   unsigned int regno = REGNO (XEXP (elt, 0));
    1903                 :            : 
    1904                 :       6662 :                   do
    1905                 :            :                     {
    1906                 :       6662 :                       rtx i3elt = XVECEXP (i3pat, 0, i);
    1907                 :            : 
    1908                 :       6662 :                       if (GET_CODE (i3elt) == USE
    1909                 :        154 :                           && REG_P (XEXP (i3elt, 0))
    1910                 :       6970 :                           && (REGNO (XEXP (i3elt, 0)) == regno
    1911                 :        154 :                               ? reg_set_between_p (XEXP (elt, 0),
    1912                 :         22 :                                                    PREV_INSN (insn), i3)
    1913                 :        132 :                               : regno >= FIRST_PSEUDO_REGISTER))
    1914                 :            :                         return 0;
    1915                 :            :                     }
    1916                 :       6530 :                   while (--i >= 0);
    1917                 :            :                 }
    1918                 :            :               break;
    1919                 :            : 
    1920                 :            :               /* We can ignore CLOBBERs.  */
    1921                 :            :             case CLOBBER:
    1922                 :            :               break;
    1923                 :            : 
    1924                 :    9568490 :             case SET:
    1925                 :            :               /* Ignore SETs whose result isn't used but not those that
    1926                 :            :                  have side-effects.  */
    1927                 :    9568490 :               if (find_reg_note (insn, REG_UNUSED, SET_DEST (elt))
    1928                 :     226307 :                   && insn_nothrow_p (insn)
    1929                 :    9784450 :                   && !side_effects_p (elt))
    1930                 :            :                 break;
    1931                 :            : 
    1932                 :            :               /* If we have already found a SET, this is a second one and
    1933                 :            :                  so we cannot combine with this insn.  */
    1934                 :    9354100 :               if (set)
    1935                 :            :                 return 0;
    1936                 :            : 
    1937                 :            :               set = elt;
    1938                 :            :               break;
    1939                 :            : 
    1940                 :            :             default:
    1941                 :            :               /* Anything else means we can't combine.  */
    1942                 :            :               return 0;
    1943                 :            :             }
    1944                 :            :         }
    1945                 :            : 
    1946                 :    8796930 :       if (set == 0
    1947                 :            :           /* If SET_SRC is an ASM_OPERANDS we can't throw away these CLOBBERs,
    1948                 :            :              so don't do anything with it.  */
    1949                 :    8796930 :           || GET_CODE (SET_SRC (set)) == ASM_OPERANDS)
    1950                 :            :         return 0;
    1951                 :            :     }
    1952                 :            :   else
    1953                 :            :     return 0;
    1954                 :            : 
    1955                 :   34965600 :   if (set == 0)
    1956                 :            :     return 0;
    1957                 :            : 
    1958                 :            :   /* The simplification in expand_field_assignment may call back to
    1959                 :            :      get_last_value, so set safe guard here.  */
    1960                 :   34965600 :   subst_low_luid = DF_INSN_LUID (insn);
    1961                 :            : 
    1962                 :   34965600 :   set = expand_field_assignment (set);
    1963                 :   34965600 :   src = SET_SRC (set), dest = SET_DEST (set);
    1964                 :            : 
    1965                 :            :   /* Do not eliminate user-specified register if it is in an
    1966                 :            :      asm input because we may break the register asm usage defined
    1967                 :            :      in GCC manual if allow to do so.
    1968                 :            :      Be aware that this may cover more cases than we expect but this
    1969                 :            :      should be harmless.  */
    1970                 :   34523700 :   if (REG_P (dest) && REG_USERVAR_P (dest) && HARD_REGISTER_P (dest)
    1971                 :   34965600 :       && extract_asm_operands (PATTERN (i3)))
    1972                 :            :     return 0;
    1973                 :            : 
    1974                 :            :   /* Don't eliminate a store in the stack pointer.  */
    1975                 :   34965600 :   if (dest == stack_pointer_rtx
    1976                 :            :       /* Don't combine with an insn that sets a register to itself if it has
    1977                 :            :          a REG_EQUAL note.  This may be part of a LIBCALL sequence.  */
    1978                 :   33807200 :       || (rtx_equal_p (src, dest) && find_reg_note (insn, REG_EQUAL, NULL_RTX))
    1979                 :            :       /* Can't merge an ASM_OPERANDS.  */
    1980                 :   33807200 :       || GET_CODE (src) == ASM_OPERANDS
    1981                 :            :       /* Can't merge a function call.  */
    1982                 :   33804200 :       || GET_CODE (src) == CALL
    1983                 :            :       /* Don't eliminate a function call argument.  */
    1984                 :   33804200 :       || (CALL_P (i3)
    1985                 :    5271830 :           && (find_reg_fusage (i3, USE, dest)
    1986                 :     146821 :               || (REG_P (dest)
    1987                 :     146821 :                   && REGNO (dest) < FIRST_PSEUDO_REGISTER
    1988                 :        332 :                   && global_regs[REGNO (dest)])))
    1989                 :            :       /* Don't substitute into an incremented register.  */
    1990                 :            :       || FIND_REG_INC_NOTE (i3, dest)
    1991                 :            :       || (succ && FIND_REG_INC_NOTE (succ, dest))
    1992                 :   33804200 :       || (succ2 && FIND_REG_INC_NOTE (succ2, dest))
    1993                 :            :       /* Don't substitute into a non-local goto, this confuses CFG.  */
    1994                 :   28679200 :       || (JUMP_P (i3) && find_reg_note (i3, REG_NON_LOCAL_GOTO, NULL_RTX))
    1995                 :            :       /* Make sure that DEST is not used after INSN but before SUCC, or
    1996                 :            :          after SUCC and before SUCC2, or after SUCC2 but before I3.  */
    1997                 :   28678400 :       || (!all_adjacent
    1998                 :    6961990 :           && ((succ2
    1999                 :     445269 :                && (reg_used_between_p (dest, succ2, i3)
    2000                 :     432193 :                    || reg_used_between_p (dest, succ, succ2)))
    2001                 :    6937050 :               || (!succ2 && succ && reg_used_between_p (dest, succ, i3))
    2002                 :    6778580 :               || (!succ2 && !succ && reg_used_between_p (dest, insn, i3))
    2003                 :    6778580 :               || (succ
    2004                 :            :                   /* SUCC and SUCC2 can be split halves from a PARALLEL; in
    2005                 :            :                      that case SUCC is not in the insn stream, so use SUCC2
    2006                 :            :                      instead for this test.  */
    2007                 :    2961840 :                   && reg_used_between_p (dest, insn,
    2008                 :            :                                          succ2
    2009                 :     420329 :                                          && INSN_UID (succ) == INSN_UID (succ2)
    2010                 :            :                                          ? succ2 : succ))))
    2011                 :            :       /* Make sure that the value that is to be substituted for the register
    2012                 :            :          does not use any registers whose values alter in between.  However,
    2013                 :            :          If the insns are adjacent, a use can't cross a set even though we
    2014                 :            :          think it might (this can happen for a sequence of insns each setting
    2015                 :            :          the same destination; last_set of that register might point to
    2016                 :            :          a NOTE).  If INSN has a REG_EQUIV note, the register is always
    2017                 :            :          equivalent to the memory so the substitution is valid even if there
    2018                 :            :          are intervening stores.  Also, don't move a volatile asm or
    2019                 :            :          UNSPEC_VOLATILE across any other insns.  */
    2020                 :   28495000 :       || (! all_adjacent
    2021                 :    6778580 :           && (((!MEM_P (src)
    2022                 :    1863330 :                 || ! find_reg_note (insn, REG_EQUIV, src))
    2023                 :    6723380 :                && modified_between_p (src, insn, i3))
    2024                 :    6147580 :               || (GET_CODE (src) == ASM_OPERANDS && MEM_VOLATILE_P (src))
    2025                 :    6147580 :               || GET_CODE (src) == UNSPEC_VOLATILE))
    2026                 :            :       /* Don't combine across a CALL_INSN, because that would possibly
    2027                 :            :          change whether the life span of some REGs crosses calls or not,
    2028                 :            :          and it is a pain to update that information.
    2029                 :            :          Exception: if source is a constant, moving it later can't hurt.
    2030                 :            :          Accept that as a special case.  */
    2031                 :   62819000 :       || (DF_INSN_LUID (insn) < last_call_luid && ! CONSTANT_P (src)))
    2032                 :    7303180 :     return 0;
    2033                 :            : 
    2034                 :            :   /* DEST must either be a REG or CC0.  */
    2035                 :   27662400 :   if (REG_P (dest))
    2036                 :            :     {
    2037                 :            :       /* If register alignment is being enforced for multi-word items in all
    2038                 :            :          cases except for parameters, it is possible to have a register copy
    2039                 :            :          insn referencing a hard register that is not allowed to contain the
    2040                 :            :          mode being copied and which would not be valid as an operand of most
    2041                 :            :          insns.  Eliminate this problem by not combining with such an insn.
    2042                 :            : 
    2043                 :            :          Also, on some machines we don't want to extend the life of a hard
    2044                 :            :          register.  */
    2045                 :            : 
    2046                 :   27225400 :       if (REG_P (src)
    2047                 :   27225400 :           && ((REGNO (dest) < FIRST_PSEUDO_REGISTER
    2048                 :      20326 :                && !targetm.hard_regno_mode_ok (REGNO (dest), GET_MODE (dest)))
    2049                 :            :               /* Don't extend the life of a hard register unless it is
    2050                 :            :                  user variable (if we have few registers) or it can't
    2051                 :            :                  fit into the desired register (meaning something special
    2052                 :            :                  is going on).
    2053                 :            :                  Also avoid substituting a return register into I3, because
    2054                 :            :                  reload can't handle a conflict with constraints of other
    2055                 :            :                  inputs.  */
    2056                 :    1522510 :               || (REGNO (src) < FIRST_PSEUDO_REGISTER
    2057                 :      27181 :                   && !targetm.hard_regno_mode_ok (REGNO (src),
    2058                 :      27181 :                                                   GET_MODE (src)))))
    2059                 :          0 :         return 0;
    2060                 :            :     }
    2061                 :     436965 :   else if (GET_CODE (dest) != CC0)
    2062                 :            :     return 0;
    2063                 :            : 
    2064                 :            : 
    2065                 :   27225400 :   if (GET_CODE (PATTERN (i3)) == PARALLEL)
    2066                 :   20592900 :     for (i = XVECLEN (PATTERN (i3), 0) - 1; i >= 0; i--)
    2067                 :   14070500 :       if (GET_CODE (XVECEXP (PATTERN (i3), 0, i)) == CLOBBER)
    2068                 :            :         {
    2069                 :    6148530 :           rtx reg = XEXP (XVECEXP (PATTERN (i3), 0, i), 0);
    2070                 :            : 
    2071                 :            :           /* If the clobber represents an earlyclobber operand, we must not
    2072                 :            :              substitute an expression containing the clobbered register.
    2073                 :            :              As we do not analyze the constraint strings here, we have to
    2074                 :            :              make the conservative assumption.  However, if the register is
    2075                 :            :              a fixed hard reg, the clobber cannot represent any operand;
    2076                 :            :              we leave it up to the machine description to either accept or
    2077                 :            :              reject use-and-clobber patterns.  */
    2078                 :    6148530 :           if (!REG_P (reg)
    2079                 :    5847900 :               || REGNO (reg) >= FIRST_PSEUDO_REGISTER
    2080                 :   11978500 :               || !fixed_regs[REGNO (reg)])
    2081                 :     354308 :             if (reg_overlap_mentioned_p (reg, src))
    2082                 :            :               return 0;
    2083                 :            :         }
    2084                 :            : 
    2085                 :            :   /* If INSN contains anything volatile, or is an `asm' (whether volatile
    2086                 :            :      or not), reject, unless nothing volatile comes between it and I3 */
    2087                 :            : 
    2088                 :   27224300 :   if (GET_CODE (src) == ASM_OPERANDS || volatile_refs_p (src))
    2089                 :            :     {
    2090                 :            :       /* Make sure neither succ nor succ2 contains a volatile reference.  */
    2091                 :     611637 :       if (succ2 != 0 && volatile_refs_p (PATTERN (succ2)))
    2092                 :            :         return 0;
    2093                 :     611637 :       if (succ != 0 && volatile_refs_p (PATTERN (succ)))
    2094                 :            :         return 0;
    2095                 :            :       /* We'll check insns between INSN and I3 below.  */
    2096                 :            :     }
    2097                 :            : 
    2098                 :            :   /* If INSN is an asm, and DEST is a hard register, reject, since it has
    2099                 :            :      to be an explicit register variable, and was chosen for a reason.  */
    2100                 :            : 
    2101                 :   27185500 :   if (GET_CODE (src) == ASM_OPERANDS
    2102                 :   27185500 :       && REG_P (dest) && REGNO (dest) < FIRST_PSEUDO_REGISTER)
    2103                 :            :     return 0;
    2104                 :            : 
    2105                 :            :   /* If INSN contains volatile references (specifically volatile MEMs),
    2106                 :            :      we cannot combine across any other volatile references.
    2107                 :            :      Even if INSN doesn't contain volatile references, any intervening
    2108                 :            :      volatile insn might affect machine state.  */
    2109                 :            : 
    2110                 :   27185500 :   is_volatile_p = volatile_refs_p (PATTERN (insn))
    2111                 :   27185500 :     ? volatile_refs_p
    2112                 :            :     : volatile_insn_p;
    2113                 :            : 
    2114                 :  154033000 :   for (p = NEXT_INSN (insn); p != i3; p = NEXT_INSN (p))
    2115                 :   63587100 :     if (INSN_P (p) && p != succ && p != succ2 && is_volatile_p (PATTERN (p)))
    2116                 :            :       return 0;
    2117                 :            : 
    2118                 :            :   /* If INSN contains an autoincrement or autodecrement, make sure that
    2119                 :            :      register is not used between there and I3, and not already used in
    2120                 :            :      I3 either.  Neither must it be used in PRED or SUCC, if they exist.
    2121                 :            :      Also insist that I3 not be a jump if using LRA; if it were one
    2122                 :            :      and the incremented register were spilled, we would lose.
    2123                 :            :      Reload handles this correctly.  */
    2124                 :            : 
    2125                 :   27022000 :   if (AUTO_INC_DEC)
    2126                 :            :     for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
    2127                 :            :       if (REG_NOTE_KIND (link) == REG_INC
    2128                 :            :           && ((JUMP_P (i3) && targetm.lra_p ())
    2129                 :            :               || reg_used_between_p (XEXP (link, 0), insn, i3)
    2130                 :            :               || (pred != NULL_RTX
    2131                 :            :                   && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (pred)))
    2132                 :            :               || (pred2 != NULL_RTX
    2133                 :            :                   && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (pred2)))
    2134                 :            :               || (succ != NULL_RTX
    2135                 :            :                   && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (succ)))
    2136                 :            :               || (succ2 != NULL_RTX
    2137                 :            :                   && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (succ2)))
    2138                 :            :               || reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i3))))
    2139                 :            :         return 0;
    2140                 :            : 
    2141                 :            :   /* Don't combine an insn that follows a CC0-setting insn.
    2142                 :            :      An insn that uses CC0 must not be separated from the one that sets it.
    2143                 :            :      We do, however, allow I2 to follow a CC0-setting insn if that insn
    2144                 :            :      is passed as I1; in that case it will be deleted also.
    2145                 :            :      We also allow combining in this case if all the insns are adjacent
    2146                 :            :      because that would leave the two CC0 insns adjacent as well.
    2147                 :            :      It would be more logical to test whether CC0 occurs inside I1 or I2,
    2148                 :            :      but that would be much slower, and this ought to be equivalent.  */
    2149                 :            : 
    2150                 :   27022000 :   if (HAVE_cc0)
    2151                 :            :     {
    2152                 :            :       p = prev_nonnote_insn (insn);
    2153                 :            :       if (p && p != pred && NONJUMP_INSN_P (p) && sets_cc0_p (PATTERN (p))
    2154                 :            :           && ! all_adjacent)
    2155                 :            :         return 0;
    2156                 :            :     }
    2157                 :            : 
    2158                 :            :   /* If we get here, we have passed all the tests and the combination is
    2159                 :            :      to be allowed.  */
    2160                 :            : 
    2161                 :   27022000 :   *pdest = dest;
    2162                 :   27022000 :   *psrc = src;
    2163                 :            : 
    2164                 :   27022000 :   return 1;
    2165                 :            : }
    2166                 :            : 
    2167                 :            : /* LOC is the location within I3 that contains its pattern or the component
    2168                 :            :    of a PARALLEL of the pattern.  We validate that it is valid for combining.
    2169                 :            : 
    2170                 :            :    One problem is if I3 modifies its output, as opposed to replacing it
    2171                 :            :    entirely, we can't allow the output to contain I2DEST, I1DEST or I0DEST as
    2172                 :            :    doing so would produce an insn that is not equivalent to the original insns.
    2173                 :            : 
    2174                 :            :    Consider:
    2175                 :            : 
    2176                 :            :          (set (reg:DI 101) (reg:DI 100))
    2177                 :            :          (set (subreg:SI (reg:DI 101) 0) <foo>)
    2178                 :            : 
    2179                 :            :    This is NOT equivalent to:
    2180                 :            : 
    2181                 :            :          (parallel [(set (subreg:SI (reg:DI 100) 0) <foo>)
    2182                 :            :                     (set (reg:DI 101) (reg:DI 100))])
    2183                 :            : 
    2184                 :            :    Not only does this modify 100 (in which case it might still be valid
    2185                 :            :    if 100 were dead in I2), it sets 101 to the ORIGINAL value of 100.
    2186                 :            : 
    2187                 :            :    We can also run into a problem if I2 sets a register that I1
    2188                 :            :    uses and I1 gets directly substituted into I3 (not via I2).  In that
    2189                 :            :    case, we would be getting the wrong value of I2DEST into I3, so we
    2190                 :            :    must reject the combination.  This case occurs when I2 and I1 both
    2191                 :            :    feed into I3, rather than when I1 feeds into I2, which feeds into I3.
    2192                 :            :    If I1_NOT_IN_SRC is nonzero, it means that finding I1 in the source
    2193                 :            :    of a SET must prevent combination from occurring.  The same situation
    2194                 :            :    can occur for I0, in which case I0_NOT_IN_SRC is set.
    2195                 :            : 
    2196                 :            :    Before doing the above check, we first try to expand a field assignment
    2197                 :            :    into a set of logical operations.
    2198                 :            : 
    2199                 :            :    If PI3_DEST_KILLED is nonzero, it is a pointer to a location in which
    2200                 :            :    we place a register that is both set and used within I3.  If more than one
    2201                 :            :    such register is detected, we fail.
    2202                 :            : 
    2203                 :            :    Return 1 if the combination is valid, zero otherwise.  */
    2204                 :            : 
    2205                 :            : static int
    2206                 :   38820800 : combinable_i3pat (rtx_insn *i3, rtx *loc, rtx i2dest, rtx i1dest, rtx i0dest,
    2207                 :            :                   int i1_not_in_src, int i0_not_in_src, rtx *pi3dest_killed)
    2208                 :            : {
    2209                 :   38820800 :   rtx x = *loc;
    2210                 :            : 
    2211                 :   38820800 :   if (GET_CODE (x) == SET)
    2212                 :            :     {
    2213                 :   26550700 :       rtx set = x ;
    2214                 :   26550700 :       rtx dest = SET_DEST (set);
    2215                 :   26550700 :       rtx src = SET_SRC (set);
    2216                 :   26550700 :       rtx inner_dest = dest;
    2217                 :   26803700 :       rtx subdest;
    2218                 :            : 
    2219                 :   26803700 :       while (GET_CODE (inner_dest) == STRICT_LOW_PART
    2220                 :   26803700 :              || GET_CODE (inner_dest) == SUBREG
    2221                 :   26803700 :              || GET_CODE (inner_dest) == ZERO_EXTRACT)
    2222                 :     252997 :         inner_dest = XEXP (inner_dest, 0);
    2223                 :            : 
    2224                 :            :       /* Check for the case where I3 modifies its output, as discussed
    2225                 :            :          above.  We don't want to prevent pseudos from being combined
    2226                 :            :          into the address of a MEM, so only prevent the combination if
    2227                 :            :          i1 or i2 set the same MEM.  */
    2228                 :     245285 :       if ((inner_dest != dest &&
    2229                 :            :            (!MEM_P (inner_dest)
    2230                 :        214 :             || rtx_equal_p (i2dest, inner_dest)
    2231                 :        214 :             || (i1dest && rtx_equal_p (i1dest, inner_dest))
    2232                 :        214 :             || (i0dest && rtx_equal_p (i0dest, inner_dest)))
    2233                 :     245071 :            && (reg_overlap_mentioned_p (i2dest, inner_dest)
    2234                 :     159475 :                || (i1dest && reg_overlap_mentioned_p (i1dest, inner_dest))
    2235                 :     153557 :                || (i0dest && reg_overlap_mentioned_p (i0dest, inner_dest))))
    2236                 :            : 
    2237                 :            :           /* This is the same test done in can_combine_p except we can't test
    2238                 :            :              all_adjacent; we don't have to, since this instruction will stay
    2239                 :            :              in place, thus we are not considering increasing the lifetime of
    2240                 :            :              INNER_DEST.
    2241                 :            : 
    2242                 :            :              Also, if this insn sets a function argument, combining it with
    2243                 :            :              something that might need a spill could clobber a previous
    2244                 :            :              function argument; the all_adjacent test in can_combine_p also
    2245                 :            :              checks this; here, we do a more specific test for this case.  */
    2246                 :            : 
    2247                 :   26459000 :           || (REG_P (inner_dest)
    2248                 :   16749900 :               && REGNO (inner_dest) < FIRST_PSEUDO_REGISTER
    2249                 :    4697810 :               && !targetm.hard_regno_mode_ok (REGNO (inner_dest),
    2250                 :    4697810 :                                               GET_MODE (inner_dest)))
    2251                 :   26459000 :           || (i1_not_in_src && reg_overlap_mentioned_p (i1dest, src))
    2252                 :   53005200 :           || (i0_not_in_src && reg_overlap_mentioned_p (i0dest, src)))
    2253                 :     108363 :         return 0;
    2254                 :            : 
    2255                 :            :       /* If DEST is used in I3, it is being killed in this insn, so
    2256                 :            :          record that for later.  We have to consider paradoxical
    2257                 :            :          subregs here, since they kill the whole register, but we
    2258                 :            :          ignore partial subregs, STRICT_LOW_PART, etc.
    2259                 :            :          Never add REG_DEAD notes for the FRAME_POINTER_REGNUM or the
    2260                 :            :          STACK_POINTER_REGNUM, since these are always considered to be
    2261                 :            :          live.  Similarly for ARG_POINTER_REGNUM if it is fixed.  */
    2262                 :   26442400 :       subdest = dest;
    2263                 :   26442400 :       if (GET_CODE (subdest) == SUBREG && !partial_subreg_p (subdest))
    2264                 :      64433 :         subdest = SUBREG_REG (subdest);
    2265                 :   26442400 :       if (pi3dest_killed
    2266                 :   19690900 :           && REG_P (subdest)
    2267                 :   12206400 :           && reg_referenced_p (subdest, PATTERN (i3))
    2268                 :     783086 :           && REGNO (subdest) != FRAME_POINTER_REGNUM
    2269                 :     783086 :           && (HARD_FRAME_POINTER_IS_FRAME_POINTER
    2270                 :     783086 :               || REGNO (subdest) != HARD_FRAME_POINTER_REGNUM)
    2271                 :     783086 :           && (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM
    2272                 :     783086 :               || (REGNO (subdest) != ARG_POINTER_REGNUM
    2273                 :          0 :                   || ! fixed_regs [REGNO (subdest)]))
    2274                 :   27225400 :           && REGNO (subdest) != STACK_POINTER_REGNUM)
    2275                 :            :         {
    2276                 :     758554 :           if (*pi3dest_killed)
    2277                 :            :             return 0;
    2278                 :            : 
    2279                 :     683620 :           *pi3dest_killed = subdest;
    2280                 :            :         }
    2281                 :            :     }
    2282                 :            : 
    2283                 :   12270100 :   else if (GET_CODE (x) == PARALLEL)
    2284                 :            :     {
    2285                 :            :       int i;
    2286                 :            : 
    2287                 :   18924000 :       for (i = 0; i < XVECLEN (x, 0); i++)
    2288                 :   12890300 :         if (! combinable_i3pat (i3, &XVECEXP (x, 0, i), i2dest, i1dest, i0dest,
    2289                 :            :                                 i1_not_in_src, i0_not_in_src, pi3dest_killed))
    2290                 :            :           return 0;
    2291                 :            :     }
    2292                 :            : 
    2293                 :            :   return 1;
    2294                 :            : }
    2295                 :            : 
    2296                 :            : /* Return 1 if X is an arithmetic expression that contains a multiplication
    2297                 :            :    and division.  We don't count multiplications by powers of two here.  */
    2298                 :            : 
    2299                 :            : static int
    2300                 :    8838040 : contains_muldiv (rtx x)
    2301                 :            : {
    2302                 :    9134900 :   switch (GET_CODE (x))
    2303                 :            :     {
    2304                 :            :     case MOD:  case DIV:  case UMOD:  case UDIV:
    2305                 :            :       return 1;
    2306                 :            : 
    2307                 :     372083 :     case MULT:
    2308                 :     372083 :       return ! (CONST_INT_P (XEXP (x, 1))
    2309                 :     453697 :                 && pow2p_hwi (UINTVAL (XEXP (x, 1))));
    2310                 :    8607630 :     default:
    2311                 :    8607630 :       if (BINARY_P (x))
    2312                 :    2887640 :         return contains_muldiv (XEXP (x, 0))
    2313                 :    2901950 :             || contains_muldiv (XEXP (x, 1));
    2314                 :            : 
    2315                 :    5719990 :       if (UNARY_P (x))
    2316                 :     296865 :         return contains_muldiv (XEXP (x, 0));
    2317                 :            : 
    2318                 :            :       return 0;
    2319                 :            :     }
    2320                 :            : }
    2321                 :            : 
    2322                 :            : /* Determine whether INSN can be used in a combination.  Return nonzero if
    2323                 :            :    not.  This is used in try_combine to detect early some cases where we
    2324                 :            :    can't perform combinations.  */
    2325                 :            : 
    2326                 :            : static int
    2327                 :   94477700 : cant_combine_insn_p (rtx_insn *insn)
    2328                 :            : {
    2329                 :   94477700 :   rtx set;
    2330                 :   94477700 :   rtx src, dest;
    2331                 :            : 
    2332                 :            :   /* If this isn't really an insn, we can't do anything.
    2333                 :            :      This can occur when flow deletes an insn that it has merged into an
    2334                 :            :      auto-increment address.  */
    2335                 :   94477700 :   if (!NONDEBUG_INSN_P (insn))
    2336                 :            :     return 1;
    2337                 :            : 
    2338                 :            :   /* Never combine loads and stores involving hard regs that are likely
    2339                 :            :      to be spilled.  The register allocator can usually handle such
    2340                 :            :      reg-reg moves by tying.  If we allow the combiner to make
    2341                 :            :      substitutions of likely-spilled regs, reload might die.
    2342                 :            :      As an exception, we allow combinations involving fixed regs; these are
    2343                 :            :      not available to the register allocator so there's no risk involved.  */
    2344                 :            : 
    2345                 :   94477400 :   set = single_set (insn);
    2346                 :   94477400 :   if (! set)
    2347                 :            :     return 0;
    2348                 :   86144300 :   src = SET_SRC (set);
    2349                 :   86144300 :   dest = SET_DEST (set);
    2350                 :   86144300 :   if (GET_CODE (src) == SUBREG)
    2351                 :     685885 :     src = SUBREG_REG (src);
    2352                 :   86144300 :   if (GET_CODE (dest) == SUBREG)
    2353                 :    1183140 :     dest = SUBREG_REG (dest);
    2354                 :   23269100 :   if (REG_P (src) && REG_P (dest)
    2355                 :  105437000 :       && ((HARD_REGISTER_P (src)
    2356                 :    4104110 :            && ! TEST_HARD_REG_BIT (fixed_reg_set, REGNO (src))
    2357                 :            : #ifdef LEAF_REGISTERS
    2358                 :            :            && ! LEAF_REGISTERS [REGNO (src)])
    2359                 :            : #else
    2360                 :            :            )
    2361                 :            : #endif
    2362                 :   15371700 :           || (HARD_REGISTER_P (dest)
    2363                 :   10337500 :               && ! TEST_HARD_REG_BIT (fixed_reg_set, REGNO (dest))
    2364                 :   10175800 :               && targetm.class_likely_spilled_p (REGNO_REG_CLASS (REGNO (dest))))))
    2365                 :   13296900 :     return 1;
    2366                 :            : 
    2367                 :            :   return 0;
    2368                 :            : }
    2369                 :            : 
    2370                 :            : struct likely_spilled_retval_info
    2371                 :            : {
    2372                 :            :   unsigned regno, nregs;
    2373                 :            :   unsigned mask;
    2374                 :            : };
    2375                 :            : 
    2376                 :            : /* Called via note_stores by likely_spilled_retval_p.  Remove from info->mask
    2377                 :            :    hard registers that are known to be written to / clobbered in full.  */
    2378                 :            : static void
    2379                 :      65962 : likely_spilled_retval_1 (rtx x, const_rtx set, void *data)
    2380                 :            : {
    2381                 :      65962 :   struct likely_spilled_retval_info *const info =
    2382                 :            :     (struct likely_spilled_retval_info *) data;
    2383                 :      65962 :   unsigned regno, nregs;
    2384                 :      65962 :   unsigned new_mask;
    2385                 :            : 
    2386                 :      65962 :   if (!REG_P (XEXP (set, 0)))
    2387                 :            :     return;
    2388                 :      65962 :   regno = REGNO (x);
    2389                 :      65962 :   if (regno >= info->regno + info->nregs)
    2390                 :            :     return;
    2391                 :      65962 :   nregs = REG_NREGS (x);
    2392                 :      65962 :   if (regno + nregs <= info->regno)
    2393                 :            :     return;
    2394                 :      65962 :   new_mask = (2U << (nregs - 1)) - 1;
    2395                 :      65962 :   if (regno < info->regno)
    2396                 :          0 :     new_mask >>= info->regno - regno;
    2397                 :            :   else
    2398                 :      65962 :     new_mask <<= regno - info->regno;
    2399                 :      65962 :   info->mask &= ~new_mask;
    2400                 :            : }
    2401                 :            : 
    2402                 :            : /* Return nonzero iff part of the return value is live during INSN, and
    2403                 :            :    it is likely spilled.  This can happen when more than one insn is needed
    2404                 :            :    to copy the return value, e.g. when we consider to combine into the
    2405                 :            :    second copy insn for a complex value.  */
    2406                 :            : 
    2407                 :            : static int
    2408                 :   27902000 : likely_spilled_retval_p (rtx_insn *insn)
    2409                 :            : {
    2410                 :   27902000 :   rtx_insn *use = BB_END (this_basic_block);
    2411                 :   27902000 :   rtx reg;
    2412                 :   27902000 :   rtx_insn *p;
    2413                 :   27902000 :   unsigned regno, nregs;
    2414                 :            :   /* We assume here that no machine mode needs more than
    2415                 :            :      32 hard registers when the value overlaps with a register
    2416                 :            :      for which TARGET_FUNCTION_VALUE_REGNO_P is true.  */
    2417                 :   27902000 :   unsigned mask;
    2418                 :   27902000 :   struct likely_spilled_retval_info info;
    2419                 :            : 
    2420                 :   27902000 :   if (!NONJUMP_INSN_P (use) || GET_CODE (PATTERN (use)) != USE || insn == use)
    2421                 :            :     return 0;
    2422                 :    1152220 :   reg = XEXP (PATTERN (use), 0);
    2423                 :    1152220 :   if (!REG_P (reg) || !targetm.calls.function_value_regno_p (REGNO (reg)))
    2424                 :          0 :     return 0;
    2425                 :    1152220 :   regno = REGNO (reg);
    2426                 :    1152220 :   nregs = REG_NREGS (reg);
    2427                 :    1152220 :   if (nregs == 1)
    2428                 :            :     return 0;
    2429                 :      40206 :   mask = (2U << (nregs - 1)) - 1;
    2430                 :            : 
    2431                 :            :   /* Disregard parts of the return value that are set later.  */
    2432                 :      40206 :   info.regno = regno;
    2433                 :      40206 :   info.nregs = nregs;
    2434                 :      40206 :   info.mask = mask;
    2435                 :     223690 :   for (p = PREV_INSN (use); info.mask && p != insn; p = PREV_INSN (p))
    2436                 :      91742 :     if (INSN_P (p))
    2437                 :      91742 :       note_stores (p, likely_spilled_retval_1, &info);
    2438                 :      80412 :   mask = info.mask;
    2439                 :            : 
    2440                 :            :   /* Check if any of the (probably) live return value registers is
    2441                 :            :      likely spilled.  */
    2442                 :            :   nregs --;
    2443                 :      80412 :   do
    2444                 :            :     {
    2445                 :      80412 :       if ((mask & 1 << nregs)
    2446                 :      80412 :           && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno + nregs)))
    2447                 :            :         return 1;
    2448                 :      80399 :     } while (nregs--);
    2449                 :            :   return 0;
    2450                 :            : }
    2451                 :            : 
    2452                 :            : /* Adjust INSN after we made a change to its destination.
    2453                 :            : 
    2454                 :            :    Changing the destination can invalidate notes that say something about
    2455                 :            :    the results of the insn and a LOG_LINK pointing to the insn.  */
    2456                 :            : 
    2457                 :            : static void
    2458                 :      10042 : adjust_for_new_dest (rtx_insn *insn)
    2459                 :            : {
    2460                 :            :   /* For notes, be conservative and simply remove them.  */
    2461                 :      10042 :   remove_reg_equal_equiv_notes (insn);
    2462                 :            : 
    2463                 :            :   /* The new insn will have a destination that was previously the destination
    2464                 :            :      of an insn just above it.  Call distribute_links to make a LOG_LINK from
    2465                 :            :      the next use of that destination.  */
    2466                 :            : 
    2467                 :      10042 :   rtx set = single_set (insn);
    2468                 :      10042 :   gcc_assert (set);
    2469                 :            : 
    2470                 :      10042 :   rtx reg = SET_DEST (set);
    2471                 :            : 
    2472                 :      10042 :   while (GET_CODE (reg) == ZERO_EXTRACT
    2473                 :      10042 :          || GET_CODE (reg) == STRICT_LOW_PART
    2474                 :      10042 :          || GET_CODE (reg) == SUBREG)
    2475                 :          0 :     reg = XEXP (reg, 0);
    2476                 :      10042 :   gcc_assert (REG_P (reg));
    2477                 :            : 
    2478                 :      10042 :   distribute_links (alloc_insn_link (insn, REGNO (reg), NULL));
    2479                 :            : 
    2480                 :      10042 :   df_insn_rescan (insn);
    2481                 :      10042 : }
    2482                 :            : 
    2483                 :            : /* Return TRUE if combine can reuse reg X in mode MODE.
    2484                 :            :    ADDED_SETS is nonzero if the original set is still required.  */
    2485                 :            : static bool
    2486                 :    1663800 : can_change_dest_mode (rtx x, int added_sets, machine_mode mode)
    2487                 :            : {
    2488                 :    1663800 :   unsigned int regno;
    2489                 :            : 
    2490                 :    1663800 :   if (!REG_P (x))
    2491                 :            :     return false;
    2492                 :            : 
    2493                 :            :   /* Don't change between modes with different underlying register sizes,
    2494                 :            :      since this could lead to invalid subregs.  */
    2495                 :    1663800 :   if (maybe_ne (REGMODE_NATURAL_SIZE (mode),
    2496                 :    1663800 :                 REGMODE_NATURAL_SIZE (GET_MODE (x))))
    2497                 :            :     return false;
    2498                 :            : 
    2499                 :    1663800 :   regno = REGNO (x);
    2500                 :            :   /* Allow hard registers if the new mode is legal, and occupies no more
    2501                 :            :      registers than the old mode.  */
    2502                 :    1663800 :   if (regno < FIRST_PSEUDO_REGISTER)
    2503                 :     794979 :     return (targetm.hard_regno_mode_ok (regno, mode)
    2504                 :     794979 :             && REG_NREGS (x) >= hard_regno_nregs (regno, mode));
    2505                 :            : 
    2506                 :            :   /* Or a pseudo that is only used once.  */
    2507                 :     868823 :   return (regno < reg_n_sets_max
    2508                 :     868823 :           && REG_N_SETS (regno) == 1
    2509                 :     845439 :           && !added_sets
    2510                 :    1714260 :           && !REG_USERVAR_P (x));
    2511                 :            : }
    2512                 :            : 
    2513                 :            : 
    2514                 :            : /* Check whether X, the destination of a set, refers to part of
    2515                 :            :    the register specified by REG.  */
    2516                 :            : 
    2517                 :            : static bool
    2518                 :      13609 : reg_subword_p (rtx x, rtx reg)
    2519                 :            : {
    2520                 :            :   /* Check that reg is an integer mode register.  */
    2521                 :      13609 :   if (!REG_P (reg) || GET_MODE_CLASS (GET_MODE (reg)) != MODE_INT)
    2522                 :            :     return false;
    2523                 :            : 
    2524                 :      13344 :   if (GET_CODE (x) == STRICT_LOW_PART
    2525                 :      10864 :       || GET_CODE (x) == ZERO_EXTRACT)
    2526                 :       2660 :     x = XEXP (x, 0);
    2527                 :            : 
    2528                 :      13344 :   return GET_CODE (x) == SUBREG
    2529                 :      12941 :          && SUBREG_REG (x) == reg
    2530                 :      26285 :          && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT;
    2531                 :            : }
    2532                 :            : 
    2533                 :            : /* Delete the unconditional jump INSN and adjust the CFG correspondingly.
    2534                 :            :    Note that the INSN should be deleted *after* removing dead edges, so
    2535                 :            :    that the kept edge is the fallthrough edge for a (set (pc) (pc))
    2536                 :            :    but not for a (set (pc) (label_ref FOO)).  */
    2537                 :            : 
    2538                 :            : static void
    2539                 :       3382 : update_cfg_for_uncondjump (rtx_insn *insn)
    2540                 :            : {
    2541                 :       3382 :   basic_block bb = BLOCK_FOR_INSN (insn);
    2542                 :       3382 :   gcc_assert (BB_END (bb) == insn);
    2543                 :            : 
    2544                 :       3382 :   purge_dead_edges (bb);
    2545                 :            : 
    2546                 :       3382 :   delete_insn (insn);
    2547                 :       3382 :   if (EDGE_COUNT (bb->succs) == 1)
    2548                 :            :     {
    2549                 :       1661 :       rtx_insn *insn;
    2550                 :            : 
    2551                 :       1661 :       single_succ_edge (bb)->flags |= EDGE_FALLTHRU;
    2552                 :            : 
    2553                 :            :       /* Remove barriers from the footer if there are any.  */
    2554                 :       1663 :       for (insn = BB_FOOTER (bb); insn; insn = NEXT_INSN (insn))
    2555                 :          1 :         if (BARRIER_P (insn))
    2556                 :            :           {
    2557                 :          1 :             if (PREV_INSN (insn))
    2558                 :          0 :               SET_NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn);
    2559                 :            :             else
    2560                 :          1 :               BB_FOOTER (bb) = NEXT_INSN (insn);
    2561                 :          1 :             if (NEXT_INSN (insn))
    2562                 :          0 :               SET_PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn);
    2563                 :            :           }
    2564                 :          0 :         else if (LABEL_P (insn))
    2565                 :            :           break;
    2566                 :            :     }
    2567                 :       3382 : }
    2568                 :            : 
    2569                 :            : /* Return whether PAT is a PARALLEL of exactly N register SETs followed
    2570                 :            :    by an arbitrary number of CLOBBERs.  */
    2571                 :            : static bool
    2572                 :   60246200 : is_parallel_of_n_reg_sets (rtx pat, int n)
    2573                 :            : {
    2574                 :   60246200 :   if (GET_CODE (pat) != PARALLEL)
    2575                 :            :     return false;
    2576                 :            : 
    2577                 :   15972300 :   int len = XVECLEN (pat, 0);
    2578                 :   15972300 :   if (len < n)
    2579                 :            :     return false;
    2580                 :            : 
    2581                 :            :   int i;
    2582                 :   31959500 :   for (i = 0; i < n; i++)
    2583                 :   30235400 :     if (GET_CODE (XVECEXP (pat, 0, i)) != SET
    2584                 :   17903400 :         || !REG_P (SET_DEST (XVECEXP (pat, 0, i))))
    2585                 :            :       return false;
    2586                 :    2022550 :   for ( ; i < len; i++)
    2587                 :     723126 :     switch (GET_CODE (XVECEXP (pat, 0, i)))
    2588                 :            :       {
    2589                 :     298426 :       case CLOBBER:
    2590                 :     298426 :         if (XEXP (XVECEXP (pat, 0, i), 0) == const0_rtx)
    2591                 :            :           return false;
    2592                 :     298426 :         break;
    2593                 :            :       default:
    2594                 :            :         return false;
    2595                 :            :       }
    2596                 :            :   return true;
    2597                 :            : }
    2598                 :            : 
    2599                 :            : /* Return whether INSN, a PARALLEL of N register SETs (and maybe some
    2600                 :            :    CLOBBERs), can be split into individual SETs in that order, without
    2601                 :            :    changing semantics.  */
    2602                 :            : static bool
    2603                 :     249900 : can_split_parallel_of_n_reg_sets (rtx_insn *insn, int n)
    2604                 :            : {
    2605                 :     249900 :   if (!insn_nothrow_p (insn))
    2606                 :            :     return false;
    2607                 :            : 
    2608                 :     248667 :   rtx pat = PATTERN (insn);
    2609                 :            : 
    2610                 :     248667 :   int i, j;
    2611                 :     734753 :   for (i = 0; i < n; i++)
    2612                 :            :     {
    2613                 :     491710 :       if (side_effects_p (SET_SRC (XVECEXP (pat, 0, i))))
    2614                 :            :         return false;
    2615                 :            : 
    2616                 :     486630 :       rtx reg = SET_DEST (XVECEXP (pat, 0, i));
    2617                 :            : 
    2618                 :     729673 :       for (j = i + 1; j < n; j++)
    2619                 :     243587 :         if (reg_referenced_p (reg, XVECEXP (pat, 0, j)))
    2620                 :            :           return false;
    2621                 :            :     }
    2622                 :            : 
    2623                 :            :   return true;
    2624                 :            : }
    2625                 :            : 
    2626                 :            : /* Return whether X is just a single set, with the source
    2627                 :            :    a general_operand.  */
    2628                 :            : static bool
    2629                 :   38732000 : is_just_move (rtx x)
    2630                 :            : {
    2631                 :   38732000 :   if (INSN_P (x))
    2632                 :   38732000 :     x = PATTERN (x);
    2633                 :            : 
    2634                 :   38732000 :   return (GET_CODE (x) == SET && general_operand (SET_SRC (x), VOIDmode));
    2635                 :            : }
    2636                 :            : 
    2637                 :            : /* Callback function to count autoincs.  */
    2638                 :            : 
    2639                 :            : static int
    2640                 :     767161 : count_auto_inc (rtx, rtx, rtx, rtx, rtx, void *arg)
    2641                 :            : {
    2642                 :     767161 :   (*((int *) arg))++;
    2643                 :            : 
    2644                 :     767161 :   return 0;
    2645                 :            : }
    2646                 :            : 
    2647                 :            : /* Try to combine the insns I0, I1 and I2 into I3.
    2648                 :            :    Here I0, I1 and I2 appear earlier than I3.
    2649                 :            :    I0 and I1 can be zero; then we combine just I2 into I3, or I1 and I2 into
    2650                 :            :    I3.
    2651                 :            : 
    2652                 :            :    If we are combining more than two insns and the resulting insn is not
    2653                 :            :    recognized, try splitting it into two insns.  If that happens, I2 and I3
    2654                 :            :    are retained and I1/I0 are pseudo-deleted by turning them into a NOTE.
    2655                 :            :    Otherwise, I0, I1 and I2 are pseudo-deleted.
    2656                 :            : 
    2657                 :            :    Return 0 if the combination does not work.  Then nothing is changed.
    2658                 :            :    If we did the combination, return the insn at which combine should
    2659                 :            :    resume scanning.
    2660                 :            : 
    2661                 :            :    Set NEW_DIRECT_JUMP_P to a nonzero value if try_combine creates a
    2662                 :            :    new direct jump instruction.
    2663                 :            : 
    2664                 :            :    LAST_COMBINED_INSN is either I3, or some insn after I3 that has
    2665                 :            :    been I3 passed to an earlier try_combine within the same basic
    2666                 :            :    block.  */
    2667                 :            : 
    2668                 :            : static rtx_insn *
    2669                 :   55298000 : try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0,
    2670                 :            :              int *new_direct_jump_p, rtx_insn *last_combined_insn)
    2671                 :            : {
    2672                 :            :   /* New patterns for I3 and I2, respectively.  */
    2673                 :   55298000 :   rtx newpat, newi2pat = 0;
    2674                 :   55298000 :   rtvec newpat_vec_with_clobbers = 0;
    2675                 :   55298000 :   int substed_i2 = 0, substed_i1 = 0, substed_i0 = 0;
    2676                 :            :   /* Indicates need to preserve SET in I0, I1 or I2 in I3 if it is not
    2677                 :            :      dead.  */
    2678                 :   55298000 :   int added_sets_0, added_sets_1, added_sets_2;
    2679                 :            :   /* Total number of SETs to put into I3.  */
    2680                 :   55298000 :   int total_sets;
    2681                 :            :   /* Nonzero if I2's or I1's body now appears in I3.  */
    2682                 :   55298000 :   int i2_is_used = 0, i1_is_used = 0;
    2683                 :            :   /* INSN_CODEs for new I3, new I2, and user of condition code.  */
    2684                 :   55298000 :   int insn_code_number, i2_code_number = 0, other_code_number = 0;
    2685                 :            :   /* Contains I3 if the destination of I3 is used in its source, which means
    2686                 :            :      that the old life of I3 is being killed.  If that usage is placed into
    2687                 :            :      I2 and not in I3, a REG_DEAD note must be made.  */
    2688                 :   55298000 :   rtx i3dest_killed = 0;
    2689                 :            :   /* SET_DEST and SET_SRC of I2, I1 and I0.  */
    2690                 :   55298000 :   rtx i2dest = 0, i2src = 0, i1dest = 0, i1src = 0, i0dest = 0, i0src = 0;
    2691                 :            :   /* Copy of SET_SRC of I1 and I0, if needed.  */
    2692                 :   55298000 :   rtx i1src_copy = 0, i0src_copy = 0, i0src_copy2 = 0;
    2693                 :            :   /* Set if I2DEST was reused as a scratch register.  */
    2694                 :   55298000 :   bool i2scratch = false;
    2695                 :            :   /* The PATTERNs of I0, I1, and I2, or a copy of them in certain cases.  */
    2696                 :   55298000 :   rtx i0pat = 0, i1pat = 0, i2pat = 0;
    2697                 :            :   /* Indicates if I2DEST or I1DEST is in I2SRC or I1_SRC.  */
    2698                 :   55298000 :   int i2dest_in_i2src = 0, i1dest_in_i1src = 0, i2dest_in_i1src = 0;
    2699                 :   55298000 :   int i0dest_in_i0src = 0, i1dest_in_i0src = 0, i2dest_in_i0src = 0;
    2700                 :   55298000 :   int i2dest_killed = 0, i1dest_killed = 0, i0dest_killed = 0;
    2701                 :   55298000 :   int i1_feeds_i2_n = 0, i0_feeds_i2_n = 0, i0_feeds_i1_n = 0;
    2702                 :            :   /* Notes that must be added to REG_NOTES in I3 and I2.  */
    2703                 :   55298000 :   rtx new_i3_notes, new_i2_notes;
    2704                 :            :   /* Notes that we substituted I3 into I2 instead of the normal case.  */
    2705                 :   55298000 :   int i3_subst_into_i2 = 0;
    2706                 :            :   /* Notes that I1, I2 or I3 is a MULT operation.  */
    2707                 :   55298000 :   int have_mult = 0;
    2708                 :   55298000 :   int swap_i2i3 = 0;
    2709                 :   55298000 :   int split_i2i3 = 0;
    2710                 :   55298000 :   int changed_i3_dest = 0;
    2711                 :   55298000 :   bool i2_was_move = false, i3_was_move = false;
    2712                 :   55298000 :   int n_auto_inc = 0;
    2713                 :            : 
    2714                 :   55298000 :   int maxreg;
    2715                 :   55298000 :   rtx_insn *temp_insn;
    2716                 :   55298000 :   rtx temp_expr;
    2717                 :   55298000 :   struct insn_link *link;
    2718                 :   55298000 :   rtx other_pat = 0;
    2719                 :   55298000 :   rtx new_other_notes;
    2720                 :   55298000 :   int i;
    2721                 :   55298000 :   scalar_int_mode dest_mode, temp_mode;
    2722                 :            : 
    2723                 :            :   /* Immediately return if any of I0,I1,I2 are the same insn (I3 can
    2724                 :            :      never be).  */
    2725                 :   55298000 :   if (i1 == i2 || i0 == i2 || (i0 && i0 == i1))
    2726                 :            :     return 0;
    2727                 :            : 
    2728                 :            :   /* Only try four-insn combinations when there's high likelihood of
    2729                 :            :      success.  Look for simple insns, such as loads of constants or
    2730                 :            :      binary operations involving a constant.  */
    2731                 :   55068600 :   if (i0)
    2732                 :            :     {
    2733                 :   11846000 :       int i;
    2734                 :   11846000 :       int ngood = 0;
    2735                 :   11846000 :       int nshift = 0;
    2736                 :   11846000 :       rtx set0, set3;
    2737                 :            : 
    2738                 :   11846000 :       if (!flag_expensive_optimizations)
    2739                 :            :         return 0;
    2740                 :            : 
    2741                 :   47292100 :       for (i = 0; i < 4; i++)
    2742                 :            :         {
    2743                 :   38560800 :           rtx_insn *insn = i == 0 ? i0 : i == 1 ? i1 : i == 2 ? i2 : i3;
    2744                 :   38560800 :           rtx set = single_set (insn);
    2745                 :   38560800 :           rtx src;
    2746                 :   38560800 :           if (!set)
    2747                 :    1510600 :             continue;
    2748                 :   37050200 :           src = SET_SRC (set);
    2749                 :   37050200 :           if (CONSTANT_P (src))
    2750                 :            :             {
    2751                 :    2292870 :               ngood += 2;
    2752                 :    2292870 :               break;
    2753                 :            :             }
    2754                 :   34757300 :           else if (BINARY_P (src) && CONSTANT_P (XEXP (src, 1)))
    2755                 :    4783790 :             ngood++;
    2756                 :   29973500 :           else if (GET_CODE (src) == ASHIFT || GET_CODE (src) == ASHIFTRT
    2757                 :   29903400 :                    || GET_CODE (src) == LSHIFTRT)
    2758                 :      91546 :             nshift++;
    2759                 :            :         }
    2760                 :            : 
    2761                 :            :       /* If I0 loads a memory and I3 sets the same memory, then I1 and I2
    2762                 :            :          are likely manipulating its value.  Ideally we'll be able to combine
    2763                 :            :          all four insns into a bitfield insertion of some kind. 
    2764                 :            : 
    2765                 :            :          Note the source in I0 might be inside a sign/zero extension and the
    2766                 :            :          memory modes in I0 and I3 might be different.  So extract the address
    2767                 :            :          from the destination of I3 and search for it in the source of I0.
    2768                 :            : 
    2769                 :            :          In the event that there's a match but the source/dest do not actually
    2770                 :            :          refer to the same memory, the worst that happens is we try some
    2771                 :            :          combinations that we wouldn't have otherwise.  */
    2772                 :   11024200 :       if ((set0 = single_set (i0))
    2773                 :            :           /* Ensure the source of SET0 is a MEM, possibly buried inside
    2774                 :            :              an extension.  */
    2775                 :   10941700 :           && (GET_CODE (SET_SRC (set0)) == MEM
    2776                 :    9253200 :               || ((GET_CODE (SET_SRC (set0)) == ZERO_EXTEND
    2777                 :    9253200 :                    || GET_CODE (SET_SRC (set0)) == SIGN_EXTEND)
    2778                 :     292960 :                   && GET_CODE (XEXP (SET_SRC (set0), 0)) == MEM))
    2779                 :    1761450 :           && (set3 = single_set (i3))
    2780                 :            :           /* Ensure the destination of SET3 is a MEM.  */
    2781                 :    1485760 :           && GET_CODE (SET_DEST (set3)) == MEM
    2782                 :            :           /* Would it be better to extract the base address for the MEM
    2783                 :            :              in SET3 and look for that?  I don't have cases where it matters
    2784                 :            :              but I could envision such cases.  */
    2785                 :   11245700 :           && rtx_referenced_p (XEXP (SET_DEST (set3), 0), SET_SRC (set0)))
    2786                 :      17891 :         ngood += 2;
    2787                 :            : 
    2788                 :   11024200 :       if (ngood < 2 && nshift < 2)
    2789                 :            :         return 0;
    2790                 :            :     }
    2791                 :            : 
    2792                 :            :   /* Exit early if one of the insns involved can't be used for
    2793                 :            :      combinations.  */
    2794                 :   46406700 :   if (CALL_P (i2)
    2795                 :   43355000 :       || (i1 && CALL_P (i1))
    2796                 :   41257800 :       || (i0 && CALL_P (i0))
    2797                 :   41199100 :       || cant_combine_insn_p (i3)
    2798                 :   39464300 :       || cant_combine_insn_p (i2)
    2799                 :   30495900 :       || (i1 && cant_combine_insn_p (i1))
    2800                 :   27966100 :       || (i0 && cant_combine_insn_p (i0))
    2801                 :   74308600 :       || likely_spilled_retval_p (i3))
    2802                 :   18504700 :     return 0;
    2803                 :            : 
    2804                 :   27901900 :   combine_attempts++;
    2805                 :   27901900 :   undobuf.other_insn = 0;
    2806                 :            : 
    2807                 :            :   /* Reset the hard register usage information.  */
    2808                 :   27901900 :   CLEAR_HARD_REG_SET (newpat_used_regs);
    2809                 :            : 
    2810                 :   27901900 :   if (dump_file && (dump_flags & TDF_DETAILS))
    2811                 :            :     {
    2812                 :        114 :       if (i0)
    2813                 :         20 :         fprintf (dump_file, "\nTrying %d, %d, %d -> %d:\n",
    2814                 :         20 :                  INSN_UID (i0), INSN_UID (i1), INSN_UID (i2), INSN_UID (i3));
    2815                 :         94 :       else if (i1)
    2816                 :         26 :         fprintf (dump_file, "\nTrying %d, %d -> %d:\n",
    2817                 :         26 :                  INSN_UID (i1), INSN_UID (i2), INSN_UID (i3));
    2818                 :            :       else
    2819                 :         68 :         fprintf (dump_file, "\nTrying %d -> %d:\n",
    2820                 :         68 :                  INSN_UID (i2), INSN_UID (i3));
    2821                 :            : 
    2822                 :        114 :       if (i0)
    2823                 :         20 :         dump_insn_slim (dump_file, i0);
    2824                 :        114 :       if (i1)
    2825                 :         46 :         dump_insn_slim (dump_file, i1);
    2826                 :        114 :       dump_insn_slim (dump_file, i2);
    2827                 :        114 :       dump_insn_slim (dump_file, i3);
    2828                 :            :     }
    2829                 :            : 
    2830                 :            :   /* If multiple insns feed into one of I2 or I3, they can be in any
    2831                 :            :      order.  To simplify the code below, reorder them in sequence.  */
    2832                 :   27901900 :   if (i0 && DF_INSN_LUID (i0) > DF_INSN_LUID (i2))
    2833                 :   27901900 :     std::swap (i0, i2);
    2834                 :   27901900 :   if (i0 && DF_INSN_LUID (i0) > DF_INSN_LUID (i1))
    2835                 :   27901900 :     std::swap (i0, i1);
    2836                 :   27901900 :   if (i1 && DF_INSN_LUID (i1) > DF_INSN_LUID (i2))
    2837                 :   27901900 :     std::swap (i1, i2);
    2838                 :            : 
    2839                 :   27901900 :   added_links_insn = 0;
    2840                 :   27901900 :   added_notes_insn = 0;
    2841                 :            : 
    2842                 :            :   /* First check for one important special case that the code below will
    2843                 :            :      not handle.  Namely, the case where I1 is zero, I2 is a PARALLEL
    2844                 :            :      and I3 is a SET whose SET_SRC is a SET_DEST in I2.  In that case,
    2845                 :            :      we may be able to replace that destination with the destination of I3.
    2846                 :            :      This occurs in the common code where we compute both a quotient and
    2847                 :            :      remainder into a structure, in which case we want to do the computation
    2848                 :            :      directly into the structure to avoid register-register copies.
    2849                 :            : 
    2850                 :            :      Note that this case handles both multiple sets in I2 and also cases
    2851                 :            :      where I2 has a number of CLOBBERs inside the PARALLEL.
    2852                 :            : 
    2853                 :            :      We make very conservative checks below and only try to handle the
    2854                 :            :      most common cases of this.  For example, we only handle the case
    2855                 :            :      where I2 and I3 are adjacent to avoid making difficult register
    2856                 :            :      usage tests.  */
    2857                 :            : 
    2858                 :   17934400 :   if (i1 == 0 && NONJUMP_INSN_P (i3) && GET_CODE (PATTERN (i3)) == SET
    2859                 :    9288440 :       && REG_P (SET_SRC (PATTERN (i3)))
    2860                 :    3217770 :       && REGNO (SET_SRC (PATTERN (i3))) >= FIRST_PSEUDO_REGISTER
    2861                 :    3096710 :       && find_reg_note (i3, REG_DEAD, SET_SRC (PATTERN (i3)))
    2862                 :    2412460 :       && GET_CODE (PATTERN (i2)) == PARALLEL
    2863                 :     696092 :       && ! side_effects_p (SET_DEST (PATTERN (i3)))
    2864                 :            :       /* If the dest of I3 is a ZERO_EXTRACT or STRICT_LOW_PART, the code
    2865                 :            :          below would need to check what is inside (and reg_overlap_mentioned_p
    2866                 :            :          doesn't support those codes anyway).  Don't allow those destinations;
    2867                 :            :          the resulting insn isn't likely to be recognized anyway.  */
    2868                 :     279485 :       && GET_CODE (SET_DEST (PATTERN (i3))) != ZERO_EXTRACT
    2869                 :     279470 :       && GET_CODE (SET_DEST (PATTERN (i3))) != STRICT_LOW_PART
    2870                 :     279284 :       && ! reg_overlap_mentioned_p (SET_SRC (PATTERN (i3)),
    2871                 :     279284 :                                     SET_DEST (PATTERN (i3)))
    2872                 :   28181200 :       && next_active_insn (i2) == i3)
    2873                 :            :     {
    2874                 :     240701 :       rtx p2 = PATTERN (i2);
    2875                 :            : 
    2876                 :            :       /* Make sure that the destination of I3,
    2877                 :            :          which we are going to substitute into one output of I2,
    2878                 :            :          is not used within another output of I2.  We must avoid making this:
    2879                 :            :          (parallel [(set (mem (reg 69)) ...)
    2880                 :            :                     (set (reg 69) ...)])
    2881                 :            :          which is not well-defined as to order of actions.
    2882                 :            :          (Besides, reload can't handle output reloads for this.)
    2883                 :            : 
    2884                 :            :          The problem can also happen if the dest of I3 is a memory ref,
    2885                 :            :          if another dest in I2 is an indirect memory ref.
    2886                 :            : 
    2887                 :            :          Neither can this PARALLEL be an asm.  We do not allow combining
    2888                 :            :          that usually (see can_combine_p), so do not here either.  */
    2889                 :     240701 :       bool ok = true;
    2890                 :     743556 :       for (i = 0; ok && i < XVECLEN (p2, 0); i++)
    2891                 :            :         {
    2892                 :     502855 :           if ((GET_CODE (XVECEXP (p2, 0, i)) == SET
    2893                 :     240583 :                || GET_CODE (XVECEXP (p2, 0, i)) == CLOBBER)
    2894                 :     742230 :               && reg_overlap_mentioned_p (SET_DEST (PATTERN (i3)),
    2895                 :     501647 :                                           SET_DEST (XVECEXP (p2, 0, i))))
    2896                 :            :             ok = false;
    2897                 :     502080 :           else if (GET_CODE (XVECEXP (p2, 0, i)) == SET
    2898                 :     261497 :                    && GET_CODE (SET_SRC (XVECEXP (p2, 0, i))) == ASM_OPERANDS)
    2899                 :        934 :             ok = false;
    2900                 :            :         }
    2901                 :            : 
    2902                 :     240701 :       if (ok)
    2903                 :     269511 :         for (i = 0; i < XVECLEN (p2, 0); i++)
    2904                 :     257914 :           if (GET_CODE (XVECEXP (p2, 0, i)) == SET
    2905                 :     257914 :               && SET_DEST (XVECEXP (p2, 0, i)) == SET_SRC (PATTERN (i3)))
    2906                 :            :             {
    2907                 :     227395 :               combine_merges++;
    2908                 :            : 
    2909                 :     227395 :               subst_insn = i3;
    2910                 :     227395 :               subst_low_luid = DF_INSN_LUID (i2);
    2911                 :            : 
    2912                 :     227395 :               added_sets_2 = added_sets_1 = added_sets_0 = 0;
    2913                 :     227395 :               i2src = SET_SRC (XVECEXP (p2, 0, i));
    2914                 :     227395 :               i2dest = SET_DEST (XVECEXP (p2, 0, i));
    2915                 :     227395 :               i2dest_killed = dead_or_set_p (i2, i2dest);
    2916                 :            : 
    2917                 :            :               /* Replace the dest in I2 with our dest and make the resulting
    2918                 :            :                  insn the new pattern for I3.  Then skip to where we validate
    2919                 :            :                  the pattern.  Everything was set up above.  */
    2920                 :     227395 :               SUBST (SET_DEST (XVECEXP (p2, 0, i)), SET_DEST (PATTERN (i3)));
    2921                 :     227395 :               newpat = p2;
    2922                 :     227395 :               i3_subst_into_i2 = 1;
    2923                 :     227395 :               goto validate_replacement;
    2924                 :            :             }
    2925                 :            :     }
    2926                 :            : 
    2927                 :            :   /* If I2 is setting a pseudo to a constant and I3 is setting some
    2928                 :            :      sub-part of it to another constant, merge them by making a new
    2929                 :            :      constant.  */
    2930                 :   27674500 :   if (i1 == 0
    2931                 :   17707000 :       && (temp_expr = single_set (i2)) != 0
    2932                 :   17525000 :       && is_a <scalar_int_mode> (GET_MODE (SET_DEST (temp_expr)), &temp_mode)
    2933                 :   11909600 :       && CONST_SCALAR_INT_P (SET_SRC (temp_expr))
    2934                 :    1691070 :       && GET_CODE (PATTERN (i3)) == SET
    2935                 :     767071 :       && CONST_SCALAR_INT_P (SET_SRC (PATTERN (i3)))
    2936                 :   27688200 :       && reg_subword_p (SET_DEST (PATTERN (i3)), SET_DEST (temp_expr)))
    2937                 :            :     {
    2938                 :      12941 :       rtx dest = SET_DEST (PATTERN (i3));
    2939                 :      12941 :       rtx temp_dest = SET_DEST (temp_expr);
    2940                 :      12941 :       int offset = -1;
    2941                 :      12941 :       int width = 0;
    2942                 :            : 
    2943                 :      12941 :       if (GET_CODE (dest) == ZERO_EXTRACT)
    2944                 :            :         {
    2945                 :          0 :           if (CONST_INT_P (XEXP (dest, 1))
    2946                 :          0 :               && CONST_INT_P (XEXP (dest, 2))
    2947                 :          0 :               && is_a <scalar_int_mode> (GET_MODE (XEXP (dest, 0)),
    2948                 :            :                                          &dest_mode))
    2949                 :            :             {
    2950                 :          0 :               width = INTVAL (XEXP (dest, 1));
    2951                 :          0 :               offset = INTVAL (XEXP (dest, 2));
    2952                 :          0 :               dest = XEXP (dest, 0);
    2953                 :          0 :               if (BITS_BIG_ENDIAN)
    2954                 :            :                 offset = GET_MODE_PRECISION (dest_mode) - width - offset;
    2955                 :            :             }
    2956                 :            :         }
    2957                 :            :       else
    2958                 :            :         {
    2959                 :      12941 :           if (GET_CODE (dest) == STRICT_LOW_PART)
    2960                 :       2480 :             dest = XEXP (dest, 0);
    2961                 :      12941 :           if (is_a <scalar_int_mode> (GET_MODE (dest), &dest_mode))
    2962                 :            :             {
    2963                 :      12941 :               width = GET_MODE_PRECISION (dest_mode);
    2964                 :      12941 :               offset = 0;
    2965                 :            :             }
    2966                 :            :         }
    2967                 :            : 
    2968                 :      12941 :       if (offset >= 0)
    2969                 :            :         {
    2970                 :            :           /* If this is the low part, we're done.  */
    2971                 :      12941 :           if (subreg_lowpart_p (dest))
    2972                 :            :             ;
    2973                 :            :           /* Handle the case where inner is twice the size of outer.  */
    2974                 :       5128 :           else if (GET_MODE_PRECISION (temp_mode)
    2975                 :       5128 :                    == 2 * GET_MODE_PRECISION (dest_mode))
    2976                 :       5124 :             offset += GET_MODE_PRECISION (dest_mode);
    2977                 :            :           /* Otherwise give up for now.  */
    2978                 :            :           else
    2979                 :            :             offset = -1;
    2980                 :            :         }
    2981                 :            : 
    2982                 :      12937 :       if (offset >= 0)
    2983                 :            :         {
    2984                 :      12937 :           rtx inner = SET_SRC (PATTERN (i3));
    2985                 :      12937 :           rtx outer = SET_SRC (temp_expr);
    2986                 :            : 
    2987                 :      12937 :           wide_int o = wi::insert (rtx_mode_t (outer, temp_mode),
    2988                 :      12937 :                                    rtx_mode_t (inner, dest_mode),
    2989                 :      12937 :                                    offset, width);
    2990                 :            : 
    2991                 :      12937 :           combine_merges++;
    2992                 :      12937 :           subst_insn = i3;
    2993                 :      12937 :           subst_low_luid = DF_INSN_LUID (i2);
    2994                 :      12937 :           added_sets_2 = added_sets_1 = added_sets_0 = 0;
    2995                 :      12937 :           i2dest = temp_dest;
    2996                 :      12937 :           i2dest_killed = dead_or_set_p (i2, i2dest);
    2997                 :            : 
    2998                 :            :           /* Replace the source in I2 with the new constant and make the
    2999                 :            :              resulting insn the new pattern for I3.  Then skip to where we
    3000                 :            :              validate the pattern.  Everything was set up above.  */
    3001                 :      12937 :           SUBST (SET_SRC (temp_expr),
    3002                 :            :                  immed_wide_int_const (o, temp_mode));
    3003                 :            : 
    3004                 :      12937 :           newpat = PATTERN (i2);
    3005                 :            : 
    3006                 :            :           /* The dest of I3 has been replaced with the dest of I2.  */
    3007                 :      12937 :           changed_i3_dest = 1;
    3008                 :      12937 :           goto validate_replacement;
    3009                 :            :         }
    3010                 :            :     }
    3011                 :            : 
    3012                 :            :   /* If we have no I1 and I2 looks like:
    3013                 :            :         (parallel [(set (reg:CC X) (compare:CC OP (const_int 0)))
    3014                 :            :                    (set Y OP)])
    3015                 :            :      make up a dummy I1 that is
    3016                 :            :         (set Y OP)
    3017                 :            :      and change I2 to be
    3018                 :            :         (set (reg:CC X) (compare:CC Y (const_int 0)))
    3019                 :            : 
    3020                 :            :      (We can ignore any trailing CLOBBERs.)
    3021                 :            : 
    3022                 :            :      This undoes a previous combination and allows us to match a branch-and-
    3023                 :            :      decrement insn.  */
    3024                 :            : 
    3025                 :   27661600 :   if (!HAVE_cc0 && i1 == 0
    3026                 :   17694100 :       && is_parallel_of_n_reg_sets (PATTERN (i2), 2)
    3027                 :     159829 :       && (GET_MODE_CLASS (GET_MODE (SET_DEST (XVECEXP (PATTERN (i2), 0, 0))))
    3028                 :            :           == MODE_CC)
    3029                 :     103316 :       && GET_CODE (SET_SRC (XVECEXP (PATTERN (i2), 0, 0))) == COMPARE
    3030                 :      77116 :       && XEXP (SET_SRC (XVECEXP (PATTERN (i2), 0, 0)), 1) == const0_rtx
    3031                 :      58308 :       && rtx_equal_p (XEXP (SET_SRC (XVECEXP (PATTERN (i2), 0, 0)), 0),
    3032                 :      58308 :                       SET_SRC (XVECEXP (PATTERN (i2), 0, 1)))
    3033                 :      58138 :       && !reg_used_between_p (SET_DEST (XVECEXP (PATTERN (i2), 0, 0)), i2, i3)
    3034                 :   27719700 :       && !reg_used_between_p (SET_DEST (XVECEXP (PATTERN (i2), 0, 1)), i2, i3))
    3035                 :            :     {
    3036                 :            :       /* We make I1 with the same INSN_UID as I2.  This gives it
    3037                 :            :          the same DF_INSN_LUID for value tracking.  Our fake I1 will
    3038                 :            :          never appear in the insn stream so giving it the same INSN_UID
    3039                 :            :          as I2 will not cause a problem.  */
    3040                 :            : 
    3041                 :     116276 :       i1 = gen_rtx_INSN (VOIDmode, NULL, i2, BLOCK_FOR_INSN (i2),
    3042                 :      58138 :                          XVECEXP (PATTERN (i2), 0, 1), INSN_LOCATION (i2),
    3043                 :            :                          -1, NULL_RTX);
    3044                 :      58138 :       INSN_UID (i1) = INSN_UID (i2);
    3045                 :            : 
    3046                 :      58138 :       SUBST (PATTERN (i2), XVECEXP (PATTERN (i2), 0, 0));
    3047                 :      58138 :       SUBST (XEXP (SET_SRC (PATTERN (i2)), 0),
    3048                 :            :              SET_DEST (PATTERN (i1)));
    3049                 :      58138 :       unsigned int regno = REGNO (SET_DEST (PATTERN (i1)));
    3050                 :      58138 :       SUBST_LINK (LOG_LINKS (i2),
    3051                 :            :                   alloc_insn_link (i1, regno, LOG_LINKS (i2)));
    3052                 :            :     }
    3053                 :            : 
    3054                 :            :   /* If I2 is a PARALLEL of two SETs of REGs (and perhaps some CLOBBERs),
    3055                 :            :      make those two SETs separate I1 and I2 insns, and make an I0 that is
    3056                 :            :      the original I1.  */
    3057                 :   27661600 :   if (!HAVE_cc0 && i0 == 0
    3058                 :   26472900 :       && is_parallel_of_n_reg_sets (PATTERN (i2), 2)
    3059                 :     249900 :       && can_split_parallel_of_n_reg_sets (i2, 2)
    3060                 :     243043 :       && !reg_used_between_p (SET_DEST (XVECEXP (PATTERN (i2), 0, 0)), i2, i3)
    3061                 :     229398 :       && !reg_used_between_p (SET_DEST (XVECEXP (PATTERN (i2), 0, 1)), i2, i3)
    3062                 :     217342 :       && !reg_set_between_p  (SET_DEST (XVECEXP (PATTERN (i2), 0, 0)), i2, i3)
    3063                 :   27879000 :       && !reg_set_between_p  (SET_DEST (XVECEXP (PATTERN (i2), 0, 1)), i2, i3))
    3064                 :            :     {
    3065                 :            :       /* If there is no I1, there is no I0 either.  */
    3066                 :     217342 :       i0 = i1;
    3067                 :            : 
    3068                 :            :       /* We make I1 with the same INSN_UID as I2.  This gives it
    3069                 :            :          the same DF_INSN_LUID for value tracking.  Our fake I1 will
    3070                 :            :          never appear in the insn stream so giving it the same INSN_UID
    3071                 :            :          as I2 will not cause a problem.  */
    3072                 :            : 
    3073                 :     434684 :       i1 = gen_rtx_INSN (VOIDmode, NULL, i2, BLOCK_FOR_INSN (i2),
    3074                 :     217342 :                          XVECEXP (PATTERN (i2), 0, 0), INSN_LOCATION (i2),
    3075                 :            :                          -1, NULL_RTX);
    3076                 :     217342 :       INSN_UID (i1) = INSN_UID (i2);
    3077                 :            : 
    3078                 :     217342 :       SUBST (PATTERN (i2), XVECEXP (PATTERN (i2), 0, 1));
    3079                 :            :     }
    3080                 :            : 
    3081                 :            :   /* Verify that I2 and maybe I1 and I0 can be combined into I3.  */
    3082                 :   27661600 :   if (!can_combine_p (i2, i3, i0, i1, NULL, NULL, &i2dest, &i2src))
    3083                 :            :     {
    3084                 :    7417350 :       if (dump_file && (dump_flags & TDF_DETAILS))
    3085                 :          8 :         fprintf (dump_file, "Can't combine i2 into i3\n");
    3086                 :    7417350 :       undo_all ();
    3087                 :    7417350 :       return 0;
    3088                 :            :     }
    3089                 :   20244300 :   if (i1 && !can_combine_p (i1, i3, i0, NULL, i2, NULL, &i1dest, &i1src))
    3090                 :            :     {
    3091                 :     773529 :       if (dump_file && (dump_flags & TDF_DETAILS))
    3092                 :          0 :         fprintf (dump_file, "Can't combine i1 into i3\n");
    3093                 :     773529 :       undo_all ();
    3094                 :     773529 :       return 0;
    3095                 :            :     }
    3096                 :   19470700 :   if (i0 && !can_combine_p (i0, i3, NULL, NULL, i1, i2, &i0dest, &i0src))
    3097                 :            :     {
    3098                 :     104735 :       if (dump_file && (dump_flags & TDF_DETAILS))
    3099                 :          0 :         fprintf (dump_file, "Can't combine i0 into i3\n");
    3100                 :     104735 :       undo_all ();
    3101                 :     104735 :       return 0;
    3102                 :            :     }
    3103                 :            : 
    3104                 :            :   /* Record whether i2 and i3 are trivial moves.  */
    3105                 :   19366000 :   i2_was_move = is_just_move (i2);
    3106                 :   19366000 :   i3_was_move = is_just_move (i3);
    3107                 :            : 
    3108                 :            :   /* Record whether I2DEST is used in I2SRC and similarly for the other
    3109                 :            :      cases.  Knowing this will help in register status updating below.  */
    3110                 :   19366000 :   i2dest_in_i2src = reg_overlap_mentioned_p (i2dest, i2src);
    3111                 :   19366000 :   i1dest_in_i1src = i1 && reg_overlap_mentioned_p (i1dest, i1src);
    3112                 :   19366000 :   i2dest_in_i1src = i1 && reg_overlap_mentioned_p (i2dest, i1src);
    3113                 :   19366000 :   i0dest_in_i0src = i0 && reg_overlap_mentioned_p (i0dest, i0src);
    3114                 :   19366000 :   i1dest_in_i0src = i0 && reg_overlap_mentioned_p (i1dest, i0src);
    3115                 :   19366000 :   i2dest_in_i0src = i0 && reg_overlap_mentioned_p (i2dest, i0src);
    3116                 :   19366000 :   i2dest_killed = dead_or_set_p (i2, i2dest);
    3117                 :   19366000 :   i1dest_killed = i1 && dead_or_set_p (i1, i1dest);
    3118                 :   19366000 :   i0dest_killed = i0 && dead_or_set_p (i0, i0dest);
    3119                 :            : 
    3120                 :            :   /* For the earlier insns, determine which of the subsequent ones they
    3121                 :            :      feed.  */
    3122                 :   19366000 :   i1_feeds_i2_n = i1 && insn_a_feeds_b (i1, i2);
    3123                 :   19366000 :   i0_feeds_i1_n = i0 && insn_a_feeds_b (i0, i1);
    3124                 :   20019100 :   i0_feeds_i2_n = (i0 && (!i0_feeds_i1_n ? insn_a_feeds_b (i0, i2)
    3125                 :     653106 :                           : (!reg_overlap_mentioned_p (i1dest, i0dest)
    3126                 :     645833 :                              && reg_overlap_mentioned_p (i0dest, i2src))));
    3127                 :            : 
    3128                 :            :   /* Ensure that I3's pattern can be the destination of combines.  */
    3129                 :   19366000 :   if (! combinable_i3pat (i3, &PATTERN (i3), i2dest, i1dest, i0dest,
    3130                 :   19366000 :                           i1 && i2dest_in_i1src && !i1_feeds_i2_n,
    3131                 :   19366000 :                           i0 && ((i2dest_in_i0src && !i0_feeds_i2_n)
    3132                 :     837795 :                                  || (i1dest_in_i0src && !i0_feeds_i1_n)),
    3133                 :            :                           &i3dest_killed))
    3134                 :            :     {
    3135                 :     183257 :       undo_all ();
    3136                 :     183257 :       return 0;
    3137                 :            :     }
    3138                 :            : 
    3139                 :            :   /* See if any of the insns is a MULT operation.  Unless one is, we will
    3140                 :            :      reject a combination that is, since it must be slower.  Be conservative
    3141                 :            :      here.  */
    3142                 :   19182700 :   if (GET_CODE (i2src) == MULT
    3143                 :   18562200 :       || (i1 != 0 && GET_CODE (i1src) == MULT)
    3144                 :   18336100 :       || (i0 != 0 && GET_CODE (i0src) == MULT)
    3145                 :   37493700 :       || (GET_CODE (PATTERN (i3)) == SET
    3146                 :   14462100 :           && GET_CODE (SET_SRC (PATTERN (i3))) == MULT))
    3147                 :            :     have_mult = 1;
    3148                 :            : 
    3149                 :            :   /* If I3 has an inc, then give up if I1 or I2 uses the reg that is inc'd.
    3150                 :            :      We used to do this EXCEPT in one case: I3 has a post-inc in an
    3151                 :            :      output operand.  However, that exception can give rise to insns like
    3152                 :            :         mov r3,(r3)+
    3153                 :            :      which is a famous insn on the PDP-11 where the value of r3 used as the
    3154                 :            :      source was model-dependent.  Avoid this sort of thing.  */
    3155                 :            : 
    3156                 :            : #if 0
    3157                 :            :   if (!(GET_CODE (PATTERN (i3)) == SET
    3158                 :            :         && REG_P (SET_SRC (PATTERN (i3)))
    3159                 :            :         && MEM_P (SET_DEST (PATTERN (i3)))
    3160                 :            :         && (GET_CODE (XEXP (SET_DEST (PATTERN (i3)), 0)) == POST_INC
    3161                 :            :             || GET_CODE (XEXP (SET_DEST (PATTERN (i3)), 0)) == POST_DEC)))
    3162                 :            :     /* It's not the exception.  */
    3163                 :            : #endif
    3164                 :   19182700 :     if (AUTO_INC_DEC)
    3165                 :            :       {
    3166                 :            :         rtx link;
    3167                 :            :         for (link = REG_NOTES (i3); link; link = XEXP (link, 1))
    3168                 :            :           if (REG_NOTE_KIND (link) == REG_INC
    3169                 :            :               && (reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i2))
    3170                 :            :                   || (i1 != 0
    3171                 :            :                       && reg_overlap_mentioned_p (XEXP (link, 0), PATTERN (i1)))))
    3172                 :            :             {
    3173                 :            :               undo_all ();
    3174                 :            :               return 0;
    3175                 :            :             }
    3176                 :            :       }
    3177                 :            : 
    3178                 :            :   /* See if the SETs in I1 or I2 need to be kept around in the merged
    3179                 :            :      instruction: whenever the value set there is still needed past I3.
    3180                 :            :      For the SET in I2, this is easy: we see if I2DEST dies or is set in I3.
    3181                 :            : 
    3182                 :            :      For the SET in I1, we have two cases: if I1 and I2 independently feed
    3183                 :            :      into I3, the set in I1 needs to be kept around unless I1DEST dies
    3184                 :            :      or is set in I3.  Otherwise (if I1 feeds I2 which feeds I3), the set
    3185                 :            :      in I1 needs to be kept around unless I1DEST dies or is set in either
    3186                 :            :      I2 or I3.  The same considerations apply to I0.  */
    3187                 :            : 
    3188                 :   19182700 :   added_sets_2 = !dead_or_set_p (i3, i2dest);
    3189                 :            : 
    3190                 :   19182700 :   if (i1)
    3191                 :   10107200 :     added_sets_1 = !(dead_or_set_p (i3, i1dest)
    3192                 :    4367730 :                      || (i1_feeds_i2_n && dead_or_set_p (i2, i1dest)));
    3193                 :            :   else
    3194                 :            :     added_sets_1 = 0;
    3195                 :            : 
    3196                 :   19182700 :   if (i0)
    3197                 :    1965440 :     added_sets_0 =  !(dead_or_set_p (i3, i0dest)
    3198                 :     733875 :                       || (i0_feeds_i1_n && dead_or_set_p (i1, i0dest))
    3199                 :     126323 :                       || ((i0_feeds_i2_n || (i0_feeds_i1_n && i1_feeds_i2_n))
    3200                 :     355560 :                           && dead_or_set_p (i2, i0dest)));
    3201                 :            :   else
    3202                 :            :     added_sets_0 = 0;
    3203                 :            : 
    3204                 :            :   /* We are about to copy insns for the case where they need to be kept
    3205                 :            :      around.  Check that they can be copied in the merged instruction.  */
    3206                 :            : 
    3207                 :   19182700 :   if (targetm.cannot_copy_insn_p
    3208                 :   19182700 :       && ((added_sets_2 && targetm.cannot_copy_insn_p (i2))
    3209                 :          0 :           || (i1 && added_sets_1 && targetm.cannot_copy_insn_p (i1))
    3210                 :          0 :           || (i0 && added_sets_0 && targetm.cannot_copy_insn_p (i0))))
    3211                 :            :     {
    3212                 :          0 :       undo_all ();
    3213                 :          0 :       return 0;
    3214                 :            :     }
    3215                 :            : 
    3216                 :            :   /* Count how many auto_inc expressions there were in the original insns;
    3217                 :            :      we need to have the same number in the resulting patterns.  */
    3218                 :            : 
    3219                 :   19182700 :   if (i0)
    3220                 :     844730 :     for_each_inc_dec (PATTERN (i0), count_auto_inc, &n_auto_inc);
    3221                 :   19182700 :   if (i1)
    3222                 :    5739460 :     for_each_inc_dec (PATTERN (i1), count_auto_inc, &n_auto_inc);
    3223                 :   19182700 :   for_each_inc_dec (PATTERN (i2), count_auto_inc, &n_auto_inc);
    3224                 :   19182700 :   for_each_inc_dec (PATTERN (i3), count_auto_inc, &n_auto_inc);
    3225                 :            : 
    3226                 :            :   /* If the set in I2 needs to be kept around, we must make a copy of
    3227                 :            :      PATTERN (I2), so that when we substitute I1SRC for I1DEST in
    3228                 :            :      PATTERN (I2), we are only substituting for the original I1DEST, not into
    3229                 :            :      an already-substituted copy.  This also prevents making self-referential
    3230                 :            :      rtx.  If I2 is a PARALLEL, we just need the piece that assigns I2SRC to
    3231                 :            :      I2DEST.  */
    3232                 :            : 
    3233                 :   19182700 :   if (added_sets_2)
    3234                 :            :     {
    3235                 :    4352280 :       if (GET_CODE (PATTERN (i2)) == PARALLEL)
    3236                 :    1303850 :         i2pat = gen_rtx_SET (i2dest, copy_rtx (i2src));
    3237                 :            :       else
    3238                 :    3048440 :         i2pat = copy_rtx (PATTERN (i2));
    3239                 :            :     }
    3240                 :            : 
    3241                 :   19182700 :   if (added_sets_1)
    3242                 :            :     {
    3243                 :    2097230 :       if (GET_CODE (PATTERN (i1)) == PARALLEL)
    3244                 :     592727 :         i1pat = gen_rtx_SET (i1dest, copy_rtx (i1src));
    3245                 :            :       else
    3246                 :    1504500 :         i1pat = copy_rtx (PATTERN (i1));
    3247                 :            :     }
    3248                 :            : 
    3249                 :   19182700 :   if (added_sets_0)
    3250                 :            :     {
    3251                 :     186440 :       if (GET_CODE (PATTERN (i0)) == PARALLEL)
    3252                 :      71592 :         i0pat = gen_rtx_SET (i0dest, copy_rtx (i0src));
    3253                 :            :       else
    3254                 :     114848 :         i0pat = copy_rtx (PATTERN (i0));
    3255                 :            :     }
    3256                 :            : 
    3257                 :   19182700 :   combine_merges++;
    3258                 :            : 
    3259                 :            :   /* Substitute in the latest insn for the regs set by the earlier ones.  */
    3260                 :            : 
    3261                 :   19182700 :   maxreg = max_reg_num ();
    3262                 :            : 
    3263                 :   19182700 :   subst_insn = i3;
    3264                 :            : 
    3265                 :            :   /* Many machines that don't use CC0 have insns that can both perform an
    3266                 :            :      arithmetic operation and set the condition code.  These operations will
    3267                 :            :      be represented as a PARALLEL with the first element of the vector
    3268                 :            :      being a COMPARE of an arithmetic operation with the constant zero.
    3269                 :            :      The second element of the vector will set some pseudo to the result
    3270                 :            :      of the same arithmetic operation.  If we simplify the COMPARE, we won't
    3271                 :            :      match such a pattern and so will generate an extra insn.   Here we test
    3272                 :            :      for this case, where both the comparison and the operation result are
    3273                 :            :      needed, and make the PARALLEL by just replacing I2DEST in I3SRC with
    3274                 :            :      I2SRC.  Later we will make the PARALLEL that contains I2.  */
    3275                 :            : 
    3276                 :   13443300 :   if (!HAVE_cc0 && i1 == 0 && added_sets_2 && GET_CODE (PATTERN (i3)) == SET
    3277                 :    2610070 :       && GET_CODE (SET_SRC (PATTERN (i3))) == COMPARE
    3278                 :    1047770 :       && CONST_INT_P (XEXP (SET_SRC (PATTERN (i3)), 1))
    3279                 :   19736200 :       && rtx_equal_p (XEXP (SET_SRC (PATTERN (i3)), 0), i2dest))
    3280                 :            :     {
    3281                 :     508448 :       rtx newpat_dest;
    3282                 :     508448 :       rtx *cc_use_loc = NULL;
    3283                 :     508448 :       rtx_insn *cc_use_insn = NULL;
    3284                 :     508448 :       rtx op0 = i2src, op1 = XEXP (SET_SRC (PATTERN (i3)), 1);
    3285                 :     508448 :       machine_mode compare_mode, orig_compare_mode;
    3286                 :     508448 :       enum rtx_code compare_code = UNKNOWN, orig_compare_code = UNKNOWN;
    3287                 :     508448 :       scalar_int_mode mode;
    3288                 :            : 
    3289                 :     508448 :       newpat = PATTERN (i3);
    3290                 :     508448 :       newpat_dest = SET_DEST (newpat);
    3291                 :     508448 :       compare_mode = orig_compare_mode = GET_MODE (newpat_dest);
    3292                 :            : 
    3293                 :     508448 :       if (undobuf.other_insn == 0
    3294                 :     508448 :           && (cc_use_loc = find_single_use (SET_DEST (newpat), i3,
    3295                 :            :                                             &cc_use_insn)))
    3296                 :            :         {
    3297                 :     504450 :           compare_code = orig_compare_code = GET_CODE (*cc_use_loc);
    3298                 :     504450 :           if (is_a <scalar_int_mode> (GET_MODE (i2dest), &mode))
    3299                 :     504450 :             compare_code = simplify_compare_const (compare_code, mode,
    3300                 :            :                                                    op0, &op1);
    3301                 :     504450 :           target_canonicalize_comparison (&compare_code, &op0, &op1, 1);
    3302                 :            :         }
    3303                 :            : 
    3304                 :            :       /* Do the rest only if op1 is const0_rtx, which may be the
    3305                 :            :          result of simplification.  */
    3306                 :     508448 :       if (op1 == const0_rtx)
    3307                 :            :         {
    3308                 :            :           /* If a single use of the CC is found, prepare to modify it
    3309                 :            :              when SELECT_CC_MODE returns a new CC-class mode, or when
    3310                 :            :              the above simplify_compare_const() returned a new comparison
    3311                 :            :              operator.  undobuf.other_insn is assigned the CC use insn
    3312                 :            :              when modifying it.  */
    3313                 :     361149 :           if (cc_use_loc)
    3314                 :            :             {
    3315                 :            : #ifdef SELECT_CC_MODE
    3316                 :     359248 :               machine_mode new_mode
    3317                 :     359248 :                 = SELECT_CC_MODE (compare_code, op0, op1);
    3318                 :     359248 :               if (new_mode != orig_compare_mode
    3319                 :     359248 :                   && can_change_dest_mode (SET_DEST (newpat),
    3320                 :            :                                            added_sets_2, new_mode))
    3321                 :            :                 {
    3322                 :        314 :                   unsigned int regno = REGNO (newpat_dest);
    3323                 :        314 :                   compare_mode = new_mode;
    3324                 :        314 :                   if (regno < FIRST_PSEUDO_REGISTER)
    3325                 :        314 :                     newpat_dest = gen_rtx_REG (compare_mode, regno);
    3326                 :            :                   else
    3327                 :            :                     {
    3328                 :          0 :                       SUBST_MODE (regno_reg_rtx[regno], compare_mode);
    3329                 :          0 :                       newpat_dest = regno_reg_rtx[regno];
    3330                 :            :                     }
    3331                 :            :                 }
    3332                 :            : #endif
    3333                 :            :               /* Cases for modifying the CC-using comparison.  */
    3334                 :     359248 :               if (compare_code != orig_compare_code
    3335                 :            :                   /* ??? Do we need to verify the zero rtx?  */
    3336                 :        321 :                   && XEXP (*cc_use_loc, 1) == const0_rtx)
    3337                 :            :                 {
    3338                 :            :                   /* Replace cc_use_loc with entire new RTX.  */
    3339                 :        321 :                   SUBST (*cc_use_loc,
    3340                 :            :                          gen_rtx_fmt_ee (compare_code, GET_MODE (*cc_use_loc),
    3341                 :            :                                          newpat_dest, const0_rtx));
    3342                 :        321 :                   undobuf.other_insn = cc_use_insn;
    3343                 :            :                 }
    3344                 :     358927 :               else if (compare_mode != orig_compare_mode)
    3345                 :            :                 {
    3346                 :            :                   /* Just replace the CC reg with a new mode.  */
    3347                 :          1 :                   SUBST (XEXP (*cc_use_loc, 0), newpat_dest);
    3348                 :          1 :                   undobuf.other_insn = cc_use_insn;
    3349                 :            :                 }
    3350                 :            :             }
    3351                 :            : 
    3352                 :            :           /* Now we modify the current newpat:
    3353                 :            :              First, SET_DEST(newpat) is updated if the CC mode has been
    3354                 :            :              altered. For targets without SELECT_CC_MODE, this should be
    3355                 :            :              optimized away.  */
    3356                 :     361149 :           if (compare_mode != orig_compare_mode)
    3357                 :        314 :             SUBST (SET_DEST (newpat), newpat_dest);
    3358                 :            :           /* This is always done to propagate i2src into newpat.  */
    3359                 :     361149 :           SUBST (SET_SRC (newpat),
    3360                 :            :                  gen_rtx_COMPARE (compare_mode, op0, op1));
    3361                 :            :           /* Create new version of i2pat if needed; the below PARALLEL
    3362                 :            :              creation needs this to work correctly.  */
    3363                 :     361149 :           if (! rtx_equal_p (i2src, op0))
    3364                 :          0 :             i2pat = gen_rtx_SET (i2dest, op0);
    3365                 :     361149 :           i2_is_used = 1;
    3366                 :            :         }
    3367                 :            :     }
    3368                 :            : 
    3369                 :     508448 :   if (i2_is_used == 0)
    3370                 :            :     {
    3371                 :            :       /* It is possible that the source of I2 or I1 may be performing
    3372                 :            :          an unneeded operation, such as a ZERO_EXTEND of something
    3373                 :            :          that is known to have the high part zero.  Handle that case
    3374                 :            :          by letting subst look at the inner insns.
    3375                 :            : 
    3376                 :            :          Another way to do this would be to have a function that tries
    3377                 :            :          to simplify a single insn instead of merging two or more
    3378                 :            :          insns.  We don't do this because of the potential of infinite
    3379                 :            :          loops and because of the potential extra memory required.
    3380                 :            :          However, doing it the way we are is a bit of a kludge and
    3381                 :            :          doesn't catch all cases.
    3382                 :            : 
    3383                 :            :          But only do this if -fexpensive-optimizations since it slows
    3384                 :            :          things down and doesn't usually win.
    3385                 :            : 
    3386                 :            :          This is not done in the COMPARE case above because the
    3387                 :            :          unmodified I2PAT is used in the PARALLEL and so a pattern
    3388                 :            :          with a modified I2SRC would not match.  */
    3389                 :            : 
    3390                 :   18821600 :       if (flag_expensive_optimizations)
    3391                 :            :         {
    3392                 :            :           /* Pass pc_rtx so no substitutions are done, just
    3393                 :            :              simplifications.  */
    3394                 :   17561700 :           if (i1)
    3395                 :            :             {
    3396                 :    5378840 :               subst_low_luid = DF_INSN_LUID (i1);
    3397                 :    5378840 :               i1src = subst (i1src, pc_rtx, pc_rtx, 0, 0, 0);
    3398                 :            :             }
    3399                 :            : 
    3400                 :   17561700 :           subst_low_luid = DF_INSN_LUID (i2);
    3401                 :   17561700 :           i2src = subst (i2src, pc_rtx, pc_rtx, 0, 0, 0);
    3402                 :            :         }
    3403                 :            : 
    3404                 :   18821600 :       n_occurrences = 0;                /* `subst' counts here */
    3405                 :   18821600 :       subst_low_luid = DF_INSN_LUID (i2);
    3406                 :            : 
    3407                 :            :       /* If I1 feeds into I2 and I1DEST is in I1SRC, we need to make a unique
    3408                 :            :          copy of I2SRC each time we substitute it, in order to avoid creating
    3409                 :            :          self-referential RTL when we will be substituting I1SRC for I1DEST
    3410                 :            :          later.  Likewise if I0 feeds into I2, either directly or indirectly
    3411                 :            :          through I1, and I0DEST is in I0SRC.  */
    3412                 :   18821600 :       newpat = subst (PATTERN (i3), i2dest, i2src, 0, 0,
    3413                 :   18821600 :                       (i1_feeds_i2_n && i1dest_in_i1src)
    3414                 :   18821600 :                       || ((i0_feeds_i2_n || (i0_feeds_i1_n && i1_feeds_i2_n))
    3415                 :     698675 :                           && i0dest_in_i0src));
    3416                 :   18821600 :       substed_i2 = 1;
    3417                 :            : 
    3418                 :            :       /* Record whether I2's body now appears within I3's body.  */
    3419                 :   18821600 :       i2_is_used = n_occurrences;
    3420                 :            :     }
    3421                 :            : 
    3422                 :            :   /* If we already got a failure, don't try to do more.  Otherwise, try to
    3423                 :            :      substitute I1 if we have it.  */
    3424                 :            : 
    3425                 :   19182700 :   if (i1 && GET_CODE (newpat) != CLOBBER)
    3426                 :            :     {
    3427                 :            :       /* Before we can do this substitution, we must redo the test done
    3428                 :            :          above (see detailed comments there) that ensures I1DEST isn't
    3429                 :            :          mentioned in any SETs in NEWPAT that are field assignments.  */
    3430                 :    5725460 :       if (!combinable_i3pat (NULL, &newpat, i1dest, NULL_RTX, NULL_RTX,
    3431                 :            :                              0, 0, 0))
    3432                 :            :         {
    3433                 :         37 :           undo_all ();
    3434                 :         37 :           return 0;
    3435                 :            :         }
    3436                 :            : 
    3437                 :    5725430 :       n_occurrences = 0;
    3438                 :    5725430 :       subst_low_luid = DF_INSN_LUID (i1);
    3439                 :            : 
    3440                 :            :       /* If the following substitution will modify I1SRC, make a copy of it
    3441                 :            :          for the case where it is substituted for I1DEST in I2PAT later.  */
    3442                 :    5725430 :       if (added_sets_2 && i1_feeds_i2_n)
    3443                 :     780516 :         i1src_copy = copy_rtx (i1src);
    3444                 :            : 
    3445                 :            :       /* If I0 feeds into I1 and I0DEST is in I0SRC, we need to make a unique
    3446                 :            :          copy of I1SRC each time we substitute it, in order to avoid creating
    3447                 :            :          self-referential RTL when we will be substituting I0SRC for I0DEST
    3448                 :            :          later.  */
    3449                 :   11450900 :       newpat = subst (newpat, i1dest, i1src, 0, 0,
    3450                 :    5725430 :                       i0_feeds_i1_n && i0dest_in_i0src);
    3451                 :    5725430 :       substed_i1 = 1;
    3452                 :            : 
    3453                 :            :       /* Record whether I1's body now appears within I3's body.  */
    3454                 :    5725430 :       i1_is_used = n_occurrences;
    3455                 :            :     }
    3456                 :            : 
    3457                 :            :   /* Likewise for I0 if we have it.  */
    3458                 :            : 
    3459                 :   19182700 :   if (i0 && GET_CODE (newpat) != CLOBBER)
    3460                 :            :     {
    3461                 :     839030 :       if (!combinable_i3pat (NULL, &newpat, i0dest, NULL_RTX, NULL_RTX,
    3462                 :            :                              0, 0, 0))
    3463                 :            :         {
    3464                 :          3 :           undo_all ();
    3465                 :          3 :           return 0;
    3466                 :            :         }
    3467                 :            : 
    3468                 :            :       /* If the following substitution will modify I0SRC, make a copy of it
    3469                 :            :          for the case where it is substituted for I0DEST in I1PAT later.  */
    3470                 :     839027 :       if (added_sets_1 && i0_feeds_i1_n)
    3471                 :     112095 :         i0src_copy = copy_rtx (i0src);
    3472                 :            :       /* And a copy for I0DEST in I2PAT substitution.  */
    3473                 :     839027 :       if (added_sets_2 && ((i0_feeds_i1_n && i1_feeds_i2_n)
    3474                 :     140452 :                            || (i0_feeds_i2_n)))
    3475                 :     188802 :         i0src_copy2 = copy_rtx (i0src);
    3476                 :            : 
    3477                 :     839027 :       n_occurrences = 0;
    3478                 :     839027 :       subst_low_luid = DF_INSN_LUID (i0);
    3479                 :     839027 :       newpat = subst (newpat, i0dest, i0src, 0, 0, 0);
    3480                 :     839027 :       substed_i0 = 1;
    3481                 :            :     }
    3482                 :            : 
    3483                 :   19182700 :   if (n_auto_inc)
    3484                 :            :     {
    3485                 :     383857 :       int new_n_auto_inc = 0;
    3486                 :     383857 :       for_each_inc_dec (newpat, count_auto_inc, &new_n_auto_inc);
    3487                 :            : 
    3488                 :     383857 :       if (n_auto_inc != new_n_auto_inc)
    3489                 :            :         {
    3490                 :        555 :           if (dump_file && (dump_flags & TDF_DETAILS))
    3491                 :          0 :             fprintf (dump_file, "Number of auto_inc expressions changed\n");
    3492                 :        555 :           undo_all ();
    3493                 :        555 :           return 0;
    3494                 :            :         }
    3495                 :            :     }
    3496                 :            : 
    3497                 :            :   /* Fail if an autoincrement side-effect has been duplicated.  Be careful
    3498                 :            :      to count all the ways that I2SRC and I1SRC can be used.  */
    3499                 :   19182100 :   if ((FIND_REG_INC_NOTE (i2, NULL_RTX) != 0
    3500                 :            :        && i2_is_used + added_sets_2 > 1)
    3501                 :            :       || (i1 != 0 && FIND_REG_INC_NOTE (i1, NULL_RTX) != 0
    3502                 :            :           && (i1_is_used + added_sets_1 + (added_sets_2 && i1_feeds_i2_n)
    3503                 :            :               > 1))
    3504                 :            :       || (i0 != 0 && FIND_REG_INC_NOTE (i0, NULL_RTX) != 0
    3505                 :            :           && (n_occurrences + added_sets_0
    3506                 :            :               + (added_sets_1 && i0_feeds_i1_n)
    3507                 :            :               + (added_sets_2 && i0_feeds_i2_n)
    3508                 :            :               > 1))
    3509                 :            :       /* Fail if we tried to make a new register.  */
    3510                 :   19182100 :       || max_reg_num () != maxreg
    3511                 :            :       /* Fail if we couldn't do something and have a CLOBBER.  */
    3512                 :   19182100 :       || GET_CODE (newpat) == CLOBBER
    3513                 :            :       /* Fail if this new pattern is a MULT and we didn't have one before
    3514                 :            :          at the outer level.  */
    3515                 :   38240600 :       || (GET_CODE (newpat) == SET && GET_CODE (SET_SRC (newpat)) == MULT
    3516                 :     233853 :           && ! have_mult))
    3517                 :            :     {
    3518                 :     136627 :       undo_all ();
    3519                 :     136627 :       return 0;
    3520                 :            :     }
    3521                 :            : 
    3522                 :            :   /* If the actions of the earlier insns must be kept
    3523                 :            :      in addition to substituting them into the latest one,
    3524                 :            :      we must make a new PARALLEL for the latest insn
    3525                 :            :      to hold additional the SETs.  */
    3526                 :            : 
    3527                 :   19045500 :   if (added_sets_0 || added_sets_1 || added_sets_2)
    3528                 :            :     {
    3529                 :    6118510 :       int extra_sets = added_sets_0 + added_sets_1 + added_sets_2;
    3530                 :    6118510 :       combine_extras++;
    3531                 :            : 
    3532                 :    6118510 :       if (GET_CODE (newpat) == PARALLEL)
    3533                 :            :         {
    3534                 :    1132240 :           rtvec old = XVEC (newpat, 0);
    3535                 :    1132240 :           total_sets = XVECLEN (newpat, 0) + extra_sets;
    3536                 :    1132240 :           newpat = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (total_sets));
    3537                 :    1132240 :           memcpy (XVEC (newpat, 0)->elem, &old->elem[0],
    3538                 :    1132240 :                   sizeof (old->elem[0]) * old->num_elem);
    3539                 :            :         }
    3540                 :            :       else
    3541                 :            :         {
    3542                 :    4986260 :           rtx old = newpat;
    3543                 :    4986260 :           total_sets = 1 + extra_sets;
    3544                 :    4986260 :           newpat = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (total_sets));
    3545                 :    4986260 :           XVECEXP (newpat, 0, 0) = old;
    3546                 :            :         }
    3547                 :            : 
    3548                 :    6118510 :       if (added_sets_0)
    3549                 :     184601 :         XVECEXP (newpat, 0, --total_sets) = i0pat;
    3550                 :            : 
    3551                 :    6118510 :       if (added_sets_1)
    3552                 :            :         {
    3553                 :    2074120 :           rtx t = i1pat;
    3554                 :    2074120 :           if (i0_feeds_i1_n)
    3555                 :     111913 :             t = subst (t, i0dest, i0src_copy ? i0src_copy : i0src, 0, 0, 0);
    3556                 :            : 
    3557                 :    2074120 :           XVECEXP (newpat, 0, --total_sets) = t;
    3558                 :            :         }
    3559                 :    6118510 :       if (added_sets_2)
    3560                 :            :         {
    3561                 :    4317770 :           rtx t = i2pat;
    3562                 :    4317770 :           if (i1_feeds_i2_n)
    3563                 :     771980 :             t = subst (t, i1dest, i1src_copy ? i1src_copy : i1src, 0, 0,
    3564                 :     771980 :                        i0_feeds_i1_n && i0dest_in_i0src);
    3565                 :    4317770 :           if ((i0_feeds_i1_n && i1_feeds_i2_n) || i0_feeds_i2_n)
    3566                 :     188249 :             t = subst (t, i0dest, i0src_copy2 ? i0src_copy2 : i0src, 0, 0, 0);
    3567                 :            : 
    3568                 :    4317770 :           XVECEXP (newpat, 0, --total_sets) = t;
    3569                 :            :         }
    3570                 :            :     }
    3571                 :            : 
    3572                 :   12927000 :  validate_replacement:
    3573                 :            : 
    3574                 :            :   /* Note which hard regs this insn has as inputs.  */
    3575                 :   19285900 :   mark_used_regs_combine (newpat);
    3576                 :            : 
    3577                 :            :   /* If recog_for_combine fails, it strips existing clobbers.  If we'll
    3578                 :            :      consider splitting this pattern, we might need these clobbers.  */
    3579                 :   19285900 :   if (i1 && GET_CODE (newpat) == PARALLEL
    3580                 :    3864400 :       && GET_CODE (XVECEXP (newpat, 0, XVECLEN (newpat, 0) - 1)) == CLOBBER)
    3581                 :            :     {
    3582                 :     901022 :       int len = XVECLEN (newpat, 0);
    3583                 :            : 
    3584                 :     901022 :       newpat_vec_with_clobbers = rtvec_alloc (len);
    3585                 :    2750040 :       for (i = 0; i < len; i++)
    3586                 :    1849020 :         RTVEC_ELT (newpat_vec_with_clobbers, i) = XVECEXP (newpat, 0, i);
    3587                 :            :     }
    3588                 :            : 
    3589                 :            :   /* We have recognized nothing yet.  */
    3590                 :   19285900 :   insn_code_number = -1;
    3591                 :            : 
    3592                 :            :   /* See if this is a PARALLEL of two SETs where one SET's destination is
    3593                 :            :      a register that is unused and this isn't marked as an instruction that
    3594                 :            :      might trap in an EH region.  In that case, we just need the other SET.
    3595                 :            :      We prefer this over the PARALLEL.
    3596                 :            : 
    3597                 :            :      This can occur when simplifying a divmod insn.  We *must* test for this
    3598                 :            :      case here because the code below that splits two independent SETs doesn't
    3599                 :            :      handle this case correctly when it updates the register status.
    3600                 :            : 
    3601                 :            :      It's pointless doing this if we originally had two sets, one from
    3602                 :            :      i3, and one from i2.  Combining then splitting the parallel results
    3603                 :            :      in the original i2 again plus an invalid insn (which we delete).
    3604                 :            :      The net effect is only to move instructions around, which makes
    3605                 :            :      debug info less accurate.
    3606                 :            : 
    3607                 :            :      If the remaining SET came from I2 its destination should not be used
    3608                 :            :      between I2 and I3.  See PR82024.  */
    3609                 :            : 
    3610                 :    4317770 :   if (!(added_sets_2 && i1 == 0)
    3611                 :   16079200 :       && is_parallel_of_n_reg_sets (newpat, 2)
    3612                 :   20175500 :       && asm_noperands (newpat) < 0)
    3613                 :            :     {
    3614                 :     889029 :       rtx set0 = XVECEXP (newpat, 0, 0);
    3615                 :     889029 :       rtx set1 = XVECEXP (newpat, 0, 1);
    3616                 :     889029 :       rtx oldpat = newpat;
    3617                 :            : 
    3618                 :     889029 :       if (((REG_P (SET_DEST (set1))
    3619                 :     889029 :             && find_reg_note (i3, REG_UNUSED, SET_DEST (set1)))
    3620                 :     855647 :            || (GET_CODE (SET_DEST (set1)) == SUBREG
    3621                 :          0 :                && find_reg_note (i3, REG_UNUSED, SUBREG_REG (SET_DEST (set1)))))
    3622                 :      33382 :           && insn_nothrow_p (i3)
    3623                 :     921776 :           && !side_effects_p (SET_SRC (set1)))
    3624                 :            :         {
    3625                 :      32621 :           newpat = set0;
    3626                 :      32621 :           insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
    3627                 :            :         }
    3628                 :            : 
    3629                 :     856408 :       else if (((REG_P (SET_DEST (set0))
    3630                 :     856408 :                  && find_reg_note (i3, REG_UNUSED, SET_DEST (set0)))
    3631                 :     847759 :                 || (GET_CODE (SET_DEST (set0)) == SUBREG
    3632                 :          0 :                     && find_reg_note (i3, REG_UNUSED,
    3633                 :          0 :                                       SUBREG_REG (SET_DEST (set0)))))
    3634                 :       8649 :                && insn_nothrow_p (i3)
    3635                 :     864317 :                && !side_effects_p (SET_SRC (set0)))
    3636                 :            :         {
    3637                 :       7877 :           rtx dest = SET_DEST (set1);
    3638                 :       7877 :           if (GET_CODE (dest) == SUBREG)
    3639                 :          0 :             dest = SUBREG_REG (dest);
    3640                 :       7877 :           if (!reg_used_between_p (dest, i2, i3))
    3641                 :            :             {
    3642                 :       7876 :               newpat = set1;
    3643                 :       7876 :               insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
    3644                 :            : 
    3645                 :       7876 :               if (insn_code_number >= 0)
    3646                 :         52 :                 changed_i3_dest = 1;
    3647                 :            :             }
    3648                 :            :         }
    3649                 :            : 
    3650                 :      40497 :       if (insn_code_number < 0)
    3651                 :     885247 :         newpat = oldpat;
    3652                 :            :     }
    3653                 :            : 
    3654                 :            :   /* Is the result of combination a valid instruction?  */
    3655                 :     889029 :   if (insn_code_number < 0)
    3656                 :   19282100 :     insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
    3657                 :            : 
    3658                 :            :   /* If we were combining three insns and the result is a simple SET
    3659                 :            :      with no ASM_OPERANDS that wasn't recognized, try to split it into two
    3660                 :            :      insns.  There are two ways to do this.  It can be split using a
    3661                 :            :      machine-specific method (like when you have an addition of a large
    3662                 :            :      constant) or by combine in the function find_split_point.  */
    3663                 :            : 
    3664                 :    5673280 :   if (i1 && insn_code_number < 0 && GET_CODE (newpat) == SET
    3665                 :   21938400 :       && asm_noperands (newpat) < 0)
    3666                 :            :     {
    3667                 :    2652330 :       rtx parallel, *split;
    3668                 :    2652330 :       rtx_insn *m_split_insn;
    3669                 :            : 
    3670                 :            :       /* See if the MD file can split NEWPAT.  If it can't, see if letting it
    3671                 :            :          use I2DEST as a scratch register will help.  In the latter case,
    3672                 :            :          convert I2DEST to the mode of the source of NEWPAT if we can.  */
    3673                 :            : 
    3674                 :    2652330 :       m_split_insn = combine_split_insns (newpat, i3);
    3675                 :            : 
    3676                 :            :       /* We can only use I2DEST as a scratch reg if it doesn't overlap any
    3677                 :            :          inputs of NEWPAT.  */
    3678                 :            : 
    3679                 :            :       /* ??? If I2DEST is not safe, and I1DEST exists, then it would be
    3680                 :            :          possible to try that as a scratch reg.  This would require adding
    3681                 :            :          more code to make it work though.  */
    3682                 :            : 
    3683                 :    2652330 :       if (m_split_insn == 0 && ! reg_overlap_mentioned_p (i2dest, newpat))
    3684                 :            :         {
    3685                 :    2542380 :           machine_mode new_mode = GET_MODE (SET_DEST (newpat));
    3686                 :            : 
    3687                 :            :           /* ??? Reusing i2dest without resetting the reg_stat entry for it
    3688                 :            :              (temporarily, until we are committed to this instruction
    3689                 :            :              combination) does not work: for example, any call to nonzero_bits
    3690                 :            :              on the register (from a splitter in the MD file, for example)
    3691                 :            :              will get the old information, which is invalid.
    3692                 :            : 
    3693                 :            :              Since nowadays we can create registers during combine just fine,
    3694                 :            :              we should just create a new one here, not reuse i2dest.  */
    3695                 :            : 
    3696                 :            :           /* First try to split using the original register as a
    3697                 :            :              scratch register.  */
    3698                 :    2542380 :           parallel = gen_rtx_PARALLEL (VOIDmode,
    3699                 :            :                                        gen_rtvec (2, newpat,
    3700                 :            :                                                   gen_rtx_CLOBBER (VOIDmode,
    3701                 :            :                                                                    i2dest)));
    3702                 :    2542380 :           m_split_insn = combine_split_insns (parallel, i3);
    3703                 :            : 
    3704                 :            :           /* If that didn't work, try changing the mode of I2DEST if
    3705                 :            :              we can.  */
    3706                 :    2542380 :           if (m_split_insn == 0
    3707                 :    2542380 :               && new_mode != GET_MODE (i2dest)
    3708                 :    1092580 :               && new_mode != VOIDmode
    3709                 :    3273330 :               && can_change_dest_mode (i2dest, added_sets_2, new_mode))
    3710                 :            :             {
    3711                 :     515342 :               machine_mode old_mode = GET_MODE (i2dest);
    3712                 :     515342 :               rtx ni2dest;
    3713                 :            : 
    3714                 :     515342 :               if (REGNO (i2dest) < FIRST_PSEUDO_REGISTER)
    3715                 :       4601 :                 ni2dest = gen_rtx_REG (new_mode, REGNO (i2dest));
    3716                 :            :               else
    3717                 :            :                 {
    3718                 :     510741 :                   SUBST_MODE (regno_reg_rtx[REGNO (i2dest)], new_mode);
    3719                 :     510741 :                   ni2dest = regno_reg_rtx[REGNO (i2dest)];
    3720                 :            :                 }
    3721                 :            : 
    3722                 :     515342 :               parallel = (gen_rtx_PARALLEL
    3723                 :            :                           (VOIDmode,
    3724                 :            :                            gen_rtvec (2, newpat,
    3725                 :            :                                       gen_rtx_CLOBBER (VOIDmode,
    3726                 :            :                                                        ni2dest))));
    3727                 :     515342 :               m_split_insn = combine_split_insns (parallel, i3);
    3728                 :            : 
    3729                 :     515342 :               if (m_split_insn == 0
    3730                 :     515342 :                   && REGNO (i2dest) >= FIRST_PSEUDO_REGISTER)
    3731                 :            :                 {
    3732                 :     510741 :                   struct undo *buf;
    3733                 :            : 
    3734                 :     510741 :                   adjust_reg_mode (regno_reg_rtx[REGNO (i2dest)], old_mode);
    3735                 :     510741 :                   buf = undobuf.undos;
    3736                 :     510741 :                   undobuf.undos = buf->next;
    3737                 :     510741 :                   buf->next = undobuf.frees;
    3738                 :     510741 :                   undobuf.frees = buf;
    3739                 :            :                 }
    3740                 :            :             }
    3741                 :            : 
    3742                 :    2542380 :           i2scratch = m_split_insn != 0;
    3743                 :            :         }
    3744                 :            : 
    3745                 :            :       /* If recog_for_combine has discarded clobbers, try to use them
    3746                 :            :          again for the split.  */
    3747                 :    2652330 :       if (m_split_insn == 0 && newpat_vec_with_clobbers)
    3748                 :            :         {
    3749                 :     862138 :           parallel = gen_rtx_PARALLEL (VOIDmode, newpat_vec_with_clobbers);
    3750                 :     862138 :           m_split_insn = combine_split_insns (parallel, i3);
    3751                 :            :         }
    3752                 :            : 
    3753                 :    2652330 :       if (m_split_insn && NEXT_INSN (m_split_insn) == NULL_RTX)
    3754                 :            :         {
    3755                 :        968 :           rtx m_split_pat = PATTERN (m_split_insn);
    3756                 :        968 :           insn_code_number = recog_for_combine (&m_split_pat, i3, &new_i3_notes);
    3757                 :        968 :           if (insn_code_number >= 0)
    3758                 :         28 :             newpat = m_split_pat;
    3759                 :            :         }
    3760                 :          0 :       else if (m_split_insn && NEXT_INSN (NEXT_INSN (m_split_insn)) == NULL_RTX
    3761                 :    2651370 :                && (next_nonnote_nondebug_insn (i2) == i3
    3762                 :          0 :                    || !modified_between_p (PATTERN (m_split_insn), i2, i3)))
    3763                 :            :         {
    3764                 :          0 :           rtx i2set, i3set;
    3765                 :          0 :           rtx newi3pat = PATTERN (NEXT_INSN (m_split_insn));
    3766                 :          0 :           newi2pat = PATTERN (m_split_insn);
    3767                 :            : 
    3768                 :          0 :           i3set = single_set (NEXT_INSN (m_split_insn));
    3769                 :          0 :           i2set = single_set (m_split_insn);
    3770                 :            : 
    3771                 :          0 :           i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
    3772                 :            : 
    3773                 :            :           /* If I2 or I3 has multiple SETs, we won't know how to track
    3774                 :            :              register status, so don't use these insns.  If I2's destination
    3775                 :            :              is used between I2 and I3, we also can't use these insns.  */
    3776                 :            : 
    3777                 :          0 :           if (i2_code_number >= 0 && i2set && i3set
    3778                 :          0 :               && (next_nonnote_nondebug_insn (i2) == i3
    3779                 :          0 :                   || ! reg_used_between_p (SET_DEST (i2set), i2, i3)))
    3780                 :          0 :             insn_code_number = recog_for_combine (&newi3pat, i3,
    3781                 :            :                                                   &new_i3_notes);
    3782                 :          0 :           if (insn_code_number >= 0)
    3783                 :          0 :             newpat = newi3pat;
    3784                 :            : 
    3785                 :            :           /* It is possible that both insns now set the destination of I3.
    3786                 :            :              If so, we must show an extra use of it.  */
    3787                 :            : 
    3788                 :          0 :           if (insn_code_number >= 0)
    3789                 :            :             {
    3790                 :          0 :               rtx new_i3_dest = SET_DEST (i3set);
    3791                 :          0 :               rtx new_i2_dest = SET_DEST (i2set);
    3792                 :            : 
    3793                 :          0 :               while (GET_CODE (new_i3_dest) == ZERO_EXTRACT
    3794                 :          0 :                      || GET_CODE (new_i3_dest) == STRICT_LOW_PART
    3795                 :          0 :                      || GET_CODE (new_i3_dest) == SUBREG)
    3796                 :          0 :                 new_i3_dest = XEXP (new_i3_dest, 0);
    3797                 :            : 
    3798                 :          0 :               while (GET_CODE (new_i2_dest) == ZERO_EXTRACT
    3799                 :          0 :                      || GET_CODE (new_i2_dest) == STRICT_LOW_PART
    3800                 :          0 :                      || GET_CODE (new_i2_dest) == SUBREG)
    3801                 :          0 :                 new_i2_dest = XEXP (new_i2_dest, 0);
    3802                 :            : 
    3803                 :          0 :               if (REG_P (new_i3_dest)
    3804                 :          0 :                   && REG_P (new_i2_dest)
    3805                 :          0 :                   && REGNO (new_i3_dest) == REGNO (new_i2_dest)
    3806                 :          0 :                   && REGNO (new_i2_dest) < reg_n_sets_max)
    3807                 :          0 :                 INC_REG_N_SETS (REGNO (new_i2_dest), 1);
    3808                 :            :             }
    3809                 :            :         }
    3810                 :            : 
    3811                 :            :       /* If we can split it and use I2DEST, go ahead and see if that
    3812                 :            :          helps things be recognized.  Verify that none of the registers
    3813                 :            :          are set between I2 and I3.  */
    3814                 :    2652330 :       if (insn_code_number < 0
    3815                 :    2652310 :           && (split = find_split_point (&newpat, i3, false)) != 0
    3816                 :            :           && (!HAVE_cc0 || REG_P (i2dest))
    3817                 :            :           /* We need I2DEST in the proper mode.  If it is a hard register
    3818                 :            :              or the only use of a pseudo, we can change its mode.
    3819                 :            :              Make sure we don't change a hard register to have a mode that
    3820                 :            :              isn't valid for it, or change the number of registers.  */
    3821                 :    2557230 :           && (GET_MODE (*split) == GET_MODE (i2dest)
    3822                 :    1057090 :               || GET_MODE (*split) == VOIDmode
    3823                 :     784762 :               || can_change_dest_mode (i2dest, added_sets_2,
    3824                 :            :                                        GET_MODE (*split)))
    3825                 :    2103430 :           && (next_nonnote_nondebug_insn (i2) == i3
    3826                 :     329882 :               || !modified_between_p (*split, i2, i3))
    3827                 :            :           /* We can't overwrite I2DEST if its value is still used by
    3828                 :            :              NEWPAT.  */
    3829                 :    4737290 :           && ! reg_referenced_p (i2dest, newpat))
    3830                 :            :         {
    3831                 :    2014920 :           rtx newdest = i2dest;
    3832                 :    2014920 :           enum rtx_code split_code = GET_CODE (*split);
    3833                 :    2014920 :           machine_mode split_mode = GET_MODE (*split);
    3834                 :    2014920 :           bool subst_done = false;
    3835                 :    2014920 :           newi2pat = NULL_RTX;
    3836                 :            : 
    3837                 :    2014920 :           i2scratch = true;
    3838                 :            : 
    3839                 :            :           /* *SPLIT may be part of I2SRC, so make sure we have the
    3840                 :            :              original expression around for later debug processing.
    3841                 :            :              We should not need I2SRC any more in other cases.  */
    3842                 :    2014920 :           if (MAY_HAVE_DEBUG_BIND_INSNS)
    3843                 :     894572 :             i2src = copy_rtx (i2src);
    3844                 :            :           else
    3845                 :    1120350 :             i2src = NULL;
    3846                 :            : 
    3847                 :            :           /* Get NEWDEST as a register in the proper mode.  We have already
    3848                 :            :              validated that we can do this.  */
    3849                 :    2014920 :           if (GET_MODE (i2dest) != split_mode && split_mode != VOIDmode)
    3850                 :            :             {
    3851                 :     327693 :               if (REGNO (i2dest) < FIRST_PSEUDO_REGISTER)
    3852                 :          0 :                 newdest = gen_rtx_REG (split_mode, REGNO (i2dest));
    3853                 :            :               else
    3854                 :            :                 {
    3855                 :     327693 :                   SUBST_MODE (regno_reg_rtx[REGNO (i2dest)], split_mode);
    3856                 :     327693 :                   newdest = regno_reg_rtx[REGNO (i2dest)];
    3857                 :            :                 }
    3858                 :            :             }
    3859                 :            : 
    3860                 :            :           /* If *SPLIT is a (mult FOO (const_int pow2)), convert it to
    3861                 :            :              an ASHIFT.  This can occur if it was inside a PLUS and hence
    3862                 :            :              appeared to be a memory address.  This is a kludge.  */
    3863                 :    2014920 :           if (split_code == MULT
    3864                 :     134979 :               && CONST_INT_P (XEXP (*split, 1))
    3865                 :      53052 :               && INTVAL (XEXP (*split, 1)) > 0
    3866                 :    2065780 :               && (i = exact_log2 (UINTVAL (XEXP (*split, 1)))) >= 0)
    3867                 :            :             {
    3868                 :      37997 :               rtx i_rtx = gen_int_shift_amount (split_mode, i);
    3869                 :      37997 :               SUBST (*split, gen_rtx_ASHIFT (split_mode,
    3870                 :            :                                              XEXP (*split, 0), i_rtx));
    3871                 :            :               /* Update split_code because we may not have a multiply
    3872                 :            :                  anymore.  */
    3873                 :      37997 :               split_code = GET_CODE (*split);
    3874                 :            :             }
    3875                 :            : 
    3876                 :            :           /* Similarly for (plus (mult FOO (const_int pow2))).  */
    3877                 :    2014920 :           if (split_code == PLUS
    3878                 :     346579 :               && GET_CODE (XEXP (*split, 0)) == MULT
    3879                 :      81416 :               && CONST_INT_P (XEXP (XEXP (*split, 0), 1))
    3880                 :      26231 :               && INTVAL (XEXP (XEXP (*split, 0), 1)) > 0
    3881                 :    2039650 :               && (i = exact_log2 (UINTVAL (XEXP (XEXP (*split, 0), 1)))) >= 0)
    3882                 :            :             {
    3883                 :       6184 :               rtx nsplit = XEXP (*split, 0);
    3884                 :       6184 :               rtx i_rtx = gen_int_shift_amount (GET_MODE (nsplit), i);
    3885                 :       6184 :               SUBST (XEXP (*split, 0), gen_rtx_ASHIFT (GET_MODE (nsplit),
    3886                 :            :                                                        XEXP (nsplit, 0),
    3887                 :            :                                                        i_rtx));
    3888                 :            :               /* Update split_code because we may not have a multiply
    3889                 :            :                  anymore.  */
    3890                 :       6184 :               split_code = GET_CODE (*split);
    3891                 :            :             }
    3892                 :            : 
    3893                 :            : #ifdef INSN_SCHEDULING
    3894                 :            :           /* If *SPLIT is a paradoxical SUBREG, when we split it, it should
    3895                 :            :              be written as a ZERO_EXTEND.  */
    3896                 :    2014920 :           if (split_code == SUBREG && MEM_P (SUBREG_REG (*split)))
    3897                 :            :             {
    3898                 :            :               /* Or as a SIGN_EXTEND if LOAD_EXTEND_OP says that that's
    3899                 :            :                  what it really is.  */
    3900                 :       5055 :               if (load_extend_op (GET_MODE (SUBREG_REG (*split)))
    3901                 :            :                   == SIGN_EXTEND)
    3902                 :            :                 SUBST (*split, gen_rtx_SIGN_EXTEND (split_mode,
    3903                 :            :                                                     SUBREG_REG (*split)));
    3904                 :            :               else
    3905                 :       5055 :                 SUBST (*split, gen_rtx_ZERO_EXTEND (split_mode,
    3906                 :            :                                                     SUBREG_REG (*split)));
    3907                 :            :             }
    3908                 :            : #endif
    3909                 :            : 
    3910                 :            :           /* Attempt to split binary operators using arithmetic identities.  */
    3911                 :    2014920 :           if (BINARY_P (SET_SRC (newpat))
    3912                 :    1597450 :               && split_mode == GET_MODE (SET_SRC (newpat))
    3913                 :    3057000 :               && ! side_effects_p (SET_SRC (newpat)))
    3914                 :            :             {
    3915                 :    1024750 :               rtx setsrc = SET_SRC (newpat);
    3916                 :    1024750 :               machine_mode mode = GET_MODE (setsrc);
    3917                 :    1024750 :               enum rtx_code code = GET_CODE (setsrc);
    3918                 :    1024750 :               rtx src_op0 = XEXP (setsrc, 0);
    3919                 :    1024750 :               rtx src_op1 = XEXP (setsrc, 1);
    3920                 :            : 
    3921                 :            :               /* Split "X = Y op Y" as "Z = Y; X = Z op Z".  */
    3922                 :    1024750 :               if (rtx_equal_p (src_op0, src_op1))
    3923                 :            :                 {
    3924                 :       1240 :                   newi2pat = gen_rtx_SET (newdest, src_op0);
    3925                 :       1240 :                   SUBST (XEXP (setsrc, 0), newdest);
    3926                 :       1240 :                   SUBST (XEXP (setsrc, 1), newdest);
    3927                 :       1240 :                   subst_done = true;
    3928                 :            :                 }
    3929                 :            :               /* Split "((P op Q) op R) op S" where op is PLUS or MULT.  */
    3930                 :    1023510 :               else if ((code == PLUS || code == MULT)
    3931                 :     558566 :                        && GET_CODE (src_op0) == code
    3932                 :     184389 :                        && GET_CODE (XEXP (src_op0, 0)) == code
    3933                 :      44120 :                        && (INTEGRAL_MODE_P (mode)
    3934                 :      13062 :                            || (FLOAT_MODE_P (mode)
    3935                 :      13062 :                                && flag_unsafe_math_optimizations)))
    3936                 :            :                 {
    3937                 :      34543 :                   rtx p = XEXP (XEXP (src_op0, 0), 0);
    3938                 :      34543 :                   rtx q = XEXP (XEXP (src_op0, 0), 1);
    3939                 :      34543 :                   rtx r = XEXP (src_op0, 1);
    3940                 :      34543 :                   rtx s = src_op1;
    3941                 :            : 
    3942                 :            :                   /* Split both "((X op Y) op X) op Y" and
    3943                 :            :                      "((X op Y) op Y) op X" as "T op T" where T is
    3944                 :            :                      "X op Y".  */
    3945                 :      34651 :                   if ((rtx_equal_p (p,r) && rtx_equal_p (q,s))
    3946                 :      34576 :                        || (rtx_equal_p (p,s) && rtx_equal_p (q,r)))
    3947                 :            :                     {
    3948                 :         75 :                       newi2pat = gen_rtx_SET (newdest, XEXP (src_op0, 0));
    3949                 :         75 :                       SUBST (XEXP (setsrc, 0), newdest);
    3950                 :         75 :                       SUBST (XEXP (setsrc, 1), newdest);
    3951                 :         75 :                       subst_done = true;
    3952                 :            :                     }
    3953                 :            :                   /* Split "((X op X) op Y) op Y)" as "T op T" where
    3954                 :            :                      T is "X op Y".  */
    3955                 :      34468 :                   else if (rtx_equal_p (p,q) && rtx_equal_p (r,s))
    3956                 :            :                     {
    3957                 :         23 :                       rtx tmp = simplify_gen_binary (code, mode, p, r);
    3958                 :         23 :                       newi2pat = gen_rtx_SET (newdest, tmp);
    3959                 :         23 :                       SUBST (XEXP (setsrc, 0), newdest);
    3960                 :         23 :                       SUBST (XEXP (setsrc, 1), newdest);
    3961                 :         23 :                       subst_done = true;
    3962                 :            :                     }
    3963                 :            :                 }
    3964                 :            :             }
    3965                 :            : 
    3966                 :       1338 :           if (!subst_done)
    3967                 :            :             {
    3968                 :    2013580 :               newi2pat = gen_rtx_SET (newdest, *split);
    3969                 :    2013580 :               SUBST (*split, newdest);
    3970                 :            :             }
    3971                 :            : 
    3972                 :    2014920 :           i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
    3973                 :            : 
    3974                 :            :           /* recog_for_combine might have added CLOBBERs to newi2pat.
    3975                 :            :              Make sure NEWPAT does not depend on the clobbered regs.  */
    3976                 :    2014920 :           if (GET_CODE (newi2pat) == PARALLEL)
    3977                 :    1313520 :             for (i = XVECLEN (newi2pat, 0) - 1; i >= 0; i--)
    3978                 :     880260 :               if (GET_CODE (XVECEXP (newi2pat, 0, i)) == CLOBBER)
    3979                 :            :                 {
    3980                 :     447002 :                   rtx reg = XEXP (XVECEXP (newi2pat, 0, i), 0);
    3981                 :     447002 :                   if (reg_overlap_mentioned_p (reg, newpat))
    3982                 :            :                     {
    3983                 :      11754 :                       undo_all ();
    3984                 :      11754 :                       return 0;
    3985                 :            :                     }
    3986                 :            :                 }
    3987                 :            : 
    3988                 :            :           /* If the split point was a MULT and we didn't have one before,
    3989                 :            :              don't use one now.  */
    3990                 :    2003160 :           if (i2_code_number >= 0 && ! (split_code == MULT && ! have_mult))
    3991                 :    1045080 :             insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
    3992                 :            :         }
    3993                 :            :     }
    3994                 :            : 
    3995                 :            :   /* Check for a case where we loaded from memory in a narrow mode and
    3996                 :            :      then sign extended it, but we need both registers.  In that case,
    3997                 :            :      we have a PARALLEL with both loads from the same memory location.
    3998                 :            :      We can split this into a load from memory followed by a register-register
    3999                 :            :      copy.  This saves at least one insn, more if register allocation can
    4000                 :            :      eliminate the copy.
    4001                 :            : 
    4002                 :            :      We cannot do this if the destination of the first assignment is a
    4003                 :            :      condition code register or cc0.  We eliminate this case by making sure
    4004                 :            :      the SET_DEST and SET_SRC have the same mode.
    4005                 :            : 
    4006                 :            :      We cannot do this if the destination of the second assignment is
    4007                 :            :      a register that we have already assumed is zero-extended.  Similarly
    4008                 :            :      for a SUBREG of such a register.  */
    4009                 :            : 
    4010                 :    3020940 :   else if (i1 && insn_code_number < 0 && asm_noperands (newpat) < 0
    4011                 :    2995100 :            && GET_CODE (newpat) == PARALLEL
    4012                 :    2993870 :            && XVECLEN (newpat, 0) == 2
    4013                 :    2492980 :            && GET_CODE (XVECEXP (newpat, 0, 0)) == SET
    4014                 :    2492830 :            && GET_CODE (SET_SRC (XVECEXP (newpat, 0, 0))) == SIGN_EXTEND
    4015                 :      17034 :            && (GET_MODE (SET_DEST (XVECEXP (newpat, 0, 0)))
    4016                 :      17034 :                == GET_MODE (SET_SRC (XVECEXP (newpat, 0, 0))))
    4017                 :      17034 :            && GET_CODE (XVECEXP (newpat, 0, 1)) == SET
    4018                 :      17034 :            && rtx_equal_p (SET_SRC (XVECEXP (newpat, 0, 1)),
    4019                 :      17034 :                            XEXP (SET_SRC (XVECEXP (newpat, 0, 0)), 0))
    4020                 :       2449 :            && !modified_between_p (SET_SRC (XVECEXP (newpat, 0, 1)), i2, i3)
    4021                 :       2449 :            && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != ZERO_EXTRACT
    4022                 :       2449 :            && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART
    4023                 :       2449 :            && ! (temp_expr = SET_DEST (XVECEXP (newpat, 0, 1)),
    4024                 :            :                  (REG_P (temp_expr)
    4025                 :       2449 :                   && reg_stat[REGNO (temp_expr)].nonzero_bits != 0
    4026                 :       2556 :                   && known_lt (GET_MODE_PRECISION (GET_MODE (temp_expr)),
    4027                 :            :                                BITS_PER_WORD)
    4028                 :       2325 :                   && known_lt (GET_MODE_PRECISION (GET_MODE (temp_expr)),
    4029                 :            :                                HOST_BITS_PER_INT)
    4030                 :        542 :                   && (reg_stat[REGNO (temp_expr)].nonzero_bits
    4031                 :        542 :                       != GET_MODE_MASK (word_mode))))
    4032                 :       2418 :            && ! (GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) == SUBREG
    4033                 :          0 :                  && (temp_expr = SUBREG_REG (SET_DEST (XVECEXP (newpat, 0, 1))),
    4034                 :          0 :                      (REG_P (temp_expr)
    4035                 :          0 :                       && reg_stat[REGNO (temp_expr)].nonzero_bits != 0
    4036                 :          0 :                       && known_lt (GET_MODE_PRECISION (GET_MODE (temp_expr)),
    4037                 :            :                                    BITS_PER_WORD)
    4038                 :          0 :                       && known_lt (GET_MODE_PRECISION (GET_MODE (temp_expr)),
    4039                 :            :                                    HOST_BITS_PER_INT)
    4040                 :          0 :                       && (reg_stat[REGNO (temp_expr)].nonzero_bits
    4041                 :          0 :                           != GET_MODE_MASK (word_mode)))))
    4042                 :       2418 :            && ! reg_overlap_mentioned_p (SET_DEST (XVECEXP (newpat, 0, 1)),
    4043                 :       2418 :                                          SET_SRC (XVECEXP (newpat, 0, 1)))
    4044                 :   16635900 :            && ! find_reg_note (i3, REG_UNUSED,
    4045                 :       2373 :                                SET_DEST (XVECEXP (newpat, 0, 0))))
    4046                 :            :     {
    4047                 :       2373 :       rtx ni2dest;
    4048                 :            : 
    4049                 :       2373 :       newi2pat = XVECEXP (newpat, 0, 0);
    4050                 :       2373 :       ni2dest = SET_DEST (XVECEXP (newpat, 0, 0));
    4051                 :       2373 :       newpat = XVECEXP (newpat, 0, 1);
    4052                 :       2373 :       SUBST (SET_SRC (newpat),
    4053                 :            :              gen_lowpart (GET_MODE (SET_SRC (newpat)), ni2dest));
    4054                 :       2373 :       i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
    4055                 :            : 
    4056                 :       2373 :       if (i2_code_number >= 0)
    4057                 :          0 :         insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
    4058                 :            : 
    4059                 :       2373 :       if (insn_code_number >= 0)
    4060                 :          0 :         swap_i2i3 = 1;
    4061                 :            :     }
    4062                 :            : 
    4063                 :            :   /* Similarly, check for a case where we have a PARALLEL of two independent
    4064                 :            :      SETs but we started with three insns.  In this case, we can do the sets
    4065                 :            :      as two separate insns.  This case occurs when some SET allows two
    4066                 :            :      other insns to combine, but the destination of that SET is still live.
    4067                 :            : 
    4068                 :            :      Also do this if we started with two insns and (at least) one of the
    4069                 :            :      resulting sets is a noop; this noop will be deleted later.
    4070                 :            : 
    4071                 :            :      Also do this if we started with two insns neither of which was a simple
    4072                 :            :      move.  */
    4073                 :            : 
    4074                 :   14320500 :   else if (insn_code_number < 0 && asm_noperands (newpat) < 0
    4075                 :   14302100 :            && GET_CODE (newpat) == PARALLEL
    4076                 :    6305020 :            && XVECLEN (newpat, 0) == 2
    4077                 :    5719660 :            && GET_CODE (XVECEXP (newpat, 0, 0)) == SET
    4078                 :    5640710 :            && GET_CODE (XVECEXP (newpat, 0, 1)) == SET
    4079                 :    5611420 :            && (i1
    4080                 :    3131280 :                || set_noop_p (XVECEXP (newpat, 0, 0))
    4081                 :    3130920 :                || set_noop_p (XVECEXP (newpat, 0, 1))
    4082                 :    3130910 :                || (!i2_was_move && !i3_was_move))
    4083                 :    3591140 :            && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 0))) != ZERO_EXTRACT
    4084                 :    3590470 :            && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 0))) != STRICT_LOW_PART
    4085                 :    3590270 :            && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != ZERO_EXTRACT
    4086                 :    3589190 :            && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART
    4087                 :    3589180 :            && ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 1)),
    4088                 :            :                                   XVECEXP (newpat, 0, 0))
    4089                 :    3053570 :            && ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 0)),
    4090                 :    3053570 :                                   XVECEXP (newpat, 0, 1))
    4091                 :   19928100 :            && ! (contains_muldiv (SET_SRC (XVECEXP (newpat, 0, 0)))
    4092                 :     331861 :                  && contains_muldiv (SET_SRC (XVECEXP (newpat, 0, 1)))))
    4093                 :            :     {
    4094                 :    2769700 :       rtx set0 = XVECEXP (newpat, 0, 0);
    4095                 :    2769700 :       rtx set1 = XVECEXP (newpat, 0, 1);
    4096                 :            : 
    4097                 :            :       /* Normally, it doesn't matter which of the two is done first,
    4098                 :            :          but the one that references cc0 can't be the second, and
    4099                 :            :          one which uses any regs/memory set in between i2 and i3 can't
    4100                 :            :          be first.  The PARALLEL might also have been pre-existing in i3,
    4101                 :            :          so we need to make sure that we won't wrongly hoist a SET to i2
    4102                 :            :          that would conflict with a death note present in there, or would
    4103                 :            :          have its dest modified between i2 and i3.  */
    4104                 :    2769700 :       if (!modified_between_p (SET_SRC (set1), i2, i3)
    4105                 :    5516310 :           && !(REG_P (SET_DEST (set1))
    4106                 :    2753180 :                && find_reg_note (i2, REG_DEAD, SET_DEST (set1)))
    4107                 :    2772880 :           && !(GET_CODE (SET_DEST (set1)) == SUBREG
    4108                 :       9960 :                && find_reg_note (i2, REG_DEAD,
    4109                 :       9960 :                                  SUBREG_REG (SET_DEST (set1))))
    4110                 :    2762920 :           && !modified_between_p (SET_DEST (set1), i2, i3)
    4111                 :            :           && (!HAVE_cc0 || !reg_referenced_p (cc0_rtx, set0))
    4112                 :            :           /* If I3 is a jump, ensure that set0 is a jump so that
    4113                 :            :              we do not create invalid RTL.  */
    4114                 :    5532610 :           && (!JUMP_P (i3) || SET_DEST (set0) == pc_rtx)
    4115                 :            :          )
    4116                 :            :         {
    4117                 :    2762920 :           newi2pat = set1;
    4118                 :    2762920 :           newpat = set0;
    4119                 :            :         }
    4120                 :       6780 :       else if (!modified_between_p (SET_SRC (set0), i2, i3)
    4121                 :        440 :                && !(REG_P (SET_DEST (set0))
    4122                 :        220 :                     && find_reg_note (i2, REG_DEAD, SET_DEST (set0)))
    4123                 :        220 :                && !(GET_CODE (SET_DEST (set0)) == SUBREG
    4124                 :          0 :                     && find_reg_note (i2, REG_DEAD,
    4125                 :          0 :                                       SUBREG_REG (SET_DEST (set0))))
    4126                 :        220 :                && !modified_between_p (SET_DEST (set0), i2, i3)
    4127                 :            :                && (!HAVE_cc0 || !reg_referenced_p (cc0_rtx, set1))
    4128                 :            :                /* If I3 is a jump, ensure that set1 is a jump so that
    4129                 :            :                   we do not create invalid RTL.  */
    4130                 :       6999 :                && (!JUMP_P (i3) || SET_DEST (set1) == pc_rtx)
    4131                 :            :               )
    4132                 :            :         {
    4133                 :        219 :           newi2pat = set0;
    4134                 :        219 :           newpat = set1;
    4135                 :            :         }
    4136                 :            :       else
    4137                 :            :         {
    4138                 :       6561 :           undo_all ();
    4139                 :       6561 :           return 0;
    4140                 :            :         }
    4141                 :            : 
    4142                 :    2763140 :       i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
    4143                 :            : 
    4144                 :    2763140 :       if (i2_code_number >= 0)
    4145                 :            :         {
    4146                 :            :           /* recog_for_combine might have added CLOBBERs to newi2pat.
    4147                 :            :              Make sure NEWPAT does not depend on the clobbered regs.  */
    4148                 :    1993080 :           if (GET_CODE (newi2pat) == PARALLEL)
    4149                 :            :             {
    4150                 :     816231 :               for (i = XVECLEN (newi2pat, 0) - 1; i >= 0; i--)
    4151                 :     545870 :                 if (GET_CODE (XVECEXP (newi2pat, 0, i)) == CLOBBER)
    4152                 :            :                   {
    4153                 :     275509 :                     rtx reg = XEXP (XVECEXP (newi2pat, 0, i), 0);
    4154                 :     275509 :                     if (reg_overlap_mentioned_p (reg, newpat))
    4155                 :            :                       {
    4156                 :       2171 :                         undo_all ();
    4157                 :       2171 :                         return 0;
    4158                 :            :                       }
    4159                 :            :                   }
    4160                 :            :             }
    4161                 :            : 
    4162                 :    1990910 :           insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
    4163                 :            : 
    4164                 :    1990910 :           if (insn_code_number >= 0)
    4165                 :      87066 :             split_i2i3 = 1;
    4166                 :            :         }
    4167                 :            :     }
    4168                 :            : 
    4169                 :            :   /* If it still isn't recognized, fail and change things back the way they
    4170                 :            :      were.  */
    4171                 :   19265400 :   if ((insn_code_number < 0
    4172                 :            :        /* Is the result a reasonable ASM_OPERANDS?  */
    4173                 :   19265400 :        && (! check_asm_operands (newpat) || added_sets_1 || added_sets_2)))
    4174                 :            :     {
    4175                 :   16839500 :       undo_all ();
    4176                 :   16839500 :       return 0;
    4177                 :            :     }
    4178                 :            : 
    4179                 :            :   /* If we had to change another insn, make sure it is valid also.  */
    4180                 :    2425910 :   if (undobuf.other_insn)
    4181                 :            :     {
    4182                 :     473934 :       CLEAR_HARD_REG_SET (newpat_used_regs);
    4183                 :            : 
    4184                 :     157978 :       other_pat = PATTERN (undobuf.other_insn);
    4185                 :     157978 :       other_code_number = recog_for_combine (&other_pat, undobuf.other_insn,
    4186                 :            :                                              &new_other_notes);
    4187                 :            : 
    4188                 :     157978 :       if (other_code_number < 0 && ! check_asm_operands (other_pat))
    4189                 :            :         {
    4190                 :       5535 :           undo_all ();
    4191                 :       5535 :           return 0;
    4192                 :            :         }
    4193                 :            :     }
    4194                 :            : 
    4195                 :            :   /* If I2 is the CC0 setter and I3 is the CC0 user then check whether
    4196                 :            :      they are adjacent to each other or not.  */
    4197                 :    2420380 :   if (HAVE_cc0)
    4198                 :            :     {
    4199                 :            :       rtx_insn *p = prev_nonnote_insn (i3);
    4200                 :            :       if (p && p != i2 && NONJUMP_INSN_P (p) && newi2pat
    4201                 :            :           && sets_cc0_p (newi2pat))
    4202                 :            :         {
    4203                 :            :           undo_all ();
    4204                 :            :           return 0;
    4205                 :            :         }
    4206                 :            :     }
    4207                 :            : 
    4208                 :            :   /* Only allow this combination if insn_cost reports that the
    4209                 :            :      replacement instructions are cheaper than the originals.  */
    4210                 :    2420380 :   if (!combine_validate_cost (i0, i1, i2, i3, newpat, newi2pat, other_pat))
    4211                 :            :     {
    4212                 :      56967 :       undo_all ();
    4213                 :      56967 :       return 0;
    4214                 :            :     }
    4215                 :            : 
    4216                 :    2363410 :   if (MAY_HAVE_DEBUG_BIND_INSNS)
    4217                 :            :     {
    4218                 :    1279190 :       struct undo *undo;
    4219                 :            : 
    4220                 :    3640620 :       for (undo = undobuf.undos; undo; undo = undo->next)
    4221                 :    2361440 :         if (undo->kind == UNDO_MODE)
    4222                 :            :           {
    4223                 :       1095 :             rtx reg = *undo->where.r;
    4224                 :       1095 :             machine_mode new_mode = GET_MODE (reg);
    4225                 :       1095 :             machine_mode old_mode = undo->old_contents.m;
    4226                 :            : 
    4227                 :            :             /* Temporarily revert mode back.  */
    4228                 :       1095 :             adjust_reg_mode (reg, old_mode);
    4229                 :            : 
    4230                 :       1095 :             if (reg == i2dest && i2scratch)
    4231                 :            :               {
    4232                 :            :                 /* If we used i2dest as a scratch register with a
    4233                 :            :                    different mode, substitute it for the original
    4234                 :            :                    i2src while its original mode is temporarily
    4235                 :            :                    restored, and then clear i2scratch so that we don't
    4236                 :            :                    do it again later.  */
    4237                 :       1095 :                 propagate_for_debug (i2, last_combined_insn, reg, i2src,
    4238                 :            :                                      this_basic_block);
    4239                 :       1095 :                 i2scratch = false;
    4240                 :            :                 /* Put back the new mode.  */
    4241                 :       1095 :                 adjust_reg_mode (reg, new_mode);
    4242                 :            :               }
    4243                 :            :             else
    4244                 :            :               {
    4245                 :          0 :                 rtx tempreg = gen_raw_REG (old_mode, REGNO (reg));
    4246                 :          0 :                 rtx_insn *first, *last;
    4247                 :            : 
    4248                 :          0 :                 if (reg == i2dest)
    4249                 :            :                   {
    4250                 :            :                     first = i2;
    4251                 :            :                     last = last_combined_insn;
    4252                 :            :                   }
    4253                 :            :                 else
    4254                 :            :                   {
    4255                 :          0 :                     first = i3;
    4256                 :          0 :                     last = undobuf.other_insn;
    4257                 :          0 :                     gcc_assert (last);
    4258                 :          0 :                     if (DF_INSN_LUID (last)
    4259                 :          0 :                         < DF_INSN_LUID (last_combined_insn))
    4260                 :          0 :                       last = last_combined_insn;
    4261                 :            :                   }
    4262                 :            : 
    4263                 :            :                 /* We're dealing with a reg that changed mode but not
    4264                 :            :                    meaning, so we want to turn it into a subreg for
    4265                 :            :                    the new mode.  However, because of REG sharing and
    4266                 :            :                    because its mode had already changed, we have to do
    4267                 :            :                    it in two steps.  First, replace any debug uses of
    4268                 :            :                    reg, with its original mode temporarily restored,
    4269                 :            :                    with this copy we have created; then, replace the
    4270                 :            :                    copy with the SUBREG of the original shared reg,
    4271                 :            :                    once again changed to the new mode.  */
    4272                 :          0 :                 propagate_for_debug (first, last, reg, tempreg,
    4273                 :            :                                      this_basic_block);
    4274                 :          0 :                 adjust_reg_mode (reg, new_mode);
    4275                 :          0 :                 propagate_for_debug (first, last, tempreg,
    4276                 :            :                                      lowpart_subreg (old_mode, reg, new_mode),
    4277                 :            :                                      this_basic_block);
    4278                 :            :               }
    4279                 :            :           }
    4280                 :            :     }
    4281                 :            : 
    4282                 :            :   /* If we will be able to accept this, we have made a
    4283                 :            :      change to the destination of I3.  This requires us to
    4284                 :            :      do a few adjustments.  */
    4285                 :            : 
    4286                 :    2363410 :   if (changed_i3_dest)
    4287                 :            :     {
    4288                 :      10042 :       PATTERN (i3) = newpat;
    4289                 :      10042 :       adjust_for_new_dest (i3);
    4290                 :            :     }
    4291                 :            : 
    4292                 :            :   /* We now know that we can do this combination.  Merge the insns and
    4293                 :            :      update the status of registers and LOG_LINKS.  */
    4294                 :            : 
    4295                 :    2363410 :   if (undobuf.other_insn)
    4296                 :            :     {
    4297                 :     152430 :       rtx note, next;
    4298                 :            : 
    4299                 :     152430 :       PATTERN (undobuf.other_insn) = other_pat;
    4300                 :            : 
    4301                 :            :       /* If any of the notes in OTHER_INSN were REG_DEAD or REG_UNUSED,
    4302                 :            :          ensure that they are still valid.  Then add any non-duplicate
    4303                 :            :          notes added by recog_for_combine.  */
    4304                 :     456105 :       for (note = REG_NOTES (undobuf.other_insn); note; note = next)
    4305                 :            :         {
    4306                 :     303675 :           next = XEXP (note, 1);
    4307                 :            : 
    4308                 :     303675 :           if ((REG_NOTE_KIND (note) == REG_DEAD
    4309                 :     153595 :                && !reg_referenced_p (XEXP (note, 0),
    4310                 :     153595 :                                      PATTERN (undobuf.other_insn)))
    4311                 :     300632 :               ||(REG_NOTE_KIND (note) == REG_UNUSED
    4312                 :         25 :                  && !reg_set_p (XEXP (note, 0),
    4313                 :         25 :                                 PATTERN (undobuf.other_insn)))
    4314                 :            :               /* Simply drop equal note since it may be no longer valid
    4315                 :            :                  for other_insn.  It may be possible to record that CC
    4316                 :            :                  register is changed and only discard those notes, but
    4317                 :            :                  in practice it's unnecessary complication and doesn't
    4318                 :            :                  give any meaningful improvement.
    4319                 :            : 
    4320                 :            :                  See PR78559.  */
    4321                 :     300632 :               || REG_NOTE_KIND (note) == REG_EQUAL
    4322                 :     603804 :               || REG_NOTE_KIND (note) == REG_EQUIV)
    4323                 :       3546 :             remove_note (undobuf.other_insn, note);
    4324                 :            :         }
    4325                 :            : 
    4326                 :     152430 :       distribute_notes  (new_other_notes, undobuf.other_insn,
    4327                 :            :                         undobuf.other_insn, NULL, NULL_RTX, NULL_RTX,
    4328                 :            :                         NULL_RTX);
    4329                 :            :     }
    4330                 :            : 
    4331                 :    2363410 :   if (swap_i2i3)
    4332                 :            :     {
    4333                 :            :       /* I3 now uses what used to be its destination and which is now
    4334                 :            :          I2's destination.  This requires us to do a few adjustments.  */
    4335                 :          0 :       PATTERN (i3) = newpat;
    4336                 :          0 :       adjust_for_new_dest (i3);
    4337                 :            :     }
    4338                 :            : 
    4339                 :    2363410 :   if (swap_i2i3 || split_i2i3)
    4340                 :            :     {
    4341                 :            :       /* We might need a LOG_LINK from I3 to I2.  But then we used to
    4342                 :            :          have one, so we still will.
    4343                 :            : 
    4344                 :            :          However, some later insn might be using I2's dest and have
    4345                 :            :          a LOG_LINK pointing at I3.  We should change it to point at
    4346                 :            :          I2 instead.  */
    4347                 :            : 
    4348                 :            :       /* newi2pat is usually a SET here; however, recog_for_combine might
    4349                 :            :          have added some clobbers.  */
    4350                 :      36826 :       rtx x = newi2pat;
    4351                 :      36826 :       if (GET_CODE (x) == PARALLEL)
    4352                 :      13690 :         x = XVECEXP (newi2pat, 0, 0);
    4353                 :            : 
    4354                 :            :       /* It can only be a SET of a REG or of a SUBREG of a REG.  */
    4355                 :      36826 :       unsigned int regno = reg_or_subregno (SET_DEST (x));
    4356                 :            : 
    4357                 :      36826 :       bool done = false;
    4358                 :      36826 :       for (rtx_insn *insn = NEXT_INSN (i3);
    4359                 :     415910 :            !done
    4360                 :     415910 :            && insn
    4361                 :     414877 :            && NONDEBUG_INSN_P (insn)
    4362                 :     794994 :            && BLOCK_FOR_INSN (insn) == this_basic_block;
    4363                 :     379084 :            insn = NEXT_INSN (insn))
    4364                 :            :         {
    4365                 :     379084 :           struct insn_link *link;
    4366                 :     714132 :           FOR_EACH_LOG_LINK (link, insn)
    4367                 :     335058 :             if (link->insn == i3 && link->regno == regno)
    4368                 :            :               {
    4369                 :         10 :                 link->insn = i2;
    4370                 :         10 :                 done = true;
    4371                 :         10 :                 break;
    4372                 :            :               }
    4373                 :            :         }
    4374                 :            :     }
    4375                 :            : 
    4376                 :    2363410 :   {
    4377                 :    2363410 :     rtx i3notes, i2notes, i1notes = 0, i0notes = 0;
    4378                 :    2363410 :     struct insn_link *i3links, *i2links, *i1links = 0, *i0links = 0;
    4379                 :    2363410 :     rtx midnotes = 0;
    4380                 :    2363410 :     int from_luid;
    4381                 :            :     /* Compute which registers we expect to eliminate.  newi2pat may be setting
    4382                 :            :        either i3dest or i2dest, so we must check it.  */
    4383                 :      60683 :     rtx elim_i2 = ((newi2pat && reg_set_p (i2dest, newi2pat))
    4384                 :    2306660 :                    || i2dest_in_i2src || i2dest_in_i1src || i2dest_in_i0src
    4385                 :    2265580 :                    || !i2dest_killed
    4386                 :    4628650 :                    ? 0 : i2dest);
    4387                 :            :     /* For i1, we need to compute both local elimination and global
    4388                 :            :        elimination information with respect to newi2pat because i1dest
    4389                 :            :        may be the same as i3dest, in which case newi2pat may be setting
    4390                 :            :        i1dest.  Global information is used when distributing REG_DEAD
    4391                 :            :        note for i2 and i3, in which case it does matter if newi2pat sets
    4392                 :            :        i1dest or not.
    4393                 :            : 
    4394                 :            :        Local information is used when distributing REG_DEAD note for i1,
    4395                 :            :        in which case it doesn't matter if newi2pat sets i1dest or not.
    4396                 :            :        See PR62151, if we have four insns combination:
    4397                 :            :            i0: r0 <- i0src
    4398                 :            :            i1: r1 <- i1src (using r0)
    4399                 :            :                      REG_DEAD (r0)
    4400                 :            :            i2: r0 <- i2src (using r1)
    4401                 :            :            i3: r3 <- i3src (using r0)
    4402                 :            :            ix: using r0
    4403                 :            :        From i1's point of view, r0 is eliminated, no matter if it is set
    4404                 :            :        by newi2pat or not.  In other words, REG_DEAD info for r0 in i1
    4405                 :            :        should be discarded.
    4406                 :            : 
    4407                 :            :        Note local information only affects cases in forms like "I1->I2->I3",
    4408                 :            :        "I0->I1->I2->I3" or "I0&I1->I2, I2->I3".  For other cases like
    4409                 :            :        "I0->I1, I1&I2->I3" or "I1&I2->I3", newi2pat won't set i1dest or
    4410                 :            :        i0dest anyway.  */
    4411                 :      50498 :     rtx local_elim_i1 = (i1 == 0 || i1dest_in_i1src || i1dest_in_i0src
    4412                 :      50389 :                          || !i1dest_killed
    4413                 :    2363410 :                          ? 0 : i1dest);
    4414                 :      50389 :     rtx elim_i1 = (local_elim_i1 == 0
    4415                 :      50389 :                    || (newi2pat && reg_set_p (i1dest, newi2pat))
    4416                 :      96857 :                    ? 0 : i1dest);
    4417                 :            :     /* Same case as i1.  */
    4418                 :       1422 :     rtx local_elim_i0 = (i0 == 0 || i0dest_in_i0src || !i0dest_killed
    4419                 :    2363410 :                          ? 0 : i0dest);
    4420                 :       1401 :     rtx elim_i0 = (local_elim_i0 == 0
    4421                 :       1401 :                    || (newi2pat && reg_set_p (i0dest, newi2pat))
    4422                 :       2778 :                    ? 0 : i0dest);
    4423                 :            : 
    4424                 :            :     /* Get the old REG_NOTES and LOG_LINKS from all our insns and
    4425                 :            :        clear them.  */
    4426                 :    2363410 :     i3notes = REG_NOTES (i3), i3links = LOG_LINKS (i3);
    4427                 :    2363410 :     i2notes = REG_NOTES (i2), i2links = LOG_LINKS (i2);
    4428                 :    2363410 :     if (i1)
    4429                 :      50498 :       i1notes = REG_NOTES (i1), i1links = LOG_LINKS (i1);
    4430                 :    2363410 :     if (i0)
    4431                 :       1422 :       i0notes = REG_NOTES (i0), i0links = LOG_LINKS (i0);
    4432                 :            : 
    4433                 :            :     /* Ensure that we do not have something that should not be shared but
    4434                 :            :        occurs multiple times in the new insns.  Check this by first
    4435                 :            :        resetting all the `used' flags and then copying anything is shared.  */
    4436                 :            : 
    4437                 :    2363410 :     reset_used_flags (i3notes);
    4438                 :    2363410 :     reset_used_flags (i2notes);
    4439                 :    2363410 :     reset_used_flags (i1notes);
    4440                 :    2363410 :     reset_used_flags (i0notes);
    4441                 :    2363410 :     reset_used_flags (newpat);
    4442                 :    2363410 :     reset_used_flags (newi2pat);
    4443                 :    2363410 :     if (undobuf.other_insn)
    4444                 :     152430 :       reset_used_flags (PATTERN (undobuf.other_insn));
    4445                 :            : 
    4446                 :    2363410 :     i3notes = copy_rtx_if_shared (i3notes);
    4447                 :    2363410 :     i2notes = copy_rtx_if_shared (i2notes);
    4448                 :    2363410 :     i1notes = copy_rtx_if_shared (i1notes);
    4449                 :    2363410 :     i0notes = copy_rtx_if_shared (i0notes);
    4450                 :    2363410 :     newpat = copy_rtx_if_shared (newpat);
    4451                 :    2363410 :     newi2pat = copy_rtx_if_shared (newi2pat);
    4452                 :    2363410 :     if (undobuf.other_insn)
    4453                 :     152430 :       reset_used_flags (PATTERN (undobuf.other_insn));
    4454                 :            : 
    4455                 :    2363410 :     INSN_CODE (i3) = insn_code_number;
    4456                 :    2363410 :     PATTERN (i3) = newpat;
    4457                 :            : 
    4458                 :    2363410 :     if (CALL_P (i3) && CALL_INSN_FUNCTION_USAGE (i3))
    4459                 :            :       {
    4460                 :     145769 :         for (rtx link = CALL_INSN_FUNCTION_USAGE (i3); link;
    4461                 :      96352 :              link = XEXP (link, 1))
    4462                 :            :           {
    4463                 :      96352 :             if (substed_i2)
    4464                 :            :               {
    4465                 :            :                 /* I2SRC must still be meaningful at this point.  Some
    4466                 :            :                    splitting operations can invalidate I2SRC, but those
    4467                 :            :                    operations do not apply to calls.  */
    4468                 :      96352 :                 gcc_assert (i2src);
    4469                 :      96352 :                 XEXP (link, 0) = simplify_replace_rtx (XEXP (link, 0),
    4470                 :            :                                                        i2dest, i2src);
    4471                 :            :               }
    4472                 :      96352 :             if (substed_i1)
    4473                 :          0 :               XEXP (link, 0) = simplify_replace_rtx (XEXP (link, 0),
    4474                 :            :                                                      i1dest, i1src);
    4475                 :      96352 :             if (substed_i0)
    4476                 :          0 :               XEXP (link, 0) = simplify_replace_rtx (XEXP (link, 0),
    4477                 :            :                                                      i0dest, i0src);
    4478                 :            :           }
    4479                 :            :       }
    4480                 :            : 
    4481                 :    2363410 :     if (undobuf.other_insn)
    4482                 :     152430 :       INSN_CODE (undobuf.other_insn) = other_code_number;
    4483                 :            : 
    4484                 :            :     /* We had one special case above where I2 had more than one set and
    4485                 :            :        we replaced a destination of one of those sets with the destination
    4486                 :            :        of I3.  In that case, we have to update LOG_LINKS of insns later
    4487                 :            :        in this basic block.  Note that this (expensive) case is rare.
    4488                 :            : 
    4489                 :            :        Also, in this case, we must pretend that all REG_NOTEs for I2
    4490                 :            :        actually came from I3, so that REG_UNUSED notes from I2 will be
    4491                 :            :        properly handled.  */
    4492                 :            : 
    4493                 :    2363410 :     if (i3_subst_into_i2)
    4494                 :            :       {
    4495                 :     187276 :         for (i = 0; i < XVECLEN (PATTERN (i2), 0); i++)
    4496                 :     130260 :           if ((GET_CODE (XVECEXP (PATTERN (i2), 0, i)) == SET
    4497                 :      58306 :                || GET_CODE (XVECEXP (PATTERN (i2), 0, i)) == CLOBBER)
    4498                 :     129592 :               && REG_P (SET_DEST (XVECEXP (PATTERN (i2), 0, i)))
    4499                 :     116301 :               && SET_DEST (XVECEXP (PATTERN (i2), 0, i)) != i2dest
    4500                 :     246561 :               && ! find_reg_note (i2, REG_UNUSED,
    4501                 :     116301 :                                   SET_DEST (XVECEXP (PATTERN (i2), 0, i))))
    4502                 :      57403 :             for (temp_insn = NEXT_INSN (i2);
    4503                 :            :                  temp_insn
    4504                 :   29988700 :                  && (this_basic_block->next_bb == EXIT_BLOCK_PTR_FOR_FN (cfun)
    4505                 :   29900200 :                      || BB_HEAD (this_basic_block) != temp_insn);
    4506                 :   29931300 :                  temp_insn = NEXT_INSN (temp_insn))
    4507                 :   29931300 :               if (temp_insn != i3 && NONDEBUG_INSN_P (temp_insn))
    4508                 :   22429000 :                 FOR_EACH_LOG_LINK (link, temp_insn)
    4509                 :    8467440 :                   if (link->insn == i2)
    4510                 :       6349 :                     link->insn = i3;
    4511                 :            : 
    4512                 :      57016 :         if (i3notes)
    4513                 :            :           {
    4514                 :            :             rtx link = i3notes;
    4515                 :      62623 :             while (XEXP (link, 1))
    4516                 :            :               link = XEXP (link, 1);
    4517                 :      57016 :             XEXP (link, 1) = i2notes;
    4518                 :            :           }
    4519                 :            :         else
    4520                 :            :           i3notes = i2notes;
    4521                 :            :         i2notes = 0;
    4522                 :            :       }
    4523                 :            : 
    4524                 :    2363410 :     LOG_LINKS (i3) = NULL;
    4525                 :    2363410 :     REG_NOTES (i3) = 0;
    4526                 :    2363410 :     LOG_LINKS (i2) = NULL;
    4527                 :    2363410 :     REG_NOTES (i2) = 0;
    4528                 :            : 
    4529                 :    2363410 :     if (newi2pat)
    4530                 :            :       {
    4531                 :      60683 :         if (MAY_HAVE_DEBUG_BIND_INSNS && i2scratch)
    4532                 :       6706 :           propagate_for_debug (i2, last_combined_insn, i2dest, i2src,
    4533                 :            :                                this_basic_block);
    4534                 :      60683 :         INSN_CODE (i2) = i2_code_number;
    4535                 :      60683 :         PATTERN (i2) = newi2pat;
    4536                 :            :       }
    4537                 :            :     else
    4538                 :            :       {
    4539                 :    2302730 :         if (MAY_HAVE_DEBUG_BIND_INSNS && i2src)
    4540                 :    1245810 :           propagate_for_debug (i2, last_combined_insn, i2dest, i2src,
    4541                 :            :                                this_basic_block);
    4542                 :    2302730 :         SET_INSN_DELETED (i2);
    4543                 :            :       }
    4544                 :            : 
    4545                 :    2363410 :     if (i1)
    4546                 :            :       {
    4547                 :      50498 :         LOG_LINKS (i1) = NULL;
    4548                 :      50498 :         REG_NOTES (i1) = 0;
    4549                 :      50498 :         if (MAY_HAVE_DEBUG_BIND_INSNS)
    4550                 :      20662 :           propagate_for_debug (i1, last_combined_insn, i1dest, i1src,
    4551                 :            :                                this_basic_block);
    4552                 :      50498 :         SET_INSN_DELETED (i1);
    4553                 :            :       }
    4554                 :            : 
    4555                 :    2363410 :     if (i0)
    4556                 :            :       {
    4557                 :       1422 :         LOG_LINKS (i0) = NULL;
    4558                 :       1422 :         REG_NOTES (i0) = 0;
    4559                 :       1422 :         if (MAY_HAVE_DEBUG_BIND_INSNS)
    4560                 :        978 :           propagate_for_debug (i0, last_combined_insn, i0dest, i0src,
    4561                 :            :                                this_basic_block);
    4562                 :       1422 :         SET_INSN_DELETED (i0);
    4563                 :            :       }
    4564                 :            : 
    4565                 :            :     /* Get death notes for everything that is now used in either I3 or
    4566                 :            :        I2 and used to die in a previous insn.  If we built two new
    4567                 :            :        patterns, move from I1 to I2 then I2 to I3 so that we get the
    4568                 :            :        proper movement on registers that I2 modifies.  */
    4569                 :            : 
    4570                 :    2363410 :     if (i0)
    4571                 :       1422 :       from_luid = DF_INSN_LUID (i0);
    4572                 :    2361990 :     else if (i1)
    4573                 :      49076 :       from_luid = DF_INSN_LUID (i1);
    4574                 :            :     else
    4575                 :    2312910 :       from_luid = DF_INSN_LUID (i2);
    4576                 :    2363410 :     if (newi2pat)
    4577                 :      60683 :       move_deaths (newi2pat, NULL_RTX, from_luid, i2, &midnotes);
    4578                 :    2363410 :     move_deaths (newpat, newi2pat, from_luid, i3, &midnotes);
    4579                 :            : 
    4580                 :            :     /* Distribute all the LOG_LINKS and REG_NOTES from I1, I2, and I3.  */
    4581                 :    2363410 :     if (i3notes)
    4582                 :    4319630 :       distribute_notes (i3notes, i3, i3, newi2pat ? i2 : NULL,
    4583                 :            :                         elim_i2, elim_i1, elim_i0);
    4584                 :    2363410 :     if (i2notes)
    4585                 :    3410940 :       distribute_notes (i2notes, i2, i3, newi2pat ? i2 : NULL,
    4586                 :            :                         elim_i2, elim_i1, elim_i0);
    4587                 :    2363410 :     if (i1notes)
    4588                 :      30448 :       distribute_notes (i1notes, i1, i3, newi2pat ? i2 : NULL,
    4589                 :            :                         elim_i2, local_elim_i1, local_elim_i0);
    4590                 :    2363410 :     if (i0notes)
    4591                 :       1021 :       distribute_notes (i0notes, i0, i3, newi2pat ? i2 : NULL,
    4592                 :            :                         elim_i2, elim_i1, local_elim_i0);
    4593                 :    2363410 :     if (midnotes)
    4594                 :    2920670 :       distribute_notes (midnotes, NULL, i3, newi2pat ? i2 : NULL,
    4595                 :            :                         elim_i2, elim_i1, elim_i0);
    4596                 :            : 
    4597                 :            :     /* Distribute any notes added to I2 or I3 by recog_for_combine.  We
    4598                 :            :        know these are REG_UNUSED and want them to go to the desired insn,
    4599                 :            :        so we always pass it as i3.  */
    4600                 :            : 
    4601                 :    2363410 :     if (newi2pat && new_i2_notes)
    4602                 :      28172 :       distribute_notes (new_i2_notes, i2, i2, NULL, NULL_RTX, NULL_RTX,
    4603                 :            :                         NULL_RTX);
    4604                 :            : 
    4605                 :    2363410 :     if (new_i3_notes)
    4606                 :      72684 :       distribute_notes (new_i3_notes, i3, i3, NULL, NULL_RTX, NULL_RTX,
    4607                 :            :                         NULL_RTX);
    4608                 :            : 
    4609                 :            :     /* If I3DEST was used in I3SRC, it really died in I3.  We may need to
    4610                 :            :        put a REG_DEAD note for it somewhere.  If NEWI2PAT exists and sets
    4611                 :            :        I3DEST, the death must be somewhere before I2, not I3.  If we passed I3
    4612                 :            :        in that case, it might delete I2.  Similarly for I2 and I1.
    4613                 :            :        Show an additional death due to the REG_DEAD note we make here.  If
    4614                 :            :        we discard it in distribute_notes, we will decrement it again.  */
    4615                 :            : 
    4616                 :    2363410 :     if (i3dest_killed)
    4617                 :            :       {
    4618                 :     114379 :         rtx new_note = alloc_reg_note (REG_DEAD, i3dest_killed, NULL_RTX);
    4619                 :     114379 :         if (newi2pat && reg_set_p (i3dest_killed, newi2pat))
    4620                 :        566 :           distribute_notes (new_note, NULL, i2, NULL, elim_i2,
    4621                 :            :                             elim_i1, elim_i0);
    4622                 :            :         else
    4623                 :     227212 :           distribute_notes (new_note, NULL, i3, newi2pat ? i2 : NULL,
    4624                 :            :                             elim_i2, elim_i1, elim_i0);
    4625                 :            :       }
    4626                 :            : 
    4627                 :    2363410 :     if (i2dest_in_i2src)
    4628                 :            :       {
    4629                 :      40458 :         rtx new_note = alloc_reg_note (REG_DEAD, i2dest, NULL_RTX);
    4630                 :      40458 :         if (newi2pat && reg_set_p (i2dest, newi2pat))
    4631                 :         27 :           distribute_notes (new_note,  NULL, i2, NULL, NULL_RTX,
    4632                 :            :                             NULL_RTX, NULL_RTX);
    4633                 :            :         else
    4634                 :      80852 :           distribute_notes (new_note, NULL, i3, newi2pat ? i2 : NULL,
    4635                 :            :                             NULL_RTX, NULL_RTX, NULL_RTX);
    4636                 :            :       }
    4637                 :            : 
    4638                 :    2363410 :     if (i1dest_in_i1src)
    4639                 :            :       {
    4640                 :        109 :         rtx new_note = alloc_reg_note (REG_DEAD, i1dest, NULL_RTX);
    4641                 :        109 :         if (newi2pat && reg_set_p (i1dest, newi2pat))
    4642                 :          5 :           distribute_notes (new_note, NULL, i2, NULL, NULL_RTX,
    4643                 :            :                             NULL_RTX, NULL_RTX);
    4644                 :            :         else
    4645                 :        179 :           distribute_notes (new_note, NULL, i3, newi2pat ? i2 : NULL,
    4646                 :            :                             NULL_RTX, NULL_RTX, NULL_RTX);
    4647                 :            :       }
    4648                 :            : 
    4649                 :    2363410 :     if (i0dest_in_i0src)
    4650                 :            :       {
    4651                 :         21 :         rtx new_note = alloc_reg_note (REG_DEAD, i0dest, NULL_RTX);
    4652                 :         21 :         if (newi2pat && reg_set_p (i0dest, newi2pat))
    4653                 :          0 :           distribute_notes (new_note, NULL, i2, NULL, NULL_RTX,
    4654                 :            :                             NULL_RTX, NULL_RTX);
    4655                 :            :         else
    4656                 :         33 :           distribute_notes (new_note, NULL, i3, newi2pat ? i2 : NULL,
    4657                 :            :                             NULL_RTX, NULL_RTX, NULL_RTX);
    4658                 :            :       }
    4659                 :            : 
    4660                 :    2363410 :     distribute_links (i3links);
    4661                 :    2363410 :     distribute_links (i2links);
    4662                 :    2363410 :     distribute_links (i1links);
    4663                 :    2363410 :     distribute_links (i0links);
    4664                 :            : 
    4665                 :    2363410 :     if (REG_P (i2dest))
    4666                 :            :       {
    4667                 :    2363410 :         struct insn_link *link;
    4668                 :    2363410 :         rtx_insn *i2_insn = 0;
    4669                 :    2363410 :         rtx i2_val = 0, set;
    4670                 :            : 
    4671                 :            :         /* The insn that used to set this register doesn't exist, and
    4672                 :            :            this life of the register may not exist either.  See if one of
    4673                 :            :            I3's links points to an insn that sets I2DEST.  If it does,
    4674                 :            :            that is now the last known value for I2DEST. If we don't update
    4675                 :            :            this and I2 set the register to a value that depended on its old
    4676                 :            :            contents, we will get confused.  If this insn is used, thing
    4677                 :            :            will be set correctly in combine_instructions.  */
    4678                 :    4475990 :         FOR_EACH_LOG_LINK (link, i3)
    4679                 :    2112580 :           if ((set = single_set (link->insn)) != 0
    4680                 :    2112580 :               && rtx_equal_p (i2dest, SET_DEST (set)))
    4681                 :      32706 :             i2_insn = link->insn, i2_val = SET_SRC (set);
    4682                 :            : 
    4683                 :    2363410 :         record_value_for_reg (i2dest, i2_insn, i2_val);
    4684                 :            : 
    4685                 :            :         /* If the reg formerly set in I2 died only once and that was in I3,
    4686                 :            :            zero its use count so it won't make `reload' do any work.  */
    4687                 :    2363410 :         if (! added_sets_2
    4688                 :    2270520 :             && (newi2pat == 0 || ! reg_mentioned_p (i2dest, newi2pat))
    4689                 :    2246030 :             && ! i2dest_in_i2src
    4690                 :    4582360 :             && REGNO (i2dest) < reg_n_sets_max)
    4691                 :    2218950 :           INC_REG_N_SETS (REGNO (i2dest), -1);
    4692                 :            :       }
    4693                 :            : 
    4694                 :    2363410 :     if (i1 && REG_P (i1dest))
    4695                 :            :       {
    4696                 :      50498 :         struct insn_link *link;
    4697                 :      50498 :         rtx_insn *i1_insn = 0;
    4698                 :      50498 :         rtx i1_val = 0, set;
    4699                 :            : 
    4700                 :      91767 :         FOR_EACH_LOG_LINK (link, i3)
    4701                 :      41269 :           if ((set = single_set (link->insn)) != 0
    4702                 :      41269 :               && rtx_equal_p (i1dest, SET_DEST (set)))
    4703                 :         89 :             i1_insn = link->insn, i1_val = SET_SRC (set);
    4704                 :            : 
    4705                 :      50498 :         record_value_for_reg (i1dest, i1_insn, i1_val);
    4706                 :            : 
    4707                 :      50498 :         if (! added_sets_1
    4708                 :      50498 :             && ! i1dest_in_i1src
    4709                 :      50498 :             && REGNO (i1dest) < reg_n_sets_max)
    4710                 :      46682 :           INC_REG_N_SETS (REGNO (i1dest), -1);
    4711                 :            :       }
    4712                 :            : 
    4713                 :    2363410 :     if (i0 && REG_P (i0dest))
    4714                 :            :       {
    4715                 :       1422 :         struct insn_link *link;
    4716                 :       1422 :         rtx_insn *i0_insn = 0;
    4717                 :       1422 :         rtx i0_val = 0, set;
    4718                 :            : 
    4719                 :       2741 :         FOR_EACH_LOG_LINK (link, i3)
    4720                 :       1319 :           if ((set = single_set (link->insn)) != 0
    4721                 :       1319 :               && rtx_equal_p (i0dest, SET_DEST (set)))
    4722                 :          3 :             i0_insn = link->insn, i0_val = SET_SRC (set);
    4723                 :            : 
    4724                 :       1422 :         record_value_for_reg (i0dest, i0_insn, i0_val);
    4725                 :            : 
    4726                 :       1422 :         if (! added_sets_0
    4727                 :       1422 :             && ! i0dest_in_i0src
    4728                 :       1422 :             && REGNO (i0dest) < reg_n_sets_max)
    4729                 :       1385 :           INC_REG_N_SETS (REGNO (i0dest), -1);
    4730                 :            :       }
    4731                 :            : 
    4732                 :            :     /* Update reg_stat[].nonzero_bits et al for any changes that may have
    4733                 :            :        been made to this insn.  The order is important, because newi2pat
    4734                 :            :        can affect nonzero_bits of newpat.  */
    4735                 :    2363410 :     if (newi2pat)
    4736                 :      60683 :       note_pattern_stores (newi2pat, set_nonzero_bits_and_sign_copies, NULL);
    4737                 :    2363410 :     note_pattern_stores (newpat, set_nonzero_bits_and_sign_copies, NULL);
    4738                 :            :   }
    4739                 :            : 
    4740                 :    2363410 :   if (undobuf.other_insn != NULL_RTX)
    4741                 :            :     {
    4742                 :     152430 :       if (dump_file)
    4743                 :            :         {
    4744                 :          8 :           fprintf (dump_file, "modifying other_insn ");
    4745                 :          8 :           dump_insn_slim (dump_file, undobuf.other_insn);
    4746                 :            :         }
    4747                 :     152430 :       df_insn_rescan (undobuf.other_insn);
    4748                 :            :     }
    4749                 :            : 
    4750                 :    2363410 :   if (i0 && !(NOTE_P (i0) && (NOTE_KIND (i0) == NOTE_INSN_DELETED)))
    4751                 :            :     {
    4752                 :          0 :       if (dump_file)
    4753                 :            :         {
    4754                 :          0 :           fprintf (dump_file, "modifying insn i0 ");
    4755                 :          0 :           dump_insn_slim (dump_file, i0);
    4756                 :            :         }
    4757                 :          0 :       df_insn_rescan (i0);
    4758                 :            :     }
    4759                 :            : 
    4760                 :    2363410 :   if (i1 && !(NOTE_P (i1) && (NOTE_KIND (i1) == NOTE_INSN_DELETED)))
    4761                 :            :     {
    4762                 :          0 :       if (dump_file)
    4763                 :            :         {
    4764                 :          0 :           fprintf (dump_file, "modifying insn i1 ");
    4765                 :          0 :           dump_insn_slim (dump_file, i1);
    4766                 :            :         }
    4767                 :          0 :       df_insn_rescan (i1);
    4768                 :            :     }
    4769                 :            : 
    4770                 :    2363410 :   if (i2 && !(NOTE_P (i2) && (NOTE_KIND (i2) == NOTE_INSN_DELETED)))
    4771                 :            :     {
    4772                 :      60683 :       if (dump_file)
    4773                 :            :         {
    4774                 :         15 :           fprintf (dump_file, "modifying insn i2 ");
    4775                 :         15 :           dump_insn_slim (dump_file, i2);
    4776                 :            :         }
    4777                 :      60683 :       df_insn_rescan (i2);
    4778                 :            :     }
    4779                 :            : 
    4780                 :    2363410 :   if (i3 && !(NOTE_P (i3) && (NOTE_KIND (i3) == NOTE_INSN_DELETED)))
    4781                 :            :     {
    4782                 :    2363410 :       if (dump_file)
    4783                 :            :         {
    4784                 :        240 :           fprintf (dump_file, "modifying insn i3 ");
    4785                 :        240 :           dump_insn_slim (dump_file, i3);
    4786                 :            :         }
    4787                 :    2363410 :       df_insn_rescan (i3);
    4788                 :            :     }
    4789                 :            : 
    4790                 :            :   /* Set new_direct_jump_p if a new return or simple jump instruction
    4791                 :            :      has been created.  Adjust the CFG accordingly.  */
    4792                 :    2363410 :   if (returnjump_p (i3) || any_uncondjump_p (i3))
    4793                 :            :     {
    4794                 :        160 :       *new_direct_jump_p = 1;
    4795                 :        160 :       mark_jump_label (PATTERN (i3), i3, 0);
    4796                 :        160 :       update_cfg_for_uncondjump (i3);
    4797                 :            :     }
    4798                 :            : 
    4799                 :    2363410 :   if (undobuf.other_insn != NULL_RTX
    4800                 :    2363410 :       && (returnjump_p (undobuf.other_insn)
    4801                 :     152430 :           || any_uncondjump_p (undobuf.other_insn)))
    4802                 :            :     {
    4803                 :       1501 :       *new_direct_jump_p = 1;
    4804                 :       1501 :       update_cfg_for_uncondjump (undobuf.other_insn);
    4805                 :            :     }
    4806                 :            : 
    4807                 :    2363410 :   if (GET_CODE (PATTERN (i3)) == TRAP_IF
    4808                 :    2363410 :       && XEXP (PATTERN (i3), 0) == const1_rtx)
    4809                 :            :     {
    4810                 :          0 :       basic_block bb = BLOCK_FOR_INSN (i3);
    4811                 :          0 :       gcc_assert (bb);
    4812                 :          0 :       remove_edge (split_block (bb, i3));
    4813                 :          0 :       emit_barrier_after_bb (bb);
    4814                 :          0 :       *new_direct_jump_p = 1;
    4815                 :            :     }
    4816                 :            : 
    4817                 :    2363410 :   if (undobuf.other_insn
    4818                 :     152430 :       && GET_CODE (PATTERN (undobuf.other_insn)) == TRAP_IF
    4819                 :    2363410 :       && XEXP (PATTERN (undobuf.other_insn), 0) == const1_rtx)
    4820                 :            :     {
    4821                 :          0 :       basic_block bb = BLOCK_FOR_INSN (undobuf.other_insn);
    4822                 :          0 :       gcc_assert (bb);
    4823                 :          0 :       remove_edge (split_block (bb, undobuf.other_insn));
    4824                 :          0 :       emit_barrier_after_bb (bb);
    4825                 :          0 :       *new_direct_jump_p = 1;
    4826                 :            :     }
    4827                 :            : 
    4828                 :            :   /* A noop might also need cleaning up of CFG, if it comes from the
    4829                 :            :      simplification of a jump.  */
    4830                 :    2363410 :   if (JUMP_P (i3)
    4831                 :      25020 :       && GET_CODE (newpat) == SET
    4832                 :      20691 :       && SET_SRC (newpat) == pc_rtx
    4833                 :        456 :       && SET_DEST (newpat) == pc_rtx)
    4834                 :            :     {
    4835                 :        456 :       *new_direct_jump_p = 1;
    4836                 :        456 :       update_cfg_for_uncondjump (i3);
    4837                 :            :     }
    4838                 :            : 
    4839                 :    2363410 :   if (undobuf.other_insn != NULL_RTX
    4840                 :     152430 :       && JUMP_P (undobuf.other_insn)
    4841                 :     149572 :       && GET_CODE (PATTERN (undobuf.other_insn)) == SET
    4842                 :     149572 :       && SET_SRC (PATTERN (undobuf.other_insn)) == pc_rtx
    4843                 :    2364680 :       && SET_DEST (PATTERN (undobuf.other_insn)) == pc_rtx)
    4844                 :            :     {
    4845                 :       1265 :       *new_direct_jump_p = 1;
    4846                 :       1265 :       update_cfg_for_uncondjump (undobuf.other_insn);
    4847                 :            :     }
    4848                 :            : 
    4849                 :    2363410 :   combine_successes++;
    4850                 :    4726820 :   undo_commit ();
    4851                 :            : 
    4852                 :    4726820 :   rtx_insn *ret = newi2pat ? i2 : i3;
    4853                 :    2363410 :   if (added_links_insn && DF_INSN_LUID (added_links_insn) < DF_INSN_LUID (ret))
    4854                 :            :     ret = added_links_insn;
    4855                 :    2363410 :   if (added_notes_insn && DF_INSN_LUID (added_notes_insn) < DF_INSN_LUID (ret))
    4856                 :            :     ret = added_notes_insn;
    4857                 :            : 
    4858                 :            :   return ret;
    4859                 :            : }
    4860                 :            : 
    4861                 :            : /* Get a marker for undoing to the current state.  */
    4862                 :            : 
    4863                 :            : static void *
    4864                 :   21685100 : get_undo_marker (void)
    4865                 :            : {
    4866                 :   21685100 :   return undobuf.undos;
    4867                 :            : }
    4868                 :            : 
    4869                 :            : /* Undo the modifications up to the marker.  */
    4870                 :            : 
    4871                 :            : static void
    4872                 :   26043200 : undo_to_marker (void *marker)
    4873                 :            : {
    4874                 :   26043200 :   struct undo *undo, *next;
    4875                 :            : 
    4876                 :   81103000 :   for (undo = undobuf.undos; undo != marker; undo = next)
    4877                 :            :     {
    4878                 :   55059800 :       gcc_assert (undo);
    4879                 :            : 
    4880                 :   55059800 :       next = undo->next;
    4881                 :   55059800 :       switch (undo->kind)
    4882                 :            :         {
    4883                 :   51067900 :         case UNDO_RTX:
    4884                 :   51067900 :           *undo->where.r = undo->old_contents.r;
    4885                 :   51067900 :           break;
    4886                 :    3608330 :         case UNDO_INT:
    4887                 :    3608330 :           *undo->where.i = undo->old_contents.i;
    4888                 :    3608330 :           break;
    4889                 :     325549 :         case UNDO_MODE:
    4890                 :     325549 :           adjust_reg_mode (*undo->where.r, undo->old_contents.m);
    4891                 :     325549 :           break;
    4892                 :      58012 :         case UNDO_LINKS:
    4893                 :      58012 :           *undo->where.l = undo->old_contents.l;
    4894                 :      58012 :           break;
    4895                 :          0 :         default:
    4896                 :          0 :           gcc_unreachable ();
    4897                 :            :         }
    4898                 :            : 
    4899                 :   55059800 :       undo->next = undobuf.frees;
    4900                 :   55059800 :       undobuf.frees = undo;
    4901                 :            :     }
    4902                 :            : 
    4903                 :   26043200 :   undobuf.undos = (struct undo *) marker;
    4904                 :   26043200 : }
    4905                 :            : 
    4906                 :            : /* Undo all the modifications recorded in undobuf.  */
    4907                 :            : 
    4908                 :            : static void
    4909                 :   25538500 : undo_all (void)
    4910                 :            : {
    4911                 :   25538500 :   undo_to_marker (0);
    4912                 :          0 : }
    4913                 :            : 
    4914                 :            : /* We've committed to accepting the changes we made.  Move all
    4915                 :            :    of the undos to the free list.  */
    4916                 :            : 
    4917                 :            : static void
    4918                 :    2363410 : undo_commit (void)
    4919                 :            : {
    4920                 :    2363410 :   struct undo *undo, *next;
    4921                 :            : 
    4922                 :    6942090 :   for (undo = undobuf.undos; undo; undo = next)
    4923                 :            :     {
    4924                 :    4578680 :       next = undo->next;
    4925                 :    4578680 :       undo->next = undobuf.frees;
    4926                 :    4578680 :       undobuf.frees = undo;
    4927                 :            :     }
    4928                 :    2363410 :   undobuf.undos = 0;
    4929                 :          0 : }
    4930                 :            : 
    4931                 :            : /* Find the innermost point within the rtx at LOC, possibly LOC itself,
    4932                 :            :    where we have an arithmetic expression and return that point.  LOC will
    4933                 :            :    be inside INSN.
    4934                 :            : 
    4935                 :            :    try_combine will call this function to see if an insn can be split into
    4936                 :            :    two insns.  */
    4937                 :            : 
    4938                 :            : static rtx *
    4939                 :   17920500 : find_split_point (rtx *loc, rtx_insn *insn, bool set_src)
    4940                 :            : {
    4941                 :   17920500 :   rtx x = *loc;
    4942                 :   17920500 :   enum rtx_code code = GET_CODE (x);
    4943                 :   17920500 :   rtx *split;
    4944                 :   17920500 :   unsigned HOST_WIDE_INT len = 0;
    4945                 :   17920500 :   HOST_WIDE_INT pos = 0;
    4946                 :   17920500 :   int unsignedp = 0;
    4947                 :   17920500 :   rtx inner = NULL_RTX;
    4948                 :   17920500 :   scalar_int_mode mode, inner_mode;
    4949                 :            : 
    4950                 :            :   /* First special-case some codes.  */
    4951                 :   17920500 :   switch (code)
    4952                 :            :     {
    4953                 :     579219 :     case SUBREG:
    4954                 :            : #ifdef INSN_SCHEDULING
    4955                 :            :       /* If we are making a paradoxical SUBREG invalid, it becomes a split
    4956                 :            :          point.  */
    4957                 :     579219 :       if (MEM_P (SUBREG_REG (x)))
    4958                 :            :         return loc;
    4959                 :            : #endif
    4960                 :     573702 :       return find_split_point (&SUBREG_REG (x), insn, false);
    4961                 :            : 
    4962                 :     970007 :     case MEM:
    4963                 :            :       /* If we have (mem (const ..)) or (mem (symbol_ref ...)), split it
    4964                 :            :          using LO_SUM and HIGH.  */
    4965                 :     970007 :       if (HAVE_lo_sum && (GET_CODE (XEXP (x, 0)) == CONST
    4966                 :            :                           || GET_CODE (XEXP (x, 0)) == SYMBOL_REF))
    4967                 :            :         {
    4968                 :            :           machine_mode address_mode = get_address_mode (x);
    4969                 :            : 
    4970                 :            :           SUBST (XEXP (x, 0),
    4971                 :            :                  gen_rtx_LO_SUM (address_mode,
    4972                 :            :                                  gen_rtx_HIGH (address_mode, XEXP (x, 0)),
    4973                 :            :                                  XEXP (x, 0)));
    4974                 :            :           return &XEXP (XEXP (x, 0), 0);
    4975                 :            :         }
    4976                 :            : 
    4977                 :            :       /* If we have a PLUS whose second operand is a constant and the
    4978                 :            :          address is not valid, perhaps we can split it up using
    4979                 :            :          the machine-specific way to split large constants.  We use
    4980                 :            :          the first pseudo-reg (one of the virtual regs) as a placeholder;
    4981                 :            :          it will not remain in the result.  */
    4982                 :     970007 :       if (GET_CODE (XEXP (x, 0)) == PLUS
    4983                 :     617695 :           && CONST_INT_P (XEXP (XEXP (x, 0), 1))
    4984                 :    1402050 :           && ! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
    4985                 :     432042 :                                             MEM_ADDR_SPACE (x)))
    4986                 :            :         {
    4987                 :      69367 :           rtx reg = regno_reg_rtx[FIRST_PSEUDO_REGISTER];
    4988                 :      69367 :           rtx_insn *seq = combine_split_insns (gen_rtx_SET (reg, XEXP (x, 0)),
    4989                 :            :                                                subst_insn);
    4990                 :            : 
    4991                 :            :           /* This should have produced two insns, each of which sets our
    4992                 :            :              placeholder.  If the source of the second is a valid address,
    4993                 :            :              we can put both sources together and make a split point
    4994                 :            :              in the middle.  */
    4995                 :            : 
    4996                 :      69367 :           if (seq
    4997                 :         74 :               && NEXT_INSN (seq) != NULL_RTX
    4998                 :          0 :               && NEXT_INSN (NEXT_INSN (seq)) == NULL_RTX
    4999                 :          0 :               && NONJUMP_INSN_P (seq)
    5000                 :          0 :               && GET_CODE (PATTERN (seq)) == SET
    5001                 :          0 :               && SET_DEST (PATTERN (seq)) == reg
    5002                 :          0 :               && ! reg_mentioned_p (reg,
    5003                 :          0 :                                     SET_SRC (PATTERN (seq)))
    5004                 :          0 :               && NONJUMP_INSN_P (NEXT_INSN (seq))
    5005                 :          0 :               && GET_CODE (PATTERN (NEXT_INSN (seq))) == SET
    5006                 :          0 :               && SET_DEST (PATTERN (NEXT_INSN (seq))) == reg
    5007                 :      69367 :               && memory_address_addr_space_p
    5008                 :          0 :                    (GET_MODE (x), SET_SRC (PATTERN (NEXT_INSN (seq))),
    5009                 :          0 :                     MEM_ADDR_SPACE (x)))
    5010                 :            :             {
    5011                 :          0 :               rtx src1 = SET_SRC (PATTERN (seq));
    5012                 :          0 :               rtx src2 = SET_SRC (PATTERN (NEXT_INSN (seq)));
    5013                 :            : 
    5014                 :            :               /* Replace the placeholder in SRC2 with SRC1.  If we can
    5015                 :            :                  find where in SRC2 it was placed, that can become our
    5016                 :            :                  split point and we can replace this address with SRC2.
    5017                 :            :                  Just try two obvious places.  */
    5018                 :            : 
    5019                 :          0 :               src2 = replace_rtx (src2, reg, src1);
    5020                 :          0 :               split = 0;
    5021                 :          0 :               if (XEXP (src2, 0) == src1)
    5022                 :          0 :                 split = &XEXP (src2, 0);
    5023                 :          0 :               else if (GET_RTX_FORMAT (GET_CODE (XEXP (src2, 0)))[0] == 'e'
    5024                 :          0 :                        && XEXP (XEXP (src2, 0), 0) == src1)
    5025                 :          0 :                 split = &XEXP (XEXP (src2, 0), 0);
    5026                 :            : 
    5027                 :          0 :               if (split)
    5028                 :            :                 {
    5029                 :          0 :                   SUBST (XEXP (x, 0), src2);
    5030                 :          0 :                   return split;
    5031                 :            :                 }
    5032                 :            :             }
    5033                 :            : 
    5034                 :            :           /* If that didn't work and we have a nested plus, like:
    5035                 :            :              ((REG1 * CONST1) + REG2) + CONST2 and (REG1 + REG2) + CONST2
    5036                 :            :              is valid address, try to split (REG1 * CONST1).  */
    5037                 :      69367 :           if (GET_CODE (XEXP (XEXP (x, 0), 0)) == PLUS
    5038                 :      49185 :               && !OBJECT_P (XEXP (XEXP (XEXP (x, 0), 0), 0))
    5039                 :      43905 :               && OBJECT_P (XEXP (XEXP (XEXP (x, 0), 0), 1))
    5040                 :      43741 :               && ! (GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 0)) == SUBREG
    5041                 :          9 :                     && OBJECT_P (SUBREG_REG (XEXP (XEXP (XEXP (x, 0),
    5042                 :            :                                                          0), 0)))))
    5043                 :            :             {
    5044                 :      43741 :               rtx tem = XEXP (XEXP (XEXP (x, 0), 0), 0);
    5045                 :      43741 :               XEXP (XEXP (XEXP (x, 0), 0), 0) = reg;
    5046                 :      87482 :               if (memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
    5047                 :      43741 :                                                MEM_ADDR_SPACE (x)))
    5048                 :            :                 {
    5049                 :      35829 :                   XEXP (XEXP (XEXP (x, 0), 0), 0) = tem;
    5050                 :      35829 :                   return &XEXP (XEXP (XEXP (x, 0), 0), 0);
    5051                 :            :                 }
    5052                 :       7912 :               XEXP (XEXP (XEXP (x, 0), 0), 0) = tem;
    5053                 :            :             }
    5054                 :      25626 :           else if (GET_CODE (XEXP (XEXP (x, 0), 0)) == PLUS
    5055                 :       5444 :                    && OBJECT_P (XEXP (XEXP (XEXP (x, 0), 0), 0))
    5056                 :       5280 :                    && !OBJECT_P (XEXP (XEXP (XEXP (x, 0), 0), 1))
    5057                 :          0 :                    && ! (GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 1)) == SUBREG
    5058                 :          0 :                          && OBJECT_P (SUBREG_REG (XEXP (XEXP (XEXP (x, 0),
    5059                 :            :                                                               0), 1)))))
    5060                 :            :             {
    5061                 :          0 :               rtx tem = XEXP (XEXP (XEXP (x, 0), 0), 1);
    5062                 :          0 :               XEXP (XEXP (XEXP (x, 0), 0), 1) = reg;
    5063                 :          0 :               if (memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
    5064                 :          0 :                                                MEM_ADDR_SPACE (x)))
    5065                 :            :                 {
    5066                 :          0 :                   XEXP (XEXP (XEXP (x, 0), 0), 1) = tem;
    5067                 :          0 :                   return &XEXP (XEXP (XEXP (x, 0), 0), 1);
    5068                 :            :                 }
    5069                 :          0 :               XEXP (XEXP (XEXP (x, 0), 0), 1) = tem;
    5070                 :            :             }
    5071                 :            : 
    5072                 :            :           /* If that didn't work, perhaps the first operand is complex and
    5073                 :            :              needs to be computed separately, so make a split point there.
    5074                 :            :              This will occur on machines that just support REG + CONST
    5075                 :            :              and have a constant moved through some previous computation.  */
    5076                 :      33538 :           if (!OBJECT_P (XEXP (XEXP (x, 0), 0))
    5077                 :      18468 :               && ! (GET_CODE (XEXP (XEXP (x, 0), 0)) == SUBREG
    5078                 :          0 :                     && OBJECT_P (SUBREG_REG (XEXP (XEXP (x, 0), 0)))))
    5079                 :      18468 :             return &XEXP (XEXP (x, 0), 0);
    5080                 :            :         }
    5081                 :            : 
    5082                 :            :       /* If we have a PLUS whose first operand is complex, try computing it
    5083                 :            :          separately by making a split there.  */
    5084                 :     915710 :       if (GET_CODE (XEXP (x, 0)) == PLUS
    5085                 :     563398 :           && ! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
    5086                 :     563398 :                                             MEM_ADDR_SPACE (x))
    5087                 :     103735 :           && ! OBJECT_P (XEXP (XEXP (x, 0), 0))
    5088                 :     987107 :           && ! (GET_CODE (XEXP (XEXP (x, 0), 0)) == SUBREG
    5089                 :          0 :                 && OBJECT_P (SUBREG_REG (XEXP (XEXP (x, 0), 0)))))
    5090                 :      71397 :         return &XEXP (XEXP (x, 0), 0);
    5091                 :            :       break;
    5092                 :            : 
    5093                 :    2652310 :     case SET:
    5094                 :            :       /* If SET_DEST is CC0 and SET_SRC is not an operand, a COMPARE, or a
    5095                 :            :          ZERO_EXTRACT, the most likely reason why this doesn't match is that
    5096                 :            :          we need to put the operand into a register.  So split at that
    5097                 :            :          point.  */
    5098                 :            : 
    5099                 :    2652310 :       if (SET_DEST (x) == cc0_rtx
    5100                 :          0 :           && GET_CODE (SET_SRC (x)) != COMPARE
    5101                 :          0 :           && GET_CODE (SET_SRC (x)) != ZERO_EXTRACT
    5102                 :          0 :           && !OBJECT_P (SET_SRC (x))
    5103                 :          0 :           && ! (GET_CODE (SET_SRC (x)) == SUBREG
    5104                 :          0 :                 && OBJECT_P (SUBREG_REG (SET_SRC (x)))))
    5105                 :          0 :         return &SET_SRC (x);
    5106                 :            : 
    5107                 :            :       /* See if we can split SET_SRC as it stands.  */
    5108                 :    2652310 :       split = find_split_point (&SET_SRC (x), insn, true);
    5109                 :    2652310 :       if (split && split != &SET_SRC (x))
    5110                 :            :         return split;
    5111                 :            : 
    5112                 :            :       /* See if we can split SET_DEST as it stands.  */
    5113                 :     247471 :       split = find_split_point (&SET_DEST (x), insn, false);
    5114                 :     247471 :       if (split && split != &SET_DEST (x))
    5115                 :            :         return split;
    5116                 :            : 
    5117                 :            :       /* See if this is a bitfield assignment with everything constant.  If
    5118                 :            :          so, this is an IOR of an AND, so split it into that.  */
    5119                 :     225983 :       if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT
    5120                 :       1340 :           && is_a <scalar_int_mode> (GET_MODE (XEXP (SET_DEST (x), 0)),
    5121                 :            :                                      &inner_mode)
    5122                 :       1340 :           && HWI_COMPUTABLE_MODE_P (inner_mode)
    5123                 :       1340 :           && CONST_INT_P (XEXP (SET_DEST (x), 1))
    5124                 :       1340 :           && CONST_INT_P (XEXP (SET_DEST (x), 2))
    5125                 :       1317 :           && CONST_INT_P (SET_SRC (x))
    5126                 :        379 :           && ((INTVAL (XEXP (SET_DEST (x), 1))
    5127                 :        379 :                + INTVAL (XEXP (SET_DEST (x), 2)))
    5128                 :        379 :               <= GET_MODE_PRECISION (inner_mode))
    5129                 :     226362 :           && ! side_effects_p (XEXP (SET_DEST (x), 0)))
    5130                 :            :         {
    5131                 :        359 :           HOST_WIDE_INT pos = INTVAL (XEXP (SET_DEST (x), 2));
    5132                 :        359 :           unsigned HOST_WIDE_INT len = INTVAL (XEXP (SET_DEST (x), 1));
    5133                 :        359 :           rtx dest = XEXP (SET_DEST (x), 0);
    5134                 :        359 :           unsigned HOST_WIDE_INT mask = (HOST_WIDE_INT_1U << len) - 1;
    5135                 :        359 :           unsigned HOST_WIDE_INT src = INTVAL (SET_SRC (x)) & mask;
    5136                 :        359 :           rtx or_mask;
    5137                 :            : 
    5138                 :        359 :           if (BITS_BIG_ENDIAN)
    5139                 :            :             pos = GET_MODE_PRECISION (inner_mode) - len - pos;
    5140                 :            : 
    5141                 :        359 :           or_mask = gen_int_mode (src << pos, inner_mode);
    5142                 :        359 :           if (src == mask)
    5143                 :          0 :             SUBST (SET_SRC (x),
    5144                 :            :                    simplify_gen_binary (IOR, inner_mode, dest, or_mask));
    5145                 :            :           else
    5146                 :            :             {
    5147                 :        359 :               rtx negmask = gen_int_mode (~(mask << pos), inner_mode);
    5148                 :        359 :               SUBST (SET_SRC (x),
    5149                 :            :                      simplify_gen_binary (IOR, inner_mode,
    5150                 :            :                                           simplify_gen_binary (AND, inner_mode,
    5151                 :            :                                                                dest, negmask),
    5152                 :            :                                           or_mask));
    5153                 :            :             }
    5154                 :            : 
    5155                 :        359 :           SUBST (SET_DEST (x), dest);
    5156                 :            : 
    5157                 :        359 :           split = find_split_point (&SET_SRC (x), insn, true);
    5158                 :        359 :           if (split && split != &SET_SRC (x))
    5159                 :            :             return split;
    5160                 :            :         }
    5161                 :            : 
    5162                 :            :       /* Otherwise, see if this is an operation that we can split into two.
    5163                 :            :          If so, try to split that.  */
    5164                 :     225624 :       code = GET_CODE (SET_SRC (x));
    5165                 :            : 
    5166                 :     225624 :       switch (code)
    5167                 :            :         {
    5168                 :      10603 :         case AND:
    5169                 :            :           /* If we are AND'ing with a large constant that is only a single
    5170                 :            :              bit and the result is only being used in a context where we
    5171                 :            :              need to know if it is zero or nonzero, replace it with a bit
    5172                 :            :              extraction.  This will avoid the large constant, which might
    5173                 :            :              have taken more than one insn to make.  If the constant were
    5174                 :            :              not a valid argument to the AND but took only one insn to make,
    5175                 :            :              this is no worse, but if it took more than one insn, it will
    5176                 :            :              be better.  */
    5177                 :            : 
    5178                 :      10603 :           if (CONST_INT_P (XEXP (SET_SRC (x), 1))
    5179                 :      10117 :               && REG_P (XEXP (SET_SRC (x), 0))
    5180                 :        118 :               && (pos = exact_log2 (UINTVAL (XEXP (SET_SRC (x), 1)))) >= 7
    5181                 :          1 :               && REG_P (SET_DEST (x))
    5182                 :          0 :               && (split = find_single_use (SET_DEST (x), insn, NULL)) != 0
    5183                 :          0 :               && (GET_CODE (*split) == EQ || GET_CODE (*split) == NE)
    5184                 :          0 :               && XEXP (*split, 0) == SET_DEST (x)
    5185                 :      10603 :               && XEXP (*split, 1) == const0_rtx)
    5186                 :            :             {
    5187                 :          0 :               rtx extraction = make_extraction (GET_MODE (SET_DEST (x)),
    5188                 :          0 :                                                 XEXP (SET_SRC (x), 0),
    5189                 :            :                                                 pos, NULL_RTX, 1, 1, 0, 0);
    5190                 :          0 :               if (extraction != 0)
    5191                 :            :                 {
    5192                 :          0 :                   SUBST (SET_SRC (x), extraction);
    5193                 :          0 :                   return find_split_point (loc, insn, false);
    5194                 :            :                 }
    5195                 :            :             }
    5196                 :            :           break;
    5197                 :            : 
    5198                 :            :         case NE:
    5199                 :            :           /* If STORE_FLAG_VALUE is -1, this is (NE X 0) and only one bit of X
    5200                 :            :              is known to be on, this can be converted into a NEG of a shift.  */
    5201                 :            :           if (STORE_FLAG_VALUE == -1 && XEXP (SET_SRC (x), 1) == const0_rtx
    5202                 :            :               && GET_MODE (SET_SRC (x)) == GET_MODE (XEXP (SET_SRC (x), 0))
    5203                 :            :               && ((pos = exact_log2 (nonzero_bits (XEXP (SET_SRC (x), 0),
    5204                 :            :                                                    GET_MODE (XEXP (SET_SRC (x),
    5205                 :            :                                                              0))))) >= 1))
    5206                 :            :             {
    5207                 :            :               machine_mode mode = GET_MODE (XEXP (SET_SRC (x), 0));
    5208                 :            :               rtx pos_rtx = gen_int_shift_amount (mode, pos);
    5209                 :            :               SUBST (SET_SRC (x),
    5210                 :            :                      gen_rtx_NEG (mode,
    5211                 :            :                                   gen_rtx_LSHIFTRT (mode,
    5212                 :            :                                                     XEXP (SET_SRC (x), 0),
    5213                 :            :                                                     pos_rtx)));
    5214                 :            : 
    5215                 :            :               split = find_split_point (&SET_SRC (x), insn, true);
    5216                 :            :               if (split && split != &SET_SRC (x))
    5217                 :            :                 return split;
    5218                 :            :             }
    5219                 :            :           break;
    5220                 :            : 
    5221                 :        811 :         case SIGN_EXTEND:
    5222                 :        811 :           inner = XEXP (SET_SRC (x), 0);
    5223                 :            : 
    5224                 :            :           /* We can't optimize if either mode is a partial integer
    5225                 :            :              mode as we don't know how many bits are significant
    5226                 :            :              in those modes.  */
    5227                 :        811 :           if (!is_int_mode (GET_MODE (inner), &inner_mode)
    5228                 :        811 :               || GET_MODE_CLASS (GET_MODE (SET_SRC (x))) == MODE_PARTIAL_INT)
    5229                 :            :             break;
    5230                 :            : 
    5231                 :        811 :           pos = 0;
    5232                 :        811 :           len = GET_MODE_PRECISION (inner_mode);
    5233                 :        811 :           unsignedp = 0;
    5234                 :        811 :           break;
    5235                 :            : 
    5236                 :       3981 :         case SIGN_EXTRACT:
    5237                 :       3981 :         case ZERO_EXTRACT:
    5238                 :       3981 :           if (is_a <scalar_int_mode> (GET_MODE (XEXP (SET_SRC (x), 0)),
    5239                 :            :                                       &inner_mode)
    5240                 :       3973 :               && CONST_INT_P (XEXP (SET_SRC (x), 1))
    5241                 :       3973 :               && CONST_INT_P (XEXP (SET_SRC (x), 2)))
    5242                 :            :             {
    5243                 :       3897 :               inner = XEXP (SET_SRC (x), 0);
    5244                 :       3897 :               len = INTVAL (XEXP (SET_SRC (x), 1));
    5245                 :       3897 :               pos = INTVAL (XEXP (SET_SRC (x), 2));
    5246                 :            : 
    5247                 :       3897 :               if (BITS_BIG_ENDIAN)
    5248                 :            :                 pos = GET_MODE_PRECISION (inner_mode) - len - pos;
    5249                 :       3897 :               unsignedp = (code == ZERO_EXTRACT);
    5250                 :            :             }
    5251                 :            :           break;
    5252                 :            : 
    5253                 :            :         default:
    5254                 :            :           break;
    5255                 :            :         }
    5256                 :            : 
    5257                 :     225624 :       if (len
    5258                 :     225624 :           && known_subrange_p (pos, len,
    5259                 :       4708 :                                0, GET_MODE_PRECISION (GET_MODE (inner)))
    5260                 :     230327 :           && is_a <scalar_int_mode> (GET_MODE (SET_SRC (x)), &mode))
    5261                 :            :         {
    5262                 :            :           /* For unsigned, we have a choice of a shift followed by an
    5263                 :            :              AND or two shifts.  Use two shifts for field sizes where the
    5264                 :            :              constant might be too large.  We assume here that we can
    5265                 :            :              always at least get 8-bit constants in an AND insn, which is
    5266                 :            :              true for every current RISC.  */
    5267                 :            : 
    5268                 :       4703 :           if (unsignedp && len <= 8)
    5269                 :            :             {
    5270                 :       2513 :               unsigned HOST_WIDE_INT mask
    5271                 :       2513 :                 = (HOST_WIDE_INT_1U << len) - 1;
    5272                 :       2513 :               rtx pos_rtx = gen_int_shift_amount (mode, pos);
    5273                 :       2513 :               SUBST (SET_SRC (x),
    5274                 :            :                      gen_rtx_AND (mode,
    5275                 :            :                                   gen_rtx_LSHIFTRT
    5276                 :            :                                   (mode, gen_lowpart (mode, inner), pos_rtx),
    5277                 :            :                                   gen_int_mode (mask, mode)));
    5278                 :            : 
    5279                 :       2513 :               split = find_split_point (&SET_SRC (x), insn, true);
    5280                 :       2513 :               if (split && split != &SET_SRC (x))
    5281                 :   17920500 :                 return split;
    5282                 :            :             }
    5283                 :            :           else
    5284                 :            :             {
    5285                 :       2190 :               int left_bits = GET_MODE_PRECISION (mode) - len - pos;
    5286                 :       2190 :               int right_bits = GET_MODE_PRECISION (mode) - len;
    5287                 :       2190 :               SUBST (SET_SRC (x),
    5288                 :            :                      gen_rtx_fmt_ee
    5289                 :            :                      (unsignedp ? LSHIFTRT : ASHIFTRT, mode,
    5290                 :            :                       gen_rtx_ASHIFT (mode,
    5291                 :            :                                       gen_lowpart (mode, inner),
    5292                 :            :                                       gen_int_shift_amount (mode, left_bits)),
    5293                 :            :                       gen_int_shift_amount (mode, right_bits)));
    5294                 :            : 
    5295                 :       2190 :               split = find_split_point (&SET_SRC (x), insn, true);
    5296                 :       2190 :               if (split && split != &SET_SRC (x))
    5297                 :   17920500 :                 return split;
    5298                 :            :             }
    5299                 :            :         }
    5300                 :            : 
    5301                 :            :       /* See if this is a simple operation with a constant as the second
    5302                 :            :          operand.  It might be that this constant is out of range and hence
    5303                 :            :          could be used as a split point.  */
    5304                 :     220921 :       if (BINARY_P (SET_SRC (x))
    5305                 :     125444 :           && CONSTANT_P (XEXP (SET_SRC (x), 1))
    5306                 :      62886 :           && (OBJECT_P (XEXP (SET_SRC (x), 0))
    5307                 :      23626 :               || (GET_CODE (XEXP (SET_SRC (x), 0)) == SUBREG
    5308                 :      10013 :                   && OBJECT_P (SUBREG_REG (XEXP (SET_SRC (x), 0))))))
    5309                 :      39944 :         return &XEXP (SET_SRC (x), 1);
    5310                 :            : 
    5311                 :            :       /* Finally, see if this is a simple operation with its first operand
    5312                 :            :          not in a register.  The operation might require this operand in a
    5313                 :            :          register, so return it as a split point.  We can always do this
    5314                 :            :          because if the first operand were another operation, we would have
    5315                 :            :          already found it as a split point.  */
    5316                 :      95477 :       if ((BINARY_P (SET_SRC (x)) || UNARY_P (SET_SRC (x)))
    5317                 :     192226 :           && ! register_operand (XEXP (SET_SRC (x), 0), VOIDmode))
    5318                 :      85904 :         return &XEXP (SET_SRC (x), 0);
    5319                 :            : 
    5320                 :            :       return 0;
    5321                 :            : 
    5322                 :     514093 :     case AND:
    5323                 :     514093 :     case IOR:
    5324                 :            :       /* We write NOR as (and (not A) (not B)), but if we don't have a NOR,
    5325                 :            :          it is better to write this as (not (ior A B)) so we can split it.
    5326                 :            :          Similarly for IOR.  */
    5327                 :     514093 :       if (GET_CODE (XEXP (x, 0)) == NOT && GET_CODE (XEXP (x, 1)) == NOT)
    5328                 :            :         {
    5329                 :       3248 :           SUBST (*loc,
    5330                 :            :                  gen_rtx_NOT (GET_MODE (x),
    5331                 :            :                               gen_rtx_fmt_ee (code == IOR ? AND : IOR,
    5332                 :            :                                               GET_MODE (x),
    5333                 :            :                                               XEXP (XEXP (x, 0), 0),
    5334                 :            :                                               XEXP (XEXP (x, 1), 0))));
    5335                 :       1624 :           return find_split_point (loc, insn, set_src);
    5336                 :            :         }
    5337                 :            : 
    5338                 :            :       /* Many RISC machines have a large set of logical insns.  If the
    5339                 :            :          second operand is a NOT, put it first so we will try to split the
    5340                 :            :          other operand first.  */
    5341                 :     512469 :       if (GET_CODE (XEXP (x, 1)) == NOT)
    5342                 :            :         {
    5343                 :       4928 :           rtx tem = XEXP (x, 0);
    5344                 :       4928 :           SUBST (XEXP (x, 0), XEXP (x, 1));
    5345                 :       4928 :           SUBST (XEXP (x, 1), tem);
    5346                 :            :         }
    5347                 :            :       break;
    5348                 :            : 
    5349                 :    1687600 :     case PLUS:
    5350                 :    1687600 :     case MINUS:
    5351                 :            :       /* Canonicalization can produce (minus A (mult B C)), where C is a
    5352                 :            :          constant.  It may be better to try splitting (plus (mult B -C) A)
    5353                 :            :          instead if this isn't a multiply by a power of two.  */
    5354                 :     127180 :       if (set_src && code == MINUS && GET_CODE (XEXP (x, 1)) == MULT
    5355                 :      18212 :           && GET_CODE (XEXP (XEXP (x, 1), 1)) == CONST_INT
    5356                 :    1690390 :           && !pow2p_hwi (INTVAL (XEXP (XEXP (x, 1), 1))))
    5357                 :            :         {
    5358                 :       2796 :           machine_mode mode = GET_MODE (x);
    5359                 :       2796 :           unsigned HOST_WIDE_INT this_int = INTVAL (XEXP (XEXP (x, 1), 1));
    5360                 :       2796 :           HOST_WIDE_INT other_int = trunc_int_for_mode (-this_int, mode);
    5361                 :       2796 :           SUBST (*loc, gen_rtx_PLUS (mode,
    5362                 :            :                                      gen_rtx_MULT (mode,
    5363                 :            :                                                    XEXP (XEXP (x, 1), 0),
    5364                 :            :                                                    gen_int_mode (other_int,
    5365                 :            :                                                                  mode)),
    5366                 :            :                                      XEXP (x, 0)));
    5367                 :       2796 :           return find_split_point (loc, insn, set_src);
    5368                 :            :         }
    5369                 :            : 
    5370                 :            :       /* Split at a multiply-accumulate instruction.  However if this is
    5371                 :            :          the SET_SRC, we likely do not have such an instruction and it's
    5372                 :            :          worthless to try this split.  */
    5373                 :    1684800 :       if (!set_src
    5374                 :     936362 :           && (GET_CODE (XEXP (x, 0)) == MULT
    5375                 :     854495 :               || (GET_CODE (XEXP (x, 0)) == ASHIFT
    5376                 :      93334 :                   && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)))
    5377                 :            :         return loc;
    5378                 :            : 
    5379                 :            :     default:
    5380                 :            :       break;
    5381                 :            :     }
    5382                 :            : 
    5383                 :            :   /* Otherwise, select our actions depending on our rtx class.  */
    5384                 :   14384900 :   switch (GET_RTX_CLASS (code))
    5385                 :            :     {
    5386                 :     946362 :     case RTX_BITFIELD_OPS:              /* This is ZERO_EXTRACT and SIGN_EXTRACT.  */
    5387                 :     946362 :     case RTX_TERNARY:
    5388                 :     946362 :       split = find_split_point (&XEXP (x, 2), insn, false);
    5389                 :     946362 :       if (split)
    5390                 :            :         return split;
    5391                 :            :       /* fall through */
    5392                 :    5611410 :     case RTX_BIN_ARITH:
    5393                 :    5611410 :     case RTX_COMM_ARITH:
    5394                 :    5611410 :     case RTX_COMPARE:
    5395                 :    5611410 :     case RTX_COMM_COMPARE:
    5396                 :    5611410 :       split = find_split_point (&XEXP (x, 1), insn, false);
    5397                 :    5611410 :       if (split)
    5398                 :            :         return split;
    5399                 :            :       /* fall through */
    5400                 :    5401540 :     case RTX_UNARY:
    5401                 :            :       /* Some machines have (and (shift ...) ...) insns.  If X is not
    5402                 :            :          an AND, but XEXP (X, 0) is, use it as our split point.  */
    5403                 :    5401540 :       if (GET_CODE (x) != AND && GET_CODE (XEXP (x, 0)) == AND)
    5404                 :     174081 :         return &XEXP (x, 0);
    5405                 :            : 
    5406                 :    5227460 :       split = find_split_point (&XEXP (x, 0), insn, false);
    5407                 :    5227460 :       if (split)
    5408                 :    3126910 :         return split;
    5409                 :            :       return loc;
    5410                 :            : 
    5411                 :            :     default:
    5412                 :            :       /* Otherwise, we don't have a split point.  */
    5413                 :            :       return 0;
    5414                 :            :     }
    5415                 :            : }
    5416                 :            : 
    5417                 :            : /* Throughout X, replace FROM with TO, and return the result.
    5418                 :            :    The result is TO if X is FROM;
    5419                 :            :    otherwise the result is X, but its contents may have been modified.
    5420                 :            :    If they were modified, a record was made in undobuf so that
    5421                 :            :    undo_all will (among other things) return X to its original state.
    5422                 :            : 
    5423                 :            :    If the number of changes necessary is too much to record to undo,
    5424                 :            :    the excess changes are not made, so the result is invalid.
    5425                 :            :    The changes already made can still be undone.
    5426                 :            :    undobuf.num_undo is incremented for such changes, so by testing that
    5427                 :            :    the caller can tell whether the result is valid.
    5428                 :            : 
    5429                 :            :    `n_occurrences' is incremented each time FROM is replaced.
    5430                 :            : 
    5431                 :            :    IN_DEST is nonzero if we are processing the SET_DEST of a SET.
    5432                 :            : 
    5433                 :            :    IN_COND is nonzero if we are at the top level of a condition.
    5434                 :            : 
    5435                 :            :    UNIQUE_COPY is nonzero if each substitution must be unique.  We do this
    5436                 :            :    by copying if `n_occurrences' is nonzero.  */
    5437                 :            : 
    5438                 :            : static rtx
    5439                 :  234950000 : subst (rtx x, rtx from, rtx to, int in_dest, int in_cond, int unique_copy)
    5440                 :            : {
    5441                 :  234950000 :   enum rtx_code code = GET_CODE (x);
    5442                 :  234950000 :   machine_mode op0_mode = VOIDmode;
    5443                 :  234950000 :   const char *fmt;
    5444                 :  234950000 :   int len, i;
    5445                 :  234950000 :   rtx new_rtx;
    5446                 :            : 
    5447                 :            : /* Two expressions are equal if they are identical copies of a shared
    5448                 :            :    RTX or if they are both registers with the same register number
    5449                 :            :    and mode.  */
    5450                 :            : 
    5451                 :            : #define COMBINE_RTX_EQUAL_P(X,Y)                        \
    5452                 :            :   ((X) == (Y)                                           \
    5453                 :            :    || (REG_P (X) && REG_P (Y)   \
    5454                 :            :        && REGNO (X) == REGNO (Y) && GET_MODE (X) == GET_MODE (Y)))
    5455                 :            : 
    5456                 :            :   /* Do not substitute into clobbers of regs -- this will never result in
    5457                 :            :      valid RTL.  */
    5458                 :  234950000 :   if (GET_CODE (x) == CLOBBER && REG_P (XEXP (x, 0)))
    5459                 :            :     return x;
    5460                 :            : 
    5461                 :  229443000 :   if (! in_dest && COMBINE_RTX_EQUAL_P (x, from))
    5462                 :            :     {
    5463                 :          0 :       n_occurrences++;
    5464                 :          0 :       return (unique_copy && n_occurrences > 1 ? copy_rtx (to) : to);
    5465                 :            :     }
    5466                 :            : 
    5467                 :            :   /* If X and FROM are the same register but different modes, they
    5468                 :            :      will not have been seen as equal above.  However, the log links code
    5469                 :            :      will make a LOG_LINKS entry for that case.  If we do nothing, we
    5470                 :            :      will try to rerecognize our original insn and, when it succeeds,
    5471                 :            :      we will delete the feeding insn, which is incorrect.
    5472                 :            : 
    5473                 :            :      So force this insn not to match in this (rare) case.  */
    5474                 :   49921900 :   if (! in_dest && code == REG && REG_P (from)
    5475                 :  247591000 :       && reg_overlap_mentioned_p (x, from))
    5476                 :       2160 :     return gen_rtx_CLOBBER (GET_MODE (x), const0_rtx);
    5477                 :            : 
    5478                 :            :   /* If this is an object, we are done unless it is a MEM or LO_SUM, both
    5479                 :            :      of which may contain things that can be combined.  */
    5480                 :  229441000 :   if (code != MEM && code != LO_SUM && OBJECT_P (x))
    5481                 :            :     return x;
    5482                 :            : 
    5483                 :            :   /* It is possible to have a subexpression appear twice in the insn.
    5484                 :            :      Suppose that FROM is a register that appears within TO.
    5485                 :            :      Then, after that subexpression has been scanned once by `subst',
    5486                 :            :      the second time it is scanned, TO may be found.  If we were
    5487                 :            :      to scan TO here, we would find FROM within it and create a
    5488                 :            :      self-referent rtl structure which is completely wrong.  */
    5489                 :  123002000 :   if (COMBINE_RTX_EQUAL_P (x, to))
    5490                 :            :     return to;
    5491                 :            : 
    5492                 :            :   /* Parallel asm_operands need special attention because all of the
    5493                 :            :      inputs are shared across the arms.  Furthermore, unsharing the
    5494                 :            :      rtl results in recognition failures.  Failure to handle this case
    5495                 :            :      specially can result in circular rtl.
    5496                 :            : 
    5497                 :            :      Solve this by doing a normal pass across the first entry of the
    5498                 :            :      parallel, and only processing the SET_DESTs of the subsequent
    5499                 :            :      entries.  Ug.  */
    5500                 :            : 
    5501                 :  122924000 :   if (code == PARALLEL
    5502                 :    6960100 :       && GET_CODE (XVECEXP (x, 0, 0)) == SET
    5503                 :    6022080 :       && GET_CODE (SET_SRC (XVECEXP (x, 0, 0))) == ASM_OPERANDS)
    5504                 :            :     {
    5505                 :      18341 :       new_rtx = subst (XVECEXP (x, 0, 0), from, to, 0, 0, unique_copy);
    5506                 :            : 
    5507                 :            :       /* If this substitution failed, this whole thing fails.  */
    5508                 :      18341 :       if (GET_CODE (new_rtx) == CLOBBER
    5509                 :          0 :           && XEXP (new_rtx, 0) == const0_rtx)
    5510                 :            :         return new_rtx;
    5511                 :            : 
    5512                 :      18341 :       SUBST (XVECEXP (x, 0, 0), new_rtx);
    5513                 :            : 
    5514                 :      92479 :       for (i = XVECLEN (x, 0) - 1; i >= 1; i--)
    5515                 :            :         {
    5516                 :      74138 :           rtx dest = SET_DEST (XVECEXP (x, 0, i));
    5517                 :            : 
    5518                 :      74138 :           if (!REG_P (dest)
    5519                 :       1318 :               && GET_CODE (dest) != CC0
    5520                 :       1318 :               && GET_CODE (dest) != PC)
    5521                 :            :             {
    5522                 :       1318 :               new_rtx = subst (dest, from, to, 0, 0, unique_copy);
    5523                 :            : 
    5524                 :            :               /* If this substitution failed, this whole thing fails.  */
    5525                 :       1318 :               if (GET_CODE (new_rtx) == CLOBBER
    5526                 :          0 :                   && XEXP (new_rtx, 0) == const0_rtx)
    5527                 :          0 :                 return new_rtx;
    5528                 :            : 
    5529                 :       1318 :               SUBST (SET_DEST (XVECEXP (x, 0, i)), new_rtx);
    5530                 :            :             }
    5531                 :            :         }
    5532                 :            :     }
    5533                 :            :   else
    5534                 :            :     {
    5535                 :  122906000 :       len = GET_RTX_LENGTH (code);
    5536                 :  122906000 :       fmt = GET_RTX_FORMAT (code);
    5537                 :            : 
    5538                 :            :       /* We don't need to process a SET_DEST that is a register, CC0,
    5539                 :            :          or PC, so set up to skip this common case.  All other cases
    5540                 :            :          where we want to suppress replacing something inside a
    5541                 :            :          SET_SRC are handled via the IN_DEST operand.  */
    5542                 :  122906000 :       if (code == SET
    5543                 :   26930900 :           && (REG_P (SET_DEST (x))
    5544                 :    9865980 :               || GET_CODE (SET_DEST (x)) == CC0
    5545                 :    9865980 :               || GET_CODE (SET_DEST (x)) == PC))
    5546                 :   23403000 :         fmt = "ie";
    5547                 :            : 
    5548                 :            :       /* Trying to simplify the operands of a widening MULT is not likely
    5549                 :            :          to create RTL matching a machine insn.  */
    5550                 :  122906000 :       if (code == MULT
    5551                 :    3563740 :           && (GET_CODE (XEXP (x, 0)) == ZERO_EXTEND
    5552                 :    3563740 :               || GET_CODE (XEXP (x, 0)) == SIGN_EXTEND)
    5553                 :     372393 :           && (GET_CODE (XEXP (x, 1)) == ZERO_EXTEND
    5554                 :     372393 :               || GET_CODE (XEXP (x, 1)) == SIGN_EXTEND)
    5555                 :     311785 :           && REG_P (XEXP (XEXP (x, 0), 0))
    5556                 :     202793 :           && REG_P (XEXP (XEXP (x, 1), 0))
    5557                 :     197020 :           && from == to)
    5558                 :            :         return x;
    5559                 :            : 
    5560                 :            : 
    5561                 :            :       /* Get the mode of operand 0 in case X is now a SIGN_EXTEND of a
    5562                 :            :          constant.  */
    5563                 :  122791000 :       if (fmt[0] == 'e')
    5564                 :   90644500 :         op0_mode = GET_MODE (XEXP (x, 0));
    5565                 :            : 
    5566                 :  364645000 :       for (i = 0; i < len; i++)
    5567                 :            :         {
    5568                 :  242188000 :           if (fmt[i] == 'E')
    5569                 :            :             {
    5570                 :    8721200 :               int j;
    5571                 :   27447800 :               for (j = XVECLEN (x, i) - 1; j >= 0; j--)
    5572                 :            :                 {
    5573                 :   18769900 :                   if (COMBINE_RTX_EQUAL_P (XVECEXP (x, i, j), from))
    5574                 :            :                     {
    5575                 :         67 :                       new_rtx = (unique_copy && n_occurrences
    5576                 :     224672 :                              ? copy_rtx (to) : to);
    5577                 :     224672 :                       n_occurrences++;
    5578                 :            :                     }
    5579                 :            :                   else
    5580                 :            :                     {
    5581                 :   18545200 :                       new_rtx = subst (XVECEXP (x, i, j), from, to, 0, 0,
    5582                 :            :                                        unique_copy);
    5583                 :            : 
    5584                 :            :                       /* If this substitution failed, this whole thing
    5585                 :            :                          fails.  */
    5586                 :   18545200 :                       if (GET_CODE (new_rtx) == CLOBBER
    5587                 :    5820890 :                           && XEXP (new_rtx, 0) == const0_rtx)
    5588                 :      43307 :                         return new_rtx;
    5589                 :            :                     }
    5590                 :            : 
    5591                 :   18726600 :                   SUBST (XVECEXP (x, i, j), new_rtx);
    5592                 :            :                 }
    5593                 :            :             }
    5594                 :  233467000 :           else if (fmt[i] == 'e')
    5595                 :            :             {
    5596                 :            :               /* If this is a register being set, ignore it.  */
    5597                 :  190279000 :               new_rtx = XEXP (x, i);
    5598                 :  190279000 :               if (in_dest
    5599                 :  190279000 :                   && i == 0
    5600                 :    3529960 :                   && (((code == SUBREG || code == ZERO_EXTRACT)
    5601                 :     156876 :                        && REG_P (new_rtx))
    5602                 :    3375380 :                       || code == STRICT_LOW_PART))
    5603                 :            :                 ;
    5604                 :            : 
    5605                 :  190121000 :               else if (COMBINE_RTX_EQUAL_P (XEXP (x, i), from))
    5606                 :            :                 {
    5607                 :            :                   /* In general, don't install a subreg involving two
    5608                 :            :                      modes not tieable.  It can worsen register
    5609                 :            :                      allocation, and can even make invalid reload
    5610                 :            :                      insns, since the reg inside may need to be copied
    5611                 :            :                      from in the outside mode, and that may be invalid
    5612                 :            :                      if it is an fp reg copied in integer mode.
    5613                 :            : 
    5614                 :            :                      We allow two exceptions to this: It is valid if
    5615                 :            :                      it is inside another SUBREG and the mode of that
    5616                 :            :                      SUBREG and the mode of the inside of TO is
    5617                 :            :                      tieable and it is valid if X is a SET that copies
    5618                 :            :                      FROM to CC0.  */
    5619                 :            : 
    5620                 :   27009800 :                   if (GET_CODE (to) == SUBREG
    5621                 :     226502 :                       && !targetm.modes_tieable_p (GET_MODE (to),
    5622                 :     226502 :                                                    GET_MODE (SUBREG_REG (to)))
    5623                 :     118251 :                       && ! (code == SUBREG
    5624                 :      12020 :                             && (targetm.modes_tieable_p
    5625                 :      12020 :                                 (GET_MODE (x), GET_MODE (SUBREG_REG (to)))))
    5626                 :   27009800 :                       && (!HAVE_cc0
    5627                 :            :                           || (! (code == SET
    5628                 :            :                                  && i == 1
    5629                 :            :                                  && XEXP (x, 0) == cc0_rtx))))
    5630                 :     106099 :                     return gen_rtx_CLOBBER (VOIDmode, const0_rtx);
    5631                 :            : 
    5632                 :   26903700 :                   if (code == SUBREG
    5633                 :    1342340 :                       && REG_P (to)
    5634                 :     119025 :                       && REGNO (to) < FIRST_PSEUDO_REGISTER
    5635                 :   26903800 :                       && simplify_subreg_regno (REGNO (to), GET_MODE (to),
    5636                 :         11 :                                                 SUBREG_BYTE (x),
    5637                 :         11 :                                                 GET_MODE (x)) < 0)
    5638                 :          6 :                     return gen_rtx_CLOBBER (VOIDmode, const0_rtx);
    5639                 :            : 
    5640                 :   26903700 :                   new_rtx = (unique_copy && n_occurrences ? copy_rtx (to) : to);
    5641                 :   26903700 :                   n_occurrences++;
    5642                 :            :                 }
    5643                 :            :               else
    5644                 :            :                 /* If we are in a SET_DEST, suppress most cases unless we
    5645                 :            :                    have gone inside a MEM, in which case we want to
    5646                 :            :                    simplify the address.  We assume here that things that
    5647                 :            :                    are actually part of the destination have their inner
    5648                 :            :                    parts in the first expression.  This is true for SUBREG,
    5649                 :            :                    STRICT_LOW_PART, and ZERO_EXTRACT, which are the only
    5650                 :            :                    things aside from REG and MEM that should appear in a
    5651                 :            :                    SET_DEST.  */
    5652                 :  163111000 :                 new_rtx = subst (XEXP (x, i), from, to,
    5653                 :            :                              (((in_dest
    5654                 :    3183400 :                                 && (code == SUBREG || code == STRICT_LOW_PART
    5655                 :    3183400 :                                     || code == ZERO_EXTRACT))
    5656                 :  163103000 :                                || code == SET)
    5657                 :   27846400 :                               && i == 0),
    5658                 :  163111000 :                                  code == IF_THEN_ELSE && i == 0,
    5659                 :            :                                  unique_copy);
    5660                 :            : 
    5661                 :            :               /* If we found that we will have to reject this combination,
    5662                 :            :                  indicate that by returning the CLOBBER ourselves, rather than
    5663                 :            :                  an expression containing it.  This will speed things up as
    5664                 :            :                  well as prevent accidents where two CLOBBERs are considered
    5665                 :            :                  to be equal, thus producing an incorrect simplification.  */
    5666                 :            : 
    5667                 :  190172000 :               if (GET_CODE (new_rtx) == CLOBBER && XEXP (new_rtx, 0) == const0_rtx)
    5668                 :     184594 :                 return new_rtx;
    5669                 :            : 
    5670                 :  189988000 :               if (GET_CODE (x) == SUBREG && CONST_SCALAR_INT_P (new_rtx))
    5671                 :            :                 {
    5672                 :      14325 :                   machine_mode mode = GET_MODE (x);
    5673                 :            : 
    5674                 :      28650 :                   x = simplify_subreg (GET_MODE (x), new_rtx,
    5675                 :      14325 :                                        GET_MODE (SUBREG_REG (x)),
    5676                 :      14325 :                                        SUBREG_BYTE (x));
    5677                 :      14325 :                   if (! x)
    5678                 :          0 :                     x = gen_rtx_CLOBBER (mode, const0_rtx);
    5679                 :            :                 }
    5680                 :  189974000 :               else if (CONST_SCALAR_INT_P (new_rtx)
    5681                 :   35386300 :                        && (GET_CODE (x) == ZERO_EXTEND
    5682                 :   35386300 :                            || GET_CODE (x) == SIGN_EXTEND
    5683                 :   35314600 :                            || GET_CODE (x) == FLOAT
    5684                 :   35312800 :                            || GET_CODE (x) == UNSIGNED_FLOAT))
    5685                 :            :                 {
    5686                 :     146974 :                   x = simplify_unary_operation (GET_CODE (x), GET_MODE (x),
    5687                 :            :                                                 new_rtx,
    5688                 :      73487 :                                                 GET_MODE (XEXP (x, 0)));
    5689                 :      73487 :                   if (!x)
    5690                 :          0 :                     return gen_rtx_CLOBBER (VOIDmode, const0_rtx);
    5691                 :            :                 }
    5692                 :            :               else
    5693                 :  189900000 :                 SUBST (XEXP (x, i), new_rtx);
    5694                 :            :             }
    5695                 :            :         }
    5696                 :            :     }
    5697                 :            : 
    5698                 :            :   /* Check if we are loading something from the constant pool via float
    5699                 :            :      extension; in this case we would undo compress_float_constant
    5700                 :            :      optimization and degenerate constant load to an immediate value.  */
    5701                 :  122475000 :   if (GET_CODE (x) == FLOAT_EXTEND
    5702                 :     327695 :       && MEM_P (XEXP (x, 0))
    5703                 :  122560000 :       && MEM_READONLY_P (XEXP (x, 0)))
    5704                 :            :     {
    5705                 :      54226 :       rtx tmp = avoid_constant_pool_reference (x);
    5706                 :      54226 :       if (x != tmp)
    5707                 :            :         return x;
    5708                 :            :     }
    5709                 :            : 
    5710                 :            :   /* Try to simplify X.  If the simplification changed the code, it is likely
    5711                 :            :      that further simplification will help, so loop, but limit the number
    5712                 :            :      of repetitions that will be performed.  */
    5713                 :            : 
    5714                 :  127561000 :   for (i = 0; i < 4; i++)
    5715                 :            :     {
    5716                 :            :       /* If X is sufficiently simple, don't bother trying to do anything
    5717                 :            :          with it.  */
    5718                 :  127553000 :       if (code != CONST_INT && code != REG && code != CLOBBER)
    5719                 :  127070000 :         x = combine_simplify_rtx (x, op0_mode, in_dest, in_cond);
    5720                 :            : 
    5721                 :  127553000 :       if (GET_CODE (x) == code)
    5722                 :            :         break;
    5723                 :            : 
    5724                 :    5140300 :       code = GET_CODE (x);
    5725                 :            : 
    5726                 :            :       /* We no longer know the original mode of operand 0 since we
    5727                 :            :          have changed the form of X)  */
    5728                 :    5140300 :       op0_mode = VOIDmode;
    5729                 :            :     }
    5730                 :            : 
    5731                 :            :   return x;
    5732                 :            : }
    5733                 :            : 
    5734                 :            : /* If X is a commutative operation whose operands are not in the canonical
    5735                 :            :    order, use substitutions to swap them.  */
    5736                 :            : 
    5737                 :            : static void
    5738                 :  404428000 : maybe_swap_commutative_operands (rtx x)
    5739                 :            : {
    5740                 :  404428000 :   if (COMMUTATIVE_ARITH_P (x)
    5741                 :  404428000 :       && swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
    5742                 :            :     {
    5743                 :    1926500 :       rtx temp = XEXP (x, 0);
    5744                 :    1926500 :       SUBST (XEXP (x, 0), XEXP (x, 1));
    5745                 :    1926500 :       SUBST (XEXP (x, 1), temp);
    5746                 :            :     }
    5747                 :  404428000 : }
    5748                 :            : 
    5749                 :            : /* Simplify X, a piece of RTL.  We just operate on the expression at the
    5750                 :            :    outer level; call `subst' to simplify recursively.  Return the new
    5751                 :            :    expression.
    5752                 :            : 
    5753                 :            :    OP0_MODE is the original mode of XEXP (x, 0).  IN_DEST is nonzero
    5754                 :            :    if we are inside a SET_DEST.  IN_COND is nonzero if we are at the top level
    5755                 :            :    of a condition.  */
    5756                 :            : 
    5757                 :            : static rtx
    5758                 :  127228000 : combine_simplify_rtx (rtx x, machine_mode op0_mode, int in_dest,
    5759                 :            :                       int in_cond)
    5760                 :            : {
    5761                 :  127228000 :   enum rtx_code code = GET_CODE (x);
    5762                 :  127228000 :   machine_mode mode = GET_MODE (x);
    5763                 :  127228000 :   scalar_int_mode int_mode;
    5764                 :  127228000 :   rtx temp;
    5765                 :  127228000 :   int i;
    5766                 :            : 
    5767                 :            :   /* If this is a commutative operation, put a constant last and a complex
    5768                 :            :      expression first.  We don't need to do this for comparisons here.  */
    5769                 :  127228000 :   maybe_swap_commutative_operands (x);
    5770                 :            : 
    5771                 :            :   /* Try to fold this expression in case we have constants that weren't
    5772                 :            :      present before.  */
    5773                 :  127228000 :   temp = 0;
    5774                 :  127228000 :   switch (GET_RTX_CLASS (code))
    5775                 :            :     {
    5776                 :    4078620 :     case RTX_UNARY:
    5777                 :    4078620 :       if (op0_mode == VOIDmode)
    5778                 :      97009 :         op0_mode = GET_MODE (XEXP (x, 0));
    5779                 :    4078620 :       temp = simplify_unary_operation (code, mode, XEXP (x, 0), op0_mode);
    5780                 :    4078620 :       break;
    5781                 :   10516000 :     case RTX_COMPARE:
    5782                 :   10516000 :     case RTX_COMM_COMPARE:
    5783                 :   10516000 :       {
    5784                 :   10516000 :         machine_mode cmp_mode = GET_MODE (XEXP (x, 0));
    5785                 :   10516000 :         if (cmp_mode == VOIDmode)
    5786                 :            :           {
    5787                 :      11753 :             cmp_mode = GET_MODE (XEXP (x, 1));
    5788                 :      11753 :             if (cmp_mode == VOIDmode)
    5789                 :        411 :               cmp_mode = op0_mode;
    5790                 :            :           }
    5791                 :   10516000 :         temp = simplify_relational_operation (code, mode, cmp_mode,
    5792                 :            :                                               XEXP (x, 0), XEXP (x, 1));
    5793                 :            :       }
    5794                 :   10516000 :       break;
    5795                 :   49474400 :     case RTX_COMM_ARITH:
    5796                 :   49474400 :     case RTX_BIN_ARITH:
    5797                 :   49474400 :       temp = simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
    5798                 :   49474400 :       break;
    5799                 :    8637990 :     case RTX_BITFIELD_OPS:
    5800                 :    8637990 :     case RTX_TERNARY:
    5801                 :    8637990 :       temp = simplify_ternary_operation (code, mode, op0_mode, XEXP (x, 0),
    5802                 :            :                                          XEXP (x, 1), XEXP (x, 2));
    5803                 :    8637990 :       break;
    5804                 :            :     default:
    5805                 :            :       break;
    5806                 :            :     }
    5807                 :            : 
    5808                 :   72707000 :   if (temp)
    5809                 :            :     {
    5810                 :    9989790 :       x = temp;
    5811                 :    9989790 :       code = GET_CODE (temp);
    5812                 :    9989790 :       op0_mode = VOIDmode;
    5813                 :    9989790 :       mode = GET_MODE (temp);
    5814                 :            :     }
    5815                 :            : 
    5816                 :            :   /* If this is a simple operation applied to an IF_THEN_ELSE, try
    5817                 :            :      applying it to the arms of the IF_THEN_ELSE.  This often simplifies
    5818                 :            :      things.  Check for cases where both arms are testing the same
    5819                 :            :      condition.
    5820                 :            : 
    5821                 :            :      Don't do anything if all operands are very simple.  */
    5822                 :            : 
    5823                 :  127228000 :   if ((BINARY_P (x)
    5824                 :   59889700 :        && ((!OBJECT_P (XEXP (x, 0))
    5825                 :   23485300 :             && ! (GET_CODE (XEXP (x, 0)) == SUBREG
    5826                 :    2537580 :                   && OBJECT_P (SUBREG_REG (XEXP (x, 0)))))
    5827                 :   37868400 :            || (!OBJECT_P (XEXP (x, 1))
    5828                 :    2587030 :                && ! (GET_CODE (XEXP (x, 1)) == SUBREG
    5829                 :     964211 :                      && OBJECT_P (SUBREG_REG (XEXP (x, 1)))))))
    5830                 :  103435000 :       || (UNARY_P (x)
    5831                 :    4031190 :           && (!OBJECT_P (XEXP (x, 0))
    5832                 :    1921810 :                && ! (GET_CODE (XEXP (x, 0)) == SUBREG
    5833                 :     475950 :                      && OBJECT_P (SUBREG_REG (XEXP (x, 0)))))))
    5834                 :            :     {
    5835                 :   25294700 :       rtx cond, true_rtx, false_rtx;
    5836                 :            : 
    5837                 :   25294700 :       cond = if_then_else_cond (x, &true_rtx, &false_rtx);
    5838                 :   25294700 :       if (cond != 0
    5839                 :            :           /* If everything is a comparison, what we have is highly unlikely
    5840                 :            :              to be simpler, so don't use it.  */
    5841                 :    2028780 :           && ! (COMPARISON_P (x)
    5842                 :     743143 :                 && (COMPARISON_P (true_rtx) || COMPARISON_P (false_rtx)))
    5843                 :            :           /* Similarly, if we end up with one of the expressions the same
    5844                 :            :              as the original, it is certainly not simpler.  */
    5845                 :    1969750 :           && ! rtx_equal_p (x, true_rtx)
    5846                 :   27264400 :           && ! rtx_equal_p (x, false_rtx))
    5847                 :            :         {
    5848                 :    1969750 :           rtx cop1 = const0_rtx;
    5849                 :    1969750 :           enum rtx_code cond_code = simplify_comparison (NE, &cond, &cop1);
    5850                 :            : 
    5851                 :    1969750 :           if (cond_code == NE && COMPARISON_P (cond))
    5852                 :     306283 :             return x;
    5853                 :            : 
    5854                 :            :           /* Simplify the alternative arms; this may collapse the true and
    5855                 :            :              false arms to store-flag values.  Be careful to use copy_rtx
    5856                 :            :              here since true_rtx or false_rtx might share RTL with x as a
    5857                 :            :              result of the if_then_else_cond call above.  */
    5858                 :    1663460 :           true_rtx = subst (copy_rtx (true_rtx), pc_rtx, pc_rtx, 0, 0, 0);
    5859                 :    1663460 :           false_rtx = subst (copy_rtx (false_rtx), pc_rtx, pc_rtx, 0, 0, 0);
    5860                 :            : 
    5861                 :            :           /* If true_rtx and false_rtx are not general_operands, an if_then_else
    5862                 :            :              is unlikely to be simpler.  */
    5863                 :    1663460 :           if (general_operand (true_rtx, VOIDmode)
    5864                 :    1663460 :               && general_operand (false_rtx, VOIDmode))
    5865                 :            :             {
    5866                 :     817656 :               enum rtx_code reversed;
    5867                 :            : 
    5868                 :            :               /* Restarting if we generate a store-flag expression will cause
    5869                 :            :                  us to loop.  Just drop through in this case.  */
    5870                 :            : 
    5871                 :            :               /* If the result values are STORE_FLAG_VALUE and zero, we can
    5872                 :            :                  just make the comparison operation.  */
    5873                 :     817656 :               if (true_rtx == const_true_rtx && false_rtx == const0_rtx)
    5874                 :     362558 :                 x = simplify_gen_relational (cond_code, mode, VOIDmode,
    5875                 :            :                                              cond, cop1);
    5876                 :     305980 :               else if (true_rtx == const0_rtx && false_rtx == const_true_rtx
    5877                 :     455098 :                        && ((reversed = reversed_comparison_code_parts
    5878                 :     287323 :                                         (cond_code, cond, cop1, NULL))
    5879                 :            :                            != UNKNOWN))
    5880                 :     287322 :                 x = simplify_gen_relational (reversed, mode, VOIDmode,
    5881                 :            :                                              cond, cop1);
    5882                 :            : 
    5883                 :            :               /* Likewise, we can make the negate of a comparison operation
    5884                 :            :                  if the result values are - STORE_FLAG_VALUE and zero.  */
    5885                 :     167776 :               else if (CONST_INT_P (true_rtx)
    5886                 :      93716 :                        && INTVAL (true_rtx) == - STORE_FLAG_VALUE
    5887                 :      26975 :                        && false_rtx == const0_rtx)
    5888                 :      25749 :                 x = simplify_gen_unary (NEG, mode,
    5889                 :            :                                         simplify_gen_relational (cond_code,
    5890                 :            :                                                                  mode, VOIDmode,
    5891                 :            :                                                                  cond, cop1),
    5892                 :            :                                         mode);
    5893                 :     142027 :               else if (CONST_INT_P (false_rtx)
    5894                 :     119590 :                        && INTVAL (false_rtx) == - STORE_FLAG_VALUE
    5895                 :       9554 :                        && true_rtx == const0_rtx
    5896                 :     142027 :                        && ((reversed = reversed_comparison_code_parts
    5897                 :       8073 :                                         (cond_code, cond, cop1, NULL))
    5898                 :            :                            != UNKNOWN))
    5899                 :       8042 :                 x = simplify_gen_unary (NEG, mode,
    5900                 :            :                                         simplify_gen_relational (reversed,
    5901                 :            :                                                                  mode, VOIDmode,
    5902                 :            :                                                                  cond, cop1),
    5903                 :            :                                         mode);
    5904                 :            : 
    5905                 :     817656 :               code = GET_CODE (x);
    5906                 :     817656 :               op0_mode = VOIDmode;
    5907                 :            :             }
    5908                 :            :         }
    5909                 :            :     }
    5910                 :            : 
    5911                 :            :   /* First see if we can apply the inverse distributive law.  */
    5912                 :  126922000 :   if (code == PLUS || code == MINUS
    5913                 :  126922000 :       || code == AND || code == IOR || code == XOR)
    5914                 :            :     {
    5915                 :   26429000 :       x = apply_distributive_law (x);
    5916                 :   26429000 :       code = GET_CODE (x);
    5917                 :   26429000 :       op0_mode = VOIDmode;
    5918                 :            :     }
    5919                 :            : 
    5920                 :            :   /* If CODE is an associative operation not otherwise handled, see if we
    5921                 :            :      can associate some operands.  This can win if they are constants or
    5922                 :            :      if they are logically related (i.e. (a & b) & a).  */
    5923                 :  126922000 :   if ((code == PLUS || code == MINUS || code == MULT || code == DIV
    5924                 :  103731000 :        || code == AND || code == IOR || code == XOR
    5925                 :   97992500 :        || code == SMAX || code == SMIN || code == UMAX || code == UMIN)
    5926                 :   29123800 :       && ((INTEGRAL_MODE_P (mode) && code != DIV)
    5927                 :    2292690 :           || (flag_associative_math && FLOAT_MODE_P (mode))))
    5928                 :            :     {
    5929                 :   27406800 :       if (GET_CODE (XEXP (x, 0)) == code)
    5930                 :            :         {
    5931                 :    2157400 :           rtx other = XEXP (XEXP (x, 0), 0);
    5932                 :    2157400 :           rtx inner_op0 = XEXP (XEXP (x, 0), 1);
    5933                 :    2157400 :           rtx inner_op1 = XEXP (x, 1);
    5934                 :    2157400 :           rtx inner;
    5935                 :            : 
    5936                 :            :           /* Make sure we pass the constant operand if any as the second
    5937                 :            :              one if this is a commutative operation.  */
    5938                 :    2157400 :           if (CONSTANT_P (inner_op0) && COMMUTATIVE_ARITH_P (x))
    5939                 :          6 :             std::swap (inner_op0, inner_op1);
    5940                 :    4280090 :           inner = simplify_binary_operation (code == MINUS ? PLUS
    5941                 :    2122700 :                                              : code == DIV ? MULT
    5942                 :            :                                              : code,
    5943                 :            :                                              mode, inner_op0, inner_op1);
    5944                 :            : 
    5945                 :            :           /* For commutative operations, try the other pair if that one
    5946                 :            :              didn't simplify.  */
    5947                 :    2157400 :           if (inner == 0 && COMMUTATIVE_ARITH_P (x))
    5948                 :            :             {
    5949                 :    2118130 :               other = XEXP (XEXP (x, 0), 1);
    5950                 :    2118130 :               inner = simplify_binary_operation (code, mode,
    5951                 :            :                                                  XEXP (XEXP (x, 0), 0),
    5952                 :            :                                                  XEXP (x, 1));
    5953                 :            :             }
    5954                 :            : 
    5955                 :    2157400 :           if (inner)
    5956                 :     137460 :             return simplify_gen_binary (code, mode, other, inner);
    5957                 :            :         }
    5958                 :            :     }
    5959                 :            : 
    5960                 :            :   /* A little bit of algebraic simplification here.  */
    5961                 :  126785000 :   switch (code)
    5962                 :            :     {
    5963                 :   13490800 :     case MEM:
    5964                 :            :       /* Ensure that our address has any ASHIFTs converted to MULT in case
    5965                 :            :          address-recognizing predicates are called later.  */
    5966                 :   13490800 :       temp = make_compound_operation (XEXP (x, 0), MEM);
    5967                 :   13490800 :       SUBST (XEXP (x, 0), temp);
    5968                 :   13490800 :       break;
    5969                 :            : 
    5970                 :    4635190 :     case SUBREG:
    5971                 :    4635190 :       if (op0_mode == VOIDmode)
    5972                 :     133660 :         op0_mode = GET_MODE (SUBREG_REG (x));
    5973                 :            : 
    5974                 :            :       /* See if this can be moved to simplify_subreg.  */
    5975                 :    4635190 :       if (CONSTANT_P (SUBREG_REG (x))
    5976                 :       5047 :           && known_eq (subreg_lowpart_offset (mode, op0_mode), SUBREG_BYTE (x))
    5977                 :            :              /* Don't call gen_lowpart if the inner mode
    5978                 :            :                 is VOIDmode and we cannot simplify it, as SUBREG without
    5979                 :            :                 inner mode is invalid.  */
    5980                 :    4640240 :           && (GET_MODE (SUBREG_REG (x)) != VOIDmode
    5981                 :          0 :               || gen_lowpart_common (mode, SUBREG_REG (x))))
    5982                 :       5047 :         return gen_lowpart (mode, SUBREG_REG (x));
    5983                 :            : 
    5984                 :    4630140 :       if (GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_CC)
    5985                 :            :         break;
    5986                 :    4630140 :       {
    5987                 :    4630140 :         rtx temp;
    5988                 :    9260280 :         temp = simplify_subreg (mode, SUBREG_REG (x), op0_mode,
    5989                 :    4630140 :                                 SUBREG_BYTE (x));
    5990                 :    4630140 :         if (temp)
    5991                 :  127228000 :           return temp;
    5992                 :            : 
    5993                 :            :         /* If op is known to have all lower bits zero, the result is zero.  */
    5994                 :    4324760 :         scalar_int_mode int_mode, int_op0_mode;
    5995                 :    4324760 :         if (!in_dest
    5996                 :    3142570 :             && is_a <scalar_int_mode> (mode, &int_mode)
    5997                 :    3082660 :             && is_a <scalar_int_mode> (op0_mode, &int_op0_mode)
    5998                 :    3082660 :             && (GET_MODE_PRECISION (int_mode)
    5999                 :    3082660 :                 < GET_MODE_PRECISION (int_op0_mode))
    6000                 :    2798360 :             && known_eq (subreg_lowpart_offset (int_mode, int_op0_mode),
    6001                 :            :                          SUBREG_BYTE (x))
    6002                 :    2268680 :             && HWI_COMPUTABLE_MODE_P (int_op0_mode)
    6003                 :    2144020 :             && ((nonzero_bits (SUBREG_REG (x), int_op0_mode)
    6004                 :    2144020 :                  & GET_MODE_MASK (int_mode)) == 0)
    6005                 :    4333400 :             && !side_effects_p (SUBREG_REG (x)))
    6006                 :       8638 :           return CONST0_RTX (int_mode);
    6007                 :            :       }
    6008                 :            : 
    6009                 :            :       /* Don't change the mode of the MEM if that would change the meaning
    6010                 :            :          of the address.  */
    6011                 :    4316120 :       if (MEM_P (SUBREG_REG (x))
    6012                 :    4316120 :           && (MEM_VOLATILE_P (SUBREG_REG (x))
    6013                 :      28370 :               || mode_dependent_address_p (XEXP (SUBREG_REG (x), 0),
    6014                 :      42907 :                                            MEM_ADDR_SPACE (SUBREG_REG (x)))))
    6015                 :      13870 :         return gen_rtx_CLOBBER (mode, const0_rtx);
    6016                 :            : 
    6017                 :            :       /* Note that we cannot do any narrowing for non-constants since
    6018                 :            :          we might have been counting on using the fact that some bits were
    6019                 :            :          zero.  We now do this in the SET.  */
    6020                 :            : 
    6021                 :            :       break;
    6022                 :            : 
    6023                 :     295005 :     case NEG:
    6024                 :     295005 :       temp = expand_compound_operation (XEXP (x, 0));
    6025                 :            : 
    6026                 :            :       /* For C equal to the width of MODE minus 1, (neg (ashiftrt X C)) can be
    6027                 :            :          replaced by (lshiftrt X C).  This will convert
    6028                 :            :          (neg (sign_extract X 1 Y)) to (zero_extract X 1 Y).  */
    6029                 :            : 
    6030                 :     295005 :       if (GET_CODE (temp) == ASHIFTRT
    6031                 :       7289 :           && CONST_INT_P (XEXP (temp, 1))
    6032                 :     309535 :           && INTVAL (XEXP (temp, 1)) == GET_MODE_UNIT_PRECISION (mode) - 1)
    6033                 :          0 :         return simplify_shift_const (NULL_RTX, LSHIFTRT, mode, XEXP (temp, 0),
    6034                 :          0 :                                      INTVAL (XEXP (temp, 1)));
    6035                 :            : 
    6036                 :            :       /* If X has only a single bit that might be nonzero, say, bit I, convert
    6037                 :            :          (neg X) to (ashiftrt (ashift X C-I) C-I) where C is the bitsize of
    6038                 :            :          MODE minus 1.  This will convert (neg (zero_extract X 1 Y)) to
    6039                 :            :          (sign_extract X 1 Y).  But only do this if TEMP isn't a register
    6040                 :            :          or a SUBREG of one since we'd be making the expression more
    6041                 :            :          complex if it was just a register.  */
    6042                 :            : 
    6043                 :     295005 :       if (!REG_P (temp)
    6044                 :     140478 :           && ! (GET_CODE (temp) == SUBREG
    6045                 :      22232 :                 && REG_P (SUBREG_REG (temp)))
    6046                 :      87897 :           && is_a <scalar_int_mode> (mode, &int_mode)
    6047                 :     382902 :           && (i = exact_log2 (nonzero_bits (temp, int_mode))) >= 0)
    6048                 :            :         {
    6049                 :      34218 :           rtx temp1 = simplify_shift_const
    6050                 :      34218 :             (NULL_RTX, ASHIFTRT, int_mode,
    6051                 :            :              simplify_shift_const (NULL_RTX, ASHIFT, int_mode, temp,
    6052                 :      34218 :                                    GET_MODE_PRECISION (int_mode) - 1 - i),
    6053                 :      34218 :              GET_MODE_PRECISION (int_mode) - 1 - i);
    6054                 :            : 
    6055                 :            :           /* If all we did was surround TEMP with the two shifts, we
    6056                 :            :              haven't improved anything, so don't use it.  Otherwise,
    6057                 :            :              we are better off with TEMP1.  */
    6058                 :      34218 :           if (GET_CODE (temp1) != ASHIFTRT
    6059                 :      34138 :               || GET_CODE (XEXP (temp1, 0)) != ASHIFT
    6060                 :      34138 :               || XEXP (XEXP (temp1, 0), 0) != temp)
    6061                 :       2940 :             return temp1;
    6062                 :            :         }
    6063                 :            :       break;
    6064                 :            : 
    6065                 :     181652 :     case TRUNCATE:
    6066                 :            :       /* We can't handle truncation to a partial integer mode here
    6067                 :            :          because we don't know the real bitsize of the partial
    6068                 :            :          integer mode.  */
    6069                 :     181652 :       if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
    6070                 :            :         break;
    6071                 :            : 
    6072                 :     181652 :       if (HWI_COMPUTABLE_MODE_P (mode))
    6073                 :     176287 :         SUBST (XEXP (x, 0),
    6074                 :            :                force_to_mode (XEXP (x, 0), GET_MODE (XEXP (x, 0)),
    6075                 :            :                               GET_MODE_MASK (mode), 0));
    6076                 :            : 
    6077                 :            :       /* We can truncate a constant value and return it.  */
    6078                 :     181652 :       {
    6079                 :     181652 :         poly_int64 c;
    6080                 :     181652 :         if (poly_int_rtx_p (XEXP (x, 0), &c))
    6081                 :          0 :           return gen_int_mode (c, mode);
    6082                 :            :       }
    6083                 :            : 
    6084                 :            :       /* Similarly to what we do in simplify-rtx.c, a truncate of a register
    6085                 :            :          whose value is a comparison can be replaced with a subreg if
    6086                 :            :          STORE_FLAG_VALUE permits.  */
    6087                 :     181652 :       if (HWI_COMPUTABLE_MODE_P (mode)
    6088                 :     176287 :           && (STORE_FLAG_VALUE & ~GET_MODE_MASK (mode)) == 0
    6089                 :     176287 :           && (temp = get_last_value (XEXP (x, 0)))
    6090                 :          0 :           && COMPARISON_P (temp))
    6091                 :          0 :         return gen_lowpart (mode, XEXP (x, 0));
    6092                 :            :       break;
    6093                 :            : 
    6094                 :       3793 :     case CONST:
    6095                 :            :       /* (const (const X)) can become (const X).  Do it this way rather than
    6096                 :            :          returning the inner CONST since CONST can be shared with a
    6097                 :            :          REG_EQUAL note.  */
    6098                 :       3793 :       if (GET_CODE (XEXP (x, 0)) == CONST)
    6099                 :          0 :         SUBST (XEXP (x, 0), XEXP (XEXP (x, 0), 0));
    6100                 :            :       break;
    6101                 :            : 
    6102                 :            :     case LO_SUM:
    6103                 :            :       /* Convert (lo_sum (high FOO) FOO) to FOO.  This is necessary so we
    6104                 :            :          can add in an offset.  find_split_point will split this address up
    6105                 :            :          again if it doesn't match.  */
    6106                 :            :       if (HAVE_lo_sum && GET_CODE (XEXP (x, 0)) == HIGH
    6107                 :            :           && rtx_equal_p (XEXP (XEXP (x, 0), 0), XEXP (x, 1)))
    6108                 :            :         return XEXP (x, 1);
    6109                 :            :       break;
    6110                 :            : 
    6111                 :   18627300 :     case PLUS:
    6112                 :            :       /* (plus (xor (and <foo> (const_int pow2 - 1)) <c>) <-c>)
    6113                 :            :          when c is (const_int (pow2 + 1) / 2) is a sign extension of a
    6114                 :            :          bit-field and can be replaced by either a sign_extend or a
    6115                 :            :          sign_extract.  The `and' may be a zero_extend and the two
    6116                 :            :          <c>, -<c> constants may be reversed.  */
    6117                 :   18627300 :       if (GET_CODE (XEXP (x, 0)) == XOR
    6118                 :   18627300 :           && is_a <scalar_int_mode> (mode, &int_mode)
    6119                 :       7327 :           && CONST_INT_P (XEXP (x, 1))
    6120                 :       1923 :           && CONST_INT_P (XEXP (XEXP (x, 0), 1))
    6121                 :       1016 :           && INTVAL (XEXP (x, 1)) == -INTVAL (XEXP (XEXP (x, 0), 1))
    6122                 :        120 :           && ((i = exact_log2 (UINTVAL (XEXP (XEXP (x, 0), 1)))) >= 0
    6123                 :         88 :               || (i = exact_log2 (UINTVAL (XEXP (x, 1)))) >= 0)
    6124                 :         82 :           && HWI_COMPUTABLE_MODE_P (int_mode)
    6125                 :   18627400 :           && ((GET_CODE (XEXP (XEXP (x, 0), 0)) == AND
    6126                 :          0 :                && CONST_INT_P (XEXP (XEXP (XEXP (x, 0), 0), 1))
    6127                 :          0 :                && (UINTVAL (XEXP (XEXP (XEXP (x, 0), 0), 1))
    6128                 :          0 :                    == (HOST_WIDE_INT_1U << (i + 1)) - 1))
    6129                 :         82 :               || (GET_CODE (XEXP (XEXP (x, 0), 0)) == ZERO_EXTEND
    6130                 :          0 :                   && known_eq ((GET_MODE_PRECISION
    6131                 :            :                                 (GET_MODE (XEXP (XEXP (XEXP (x, 0), 0), 0)))),
    6132                 :            :                                (unsigned int) i + 1))))
    6133                 :          0 :         return simplify_shift_const
    6134                 :          0 :           (NULL_RTX, ASHIFTRT, int_mode,
    6135                 :            :            simplify_shift_const (NULL_RTX, ASHIFT, int_mode,
    6136                 :            :                                  XEXP (XEXP (XEXP (x, 0), 0), 0),
    6137                 :          0 :                                  GET_MODE_PRECISION (int_mode) - (i + 1)),
    6138                 :          0 :            GET_MODE_PRECISION (int_mode) - (i + 1));
    6139                 :            : 
    6140                 :            :       /* If only the low-order bit of X is possibly nonzero, (plus x -1)
    6141                 :            :          can become (ashiftrt (ashift (xor x 1) C) C) where C is
    6142                 :            :          the bitsize of the mode - 1.  This allows simplification of
    6143                 :            :          "a = (b & 8) == 0;"  */
    6144                 :   18627300 :       if (XEXP (x, 1) == constm1_rtx
    6145                 :     356265 :           && !REG_P (XEXP (x, 0))
    6146                 :     163866 :           && ! (GET_CODE (XEXP (x, 0)) == SUBREG
    6147                 :      13191 :                 && REG_P (SUBREG_REG (XEXP (x, 0))))
    6148                 :     152318 :           && is_a <scalar_int_mode> (mode, &int_mode)
    6149                 :   18779600 :           && nonzero_bits (XEXP (x, 0), int_mode) == 1)
    6150                 :       5557 :         return simplify_shift_const
    6151                 :       5557 :           (NULL_RTX, ASHIFTRT, int_mode,
    6152                 :            :            simplify_shift_const (NULL_RTX, ASHIFT, int_mode,
    6153                 :            :                                  gen_rtx_XOR (int_mode, XEXP (x, 0),
    6154                 :            :                                               const1_rtx),
    6155                 :       5557 :                                  GET_MODE_PRECISION (int_mode) - 1),
    6156                 :      11114 :            GET_MODE_PRECISION (int_mode) - 1);
    6157                 :            : 
    6158                 :            :       /* If we are adding two things that have no bits in common, convert
    6159                 :            :          the addition into an IOR.  This will often be further simplified,
    6160                 :            :          for example in cases like ((a & 1) + (a & 2)), which can
    6161                 :            :          become a & 3.  */
    6162                 :            : 
    6163                 :   18621700 :       if (HWI_COMPUTABLE_MODE_P (mode)
    6164                 :   17277400 :           && (nonzero_bits (XEXP (x, 0), mode)
    6165                 :   17277400 :               & nonzero_bits (XEXP (x, 1), mode)) == 0)
    6166                 :            :         {
    6167                 :            :           /* Try to simplify the expression further.  */
    6168                 :     158359 :           rtx tor = simplify_gen_binary (IOR, mode, XEXP (x, 0), XEXP (x, 1));
    6169                 :     158359 :           temp = combine_simplify_rtx (tor, VOIDmode, in_dest, 0);
    6170                 :            : 
    6171                 :            :           /* If we could, great.  If not, do not go ahead with the IOR
    6172                 :            :              replacement, since PLUS appears in many special purpose
    6173                 :            :              address arithmetic instructions.  */
    6174                 :     158359 :           if (GET_CODE (temp) != CLOBBER
    6175                 :     158359 :               && (GET_CODE (temp) != IOR
    6176                 :     156735 :                   || ((XEXP (temp, 0) != XEXP (x, 0)
    6177                 :     156405 :                        || XEXP (temp, 1) != XEXP (x, 1))
    6178                 :        330 :                       && (XEXP (temp, 0) != XEXP (x, 1)
    6179                 :          0 :                           || XEXP (temp, 1) != XEXP (x, 0)))))
    6180                 :            :             return temp;
    6181                 :            :         }
    6182                 :            : 
    6183                 :            :       /* Canonicalize x + x into x << 1.  */
    6184                 :   18619800 :       if (GET_MODE_CLASS (mode) == MODE_INT
    6185                 :   17407500 :           && rtx_equal_p (XEXP (x, 0), XEXP (x, 1))
    6186                 :   18620500 :           && !side_effects_p (XEXP (x, 0)))
    6187                 :        687 :         return simplify_gen_binary (ASHIFT, mode, XEXP (x, 0), const1_rtx);
    6188                 :            : 
    6189                 :            :       break;
    6190                 :            : 
    6191                 :    2210020 :     case MINUS:
    6192                 :            :       /* (minus <foo> (and <foo> (const_int -pow2))) becomes
    6193                 :            :          (and <foo> (const_int pow2-1))  */
    6194                 :    2210020 :       if (is_a <scalar_int_mode> (mode, &int_mode)
    6195                 :    1745670 :           && GET_CODE (XEXP (x, 1)) == AND
    6196                 :      77651 :           && CONST_INT_P (XEXP (XEXP (x, 1), 1))
    6197                 :      77237 :           && pow2p_hwi (-UINTVAL (XEXP (XEXP (x, 1), 1)))
    6198                 :      51460 :           && rtx_equal_p (XEXP (XEXP (x, 1), 0), XEXP (x, 0)))
    6199                 :          0 :         return simplify_and_const_int (NULL_RTX, int_mode, XEXP (x, 0),
    6200                 :          0 :                                        -INTVAL (XEXP (XEXP (x, 1), 1)) - 1);
    6201                 :            :       break;
    6202                 :            : 
    6203                 :    2216870 :     case MULT:
    6204                 :            :       /* If we have (mult (plus A B) C), apply the distributive law and then
    6205                 :            :          the inverse distributive law to see if things simplify.  This
    6206                 :            :          occurs mostly in addresses, often when unrolling loops.  */
    6207                 :            : 
    6208                 :    2216870 :       if (GET_CODE (XEXP (x, 0)) == PLUS)
    6209                 :            :         {
    6210                 :     125447 :           rtx result = distribute_and_simplify_rtx (x, 0);
    6211                 :     125447 :           if (result)
    6212                 :            :             return result;
    6213                 :            :         }
    6214                 :            : 
    6215                 :            :       /* Try simplify a*(b/c) as (a*b)/c.  */
    6216                 :    2216260 :       if (FLOAT_MODE_P (mode) && flag_associative_math
    6217                 :     228334 :           && GET_CODE (XEXP (x, 0)) == DIV)
    6218                 :            :         {
    6219                 :        263 :           rtx tem = simplify_binary_operation (MULT, mode,
    6220                 :            :                                                XEXP (XEXP (x, 0), 0),
    6221                 :            :                                                XEXP (x, 1));
    6222                 :        263 :           if (tem)
    6223                 :         34 :             return simplify_gen_binary (DIV, mode, tem, XEXP (XEXP (x, 0), 1));
    6224                 :            :         }
    6225                 :            :       break;
    6226                 :            : 
    6227                 :     101594 :     case UDIV:
    6228                 :            :       /* If this is a divide by a power of two, treat it as a shift if
    6229                 :            :          its first operand is a shift.  */
    6230                 :     101594 :       if (is_a <scalar_int_mode> (mode, &int_mode)
    6231                 :     101594 :           && CONST_INT_P (XEXP (x, 1))
    6232                 :        791 :           && (i = exact_log2 (UINTVAL (XEXP (x, 1)))) >= 0
    6233                 :          0 :           && (GET_CODE (XEXP (x, 0)) == ASHIFT
    6234                 :          0 :               || GET_CODE (XEXP (x, 0)) == LSHIFTRT
    6235                 :          0 :               || GET_CODE (XEXP (x, 0)) == ASHIFTRT
    6236                 :          0 :               || GET_CODE (XEXP (x, 0)) == ROTATE
    6237                 :          0 :               || GET_CODE (XEXP (x, 0)) == ROTATERT))
    6238                 :          0 :         return simplify_shift_const (NULL_RTX, LSHIFTRT, int_mode,
    6239                 :          0 :                                      XEXP (x, 0), i);
    6240                 :            :       break;
    6241                 :            : 
    6242                 :   10480400 :     case EQ:  case NE:
    6243                 :   10480400 :     case GT:  case GTU:  case GE:  case GEU:
    6244                 :   10480400 :     case LT:  case LTU:  case LE:  case LEU:
    6245                 :   10480400 :     case UNEQ:  case LTGT:
    6246                 :   10480400 :     case UNGT:  case UNGE:
    6247                 :   10480400 :     case UNLT:  case UNLE:
    6248                 :   10480400 :     case UNORDERED: case ORDERED:
    6249                 :            :       /* If the first operand is a condition code, we can't do anything
    6250                 :            :          with it.  */
    6251                 :   10480400 :       if (GET_CODE (XEXP (x, 0)) == COMPARE
    6252                 :   10480400 :           || (GET_MODE_CLASS (GET_MODE (XEXP (x, 0))) != MODE_CC
    6253                 :            :               && ! CC0_P (XEXP (x, 0))))
    6254                 :            :         {
    6255                 :    7655570 :           rtx op0 = XEXP (x, 0);
    6256                 :    7655570 :           rtx op1 = XEXP (x, 1);
    6257                 :    7655570 :           enum rtx_code new_code;
    6258                 :            : 
    6259                 :    7655570 :           if (GET_CODE (op0) == COMPARE)
    6260                 :          0 :             op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
    6261                 :            : 
    6262                 :            :           /* Simplify our comparison, if possible.  */
    6263                 :    7655570 :           new_code = simplify_comparison (code, &op0, &op1);
    6264                 :            : 
    6265                 :            :           /* If STORE_FLAG_VALUE is 1, we can convert (ne x 0) to simply X
    6266                 :            :              if only the low-order bit is possibly nonzero in X (such as when
    6267                 :            :              X is a ZERO_EXTRACT of one bit).  Similarly, we can convert EQ to
    6268                 :            :              (xor X 1) or (minus 1 X); we use the former.  Finally, if X is
    6269                 :            :              known to be either 0 or -1, NE becomes a NEG and EQ becomes
    6270                 :            :              (plus X 1).
    6271                 :            : 
    6272                 :            :              Remove any ZERO_EXTRACT we made when thinking this was a
    6273                 :            :              comparison.  It may now be simpler to use, e.g., an AND.  If a
    6274                 :            :              ZERO_EXTRACT is indeed appropriate, it will be placed back by
    6275                 :            :              the call to make_compound_operation in the SET case.
    6276                 :            : 
    6277                 :            :              Don't apply these optimizations if the caller would
    6278                 :            :              prefer a comparison rather than a value.
    6279                 :            :              E.g., for the condition in an IF_THEN_ELSE most targets need
    6280                 :            :              an explicit comparison.  */
    6281                 :            : 
    6282                 :    7655570 :           if (in_cond)
    6283                 :            :             ;
    6284                 :            : 
    6285                 :    1113590 :           else if (STORE_FLAG_VALUE == 1
    6286                 :            :                    && new_code == NE
    6287                 :    1319890 :                    && is_int_mode (mode, &int_mode)
    6288                 :     206434 :                    && op1 == const0_rtx
    6289                 :     102353 :                    && int_mode == GET_MODE (op0)
    6290                 :    1141770 :                    && nonzero_bits (op0, int_mode) == 1)
    6291                 :        132 :             return gen_lowpart (int_mode,
    6292                 :     201017 :                                 expand_compound_operation (op0));
    6293                 :            : 
    6294                 :    1113460 :           else if (STORE_FLAG_VALUE == 1
    6295                 :            :                    && new_code == NE
    6296                 :    1319320 :                    && is_int_mode (mode, &int_mode)
    6297                 :     206302 :                    && op1 == const0_rtx
    6298                 :     102221 :                    && int_mode == GET_MODE (op0)
    6299                 :    1141500 :                    && (num_sign_bit_copies (op0, int_mode)
    6300                 :      28046 :                        == GET_MODE_PRECISION (int_mode)))
    6301                 :            :             {
    6302                 :        440 :               op0 = expand_compound_operation (op0);
    6303                 :        440 :               return simplify_gen_unary (NEG, int_mode,
    6304                 :        440 :                                          gen_lowpart (int_mode, op0),
    6305                 :        440 :                                          int_mode);
    6306                 :            :             }
    6307                 :            : 
    6308                 :    1113020 :           else if (STORE_FLAG_VALUE == 1
    6309                 :            :                    && new_code == EQ
    6310                 :    1291150 :                    && is_int_mode (mode, &int_mode)
    6311                 :     180290 :                    && op1 == const0_rtx
    6312                 :     110873 :                    && int_mode == GET_MODE (op0)
    6313                 :    1171850 :                    && nonzero_bits (op0, int_mode) == 1)
    6314                 :            :             {
    6315                 :       2161 :               op0 = expand_compound_operation (op0);
    6316                 :       2161 :               return simplify_gen_binary (XOR, int_mode,
    6317                 :       2161 :                                           gen_lowpart (int_mode, op0),
    6318                 :       2161 :                                           const1_rtx);
    6319                 :            :             }
    6320                 :            : 
    6321                 :    1110860 :           else if (STORE_FLAG_VALUE == 1
    6322                 :            :                    && new_code == EQ
    6323                 :    7830850 :                    && is_int_mode (mode, &int_mode)
    6324                 :     178129 :                    && op1 == const0_rtx
    6325                 :     108712 :                    && int_mode == GET_MODE (op0)
    6326                 :    1167530 :                    && (num_sign_bit_copies (op0, int_mode)
    6327                 :      56671 :                        == GET_MODE_PRECISION (int_mode)))
    6328                 :            :             {
    6329                 :        117 :               op0 = expand_compound_operation (op0);
    6330                 :        117 :               return plus_constant (int_mode, gen_lowpart (int_mode, op0), 1);
    6331                 :            :             }
    6332                 :            : 
    6333                 :            :           /* If STORE_FLAG_VALUE is -1, we have cases similar to
    6334                 :            :              those above.  */
    6335                 :    7652720 :           if (in_cond)
    6336                 :            :             ;
    6337                 :            : 
    6338                 :            :           else if (STORE_FLAG_VALUE == -1
    6339                 :            :                    && new_code == NE
    6340                 :            :                    && is_int_mode (mode, &int_mode)
    6341                 :            :                    && op1 == const0_rtx
    6342                 :            :                    && int_mode == GET_MODE (op0)
    6343                 :            :                    && (num_sign_bit_copies (op0, int_mode)
    6344                 :            :                        == GET_MODE_PRECISION (int_mode)))
    6345                 :            :             return gen_lowpart (int_mode, expand_compound_operation (op0));
    6346                 :            : 
    6347                 :            :           else if (STORE_FLAG_VALUE == -1
    6348                 :            :                    && new_code == NE
    6349                 :            :                    && is_int_mode (mode, &int_mode)
    6350                 :            :                    && op1 == const0_rtx
    6351                 :            :                    && int_mode == GET_MODE (op0)
    6352                 :            :                    && nonzero_bits (op0, int_mode) == 1)
    6353                 :            :             {
    6354                 :            :               op0 = expand_compound_operation (op0);
    6355                 :            :               return simplify_gen_unary (NEG, int_mode,
    6356                 :            :                                          gen_lowpart (int_mode, op0),
    6357                 :            :                                          int_mode);
    6358                 :            :             }
    6359                 :            : 
    6360                 :            :           else if (STORE_FLAG_VALUE == -1
    6361                 :            :                    && new_code == EQ
    6362                 :            :                    && is_int_mode (mode, &int_mode)
    6363                 :            :                    && op1 == const0_rtx
    6364                 :            :                    && int_mode == GET_MODE (op0)
    6365                 :            :                    && (num_sign_bit_copies (op0, int_mode)
    6366                 :            :                        == GET_MODE_PRECISION (int_mode)))
    6367                 :            :             {
    6368                 :            :               op0 = expand_compound_operation (op0);
    6369                 :            :               return simplify_gen_unary (NOT, int_mode,
    6370                 :            :                                          gen_lowpart (int_mode, op0),
    6371                 :            :                                          int_mode);
    6372                 :            :             }
    6373                 :            : 
    6374                 :            :           /* If X is 0/1, (eq X 0) is X-1.  */
    6375                 :            :           else if (STORE_FLAG_VALUE == -1
    6376                 :            :                    && new_code == EQ
    6377                 :            :                    && is_int_mode (mode, &int_mode)
    6378                 :            :                    && op1 == const0_rtx
    6379                 :            :                    && int_mode == GET_MODE (op0)
    6380                 :            :                    && nonzero_bits (op0, int_mode) == 1)
    6381                 :            :             {
    6382                 :            :               op0 = expand_compound_operation (op0);
    6383                 :            :               return plus_constant (int_mode, gen_lowpart (int_mode, op0), -1);
    6384                 :            :             }
    6385                 :            : 
    6386                 :            :           /* If STORE_FLAG_VALUE says to just test the sign bit and X has just
    6387                 :            :              one bit that might be nonzero, we can convert (ne x 0) to
    6388                 :            :              (ashift x c) where C puts the bit in the sign bit.  Remove any
    6389                 :            :              AND with STORE_FLAG_VALUE when we are done, since we are only
    6390                 :            :              going to test the sign bit.  */
    6391                 :    7652720 :           if (new_code == NE
    6392                 :    7855960 :               && is_int_mode (mode, &int_mode)
    6393                 :     205917 :               && HWI_COMPUTABLE_MODE_P (int_mode)
    6394                 :     203232 :               && val_signbit_p (int_mode, STORE_FLAG_VALUE)
    6395                 :          0 :               && op1 == const0_rtx
    6396                 :          0 :               && int_mode == GET_MODE (op0)
    6397                 :    7652720 :               && (i = exact_log2 (nonzero_bits (op0, int_mode))) >= 0)
    6398                 :            :             {
    6399                 :          0 :               x = simplify_shift_const (NULL_RTX, ASHIFT, int_mode,
    6400                 :            :                                         expand_compound_operation (op0),
    6401                 :          0 :                                         GET_MODE_PRECISION (int_mode) - 1 - i);
    6402                 :          0 :               if (GET_CODE (x) == AND && XEXP (x, 1) == const_true_rtx)
    6403                 :          0 :                 return XEXP (x, 0);
    6404                 :            :               else
    6405                 :            :                 return x;
    6406                 :            :             }
    6407                 :            : 
    6408                 :            :           /* If the code changed, return a whole new comparison.
    6409                 :            :              We also need to avoid using SUBST in cases where
    6410                 :            :              simplify_comparison has widened a comparison with a CONST_INT,
    6411                 :            :              since in that case the wider CONST_INT may fail the sanity
    6412                 :            :              checks in do_SUBST.  */
    6413                 :    7652720 :           if (new_code != code
    6414                 :    7460380 :               || (CONST_INT_P (op1)
    6415                 :    4528220 :                   && GET_MODE (op0) != GET_MODE (XEXP (x, 0))
    6416                 :       6928 :                   && GET_MODE (op0) != GET_MODE (XEXP (x, 1))))
    6417                 :     198167 :             return gen_rtx_fmt_ee (new_code, mode, op0, op1);
    6418                 :            : 
    6419                 :            :           /* Otherwise, keep this operation, but maybe change its operands.
    6420                 :            :              This also converts (ne (compare FOO BAR) 0) to (ne FOO BAR).  */
    6421                 :    7454560 :           SUBST (XEXP (x, 0), op0);
    6422                 :    7454560 :           SUBST (XEXP (x, 1), op1);
    6423                 :            :         }
    6424                 :            :       break;
    6425                 :            : 
    6426                 :    7990810 :     case IF_THEN_ELSE:
    6427                 :    7990810 :       return simplify_if_then_else (x);
    6428                 :            : 
    6429                 :    2529370 :     case ZERO_EXTRACT:
    6430                 :    2529370 :     case SIGN_EXTRACT:
    6431                 :    2529370 :     case ZERO_EXTEND:
    6432                 :    2529370 :     case SIGN_EXTEND:
    6433                 :            :       /* If we are processing SET_DEST, we are done.  */
    6434                 :    2529370 :       if (in_dest)
    6435                 :            :         return x;
    6436                 :            : 
    6437                 :    2526350 :       return expand_compound_operation (x);
    6438                 :            : 
    6439                 :   26807800 :     case SET:
    6440                 :   26807800 :       return simplify_set (x);
    6441                 :            : 
    6442                 :    4850920 :     case AND:
    6443                 :    4850920 :     case IOR:
    6444                 :    4850920 :       return simplify_logical (x);
    6445                 :            : 
    6446                 :    8598830 :     case ASHIFT:
    6447                 :    8598830 :     case LSHIFTRT:
    6448                 :    8598830 :     case ASHIFTRT:
    6449                 :    8598830 :     case ROTATE:
    6450                 :    8598830 :     case ROTATERT:
    6451                 :            :       /* If this is a shift by a constant amount, simplify it.  */
    6452                 :    8598830 :       if (CONST_INT_P (XEXP (x, 1)))
    6453                 :    8269340 :         return simplify_shift_const (x, code, mode, XEXP (x, 0),
    6454                 :    8269340 :                                      INTVAL (XEXP (x, 1)));
    6455                 :            : 
    6456                 :            :       else if (SHIFT_COUNT_TRUNCATED && !REG_P (XEXP (x, 1)))
    6457                 :            :         SUBST (XEXP (x, 1),
    6458                 :            :                force_to_mode (XEXP (x, 1), GET_MODE (XEXP (x, 1)),
    6459                 :            :                               (HOST_WIDE_INT_1U
    6460                 :            :                                << exact_log2 (GET_MODE_UNIT_BITSIZE
    6461                 :            :                                               (GET_MODE (x))))
    6462                 :            :                               - 1,
    6463                 :            :                               0));
    6464                 :            :       break;
    6465                 :            : 
    6466                 :            :     default:
    6467                 :            :       break;
    6468                 :            :     }
    6469                 :            : 
    6470                 :            :   return x;
    6471                 :            : }
    6472                 :            : 
    6473                 :            : /* Simplify X, an IF_THEN_ELSE expression.  Return the new expression.  */
    6474                 :            : 
    6475                 :            : static rtx
    6476                 :    7990810 : simplify_if_then_else (rtx x)
    6477                 :            : {
    6478                 :    7990810 :   machine_mode mode = GET_MODE (x);
    6479                 :    7990810 :   rtx cond = XEXP (x, 0);
    6480                 :    7990810 :   rtx true_rtx = XEXP (x, 1);
    6481                 :    7990810 :   rtx false_rtx = XEXP (x, 2);
    6482                 :    7990810 :   enum rtx_code true_code = GET_CODE (cond);
    6483                 :    7990810 :   int comparison_p = COMPARISON_P (cond);
    6484                 :    7990810 :   rtx temp;
    6485                 :    7990810 :   int i;
    6486                 :    7990810 :   enum rtx_code false_code;
    6487                 :    7990810 :   rtx reversed;
    6488                 :    7990810 :   scalar_int_mode int_mode, inner_mode;
    6489                 :            : 
    6490                 :            :   /* Simplify storing of the truth value.  */
    6491                 :    7990810 :   if (comparison_p && true_rtx == const_true_rtx && false_rtx == const0_rtx)
    6492                 :          0 :     return simplify_gen_relational (true_code, mode, VOIDmode,
    6493                 :          0 :                                     XEXP (cond, 0), XEXP (cond, 1));
    6494                 :            : 
    6495                 :            :   /* Also when the truth value has to be reversed.  */
    6496                 :    7990810 :   if (comparison_p
    6497                 :    7990700 :       && true_rtx == const0_rtx && false_rtx == const_true_rtx
    6498                 :    7990810 :       && (reversed = reversed_comparison (cond, mode)))
    6499                 :            :     return reversed;
    6500                 :            : 
    6501                 :            :   /* Sometimes we can simplify the arm of an IF_THEN_ELSE if a register used
    6502                 :            :      in it is being compared against certain values.  Get the true and false
    6503                 :            :      comparisons and see if that says anything about the value of each arm.  */
    6504                 :            : 
    6505                 :    7990810 :   if (comparison_p
    6506                 :    7990700 :       && ((false_code = reversed_comparison_code (cond, NULL))
    6507                 :            :           != UNKNOWN)
    6508                 :   15881400 :       && REG_P (XEXP (cond, 0)))
    6509                 :            :     {
    6510                 :    4990780 :       HOST_WIDE_INT nzb;
    6511                 :    4990780 :       rtx from = XEXP (cond, 0);
    6512                 :    4990780 :       rtx true_val = XEXP (cond, 1);
    6513                 :    4990780 :       rtx false_val = true_val;
    6514                 :    4990780 :       int swapped = 0;
    6515                 :            : 
    6516                 :            :       /* If FALSE_CODE is EQ, swap the codes and arms.  */
    6517                 :            : 
    6518                 :    4990780 :       if (false_code == EQ)
    6519                 :            :         {
    6520                 :    1642310 :           swapped = 1, true_code = EQ, false_code = NE;
    6521                 :    1642310 :           std::swap (true_rtx, false_rtx);
    6522                 :            :         }
    6523                 :            : 
    6524                 :    4990780 :       scalar_int_mode from_mode;
    6525                 :    4990780 :       if (is_a <scalar_int_mode> (GET_MODE (from), &from_mode))
    6526                 :            :         {
    6527                 :            :           /* If we are comparing against zero and the expression being
    6528                 :            :              tested has only a single bit that might be nonzero, that is
    6529                 :            :              its value when it is not equal to zero.  Similarly if it is
    6530                 :            :              known to be -1 or 0.  */
    6531                 :    3848260 :           if (true_code == EQ
    6532                 :    2746190 :               && true_val == const0_rtx
    6533                 :    5093860 :               && pow2p_hwi (nzb = nonzero_bits (from, from_mode)))
    6534                 :            :             {
    6535                 :     149473 :               false_code = EQ;
    6536                 :     149473 :               false_val = gen_int_mode (nzb, from_mode);
    6537                 :            :             }
    6538                 :    3698790 :           else if (true_code == EQ
    6539                 :    2596720 :                    && true_val == const0_rtx
    6540                 :    4794920 :                    && (num_sign_bit_copies (from, from_mode)
    6541                 :    1096130 :                        == GET_MODE_PRECISION (from_mode)))
    6542                 :            :             {
    6543                 :       1025 :               false_code = EQ;
    6544                 :       1025 :               false_val = constm1_rtx;
    6545                 :            :             }
    6546                 :            :         }
    6547                 :            : 
    6548                 :            :       /* Now simplify an arm if we know the value of the register in the
    6549                 :            :          branch and it is used in the arm.  Be careful due to the potential
    6550                 :            :          of locally-shared RTL.  */
    6551                 :            : 
    6552                 :    4990780 :       if (reg_mentioned_p (from, true_rtx))
    6553                 :     357772 :         true_rtx = subst (known_cond (copy_rtx (true_rtx), true_code,
    6554                 :            :                                       from, true_val),
    6555                 :            :                           pc_rtx, pc_rtx, 0, 0, 0);
    6556                 :    4990780 :       if (reg_mentioned_p (from, false_rtx))
    6557                 :      88827 :         false_rtx = subst (known_cond (copy_rtx (false_rtx), false_code,
    6558                 :            :                                        from, false_val),
    6559                 :            :                            pc_rtx, pc_rtx, 0, 0, 0);
    6560                 :            : 
    6561                 :    8339250 :       SUBST (XEXP (x, 1), swapped ? false_rtx : true_rtx);
    6562                 :    8339250 :       SUBST (XEXP (x, 2), swapped ? true_rtx : false_rtx);
    6563                 :            : 
    6564                 :    4990780 :       true_rtx = XEXP (x, 1);
    6565                 :    4990780 :       false_rtx = XEXP (x, 2);
    6566                 :    4990780 :       true_code = GET_CODE (cond);
    6567                 :            :     }
    6568                 :            : 
    6569                 :            :   /* If we have (if_then_else FOO (pc) (label_ref BAR)) and FOO can be
    6570                 :            :      reversed, do so to avoid needing two sets of patterns for
    6571                 :            :      subtract-and-branch insns.  Similarly if we have a constant in the true
    6572                 :            :      arm, the false arm is the same as the first operand of the comparison, or
    6573                 :            :      the false arm is more complicated than the true arm.  */
    6574                 :            : 
    6575                 :    7990810 :   if (comparison_p
    6576                 :    7990700 :       && reversed_comparison_code (cond, NULL) != UNKNOWN
    6577                 :   15881400 :       && (true_rtx == pc_rtx
    6578                 :    7890610 :           || (CONSTANT_P (true_rtx)
    6579                 :    6287330 :               && !CONST_INT_P (false_rtx) && false_rtx != pc_rtx)
    6580                 :    7866450 :           || true_rtx == const0_rtx
    6581                 :    7866050 :           || (OBJECT_P (true_rtx) && !OBJECT_P (false_rtx))
    6582                 :    7844050 :           || (GET_CODE (true_rtx) == SUBREG && OBJECT_P (SUBREG_REG (true_rtx))
    6583                 :      13889 :               && !OBJECT_P (false_rtx))
    6584                 :    7839110 :           || reg_mentioned_p (true_rtx, false_rtx)
    6585                 :    7839060 :           || rtx_equal_p (false_rtx, XEXP (cond, 0))))
    6586                 :            :     {
    6587                 :      67232 :       SUBST (XEXP (x, 0), reversed_comparison (cond, GET_MODE (cond)));
    6588                 :      67232 :       SUBST (XEXP (x, 1), false_rtx);
    6589                 :      67232 :       SUBST (XEXP (x, 2), true_rtx);
    6590                 :            : 
    6591                 :      67232 :       std::swap (true_rtx, false_rtx);
    6592                 :      67232 :       cond = XEXP (x, 0);
    6593                 :            : 
    6594                 :            :       /* It is possible that the conditional has been simplified out.  */
    6595                 :      67232 :       true_code = GET_CODE (cond);
    6596                 :      67232 :       comparison_p = COMPARISON_P (cond);
    6597                 :            :     }
    6598                 :            : 
    6599                 :            :   /* If the two arms are identical, we don't need the comparison.  */
    6600                 :            : 
    6601                 :    7990810 :   if (rtx_equal_p (true_rtx, false_rtx) && ! side_effects_p (cond))
    6602                 :            :     return true_rtx;
    6603                 :            : 
    6604                 :            :   /* Convert a == b ? b : a to "a".  */
    6605                 :    2183900 :   if (true_code == EQ && ! side_effects_p (cond)
    6606                 :    2174330 :       && !HONOR_NANS (mode)
    6607                 :    2113680 :       && rtx_equal_p (XEXP (cond, 0), false_rtx)
    6608                 :    7991040 :       && rtx_equal_p (XEXP (cond, 1), true_rtx))
    6609                 :            :     return false_rtx;
    6610                 :    2715090 :   else if (true_code == NE && ! side_effects_p (cond)
    6611                 :    2681100 :            && !HONOR_NANS (mode)
    6612                 :    2668240 :            && rtx_equal_p (XEXP (cond, 0), true_rtx)
    6613                 :    8070690 :            && rtx_equal_p (XEXP (cond, 1), false_rtx))
    6614                 :            :     return true_rtx;
    6615                 :            : 
    6616                 :            :   /* Look for cases where we have (abs x) or (neg (abs X)).  */
    6617                 :            : 
    6618                 :    7990810 :   if (GET_MODE_CLASS (mode) == MODE_INT
    6619                 :    1597840 :       && comparison_p
    6620                 :    1597820 :       && XEXP (cond, 1) == const0_rtx
    6621                 :    1289960 :       && GET_CODE (false_rtx) == NEG
    6622                 :          2 :       && rtx_equal_p (true_rtx, XEXP (false_rtx, 0))
    6623                 :          0 :       && rtx_equal_p (true_rtx, XEXP (cond, 0))
    6624                 :    7990810 :       && ! side_effects_p (true_rtx))
    6625                 :          0 :     switch (true_code)
    6626                 :            :       {
    6627                 :          0 :       case GT:
    6628                 :          0 :       case GE:
    6629                 :          0 :         return simplify_gen_unary (ABS, mode, true_rtx, mode);
    6630                 :          0 :       case LT:
    6631                 :          0 :       case LE:
    6632                 :          0 :         return
    6633                 :          0 :           simplify_gen_unary (NEG, mode,
    6634                 :            :                               simplify_gen_unary (ABS, mode, true_rtx, mode),
    6635                 :          0 :                               mode);
    6636                 :            :       default:
    6637                 :            :         break;
    6638                 :            :       }
    6639                 :            : 
    6640                 :            :   /* Look for MIN or MAX.  */
    6641                 :            : 
    6642                 :    7990810 :   if ((! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
    6643                 :    7912570 :       && comparison_p
    6644                 :    7912530 :       && rtx_equal_p (XEXP (cond, 0), true_rtx)
    6645                 :     283099 :       && rtx_equal_p (XEXP (cond, 1), false_rtx)
    6646                 :    8085140 :       && ! side_effects_p (cond))
    6647                 :      94316 :     switch (true_code)
    6648                 :            :       {
    6649                 :      37858 :       case GE:
    6650                 :      37858 :       case GT:
    6651                 :      37858 :         return simplify_gen_binary (SMAX, mode, true_rtx, false_rtx);
    6652                 :      26555 :       case LE:
    6653                 :      26555 :       case LT:
    6654                 :      26555 :         return simplify_gen_binary (SMIN, mode, true_rtx, false_rtx);
    6655                 :       4308 :       case GEU:
    6656                 :       4308 :       case GTU:
    6657                 :       4308 :         return simplify_gen_binary (UMAX, mode, true_rtx, false_rtx);
    6658                 :      25595 :       case LEU:
    6659                 :      25595 :       case LTU:
    6660                 :      25595 :         return simplify_gen_binary (UMIN, mode, true_rtx, false_rtx);
    6661                 :            :       default:
    6662                 :            :         break;
    6663                 :            :       }
    6664                 :            : 
    6665                 :            :   /* If we have (if_then_else COND (OP Z C1) Z) and OP is an identity when its
    6666                 :            :      second operand is zero, this can be done as (OP Z (mult COND C2)) where
    6667                 :            :      C2 = C1 * STORE_FLAG_VALUE. Similarly if OP has an outer ZERO_EXTEND or
    6668                 :            :      SIGN_EXTEND as long as Z is already extended (so we don't destroy it).
    6669                 :            :      We can do this kind of thing in some cases when STORE_FLAG_VALUE is
    6670                 :            :      neither 1 or -1, but it isn't worth checking for.  */
    6671                 :            : 
    6672                 :    7896490 :   if ((STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1)
    6673                 :            :       && comparison_p
    6674                 :    9349240 :       && is_int_mode (mode, &int_mode)
    6675                 :    9400010 :       && ! side_effects_p (x))
    6676                 :            :     {
    6677                 :    1500560 :       rtx t = make_compound_operation (true_rtx, SET);
    6678                 :    1500560 :       rtx f = make_compound_operation (false_rtx, SET);
    6679                 :    1500560 :       rtx cond_op0 = XEXP (cond, 0);
    6680                 :    1500560 :       rtx cond_op1 = XEXP (cond, 1);
    6681                 :    1500560 :       enum rtx_code op = UNKNOWN, extend_op = UNKNOWN;
    6682                 :    1500560 :       scalar_int_mode m = int_mode;
    6683                 :    1500560 :       rtx z = 0, c1 = NULL_RTX;
    6684                 :            : 
    6685                 :    1500560 :       if ((GET_CODE (t) == PLUS || GET_CODE (t) == MINUS
    6686                 :    1381290 :            || GET_CODE (t) == IOR || GET_CODE (t) == XOR
    6687                 :    1370570 :            || GET_CODE (t) == ASHIFT
    6688                 :    1339350 :            || GET_CODE (t) == LSHIFTRT || GET_CODE (t) == ASHIFTRT)
    6689                 :    1548250 :           && rtx_equal_p (XEXP (t, 0), f))
    6690                 :      44283 :         c1 = XEXP (t, 1), op = GET_CODE (t), z = f;
    6691                 :            : 
    6692                 :            :       /* If an identity-zero op is commutative, check whether there
    6693                 :            :          would be a match if we swapped the operands.  */
    6694                 :    1398940 :       else if ((GET_CODE (t) == PLUS || GET_CODE (t) == IOR
    6695                 :    1392530 :                 || GET_CODE (t) == XOR)
    6696                 :    1462920 :                && rtx_equal_p (XEXP (t, 1), f))
    6697                 :       6483 :         c1 = XEXP (t, 0), op = GET_CODE (t), z = f;
    6698                 :    1449800 :       else if (GET_CODE (t) == SIGN_EXTEND
    6699                 :       3615 :                && is_a <scalar_int_mode> (GET_MODE (XEXP (t, 0)), &inner_mode)
    6700                 :       3615 :                && (GET_CODE (XEXP (t, 0)) == PLUS
    6701                 :       3615 :                    || GET_CODE (XEXP (t, 0)) == MINUS
    6702                 :       3442 :                    || GET_CODE (XEXP (t, 0)) == IOR
    6703                 :       3439 :                    || GET_CODE (XEXP (t, 0)) == XOR
    6704                 :       3439 :                    || GET_CODE (XEXP (t, 0)) == ASHIFT
    6705                 :       3424 :                    || GET_CODE (XEXP (t, 0)) == LSHIFTRT
    6706                 :       3424 :                    || GET_CODE (XEXP (t, 0)) == ASHIFTRT)
    6707                 :        192 :                && GET_CODE (XEXP (XEXP (t, 0), 0)) == SUBREG
    6708                 :         69 :                && subreg_lowpart_p (XEXP (XEXP (t, 0), 0))
    6709                 :         69 :                && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 0)), f)
    6710                 :    1449800 :                && (num_sign_bit_copies (f, GET_MODE (f))
    6711                 :          0 :                    > (unsigned int)
    6712                 :          0 :                      (GET_MODE_PRECISION (int_mode)
    6713                 :          0 :                       - GET_MODE_PRECISION (inner_mode))))
    6714                 :            :         {
    6715                 :          0 :           c1 = XEXP (XEXP (t, 0), 1); z = f; op = GET_CODE (XEXP (t, 0));
    6716                 :          0 :           extend_op = SIGN_EXTEND;
    6717                 :          0 :           m = inner_mode;
    6718                 :            :         }
    6719                 :    1449800 :       else if (GET_CODE (t) == SIGN_EXTEND
    6720                 :       3615 :                && is_a <scalar_int_mode> (GET_MODE (XEXP (t, 0)), &inner_mode)
    6721                 :       3615 :                && (GET_CODE (XEXP (t, 0)) == PLUS
    6722                 :       3444 :                    || GET_CODE (XEXP (t, 0)) == IOR
    6723                 :       3441 :                    || GET_CODE (XEXP (t, 0)) == XOR)
    6724                 :        174 :                && GET_CODE (XEXP (XEXP (t, 0), 1)) == SUBREG
    6725                 :          2 :                && subreg_lowpart_p (XEXP (XEXP (t, 0), 1))
    6726                 :          2 :                && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 1)), f)
    6727                 :    1449800 :                && (num_sign_bit_copies (f, GET_MODE (f))
    6728                 :          2 :                    > (unsigned int)
    6729                 :          2 :                      (GET_MODE_PRECISION (int_mode)
    6730                 :          2 :                       - GET_MODE_PRECISION (inner_mode))))
    6731                 :            :         {
    6732                 :          0 :           c1 = XEXP (XEXP (t, 0), 0); z = f; op = GET_CODE (XEXP (t, 0));
    6733                 :          0 :           extend_op = SIGN_EXTEND;
    6734                 :          0 :           m = inner_mode;
    6735                 :            :         }
    6736                 :    1449800 :       else if (GET_CODE (t) == ZERO_EXTEND
    6737                 :       1843 :                && is_a <scalar_int_mode> (GET_MODE (XEXP (t, 0)), &inner_mode)
    6738                 :       1843 :                && (GET_CODE (XEXP (t, 0)) == PLUS
    6739                 :       1843 :                    || GET_CODE (XEXP (t, 0)) == MINUS
    6740                 :       1385 :                    || GET_CODE (XEXP (t, 0)) == IOR
    6741                 :       1385 :                    || GET_CODE (XEXP (t, 0)) == XOR
    6742                 :       1385 :                    || GET_CODE (XEXP (t, 0)) == ASHIFT
    6743                 :       1385 :                    || GET_CODE (XEXP (t, 0)) == LSHIFTRT
    6744                 :       1385 :                    || GET_CODE (XEXP (t, 0)) == ASHIFTRT)
    6745                 :        458 :                && GET_CODE (XEXP (XEXP (t, 0), 0)) == SUBREG
    6746                 :         38 :                && HWI_COMPUTABLE_MODE_P (int_mode)
    6747                 :         38 :                && subreg_lowpart_p (XEXP (XEXP (t, 0), 0))
    6748                 :         38 :                && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 0)), f)
    6749                 :    1449800 :                && ((nonzero_bits (f, GET_MODE (f))
    6750                 :          0 :                     & ~GET_MODE_MASK (inner_mode))
    6751                 :            :                    == 0))
    6752                 :            :         {
    6753                 :          0 :           c1 = XEXP (XEXP (t, 0), 1); z = f; op = GET_CODE (XEXP (t, 0));
    6754                 :          0 :           extend_op = ZERO_EXTEND;
    6755                 :          0 :           m = inner_mode;
    6756                 :            :         }
    6757                 :    1449800 :       else if (GET_CODE (t) == ZERO_EXTEND
    6758                 :       1843 :                && is_a <scalar_int_mode> (GET_MODE (XEXP (t, 0)), &inner_mode)
    6759                 :       1843 :                && (GET_CODE (XEXP (t, 0)) == PLUS
    6760                 :       1639 :                    || GET_CODE (XEXP (t, 0)) == IOR
    6761                 :       1639 :                    || GET_CODE (XEXP (t, 0)) == XOR)
    6762                 :        204 :                && GET_CODE (XEXP (XEXP (t, 0), 1)) == SUBREG
    6763                 :         12 :                && HWI_COMPUTABLE_MODE_P (int_mode)
    6764                 :         12 :                && subreg_lowpart_p (XEXP (XEXP (t, 0), 1))
    6765                 :         12 :                && rtx_equal_p (SUBREG_REG (XEXP (XEXP (t, 0), 1)), f)
    6766                 :    1449800 :                && ((nonzero_bits (f, GET_MODE (f))
    6767                 :          0 :                     & ~GET_MODE_MASK (inner_mode))
    6768                 :            :                    == 0))
    6769                 :            :         {
    6770                 :          0 :           c1 = XEXP (XEXP (t, 0), 0); z = f; op = GET_CODE (XEXP (t, 0));
    6771                 :          0 :           extend_op = ZERO_EXTEND;
    6772                 :          0 :           m = inner_mode;
    6773                 :            :         }
    6774                 :            : 
    6775                 :    1500560 :       if (z)
    6776                 :            :         {
    6777                 :      50766 :           machine_mode cm = m;
    6778                 :      50766 :           if ((op == ASHIFT || op == LSHIFTRT || op == ASHIFTRT)
    6779                 :        249 :               && GET_MODE (c1) != VOIDmode)
    6780                 :         62 :             cm = GET_MODE (c1);
    6781                 :      50766 :           temp = subst (simplify_gen_relational (true_code, cm, VOIDmode,
    6782                 :            :                                                  cond_op0, cond_op1),
    6783                 :            :                         pc_rtx, pc_rtx, 0, 0, 0);
    6784                 :      50766 :           temp = simplify_gen_binary (MULT, cm, temp,
    6785                 :            :                                       simplify_gen_binary (MULT, cm, c1,
    6786                 :            :                                                            const_true_rtx));
    6787                 :      50766 :           temp = subst (temp, pc_rtx, pc_rtx, 0, 0, 0);
    6788                 :      50766 :           temp = simplify_gen_binary (op, m, gen_lowpart (m, z), temp);
    6789                 :            : 
    6790                 :      50766 :           if (extend_op != UNKNOWN)
    6791                 :          0 :             temp = simplify_gen_unary (extend_op, int_mode, temp, m);
    6792                 :            : 
    6793                 :      50766 :           return temp;
    6794                 :            :         }
    6795                 :            :     }
    6796                 :            : 
    6797                 :            :   /* If we have (if_then_else (ne A 0) C1 0) and either A is known to be 0 or
    6798                 :            :      1 and C1 is a single bit or A is known to be 0 or -1 and C1 is the
    6799                 :            :      negation of a single bit, we can convert this operation to a shift.  We
    6800                 :            :      can actually do this more generally, but it doesn't seem worth it.  */
    6801                 :            : 
    6802                 :    7845730 :   if (true_code == NE
    6803                 :    7845710 :       && is_a <scalar_int_mode> (mode, &int_mode)
    6804                 :     294280 :       && XEXP (cond, 1) == const0_rtx
    6805                 :     227262 :       && false_rtx == const0_rtx
    6806                 :      17879 :       && CONST_INT_P (true_rtx)
    6807                 :    7845980 :       && ((nonzero_bits (XEXP (cond, 0), int_mode) == 1
    6808                 :        271 :            && (i = exact_log2 (UINTVAL (true_rtx))) >= 0)
    6809                 :        241 :           || ((num_sign_bit_copies (XEXP (cond, 0), int_mode)
    6810                 :        241 :                == GET_MODE_PRECISION (int_mode))
    6811                 :          4 :               && (i = exact_log2 (-UINTVAL (true_rtx))) >= 0)))
    6812                 :         12 :     return
    6813                 :         12 :       simplify_shift_const (NULL_RTX, ASHIFT, int_mode,
    6814                 :         24 :                             gen_lowpart (int_mode, XEXP (cond, 0)), i);
    6815                 :            : 
    6816                 :            :   /* (IF_THEN_ELSE (NE A 0) C1 0) is A or a zero-extend of A if the only
    6817                 :            :      non-zero bit in A is C1.  */
    6818                 :    2682440 :   if (true_code == NE && XEXP (cond, 1) == const0_rtx
    6819                 :    1401970 :       && false_rtx == const0_rtx && CONST_INT_P (true_rtx)
    6820                 :    7991050 :       && is_a <scalar_int_mode> (mode, &int_mode)
    6821                 :        241 :       && is_a <scalar_int_mode> (GET_MODE (XEXP (cond, 0)), &inner_mode)
    6822                 :         90 :       && (UINTVAL (true_rtx) & GET_MODE_MASK (int_mode))
    6823                 :         90 :           == nonzero_bits (XEXP (cond, 0), inner_mode)
    6824                 :    7845710 :       && (i = exact_log2 (UINTVAL (true_rtx) & GET_MODE_MASK (int_mode))) >= 0)
    6825                 :            :     {
    6826                 :          0 :       rtx val = XEXP (cond, 0);
    6827                 :          0 :       if (inner_mode == int_mode)
    6828                 :            :         return val;
    6829                 :          0 :       else if (GET_MODE_PRECISION (inner_mode) < GET_MODE_PRECISION (int_mode))
    6830                 :          0 :         return simplify_gen_unary (ZERO_EXTEND, int_mode, val, inner_mode);
    6831                 :            :     }
    6832                 :            : 
    6833                 :            :   return x;
    6834                 :            : }
    6835                 :            : 
    6836                 :            : /* Simplify X, a SET expression.  Return the new expression.  */
    6837                 :            : 
    6838                 :            : static rtx
    6839                 :   26807800 : simplify_set (rtx x)
    6840                 :            : {
    6841                 :   26807800 :   rtx src = SET_SRC (x);
    6842                 :   26807800 :   rtx dest = SET_DEST (x);
    6843                 :   53615700 :   machine_mode mode
    6844                 :   26807800 :     = GET_MODE (src) != VOIDmode ? GET_MODE (src) : GET_MODE (dest);
    6845                 :   26807800 :   rtx_insn *other_insn;
    6846                 :   26807800 :   rtx *cc_use;
    6847                 :   26807800 :   scalar_int_mode int_mode;
    6848                 :            : 
    6849                 :            :   /* (set (pc) (return)) gets written as (return).  */
    6850                 :   26807800 :   if (GET_CODE (dest) == PC && ANY_RETURN_P (src))
    6851                 :            :     return src;
    6852                 :            : 
    6853                 :            :   /* Now that we know for sure which bits of SRC we are using, see if we can
    6854                 :            :      simplify the expression for the object knowing that we only need the
    6855                 :            :      low-order bits.  */
    6856                 :            : 
    6857                 :   26807800 :   if (GET_MODE_CLASS (mode) == MODE_INT && HWI_COMPUTABLE_MODE_P (mode))
    6858                 :            :     {
    6859                 :   12651900 :       src = force_to_mode (src, mode, HOST_WIDE_INT_M1U, 0);
    6860                 :   12651900 :       SUBST (SET_SRC (x), src);
    6861                 :            :     }
    6862                 :            : 
    6863                 :            :   /* If we are setting CC0 or if the source is a COMPARE, look for the use of
    6864                 :            :      the comparison result and try to simplify it unless we already have used
    6865                 :            :      undobuf.other_insn.  */
    6866                 :   26807800 :   if ((GET_MODE_CLASS (mode) == MODE_CC
    6867                 :   22633100 :        || GET_CODE (src) == COMPARE
    6868                 :            :        || CC0_P (dest))
    6869                 :    4174720 :       && (cc_use = find_single_use (dest, subst_insn, &other_insn)) != 0
    6870                 :    4029330 :       && (undobuf.other_insn == 0 || other_insn == undobuf.other_insn)
    6871                 :    4029330 :       && COMPARISON_P (*cc_use)
    6872                 :   30836000 :       && rtx_equal_p (XEXP (*cc_use, 0), dest))
    6873                 :            :     {
    6874                 :    4027280 :       enum rtx_code old_code = GET_CODE (*cc_use);
    6875                 :    4027280 :       enum rtx_code new_code;
    6876                 :    4027280 :       rtx op0, op1, tmp;
    6877                 :    4027280 :       int other_changed = 0;
    6878                 :    4027280 :       rtx inner_compare = NULL_RTX;
    6879                 :    4027280 :       machine_mode compare_mode = GET_MODE (dest);
    6880                 :            : 
    6881                 :    4027280 :       if (GET_CODE (src) == COMPARE)
    6882                 :            :         {
    6883                 :    3501880 :           op0 = XEXP (src, 0), op1 = XEXP (src, 1);
    6884                 :    3501880 :           if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
    6885                 :            :             {
    6886                 :          0 :               inner_compare = op0;
    6887                 :          0 :               op0 = XEXP (inner_compare, 0), op1 = XEXP (inner_compare, 1);
    6888                 :            :             }
    6889                 :            :         }
    6890                 :            :       else
    6891                 :     525398 :         op0 = src, op1 = CONST0_RTX (GET_MODE (src));
    6892                 :            : 
    6893                 :    4027280 :       tmp = simplify_relational_operation (old_code, compare_mode, VOIDmode,
    6894                 :            :                                            op0, op1);
    6895                 :    4027280 :       if (!tmp)
    6896                 :            :         new_code = old_code;
    6897                 :     260879 :       else if (!CONSTANT_P (tmp))
    6898                 :            :         {
    6899                 :     257337 :           new_code = GET_CODE (tmp);
    6900                 :     257337 :           op0 = XEXP (tmp, 0);
    6901                 :     257337 :           op1 = XEXP (tmp, 1);
    6902                 :            :         }
    6903                 :            :       else
    6904                 :            :         {
    6905                 :       3542 :           rtx pat = PATTERN (other_insn);
    6906                 :       3542 :           undobuf.other_insn = other_insn;
    6907                 :       3542 :           SUBST (*cc_use, tmp);
    6908                 :            : 
    6909                 :            :           /* Attempt to simplify CC user.  */
    6910                 :       3542 :           if (GET_CODE (pat) == SET)
    6911                 :            :             {
    6912                 :       3127 :               rtx new_rtx = simplify_rtx (SET_SRC (pat));
    6913                 :       3127 :               if (new_rtx != NULL_RTX)
    6914                 :       2927 :                 SUBST (SET_SRC (pat), new_rtx);
    6915                 :            :             }
    6916                 :            : 
    6917                 :            :           /* Convert X into a no-op move.  */
    6918                 :       3542 :           SUBST (SET_DEST (x), pc_rtx);
    6919                 :       3542 :           SUBST (SET_SRC (x), pc_rtx);
    6920                 :       3542 :           return x;
    6921                 :            :         }
    6922                 :            : 
    6923                 :            :       /* Simplify our comparison, if possible.  */
    6924                 :    4023740 :       new_code = simplify_comparison (new_code, &op0, &op1);
    6925                 :            : 
    6926                 :            : #ifdef SELECT_CC_MODE
    6927                 :            :       /* If this machine has CC modes other than CCmode, check to see if we
    6928                 :            :          need to use a different CC mode here.  */
    6929                 :    4023740 :       if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
    6930                 :     643481 :         compare_mode = GET_MODE (op0);
    6931                 :    3380260 :       else if (inner_compare
    6932                 :          0 :                && GET_MODE_CLASS (GET_MODE (inner_compare)) == MODE_CC
    6933                 :          0 :                && new_code == old_code
    6934                 :          0 :                && op0 == XEXP (inner_compare, 0)
    6935                 :          0 :                && op1 == XEXP (inner_compare, 1))
    6936                 :          0 :         compare_mode = GET_MODE (inner_compare);
    6937                 :            :       else
    6938                 :    3380260 :         compare_mode = SELECT_CC_MODE (new_code, op0, op1);
    6939                 :            : 
    6940                 :            :       /* If the mode changed, we have to change SET_DEST, the mode in the
    6941                 :            :          compare, and the mode in the place SET_DEST is used.  If SET_DEST is
    6942                 :            :          a hard register, just build new versions with the proper mode.  If it
    6943                 :            :          is a pseudo, we lose unless it is only time we set the pseudo, in
    6944                 :            :          which case we can safely change its mode.  */
    6945                 :    4023740 :       if (!HAVE_cc0 && compare_mode != GET_MODE (dest))
    6946                 :            :         {
    6947                 :     147763 :           if (can_change_dest_mode (dest, 0, compare_mode))
    6948                 :            :             {
    6949                 :     147763 :               unsigned int regno = REGNO (dest);
    6950                 :     147763 :               rtx new_dest;
    6951                 :            : 
    6952                 :     147763 :               if (regno < FIRST_PSEUDO_REGISTER)
    6953                 :     147763 :                 new_dest = gen_rtx_REG (compare_mode, regno);
    6954                 :            :               else
    6955                 :            :                 {
    6956                 :          0 :                   SUBST_MODE (regno_reg_rtx[regno], compare_mode);
    6957                 :          0 :                   new_dest = regno_reg_rtx[regno];
    6958                 :            :                 }
    6959                 :            : 
    6960                 :     147763 :               SUBST (SET_DEST (x), new_dest);
    6961                 :     147763 :               SUBST (XEXP (*cc_use, 0), new_dest);
    6962                 :     147763 :               other_changed = 1;
    6963                 :            : 
    6964                 :     147763 :               dest = new_dest;
    6965                 :            :             }
    6966                 :            :         }
    6967                 :            : #endif  /* SELECT_CC_MODE */
    6968                 :            : 
    6969                 :            :       /* If the code changed, we have to build a new comparison in
    6970                 :            :          undobuf.other_insn.  */
    6971                 :    4023740 :       if (new_code != old_code)
    6972                 :            :         {
    6973                 :     388242 :           int other_changed_previously = other_changed;
    6974                 :     388242 :           unsigned HOST_WIDE_INT mask;
    6975                 :     388242 :           rtx old_cc_use = *cc_use;
    6976                 :            : 
    6977                 :     388242 :           SUBST (*cc_use, gen_rtx_fmt_ee (new_code, GET_MODE (*cc_use),
    6978                 :            :                                           dest, const0_rtx));
    6979                 :     388242 :           other_changed = 1;
    6980                 :            : 
    6981                 :            :           /* If the only change we made was to change an EQ into an NE or
    6982                 :            :              vice versa, OP0 has only one bit that might be nonzero, and OP1
    6983                 :            :              is zero, check if changing the user of the condition code will
    6984                 :            :              produce a valid insn.  If it won't, we can keep the original code
    6985                 :            :              in that insn by surrounding our operation with an XOR.  */
    6986                 :            : 
    6987                 :     388242 :           if (((old_code == NE && new_code == EQ)
    6988                 :     374831 :                || (old_code == EQ && new_code == NE))
    6989                 :      33038 :               && ! other_changed_previously && op1 == const0_rtx
    6990                 :      31513 :               && HWI_COMPUTABLE_MODE_P (GET_MODE (op0))
    6991                 :     390377 :               && pow2p_hwi (mask = nonzero_bits (op0, GET_MODE (op0))))
    6992                 :            :             {
    6993                 :       2123 :               rtx pat = PATTERN (other_insn), note = 0;
    6994                 :            : 
    6995                 :       2123 :               if ((recog_for_combine (&pat, other_insn, &note) < 0
    6996                 :       2123 :                    && ! check_asm_operands (pat)))
    6997                 :            :                 {
    6998                 :         28 :                   *cc_use = old_cc_use;
    6999                 :         28 :                   other_changed = 0;
    7000                 :            : 
    7001                 :         28 :                   op0 = simplify_gen_binary (XOR, GET_MODE (op0), op0,
    7002                 :            :                                              gen_int_mode (mask,
    7003                 :         28 :                                                            GET_MODE (op0)));
    7004                 :            :                 }
    7005                 :            :             }
    7006                 :            :         }
    7007                 :            : 
    7008                 :    3637620 :       if (other_changed)
    7009                 :     397693 :         undobuf.other_insn = other_insn;
    7010                 :            : 
    7011                 :            :       /* Don't generate a compare of a CC with 0, just use that CC.  */
    7012                 :    4023740 :       if (GET_MODE (op0) == compare_mode && op1 == const0_rtx)
    7013                 :            :         {
    7014                 :     643481 :           SUBST (SET_SRC (x), op0);
    7015                 :     643481 :           src = SET_SRC (x);
    7016                 :            :         }
    7017                 :            :       /* Otherwise, if we didn't previously have the same COMPARE we
    7018                 :            :          want, create it from scratch.  */
    7019                 :    3380260 :       else if (GET_CODE (src) != COMPARE || GET_MODE (src) != compare_mode
    7020                 :    3301710 :                || XEXP (src, 0) != op0 || XEXP (src, 1) != op1)
    7021                 :            :         {
    7022                 :     831408 :           SUBST (SET_SRC (x), gen_rtx_COMPARE (compare_mode, op0, op1));
    7023                 :     831408 :           src = SET_SRC (x);
    7024                 :            :         }
    7025                 :            :     }
    7026                 :            :   else
    7027                 :            :     {
    7028                 :            :       /* Get SET_SRC in a form where we have placed back any
    7029                 :            :          compound expressions.  Then do the checks below.  */
    7030                 :   22780600 :       src = make_compound_operation (src, SET);
    7031                 :   22780600 :       SUBST (SET_SRC (x), src);
    7032                 :            :     }
    7033                 :            : 
    7034                 :            :   /* If we have (set x (subreg:m1 (op:m2 ...) 0)) with OP being some operation,
    7035                 :            :      and X being a REG or (subreg (reg)), we may be able to convert this to
    7036                 :            :      (set (subreg:m2 x) (op)).
    7037                 :            : 
    7038                 :            :      We can always do this if M1 is narrower than M2 because that means that
    7039                 :            :      we only care about the low bits of the result.
    7040                 :            : 
    7041                 :            :      However, on machines without WORD_REGISTER_OPERATIONS defined, we cannot
    7042                 :            :      perform a narrower operation than requested since the high-order bits will
    7043                 :            :      be undefined.  On machine where it is defined, this transformation is safe
    7044                 :            :      as long as M1 and M2 have the same number of words.  */
    7045                 :            : 
    7046                 :     276124 :   if (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)
    7047                 :     211439 :       && !OBJECT_P (SUBREG_REG (src))
    7048                 :            :       && (known_equal_after_align_up
    7049                 :     182014 :           (GET_MODE_SIZE (GET_MODE (src)),
    7050                 :     364028 :            GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))),
    7051                 :     182014 :            UNITS_PER_WORD))
    7052                 :     148403 :       && (WORD_REGISTER_OPERATIONS || !paradoxical_subreg_p (src))
    7053                 :     143620 :       && ! (REG_P (dest) && REGNO (dest) < FIRST_PSEUDO_REGISTER
    7054                 :        154 :             && !REG_CAN_CHANGE_MODE_P (REGNO (dest),
    7055                 :            :                                        GET_MODE (SUBREG_REG (src)),
    7056                 :            :                                        GET_MODE (src)))
    7057                 :   26947800 :       && (REG_P (dest)
    7058                 :     100689 :           || (GET_CODE (dest) == SUBREG
    7059                 :         61 :               && REG_P (SUBREG_REG (dest)))))
    7060                 :            :     {
    7061                 :      42838 :       SUBST (SET_DEST (x),
    7062                 :            :              gen_lowpart (GET_MODE (SUBREG_REG (src)),
    7063                 :            :                                       dest));
    7064                 :      42838 :       SUBST (SET_SRC (x), SUBREG_REG (src));
    7065                 :            : 
    7066                 :      42838 :       src = SET_SRC (x), dest = SET_DEST (x);
    7067                 :            :     }
    7068                 :            : 
    7069                 :            :   /* If we have (set (cc0) (subreg ...)), we try to remove the subreg
    7070                 :            :      in SRC.  */
    7071                 :   26804300 :   if (dest == cc0_rtx
    7072                 :          0 :       && partial_subreg_p (src)
    7073                 :   26804300 :       && subreg_lowpart_p (src))
    7074                 :            :     {
    7075                 :          0 :       rtx inner = SUBREG_REG (src);
    7076                 :          0 :       machine_mode inner_mode = GET_MODE (inner);
    7077                 :            : 
    7078                 :            :       /* Here we make sure that we don't have a sign bit on.  */
    7079                 :          0 :       if (val_signbit_known_clear_p (GET_MODE (src),
    7080                 :            :                                      nonzero_bits (inner, inner_mode)))
    7081                 :            :         {
    7082                 :          0 :           SUBST (SET_SRC (x), inner);
    7083                 :          0 :           src = SET_SRC (x);
    7084                 :            :         }
    7085                 :            :     }
    7086                 :            : 
    7087                 :            :   /* If we have (set FOO (subreg:M (mem:N BAR) 0)) with M wider than N, this
    7088                 :            :      would require a paradoxical subreg.  Replace the subreg with a
    7089                 :            :      zero_extend to avoid the reload that would otherwise be required.
    7090                 :            :      Don't do this unless we have a scalar integer mode, otherwise the
    7091                 :            :      transformation is incorrect.  */
    7092                 :            : 
    7093                 :   26804300 :   enum rtx_code extend_op;
    7094                 :   26804300 :   if (paradoxical_subreg_p (src)
    7095                 :            :       && MEM_P (SUBREG_REG (src))
    7096                 :            :       && SCALAR_INT_MODE_P (GET_MODE (src))
    7097                 :            :       && (extend_op = load_extend_op (GET_MODE (SUBREG_REG (src)))) != UNKNOWN)
    7098                 :            :     {
    7099                 :            :       SUBST (SET_SRC (x),
    7100                 :            :              gen_rtx_fmt_e (extend_op, GET_MODE (src), SUBREG_REG (src)));
    7101                 :            : 
    7102                 :            :       src = SET_SRC (x);
    7103                 :            :     }
    7104                 :            : 
    7105                 :            :   /* If we don't have a conditional move, SET_SRC is an IF_THEN_ELSE, and we
    7106                 :            :      are comparing an item known to be 0 or -1 against 0, use a logical
    7107                 :            :      operation instead. Check for one of the arms being an IOR of the other
    7108                 :            :      arm with some value.  We compute three terms to be IOR'ed together.  In
    7109                 :            :      practice, at most two will be nonzero.  Then we do the IOR's.  */
    7110                 :            : 
    7111                 :   26804300 :   if (GET_CODE (dest) != PC
    7112                 :   20487100 :       && GET_CODE (src) == IF_THEN_ELSE
    7113                 :     859103 :       && is_int_mode (GET_MODE (src), &int_mode)
    7114                 :     808022 :       && (GET_CODE (XEXP (src, 0)) == EQ || GET_CODE (XEXP (src, 0)) == NE)
    7115                 :     336843 :       && XEXP (XEXP (src, 0), 1) == const0_rtx
    7116                 :     253377 :       && int_mode == GET_MODE (XEXP (XEXP (src, 0), 0))
    7117                 :     116760 :       && (!HAVE_conditional_move
    7118                 :     116760 :           || ! can_conditionally_move_p (int_mode))
    7119                 :          0 :       && (num_sign_bit_copies (XEXP (XEXP (src, 0), 0), int_mode)
    7120                 :          0 :           == GET_MODE_PRECISION (int_mode))
    7121                 :   26804300 :       && ! side_effects_p (src))
    7122                 :            :     {
    7123                 :          0 :       rtx true_rtx = (GET_CODE (XEXP (src, 0)) == NE
    7124                 :          0 :                       ? XEXP (src, 1) : XEXP (src, 2));
    7125                 :          0 :       rtx false_rtx = (GET_CODE (XEXP (src, 0)) == NE
    7126                 :          0 :                    ? XEXP (src, 2) : XEXP (src, 1));
    7127                 :          0 :       rtx term1 = const0_rtx, term2, term3;
    7128                 :            : 
    7129                 :          0 :       if (GET_CODE (true_rtx) == IOR
    7130                 :          0 :           && rtx_equal_p (XEXP (true_rtx, 0), false_rtx))
    7131                 :          0 :         term1 = false_rtx, true_rtx = XEXP (true_rtx, 1), false_rtx = const0_rtx;
    7132                 :          0 :       else if (GET_CODE (true_rtx) == IOR
    7133                 :          0 :                && rtx_equal_p (XEXP (true_rtx, 1), false_rtx))
    7134                 :          0 :         term1 = false_rtx, true_rtx = XEXP (true_rtx, 0), false_rtx = const0_rtx;
    7135                 :          0 :       else if (GET_CODE (false_rtx) == IOR
    7136                 :          0 :                && rtx_equal_p (XEXP (false_rtx, 0), true_rtx))
    7137                 :          0 :         term1 = true_rtx, false_rtx = XEXP (false_rtx, 1), true_rtx = const0_rtx;
    7138                 :          0 :       else if (GET_CODE (false_rtx) == IOR
    7139                 :          0 :                && rtx_equal_p (XEXP (false_rtx, 1), true_rtx))
    7140                 :          0 :         term1 = true_rtx, false_rtx = XEXP (false_rtx, 0), true_rtx = const0_rtx;
    7141                 :            : 
    7142                 :          0 :       term2 = simplify_gen_binary (AND, int_mode,
    7143                 :          0 :                                    XEXP (XEXP (src, 0), 0), true_rtx);
    7144                 :          0 :       term3 = simplify_gen_binary (AND, int_mode,
    7145                 :            :                                    simplify_gen_unary (NOT, int_mode,
    7146                 :          0 :                                                        XEXP (XEXP (src, 0), 0),
    7147                 :            :                                                        int_mode),
    7148                 :            :                                    false_rtx);
    7149                 :            : 
    7150                 :          0 :       SUBST (SET_SRC (x),
    7151                 :            :              simplify_gen_binary (IOR, int_mode,
    7152                 :            :                                   simplify_gen_binary (IOR, int_mode,
    7153                 :            :                                                        term1, term2),
    7154                 :            :                                   term3));
    7155                 :            : 
    7156                 :          0 :       src = SET_SRC (x);
    7157                 :            :     }
    7158                 :            : 
    7159                 :            :   /* If either SRC or DEST is a CLOBBER of (const_int 0), make this
    7160                 :            :      whole thing fail.  */
    7161                 :   26804300 :   if (GET_CODE (src) == CLOBBER && XEXP (src, 0) == const0_rtx)
    7162                 :            :     return src;
    7163                 :   26804300 :   else if (GET_CODE (dest) == CLOBBER && XEXP (dest, 0) == const0_rtx)
    7164                 :            :     return dest;
    7165                 :            :   else
    7166                 :            :     /* Convert this into a field assignment operation, if possible.  */
    7167                 :   26804300 :     return make_field_assignment (x);
    7168                 :            : }
    7169                 :            : 
    7170                 :            : /* Simplify, X, and AND, IOR, or XOR operation, and return the simplified
    7171                 :            :    result.  */
    7172                 :            : 
    7173                 :            : static rtx
    7174                 :    4850920 : simplify_logical (rtx x)
    7175                 :            : {
    7176                 :    4850920 :   rtx op0 = XEXP (x, 0);
    7177                 :    4850920 :   rtx op1 = XEXP (x, 1);
    7178                 :    4850920 :   scalar_int_mode mode;
    7179                 :            : 
    7180                 :    4850920 :   switch (GET_CODE (x))
    7181                 :            :     {
    7182                 :    3250270 :     case AND:
    7183                 :            :       /* We can call simplify_and_const_int only if we don't lose
    7184                 :            :          any (sign) bits when converting INTVAL (op1) to
    7185                 :            :          "unsigned HOST_WIDE_INT".  */
    7186                 :    3250270 :       if (is_a <scalar_int_mode> (GET_MODE (x), &mode)
    7187                 :    3104170 :           && CONST_INT_P (op1)
    7188                 :    2677850 :           && (HWI_COMPUTABLE_MODE_P (mode)
    7189                 :         79 :               || INTVAL (op1) > 0))
    7190                 :            :         {
    7191                 :    2677770 :           x = simplify_and_const_int (x, mode, op0, INTVAL (op1));
    7192                 :    2677770 :           if (GET_CODE (x) != AND)
    7193                 :            :             return x;
    7194                 :            : 
    7195                 :    2665680 :           op0 = XEXP (x, 0);
    7196                 :    2665680 :           op1 = XEXP (x, 1);
    7197                 :            :         }
    7198                 :            : 
    7199                 :            :       /* If we have any of (and (ior A B) C) or (and (xor A B) C),
    7200                 :            :          apply the distributive law and then the inverse distributive
    7201                 :            :          law to see if things simplify.  */
    7202                 :    3238180 :       if (GET_CODE (op0) == IOR || GET_CODE (op0) == XOR)
    7203                 :            :         {
    7204                 :      38405 :           rtx result = distribute_and_simplify_rtx (x, 0);
    7205                 :      38405 :           if (result)
    7206                 :            :             return result;
    7207                 :            :         }
    7208                 :    3238180 :       if (GET_CODE (op1) == IOR || GET_CODE (op1) == XOR)
    7209                 :            :         {
    7210                 :        287 :           rtx result = distribute_and_simplify_rtx (x, 1);
    7211                 :        287 :           if (result)
    7212                 :          0 :             return result;
    7213                 :            :         }
    7214                 :            :       break;
    7215                 :            : 
    7216                 :    1600650 :     case IOR:
    7217                 :            :       /* If we have (ior (and A B) C), apply the distributive law and then
    7218                 :            :          the inverse distributive law to see if things simplify.  */
    7219                 :            : 
    7220                 :    1600650 :       if (GET_CODE (op0) == AND)
    7221                 :            :         {
    7222                 :     363422 :           rtx result = distribute_and_simplify_rtx (x, 0);
    7223                 :     363422 :           if (result)
    7224                 :            :             return result;
    7225                 :            :         }
    7226                 :            : 
    7227                 :    1600650 :       if (GET_CODE (op1) == AND)
    7228                 :            :         {
    7229                 :      28023 :           rtx result = distribute_and_simplify_rtx (x, 1);
    7230                 :      28023 :           if (result)
    7231                 :          0 :             return result;
    7232                 :            :         }
    7233                 :            :       break;
    7234                 :            : 
    7235                 :          0 :     default:
    7236                 :          0 :       gcc_unreachable ();
    7237                 :            :     }
    7238                 :            : 
    7239                 :            :   return x;
    7240                 :            : }
    7241                 :            : 
    7242                 :            : /* We consider ZERO_EXTRACT, SIGN_EXTRACT, and SIGN_EXTEND as "compound
    7243                 :            :    operations" because they can be replaced with two more basic operations.
    7244                 :            :    ZERO_EXTEND is also considered "compound" because it can be replaced with
    7245                 :            :    an AND operation, which is simpler, though only one operation.
    7246                 :            : 
    7247                 :            :    The function expand_compound_operation is called with an rtx expression
    7248                 :            :    and will convert it to the appropriate shifts and AND operations,
    7249                 :            :    simplifying at each stage.
    7250                 :            : 
    7251                 :            :    The function make_compound_operation is called to convert an expression
    7252                 :            :    consisting of shifts and ANDs into the equivalent compound expression.
    7253                 :            :    It is the inverse of this function, loosely speaking.  */
    7254                 :            : 
    7255                 :            : static rtx
    7256                 :    8053310 : expand_compound_operation (rtx x)
    7257                 :            : {
    7258                 :    8053310 :   unsigned HOST_WIDE_INT pos = 0, len;
    7259                 :    8053310 :   int unsignedp = 0;
    7260                 :    8053310 :   unsigned int modewidth;
    7261                 :    8053310 :   rtx tem;
    7262                 :    8053310 :   scalar_int_mode inner_mode;
    7263                 :            : 
    7264                 :    8053310 :   switch (GET_CODE (x))
    7265                 :            :     {
    7266                 :    1427980 :     case ZERO_EXTEND:
    7267                 :    1427980 :       unsignedp = 1;
    7268                 :            :       /* FALLTHRU */
    7269                 :    2613400 :     case SIGN_EXTEND:
    7270                 :            :       /* We can't necessarily use a const_int for a multiword mode;
    7271                 :            :          it depends on implicitly extending the value.
    7272                 :            :          Since we don't know the right way to extend it,
    7273                 :            :          we can't tell whether the implicit way is right.
    7274                 :            : 
    7275                 :            :          Even for a mode that is no wider than a const_int,
    7276                 :            :          we can't win, because we need to sign extend one of its bits through
    7277                 :            :          the rest of it, and we don't know which bit.  */
    7278                 :    2613400 :       if (CONST_INT_P (XEXP (x, 0)))
    7279                 :            :         return x;
    7280                 :            : 
    7281                 :            :       /* Reject modes that aren't scalar integers because turning vector
    7282                 :            :          or complex modes into shifts causes problems.  */
    7283                 :    2613400 :       if (!is_a <scalar_int_mode> (GET_MODE (XEXP (x, 0)), &inner_mode))
    7284                 :            :         return x;
    7285                 :            : 
    7286                 :            :       /* Return if (subreg:MODE FROM 0) is not a safe replacement for
    7287                 :            :          (zero_extend:MODE FROM) or (sign_extend:MODE FROM).  It is for any MEM
    7288                 :            :          because (SUBREG (MEM...)) is guaranteed to cause the MEM to be
    7289                 :            :          reloaded. If not for that, MEM's would very rarely be safe.
    7290                 :            : 
    7291                 :            :          Reject modes bigger than a word, because we might not be able
    7292                 :            :          to reference a two-register group starting with an arbitrary register
    7293                 :            :          (and currently gen_lowpart might crash for a SUBREG).  */
    7294                 :            : 
    7295                 :    5364500 :       if (GET_MODE_SIZE (inner_mode) > UNITS_PER_WORD)
    7296                 :            :         return x;
    7297                 :            : 
    7298                 :    2432310 :       len = GET_MODE_PRECISION (inner_mode);
    7299                 :            :       /* If the inner object has VOIDmode (the only way this can happen
    7300                 :            :          is if it is an ASM_OPERANDS), we can't do anything since we don't
    7301                 :            :          know how much masking to do.  */
    7302                 :    2432310 :       if (len == 0)
    7303                 :            :         return x;
    7304                 :            : 
    7305                 :            :       break;
    7306                 :            : 
    7307                 :     509252 :     case ZERO_EXTRACT:
    7308                 :     509252 :       unsignedp = 1;
    7309                 :            : 
    7310                 :            :       /* fall through */
    7311                 :            : 
    7312                 :     532064 :     case SIGN_EXTRACT:
    7313                 :            :       /* If the operand is a CLOBBER, just return it.  */
    7314                 :     532064 :       if (GET_CODE (XEXP (x, 0)) == CLOBBER)
    7315                 :            :         return XEXP (x, 0);
    7316                 :            : 
    7317                 :     532064 :       if (!CONST_INT_P (XEXP (x, 1))
    7318                 :     531941 :           || !CONST_INT_P (XEXP (x, 2)))
    7319                 :            :         return x;
    7320                 :            : 
    7321                 :            :       /* Reject modes that aren't scalar integers because turning vector
    7322                 :            :          or complex modes into shifts causes problems.  */
    7323                 :     515128 :       if (!is_a <scalar_int_mode> (GET_MODE (XEXP (x, 0)), &inner_mode))
    7324                 :            :         return x;
    7325                 :            : 
    7326                 :     515124 :       len = INTVAL (XEXP (x, 1));
    7327                 :     515124 :       pos = INTVAL (XEXP (x, 2));
    7328                 :            : 
    7329                 :            :       /* This should stay within the object being extracted, fail otherwise.  */
    7330                 :     515124 :       if (len + pos > GET_MODE_PRECISION (inner_mode))
    7331                 :            :         return x;
    7332                 :            : 
    7333                 :            :       if (BITS_BIG_ENDIAN)
    7334                 :            :         pos = GET_MODE_PRECISION (inner_mode) - len - pos;
    7335                 :            : 
    7336                 :            :       break;
    7337                 :            : 
    7338                 :            :     default:
    7339                 :            :       return x;
    7340                 :            :     }
    7341                 :            : 
    7342                 :            :   /* We've rejected non-scalar operations by now.  */
    7343                 :    2947400 :   scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (x));
    7344                 :            : 
    7345                 :            :   /* Convert sign extension to zero extension, if we know that the high
    7346                 :            :      bit is not set, as this is easier to optimize.  It will be converted
    7347                 :            :      back to cheaper alternative in make_extraction.  */
    7348                 :    2947400 :   if (GET_CODE (x) == SIGN_EXTEND
    7349                 :    1123590 :       && HWI_COMPUTABLE_MODE_P (mode)
    7350                 :    3891990 :       && ((nonzero_bits (XEXP (x, 0), inner_mode)
    7351                 :     944585 :            & ~(((unsigned HOST_WIDE_INT) GET_MODE_MASK (inner_mode)) >> 1))
    7352                 :            :           == 0))
    7353                 :            :     {
    7354                 :      18713 :       rtx temp = gen_rtx_ZERO_EXTEND (mode, XEXP (x, 0));
    7355                 :      18713 :       rtx temp2 = expand_compound_operation (temp);
    7356                 :            : 
    7357                 :            :       /* Make sure this is a profitable operation.  */
    7358                 :      18713 :       if (set_src_cost (x, mode, optimize_this_for_speed_p)
    7359                 :      18713 :           > set_src_cost (temp2, mode, optimize_this_for_speed_p))
    7360                 :            :        return temp2;
    7361                 :      13652 :       else if (set_src_cost (x, mode, optimize_this_for_speed_p)
    7362                 :      13652 :                > set_src_cost (temp, mode, optimize_this_for_speed_p))
    7363                 :            :        return temp;
    7364                 :            :       else
    7365                 :       6853 :        return x;
    7366                 :            :     }
    7367                 :            : 
    7368                 :            :   /* We can optimize some special cases of ZERO_EXTEND.  */
    7369                 :    2928690 :   if (GET_CODE (x) == ZERO_EXTEND)
    7370                 :            :     {
    7371                 :            :       /* (zero_extend:DI (truncate:SI foo:DI)) is just foo:DI if we
    7372                 :            :          know that the last value didn't have any inappropriate bits
    7373                 :            :          set.  */
    7374                 :    1308720 :       if (GET_CODE (XEXP (x, 0)) == TRUNCATE
    7375                 :       1191 :           && GET_MODE (XEXP (XEXP (x, 0), 0)) == mode
    7376                 :       1079 :           && HWI_COMPUTABLE_MODE_P (mode)
    7377                 :    1308800 :           && (nonzero_bits (XEXP (XEXP (x, 0), 0), mode)
    7378                 :         75 :               & ~GET_MODE_MASK (inner_mode)) == 0)
    7379                 :         65 :         return XEXP (XEXP (x, 0), 0);
    7380                 :            : 
    7381                 :            :       /* Likewise for (zero_extend:DI (subreg:SI foo:DI 0)).  */
    7382                 :    1308660 :       if (GET_CODE (XEXP (x, 0)) == SUBREG
    7383                 :     410934 :           && GET_MODE (SUBREG_REG (XEXP (x, 0))) == mode
    7384                 :     386482 :           && subreg_lowpart_p (XEXP (x, 0))
    7385                 :     169761 :           && HWI_COMPUTABLE_MODE_P (mode)
    7386                 :    1472900 :           && (nonzero_bits (SUBREG_REG (XEXP (x, 0)), mode)
    7387                 :     164239 :               & ~GET_MODE_MASK (inner_mode)) == 0)
    7388                 :         74 :         return SUBREG_REG (XEXP (x, 0));
    7389                 :            : 
    7390                 :            :       /* (zero_extend:DI (truncate:SI foo:DI)) is just foo:DI when foo
    7391                 :            :          is a comparison and STORE_FLAG_VALUE permits.  This is like
    7392                 :            :          the first case, but it works even when MODE is larger
    7393                 :            :          than HOST_WIDE_INT.  */
    7394                 :    1308580 :       if (GET_CODE (XEXP (x, 0)) == TRUNCATE
    7395                 :       1126 :           && GET_MODE (XEXP (XEXP (x, 0), 0)) == mode
    7396                 :       1014 :           && COMPARISON_P (XEXP (XEXP (x, 0), 0))
    7397                 :          0 :           && GET_MODE_PRECISION (inner_mode) <= HOST_BITS_PER_WIDE_INT
    7398                 :    1308580 :           && (STORE_FLAG_VALUE & ~GET_MODE_MASK (inner_mode)) == 0)
    7399                 :            :         return XEXP (XEXP (x, 0), 0);
    7400                 :            : 
    7401                 :            :       /* Likewise for (zero_extend:DI (subreg:SI foo:DI 0)).  */
    7402                 :    1308580 :       if (GET_CODE (XEXP (x, 0)) == SUBREG
    7403                 :     410860 :           && GET_MODE (SUBREG_REG (XEXP (x, 0))) == mode
    7404                 :     386408 :           && subreg_lowpart_p (XEXP (x, 0))
    7405                 :     169687 :           && COMPARISON_P (SUBREG_REG (XEXP (x, 0)))
    7406                 :          0 :           && GET_MODE_PRECISION (inner_mode) <= HOST_BITS_PER_WIDE_INT
    7407                 :    1308580 :           && (STORE_FLAG_VALUE & ~GET_MODE_MASK (inner_mode)) == 0)
    7408                 :            :         return SUBREG_REG (XEXP (x, 0));
    7409                 :            : 
    7410                 :            :     }
    7411                 :            : 
    7412                 :            :   /* If we reach here, we want to return a pair of shifts.  The inner
    7413                 :            :      shift is a left shift of BITSIZE - POS - LEN bits.  The outer
    7414                 :            :      shift is a right shift of BITSIZE - LEN bits.  It is arithmetic or
    7415                 :            :      logical depending on the value of UNSIGNEDP.
    7416                 :            : 
    7417                 :            :      If this was a ZERO_EXTEND or ZERO_EXTRACT, this pair of shifts will be
    7418                 :            :      converted into an AND of a shift.
    7419                 :            : 
    7420                 :            :      We must check for the case where the left shift would have a negative
    7421                 :            :      count.  This can happen in a case like (x >> 31) & 255 on machines
    7422                 :            :      that can't shift by a constant.  On those machines, we would first
    7423                 :            :      combine the shift with the AND to produce a variable-position
    7424                 :            :      extraction.  Then the constant of 31 would be substituted in
    7425                 :            :      to produce such a position.  */
    7426                 :            : 
    7427                 :    2928550 :   modewidth = GET_MODE_PRECISION (mode);
    7428                 :    2928550 :   if (modewidth >= pos + len)
    7429                 :            :     {
    7430                 :    2928550 :       tem = gen_lowpart (mode, XEXP (x, 0));
    7431                 :    2928550 :       if (!tem || GET_CODE (tem) == CLOBBER)
    7432                 :            :         return x;
    7433                 :    4328580 :       tem = simplify_shift_const (NULL_RTX, ASHIFT, mode,
    7434                 :    2164290 :                                   tem, modewidth - pos - len);
    7435                 :    2164290 :       tem = simplify_shift_const (NULL_RTX, unsignedp ? LSHIFTRT : ASHIFTRT,
    7436                 :    2164290 :                                   mode, tem, modewidth - len);
    7437                 :            :     }
    7438                 :          0 :   else if (unsignedp && len < HOST_BITS_PER_WIDE_INT)
    7439                 :          0 :     tem = simplify_and_const_int (NULL_RTX, mode,
    7440                 :            :                                   simplify_shift_const (NULL_RTX, LSHIFTRT,
    7441                 :            :                                                         mode, XEXP (x, 0),
    7442                 :            :                                                         pos),
    7443                 :          0 :                                   (HOST_WIDE_INT_1U << len) - 1);
    7444                 :            :   else
    7445                 :            :     /* Any other cases we can't handle.  */
    7446                 :            :     return x;
    7447                 :            : 
    7448                 :            :   /* If we couldn't do this for some reason, return the original
    7449                 :            :      expression.  */
    7450                 :    2164290 :   if (GET_CODE (tem) == CLOBBER)
    7451                 :          0 :     return x;
    7452                 :            : 
    7453                 :            :   return tem;
    7454                 :            : }
    7455                 :            : 
    7456                 :            : /* X is a SET which contains an assignment of one object into
    7457                 :            :    a part of another (such as a bit-field assignment, STRICT_LOW_PART,
    7458                 :            :    or certain SUBREGS). If possible, convert it into a series of
    7459                 :            :    logical operations.
    7460                 :            : 
    7461                 :            :    We half-heartedly support variable positions, but do not at all
    7462                 :            :    support variable lengths.  */
    7463                 :            : 
    7464                 :            : static const_rtx
    7465                 :   49694300 : expand_field_assignment (const_rtx x)
    7466                 :            : {
    7467                 :   49694300 :   rtx inner;
    7468                 :   49694300 :   rtx pos;                      /* Always counts from low bit.  */
    7469                 :   49694300 :   int len, inner_len;
    7470                 :   49694300 :   rtx mask, cleared, masked;
    7471                 :   49694300 :   scalar_int_mode compute_mode;
    7472                 :            : 
    7473                 :            :   /* Loop until we find something we can't simplify.  */
    7474                 :   49805500 :   while (1)
    7475                 :            :     {
    7476                 :   49805500 :       if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
    7477                 :       8963 :           && GET_CODE (XEXP (SET_DEST (x), 0)) == SUBREG)
    7478                 :            :         {
    7479                 :       8963 :           rtx x0 = XEXP (SET_DEST (x), 0);
    7480                 :       8963 :           if (!GET_MODE_PRECISION (GET_MODE (x0)).is_constant (&len))
    7481                 :            :             break;
    7482                 :       8963 :           inner = SUBREG_REG (XEXP (SET_DEST (x), 0));
    7483                 :       8963 :           pos = gen_int_mode (subreg_lsb (XEXP (SET_DEST (x), 0)),
    7484                 :       8963 :                               MAX_MODE_INT);
    7485                 :            :         }
    7486                 :   49796600 :       else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT
    7487                 :       2896 :                && CONST_INT_P (XEXP (SET_DEST (x), 1)))
    7488                 :            :         {
    7489                 :       2896 :           inner = XEXP (SET_DEST (x), 0);
    7490                 :