LCOV - code coverage report
Current view: top level - gcc - ira-costs.c (source / functions) Hit Total Coverage
Test: gcc.info Lines: 1125 1186 94.9 %
Date: 2020-03-28 11:57:23 Functions: 30 31 96.8 %
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           Branch data     Line data    Source code
       1                 :            : /* IRA hard register and memory cost calculation for allocnos or pseudos.
       2                 :            :    Copyright (C) 2006-2020 Free Software Foundation, Inc.
       3                 :            :    Contributed by Vladimir Makarov <vmakarov@redhat.com>.
       4                 :            : 
       5                 :            : This file is part of GCC.
       6                 :            : 
       7                 :            : GCC is free software; you can redistribute it and/or modify it under
       8                 :            : the terms of the GNU General Public License as published by the Free
       9                 :            : Software Foundation; either version 3, or (at your option) any later
      10                 :            : version.
      11                 :            : 
      12                 :            : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
      13                 :            : WARRANTY; without even the implied warranty of MERCHANTABILITY or
      14                 :            : FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
      15                 :            : for more details.
      16                 :            : 
      17                 :            : You should have received a copy of the GNU General Public License
      18                 :            : along with GCC; see the file COPYING3.  If not see
      19                 :            : <http://www.gnu.org/licenses/>.  */
      20                 :            : 
      21                 :            : #include "config.h"
      22                 :            : #include "system.h"
      23                 :            : #include "coretypes.h"
      24                 :            : #include "backend.h"
      25                 :            : #include "target.h"
      26                 :            : #include "rtl.h"
      27                 :            : #include "tree.h"
      28                 :            : #include "predict.h"
      29                 :            : #include "memmodel.h"
      30                 :            : #include "tm_p.h"
      31                 :            : #include "insn-config.h"
      32                 :            : #include "regs.h"
      33                 :            : #include "ira.h"
      34                 :            : #include "ira-int.h"
      35                 :            : #include "addresses.h"
      36                 :            : #include "reload.h"
      37                 :            : 
      38                 :            : /* The flags is set up every time when we calculate pseudo register
      39                 :            :    classes through function ira_set_pseudo_classes.  */
      40                 :            : static bool pseudo_classes_defined_p = false;
      41                 :            : 
      42                 :            : /* TRUE if we work with allocnos.  Otherwise we work with pseudos.  */
      43                 :            : static bool allocno_p;
      44                 :            : 
      45                 :            : /* Number of elements in array `costs'.  */
      46                 :            : static int cost_elements_num;
      47                 :            : 
      48                 :            : /* The `costs' struct records the cost of using hard registers of each
      49                 :            :    class considered for the calculation and of using memory for each
      50                 :            :    allocno or pseudo.  */
      51                 :            : struct costs
      52                 :            : {
      53                 :            :   int mem_cost;
      54                 :            :   /* Costs for register classes start here.  We process only some
      55                 :            :      allocno classes.  */
      56                 :            :   int cost[1];
      57                 :            : };
      58                 :            : 
      59                 :            : #define max_struct_costs_size \
      60                 :            :   (this_target_ira_int->x_max_struct_costs_size)
      61                 :            : #define init_cost \
      62                 :            :   (this_target_ira_int->x_init_cost)
      63                 :            : #define temp_costs \
      64                 :            :   (this_target_ira_int->x_temp_costs)
      65                 :            : #define op_costs \
      66                 :            :   (this_target_ira_int->x_op_costs)
      67                 :            : #define this_op_costs \
      68                 :            :   (this_target_ira_int->x_this_op_costs)
      69                 :            : 
      70                 :            : /* Costs of each class for each allocno or pseudo.  */
      71                 :            : static struct costs *costs;
      72                 :            : 
      73                 :            : /* Accumulated costs of each class for each allocno.  */
      74                 :            : static struct costs *total_allocno_costs;
      75                 :            : 
      76                 :            : /* It is the current size of struct costs.  */
      77                 :            : static size_t struct_costs_size;
      78                 :            : 
      79                 :            : /* Return pointer to structure containing costs of allocno or pseudo
      80                 :            :    with given NUM in array ARR.  */
      81                 :            : #define COSTS(arr, num) \
      82                 :            :   ((struct costs *) ((char *) (arr) + (num) * struct_costs_size))
      83                 :            : 
      84                 :            : /* Return index in COSTS when processing reg with REGNO.  */
      85                 :            : #define COST_INDEX(regno) (allocno_p                                         \
      86                 :            :                            ? ALLOCNO_NUM (ira_curr_regno_allocno_map[regno]) \
      87                 :            :                            : (int) regno)
      88                 :            : 
      89                 :            : /* Record register class preferences of each allocno or pseudo.  Null
      90                 :            :    value means no preferences.  It happens on the 1st iteration of the
      91                 :            :    cost calculation.  */
      92                 :            : static enum reg_class *pref;
      93                 :            : 
      94                 :            : /* Allocated buffers for pref.  */
      95                 :            : static enum reg_class *pref_buffer;
      96                 :            : 
      97                 :            : /* Record allocno class of each allocno with the same regno.  */
      98                 :            : static enum reg_class *regno_aclass;
      99                 :            : 
     100                 :            : /* Record cost gains for not allocating a register with an invariant
     101                 :            :    equivalence.  */
     102                 :            : static int *regno_equiv_gains;
     103                 :            : 
     104                 :            : /* Execution frequency of the current insn.  */
     105                 :            : static int frequency;
     106                 :            : 
     107                 :            : 
     108                 :            : 
     109                 :            : /* Info about reg classes whose costs are calculated for a pseudo.  */
     110                 :            : struct cost_classes
     111                 :            : {
     112                 :            :   /* Number of the cost classes in the subsequent array.  */
     113                 :            :   int num;
     114                 :            :   /* Container of the cost classes.  */
     115                 :            :   enum reg_class classes[N_REG_CLASSES];
     116                 :            :   /* Map reg class -> index of the reg class in the previous array.
     117                 :            :      -1 if it is not a cost class.  */
     118                 :            :   int index[N_REG_CLASSES];
     119                 :            :   /* Map hard regno index of first class in array CLASSES containing
     120                 :            :      the hard regno, -1 otherwise.  */
     121                 :            :   int hard_regno_index[FIRST_PSEUDO_REGISTER];
     122                 :            : };
     123                 :            : 
     124                 :            : /* Types of pointers to the structure above.  */
     125                 :            : typedef struct cost_classes *cost_classes_t;
     126                 :            : typedef const struct cost_classes *const_cost_classes_t;
     127                 :            : 
     128                 :            : /* Info about cost classes for each pseudo.  */
     129                 :            : static cost_classes_t *regno_cost_classes;
     130                 :            : 
     131                 :            : /* Helper for cost_classes hashing.  */
     132                 :            : 
     133                 :            : struct cost_classes_hasher : pointer_hash <cost_classes>
     134                 :            : {
     135                 :            :   static inline hashval_t hash (const cost_classes *);
     136                 :            :   static inline bool equal (const cost_classes *, const cost_classes *);
     137                 :            :   static inline void remove (cost_classes *);
     138                 :            : };
     139                 :            : 
     140                 :            : /* Returns hash value for cost classes info HV.  */
     141                 :            : inline hashval_t
     142                 :   48969900 : cost_classes_hasher::hash (const cost_classes *hv)
     143                 :            : {
     144                 :   48969900 :   return iterative_hash (&hv->classes, sizeof (enum reg_class) * hv->num, 0);
     145                 :            : }
     146                 :            : 
     147                 :            : /* Compares cost classes info HV1 and HV2.  */
     148                 :            : inline bool
     149                 :   44266000 : cost_classes_hasher::equal (const cost_classes *hv1, const cost_classes *hv2)
     150                 :            : {
     151                 :   44266000 :   return (hv1->num == hv2->num
     152                 :   44266000 :           && memcmp (hv1->classes, hv2->classes,
     153                 :   32905300 :                      sizeof (enum reg_class) * hv1->num) == 0);
     154                 :            : }
     155                 :            : 
     156                 :            : /* Delete cost classes info V from the hash table.  */
     157                 :            : inline void
     158                 :    3738340 : cost_classes_hasher::remove (cost_classes *v)
     159                 :            : {
     160                 :    3738340 :   ira_free (v);
     161                 :    3738340 : }
     162                 :            : 
     163                 :            : /* Hash table of unique cost classes.  */
     164                 :            : static hash_table<cost_classes_hasher> *cost_classes_htab;
     165                 :            : 
     166                 :            : /* Map allocno class -> cost classes for pseudo of given allocno
     167                 :            :    class.  */
     168                 :            : static cost_classes_t cost_classes_aclass_cache[N_REG_CLASSES];
     169                 :            : 
     170                 :            : /* Map mode -> cost classes for pseudo of give mode.  */
     171                 :            : static cost_classes_t cost_classes_mode_cache[MAX_MACHINE_MODE];
     172                 :            : 
     173                 :            : /* Cost classes that include all classes in ira_important_classes.  */
     174                 :            : static cost_classes all_cost_classes;
     175                 :            : 
     176                 :            : /* Use the array of classes in CLASSES_PTR to fill out the rest of
     177                 :            :    the structure.  */
     178                 :            : static void
     179                 :    4701500 : complete_cost_classes (cost_classes_t classes_ptr)
     180                 :            : {
     181                 :  145747000 :   for (int i = 0; i < N_REG_CLASSES; i++)
     182                 :  141045000 :     classes_ptr->index[i] = -1;
     183                 :  362016000 :   for (int i = 0; i < FIRST_PSEUDO_REGISTER; i++)
     184                 :  357314000 :     classes_ptr->hard_regno_index[i] = -1;
     185                 :   88793100 :   for (int i = 0; i < classes_ptr->num; i++)
     186                 :            :     {
     187                 :   84091600 :       enum reg_class cl = classes_ptr->classes[i];
     188                 :   84091600 :       classes_ptr->index[cl] = i;
     189                 :  974209000 :       for (int j = ira_class_hard_regs_num[cl] - 1; j >= 0; j--)
     190                 :            :         {
     191                 :  890118000 :           unsigned int hard_regno = ira_class_hard_regs[cl][j];
     192                 :  890118000 :           if (classes_ptr->hard_regno_index[hard_regno] < 0)
     193                 :  189663000 :             classes_ptr->hard_regno_index[hard_regno] = i;
     194                 :            :         }
     195                 :            :     }
     196                 :    4701500 : }
     197                 :            : 
     198                 :            : /* Initialize info about the cost classes for each pseudo.  */
     199                 :            : static void
     200                 :     963156 : initiate_regno_cost_classes (void)
     201                 :            : {
     202                 :     963156 :   int size = sizeof (cost_classes_t) * max_reg_num ();
     203                 :            : 
     204                 :     963156 :   regno_cost_classes = (cost_classes_t *) ira_allocate (size);
     205                 :     963156 :   memset (regno_cost_classes, 0, size);
     206                 :     963156 :   memset (cost_classes_aclass_cache, 0,
     207                 :            :           sizeof (cost_classes_t) * N_REG_CLASSES);
     208                 :     963156 :   memset (cost_classes_mode_cache, 0,
     209                 :            :           sizeof (cost_classes_t) * MAX_MACHINE_MODE);
     210                 :     963156 :   cost_classes_htab = new hash_table<cost_classes_hasher> (200);
     211                 :     963156 :   all_cost_classes.num = ira_important_classes_num;
     212                 :   27046900 :   for (int i = 0; i < ira_important_classes_num; i++)
     213                 :   26083800 :     all_cost_classes.classes[i] = ira_important_classes[i];
     214                 :     963156 :   complete_cost_classes (&all_cost_classes);
     215                 :     963156 : }
     216                 :            : 
     217                 :            : /* Create new cost classes from cost classes FROM and set up members
     218                 :            :    index and hard_regno_index.  Return the new classes.  The function
     219                 :            :    implements some common code of two functions
     220                 :            :    setup_regno_cost_classes_by_aclass and
     221                 :            :    setup_regno_cost_classes_by_mode.  */
     222                 :            : static cost_classes_t
     223                 :    3738340 : setup_cost_classes (cost_classes_t from)
     224                 :            : {
     225                 :    3738340 :   cost_classes_t classes_ptr;
     226                 :            : 
     227                 :    3738340 :   classes_ptr = (cost_classes_t) ira_allocate (sizeof (struct cost_classes));
     228                 :    3738340 :   classes_ptr->num = from->num;
     229                 :   61746100 :   for (int i = 0; i < from->num; i++)
     230                 :   58007800 :     classes_ptr->classes[i] = from->classes[i];
     231                 :    3738340 :   complete_cost_classes (classes_ptr);
     232                 :    3738340 :   return classes_ptr;
     233                 :            : }
     234                 :            : 
     235                 :            : /* Return a version of FULL that only considers registers in REGS that are
     236                 :            :    valid for mode MODE.  Both FULL and the returned class are globally
     237                 :            :    allocated.  */
     238                 :            : static cost_classes_t
     239                 :   33730500 : restrict_cost_classes (cost_classes_t full, machine_mode mode,
     240                 :            :                        const_hard_reg_set regs)
     241                 :            : {
     242                 :   33730500 :   static struct cost_classes narrow;
     243                 :   33730500 :   int map[N_REG_CLASSES];
     244                 :   33730500 :   narrow.num = 0;
     245                 :  860952000 :   for (int i = 0; i < full->num; i++)
     246                 :            :     {
     247                 :            :       /* Assume that we'll drop the class.  */
     248                 :  827221000 :       map[i] = -1;
     249                 :            : 
     250                 :            :       /* Ignore classes that are too small for the mode.  */
     251                 :  827221000 :       enum reg_class cl = full->classes[i];
     252                 :  827221000 :       if (!contains_reg_of_mode[cl][mode])
     253                 :  162710000 :         continue;
     254                 :            : 
     255                 :            :       /* Calculate the set of registers in CL that belong to REGS and
     256                 :            :          are valid for MODE.  */
     257                 :  671167000 :       HARD_REG_SET valid_for_cl = reg_class_contents[cl] & regs;
     258                 : 1342330000 :       valid_for_cl &= ~(ira_prohibited_class_mode_regs[cl][mode]
     259                 : 2013500000 :                         | ira_no_alloc_regs);
     260                 : 1342330000 :       if (hard_reg_set_empty_p (valid_for_cl))
     261                 :    6656010 :         continue;
     262                 :            : 
     263                 :            :       /* Don't use this class if the set of valid registers is a subset
     264                 :            :          of an existing class.  For example, suppose we have two classes
     265                 :            :          GR_REGS and FR_REGS and a union class GR_AND_FR_REGS.  Suppose
     266                 :            :          that the mode changes allowed by FR_REGS are not as general as
     267                 :            :          the mode changes allowed by GR_REGS.
     268                 :            : 
     269                 :            :          In this situation, the mode changes for GR_AND_FR_REGS could
     270                 :            :          either be seen as the union or the intersection of the mode
     271                 :            :          changes allowed by the two subclasses.  The justification for
     272                 :            :          the union-based definition would be that, if you want a mode
     273                 :            :          change that's only allowed by GR_REGS, you can pick a register
     274                 :            :          from the GR_REGS subclass.  The justification for the
     275                 :            :          intersection-based definition would be that every register
     276                 :            :          from the class would allow the mode change.
     277                 :            : 
     278                 :            :          However, if we have a register that needs to be in GR_REGS,
     279                 :            :          using GR_AND_FR_REGS with the intersection-based definition
     280                 :            :          would be too pessimistic, since it would bring in restrictions
     281                 :            :          that only apply to FR_REGS.  Conversely, if we have a register
     282                 :            :          that needs to be in FR_REGS, using GR_AND_FR_REGS with the
     283                 :            :          union-based definition would lose the extra restrictions
     284                 :            :          placed on FR_REGS.  GR_AND_FR_REGS is therefore only useful
     285                 :            :          for cases where GR_REGS and FP_REGS are both valid.  */
     286                 :            :       int pos;
     287                 : 6286570000 :       for (pos = 0; pos < narrow.num; ++pos)
     288                 :            :         {
     289                 : 5809740000 :           enum reg_class cl2 = narrow.classes[pos];
     290                 :11619500000 :           if (hard_reg_set_subset_p (valid_for_cl, reg_class_contents[cl2]))
     291                 :            :             break;
     292                 :            :         }
     293                 :  664511000 :       map[i] = pos;
     294                 :  664511000 :       if (pos == narrow.num)
     295                 :            :         {
     296                 :            :           /* If several classes are equivalent, prefer to use the one
     297                 :            :              that was chosen as the allocno class.  */
     298                 :  476828000 :           enum reg_class cl2 = ira_allocno_class_translate[cl];
     299                 :  476828000 :           if (ira_class_hard_regs_num[cl] == ira_class_hard_regs_num[cl2])
     300                 :  476828000 :             cl = cl2;
     301                 :  476828000 :           narrow.classes[narrow.num++] = cl;
     302                 :            :         }
     303                 :            :     }
     304                 :   33730500 :   if (narrow.num == full->num)
     305                 :            :     return full;
     306                 :            : 
     307                 :   33730100 :   cost_classes **slot = cost_classes_htab->find_slot (&narrow, INSERT);
     308                 :   33730100 :   if (*slot == NULL)
     309                 :            :     {
     310                 :    2466680 :       cost_classes_t classes = setup_cost_classes (&narrow);
     311                 :            :       /* Map equivalent classes to the representative that we chose above.  */
     312                 :   69352300 :       for (int i = 0; i < ira_important_classes_num; i++)
     313                 :            :         {
     314                 :   66885600 :           enum reg_class cl = ira_important_classes[i];
     315                 :   66885600 :           int index = full->index[cl];
     316                 :   66885600 :           if (index >= 0)
     317                 :   59304000 :             classes->index[cl] = map[index];
     318                 :            :         }
     319                 :    2466680 :       *slot = classes;
     320                 :            :     }
     321                 :   33730100 :   return *slot;
     322                 :            : }
     323                 :            : 
     324                 :            : /* Setup cost classes for pseudo REGNO whose allocno class is ACLASS.
     325                 :            :    This function is used when we know an initial approximation of
     326                 :            :    allocno class of the pseudo already, e.g. on the second iteration
     327                 :            :    of class cost calculation or after class cost calculation in
     328                 :            :    register-pressure sensitive insn scheduling or register-pressure
     329                 :            :    sensitive loop-invariant motion.  */
     330                 :            : static void
     331                 :   31558300 : setup_regno_cost_classes_by_aclass (int regno, enum reg_class aclass)
     332                 :            : {
     333                 :   31558300 :   static struct cost_classes classes;
     334                 :   31558300 :   cost_classes_t classes_ptr;
     335                 :   31558300 :   enum reg_class cl;
     336                 :   31558300 :   int i;
     337                 :   31558300 :   cost_classes **slot;
     338                 :   31558300 :   HARD_REG_SET temp, temp2;
     339                 :   31558300 :   bool exclude_p;
     340                 :            : 
     341                 :   31558300 :   if ((classes_ptr = cost_classes_aclass_cache[aclass]) == NULL)
     342                 :            :     {
     343                 :    5393090 :       temp = reg_class_contents[aclass] & ~ira_no_alloc_regs;
     344                 :            :       /* We exclude classes from consideration which are subsets of
     345                 :            :          ACLASS only if ACLASS is an uniform class.  */
     346                 :    2696550 :       exclude_p = ira_uniform_class_p[aclass];
     347                 :    2696550 :       classes.num = 0;
     348                 :   75765800 :       for (i = 0; i < ira_important_classes_num; i++)
     349                 :            :         {
     350                 :   73069300 :           cl = ira_important_classes[i];
     351                 :   73069300 :           if (exclude_p)
     352                 :            :             {
     353                 :            :               /* Exclude non-uniform classes which are subsets of
     354                 :            :                  ACLASS.  */
     355                 :  156674000 :               temp2 = reg_class_contents[cl] & ~ira_no_alloc_regs;
     356                 :  104449000 :               if (hard_reg_set_subset_p (temp2, temp) && cl != aclass)
     357                 :    6091220 :                 continue;
     358                 :            :             }
     359                 :   66978000 :           classes.classes[classes.num++] = cl;
     360                 :            :         }
     361                 :    2696550 :       slot = cost_classes_htab->find_slot (&classes, INSERT);
     362                 :    2696550 :       if (*slot == NULL)
     363                 :            :         {
     364                 :    1271670 :           classes_ptr = setup_cost_classes (&classes);
     365                 :    1271670 :           *slot = classes_ptr;
     366                 :            :         }
     367                 :    2696550 :       classes_ptr = cost_classes_aclass_cache[aclass] = (cost_classes_t) *slot;
     368                 :            :     }
     369                 :   31558300 :   if (regno_reg_rtx[regno] != NULL_RTX)
     370                 :            :     {
     371                 :            :       /* Restrict the classes to those that are valid for REGNO's mode
     372                 :            :          (which might for example exclude singleton classes if the mode
     373                 :            :          requires two registers).  Also restrict the classes to those that
     374                 :            :          are valid for subregs of REGNO.  */
     375                 :   30418200 :       const HARD_REG_SET *valid_regs = valid_mode_changes_for_regno (regno);
     376                 :   30418200 :       if (!valid_regs)
     377                 :   29698200 :         valid_regs = &reg_class_contents[ALL_REGS];
     378                 :   30418200 :       classes_ptr = restrict_cost_classes (classes_ptr,
     379                 :   30418200 :                                            PSEUDO_REGNO_MODE (regno),
     380                 :            :                                            *valid_regs);
     381                 :            :     }
     382                 :   31558300 :   regno_cost_classes[regno] = classes_ptr;
     383                 :   31558300 : }
     384                 :            : 
     385                 :            : /* Setup cost classes for pseudo REGNO with MODE.  Usage of MODE can
     386                 :            :    decrease number of cost classes for the pseudo, if hard registers
     387                 :            :    of some important classes cannot hold a value of MODE.  So the
     388                 :            :    pseudo cannot get hard register of some important classes and cost
     389                 :            :    calculation for such important classes is only wasting CPU
     390                 :            :    time.  */
     391                 :            : static void
     392                 :   40502600 : setup_regno_cost_classes_by_mode (int regno, machine_mode mode)
     393                 :            : {
     394                 :   40502600 :   if (const HARD_REG_SET *valid_regs = valid_mode_changes_for_regno (regno))
     395                 :    1056200 :     regno_cost_classes[regno] = restrict_cost_classes (&all_cost_classes,
     396                 :            :                                                        mode, *valid_regs);
     397                 :            :   else
     398                 :            :     {
     399                 :   39446400 :       if (cost_classes_mode_cache[mode] == NULL)
     400                 :    2256120 :         cost_classes_mode_cache[mode]
     401                 :    2256120 :           = restrict_cost_classes (&all_cost_classes, mode,
     402                 :    2256120 :                                    reg_class_contents[ALL_REGS]);
     403                 :   39446400 :       regno_cost_classes[regno] = cost_classes_mode_cache[mode];
     404                 :            :     }
     405                 :   40502600 : }
     406                 :            : 
     407                 :            : /* Finalize info about the cost classes for each pseudo.  */
     408                 :            : static void
     409                 :     963156 : finish_regno_cost_classes (void)
     410                 :            : {
     411                 :     963156 :   ira_free (regno_cost_classes);
     412                 :     963156 :   delete cost_classes_htab;
     413                 :     963156 :   cost_classes_htab = NULL;
     414                 :     963156 : }
     415                 :            : 
     416                 :            : 
     417                 :            : 
     418                 :            : /* Compute the cost of loading X into (if TO_P is TRUE) or from (if
     419                 :            :    TO_P is FALSE) a register of class RCLASS in mode MODE.  X must not
     420                 :            :    be a pseudo register.  */
     421                 :            : static int
     422                 :  126013000 : copy_cost (rtx x, machine_mode mode, reg_class_t rclass, bool to_p,
     423                 :            :            secondary_reload_info *prev_sri)
     424                 :            : {
     425                 :  126013000 :   secondary_reload_info sri;
     426                 :  126013000 :   reg_class_t secondary_class = NO_REGS;
     427                 :            : 
     428                 :            :   /* If X is a SCRATCH, there is actually nothing to move since we are
     429                 :            :      assuming optimal allocation.  */
     430                 :  126013000 :   if (GET_CODE (x) == SCRATCH)
     431                 :            :     return 0;
     432                 :            : 
     433                 :            :   /* Get the class we will actually use for a reload.  */
     434                 :  125543000 :   rclass = targetm.preferred_reload_class (x, rclass);
     435                 :            : 
     436                 :            :   /* If we need a secondary reload for an intermediate, the cost is
     437                 :            :      that to load the input into the intermediate register, then to
     438                 :            :      copy it.  */
     439                 :  125543000 :   sri.prev_sri = prev_sri;
     440                 :  125543000 :   sri.extra_cost = 0;
     441                 :            :   /* PR 68770: Secondary reload might examine the t_icode field.  */
     442                 :  125543000 :   sri.t_icode = CODE_FOR_nothing;
     443                 :            : 
     444                 :  125543000 :   secondary_class = targetm.secondary_reload (to_p, x, rclass, mode, &sri);
     445                 :            : 
     446                 :  125543000 :   if (secondary_class != NO_REGS)
     447                 :            :     {
     448                 :       4554 :       ira_init_register_move_cost_if_necessary (mode);
     449                 :       4554 :       return (ira_register_move_cost[mode][(int) secondary_class][(int) rclass]
     450                 :       4554 :               + sri.extra_cost
     451                 :       4554 :               + copy_cost (x, mode, secondary_class, to_p, &sri));
     452                 :            :     }
     453                 :            : 
     454                 :            :   /* For memory, use the memory move cost, for (hard) registers, use
     455                 :            :      the cost to move between the register classes, and use 2 for
     456                 :            :      everything else (constants).  */
     457                 :  125538000 :   if (MEM_P (x) || rclass == NO_REGS)
     458                 :   79504300 :     return sri.extra_cost
     459                 :   79504300 :            + ira_memory_move_cost[mode][(int) rclass][to_p != 0];
     460                 :   46033900 :   else if (REG_P (x))
     461                 :            :     {
     462                 :    5404670 :       reg_class_t x_class = REGNO_REG_CLASS (REGNO (x));
     463                 :            : 
     464                 :    5404670 :       ira_init_register_move_cost_if_necessary (mode);
     465                 :    5404670 :       return (sri.extra_cost
     466                 :    5404670 :               + ira_register_move_cost[mode][(int) x_class][(int) rclass]);
     467                 :            :     }
     468                 :            :   else
     469                 :            :     /* If this is a constant, we may eventually want to call rtx_cost
     470                 :            :        here.  */
     471                 :   40629200 :     return sri.extra_cost + COSTS_N_INSNS (1);
     472                 :            : }
     473                 :            : 
     474                 :            : 
     475                 :            : 
     476                 :            : /* Record the cost of using memory or hard registers of various
     477                 :            :    classes for the operands in INSN.
     478                 :            : 
     479                 :            :    N_ALTS is the number of alternatives.
     480                 :            :    N_OPS is the number of operands.
     481                 :            :    OPS is an array of the operands.
     482                 :            :    MODES are the modes of the operands, in case any are VOIDmode.
     483                 :            :    CONSTRAINTS are the constraints to use for the operands.  This array
     484                 :            :    is modified by this procedure.
     485                 :            : 
     486                 :            :    This procedure works alternative by alternative.  For each
     487                 :            :    alternative we assume that we will be able to allocate all allocnos
     488                 :            :    to their ideal register class and calculate the cost of using that
     489                 :            :    alternative.  Then we compute, for each operand that is a
     490                 :            :    pseudo-register, the cost of having the allocno allocated to each
     491                 :            :    register class and using it in that alternative.  To this cost is
     492                 :            :    added the cost of the alternative.
     493                 :            : 
     494                 :            :    The cost of each class for this insn is its lowest cost among all
     495                 :            :    the alternatives.  */
     496                 :            : static void
     497                 :   89352000 : record_reg_classes (int n_alts, int n_ops, rtx *ops,
     498                 :            :                     machine_mode *modes, const char **constraints,
     499                 :            :                     rtx_insn *insn, enum reg_class *pref)
     500                 :            : {
     501                 :   89352000 :   int alt;
     502                 :   89352000 :   int i, j, k;
     503                 :   89352000 :   int insn_allows_mem[MAX_RECOG_OPERANDS];
     504                 :   89352000 :   move_table *move_in_cost, *move_out_cost;
     505                 :   89352000 :   short (*mem_cost)[2];
     506                 :            : 
     507                 :  292168000 :   for (i = 0; i < n_ops; i++)
     508                 :  202816000 :     insn_allows_mem[i] = 0;
     509                 :            : 
     510                 :            :   /* Process each alternative, each time minimizing an operand's cost
     511                 :            :      with the cost for each operand in that alternative.  */
     512                 :   89352000 :   alternative_mask preferred = get_preferred_alternatives (insn);
     513                 :  954355000 :   for (alt = 0; alt < n_alts; alt++)
     514                 :            :     {
     515                 :  865003000 :       enum reg_class classes[MAX_RECOG_OPERANDS];
     516                 :  865003000 :       int allows_mem[MAX_RECOG_OPERANDS];
     517                 :  865003000 :       enum reg_class rclass;
     518                 :  865003000 :       int alt_fail = 0;
     519                 :  865003000 :       int alt_cost = 0, op_cost_add;
     520                 :            : 
     521                 :  865003000 :       if (!TEST_BIT (preferred, alt))
     522                 :            :         {
     523                 :  339822000 :           for (i = 0; i < recog_data.n_operands; i++)
     524                 :  457122000 :             constraints[i] = skip_alternative (constraints[i]);
     525                 :            : 
     526                 :  652262000 :           continue;
     527                 :            :         }
     528                 :            : 
     529                 : 1396270000 :       for (i = 0; i < n_ops; i++)
     530                 :            :         {
     531                 : 1183530000 :           unsigned char c;
     532                 : 1183530000 :           const char *p = constraints[i];
     533                 : 1183530000 :           rtx op = ops[i];
     534                 : 1183530000 :           machine_mode mode = modes[i];
     535                 : 1183530000 :           int allows_addr = 0;
     536                 : 1183530000 :           int win = 0;
     537                 :            : 
     538                 :            :           /* Initially show we know nothing about the register class.  */
     539                 : 1183530000 :           classes[i] = NO_REGS;
     540                 : 1183530000 :           allows_mem[i] = 0;
     541                 :            : 
     542                 :            :           /* If this operand has no constraints at all, we can
     543                 :            :              conclude nothing about it since anything is valid.  */
     544                 : 1183530000 :           if (*p == 0)
     545                 :            :             {
     546                 :   18095100 :               if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
     547                 :         11 :                 memset (this_op_costs[i], 0, struct_costs_size);
     548                 :   18095100 :               continue;
     549                 :            :             }
     550                 :            : 
     551                 :            :           /* If this alternative is only relevant when this operand
     552                 :            :              matches a previous operand, we do different things
     553                 :            :              depending on whether this operand is a allocno-reg or not.
     554                 :            :              We must process any modifiers for the operand before we
     555                 :            :              can make this test.  */
     556                 : 1230470000 :           while (*p == '%' || *p == '=' || *p == '+' || *p == '&')
     557                 :   65042700 :             p++;
     558                 :            : 
     559                 : 1165430000 :           if (p[0] >= '0' && p[0] <= '0' + i)
     560                 :            :             {
     561                 :            :               /* Copy class and whether memory is allowed from the
     562                 :            :                  matching alternative.  Then perform any needed cost
     563                 :            :                  computations and/or adjustments.  */
     564                 :   54379000 :               j = p[0] - '0';
     565                 :   54379000 :               classes[i] = classes[j];
     566                 :   54379000 :               allows_mem[i] = allows_mem[j];
     567                 :   54379000 :               if (allows_mem[i])
     568                 :   19580500 :                 insn_allows_mem[i] = 1;
     569                 :            : 
     570                 :   54379000 :               if (! REG_P (op) || REGNO (op) < FIRST_PSEUDO_REGISTER)
     571                 :            :                 {
     572                 :            :                   /* If this matches the other operand, we have no
     573                 :            :                      added cost and we win.  */
     574                 :   31886500 :                   if (rtx_equal_p (ops[j], op))
     575                 : 1165430000 :                     win = 1;
     576                 :            :                   /* If we can put the other operand into a register,
     577                 :            :                      add to the cost of this alternative the cost to
     578                 :            :                      copy this operand to the register used for the
     579                 :            :                      other operand.  */
     580                 :   23456800 :                   else if (classes[j] != NO_REGS)
     581                 :            :                     {
     582                 :   23399300 :                       alt_cost += copy_cost (op, mode, classes[j], 1, NULL);
     583                 :   23399300 :                       win = 1;
     584                 :            :                     }
     585                 :            :                 }
     586                 :   22492500 :               else if (! REG_P (ops[j])
     587                 :   22492500 :                        || REGNO (ops[j]) < FIRST_PSEUDO_REGISTER)
     588                 :            :                 {
     589                 :            :                   /* This op is an allocno but the one it matches is
     590                 :            :                      not.  */
     591                 :            : 
     592                 :            :                   /* If we can't put the other operand into a
     593                 :            :                      register, this alternative can't be used.  */
     594                 :            : 
     595                 :     284227 :                   if (classes[j] == NO_REGS)
     596                 : 1165430000 :                     alt_fail = 1;
     597                 :            :                   /* Otherwise, add to the cost of this alternative
     598                 :            :                      the cost to copy the other operand to the hard
     599                 :            :                      register used for this operand.  */
     600                 :            :                   else
     601                 :     282290 :                     alt_cost += copy_cost (ops[j], mode, classes[j], 1, NULL);
     602                 :            :                 }
     603                 :            :               else
     604                 :            :                 {
     605                 :            :                   /* The costs of this operand are not the same as the
     606                 :            :                      other operand since move costs are not symmetric.
     607                 :            :                      Moreover, if we cannot tie them, this alternative
     608                 :            :                      needs to do a copy, which is one insn.  */
     609                 :   22208300 :                   struct costs *pp = this_op_costs[i];
     610                 :   22208300 :                   int *pp_costs = pp->cost;
     611                 :   22208300 :                   cost_classes_t cost_classes_ptr
     612                 :   22208300 :                     = regno_cost_classes[REGNO (op)];
     613                 :   22208300 :                   enum reg_class *cost_classes = cost_classes_ptr->classes;
     614                 :   22208300 :                   bool in_p = recog_data.operand_type[i] != OP_OUT;
     615                 :   22208300 :                   bool out_p = recog_data.operand_type[i] != OP_IN;
     616                 :   22208300 :                   enum reg_class op_class = classes[i];
     617                 :            : 
     618                 :   22208300 :                   ira_init_register_move_cost_if_necessary (mode);
     619                 :   22208300 :                   if (! in_p)
     620                 :            :                     {
     621                 :          0 :                       ira_assert (out_p);
     622                 :          0 :                       if (op_class == NO_REGS)
     623                 :            :                         {
     624                 :          0 :                           mem_cost = ira_memory_move_cost[mode];
     625                 :          0 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     626                 :            :                             {
     627                 :          0 :                               rclass = cost_classes[k];
     628                 :          0 :                               pp_costs[k] = mem_cost[rclass][0] * frequency;
     629                 :            :                             }
     630                 :            :                         }
     631                 :            :                       else
     632                 :            :                         {
     633                 :          0 :                           move_out_cost = ira_may_move_out_cost[mode];
     634                 :          0 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     635                 :            :                             {
     636                 :          0 :                               rclass = cost_classes[k];
     637                 :          0 :                               pp_costs[k]
     638                 :          0 :                                 = move_out_cost[op_class][rclass] * frequency;
     639                 :            :                             }
     640                 :            :                         }
     641                 :            :                     }
     642                 :   22208300 :                   else if (! out_p)
     643                 :            :                     {
     644                 :   22208300 :                       ira_assert (in_p);
     645                 :   22208300 :                       if (op_class == NO_REGS)
     646                 :            :                         {
     647                 :     156878 :                           mem_cost = ira_memory_move_cost[mode];
     648                 :    2021140 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     649                 :            :                             {
     650                 :    1864260 :                               rclass = cost_classes[k];
     651                 :    1864260 :                               pp_costs[k] = mem_cost[rclass][1] * frequency;
     652                 :            :                             }
     653                 :            :                         }
     654                 :            :                       else
     655                 :            :                         {
     656                 :   22051400 :                           move_in_cost = ira_may_move_in_cost[mode];
     657                 :  311794000 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     658                 :            :                             {
     659                 :  289742000 :                               rclass = cost_classes[k];
     660                 :  289742000 :                               pp_costs[k]
     661                 :  289742000 :                                 = move_in_cost[rclass][op_class] * frequency;
     662                 :            :                             }
     663                 :            :                         }
     664                 :            :                     }
     665                 :            :                   else
     666                 :            :                     {
     667                 :          0 :                       if (op_class == NO_REGS)
     668                 :            :                         {
     669                 :          0 :                           mem_cost = ira_memory_move_cost[mode];
     670                 :          0 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     671                 :            :                             {
     672                 :          0 :                               rclass = cost_classes[k];
     673                 :          0 :                               pp_costs[k] = ((mem_cost[rclass][0]
     674                 :          0 :                                               + mem_cost[rclass][1])
     675                 :          0 :                                              * frequency);
     676                 :            :                             }
     677                 :            :                         }
     678                 :            :                       else
     679                 :            :                         {
     680                 :          0 :                           move_in_cost = ira_may_move_in_cost[mode];
     681                 :          0 :                           move_out_cost = ira_may_move_out_cost[mode];
     682                 :          0 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     683                 :            :                             {
     684                 :          0 :                               rclass = cost_classes[k];
     685                 :          0 :                               pp_costs[k] = ((move_in_cost[rclass][op_class]
     686                 :          0 :                                               + move_out_cost[op_class][rclass])
     687                 :          0 :                                              * frequency);
     688                 :            :                             }
     689                 :            :                         }
     690                 :            :                     }
     691                 :            : 
     692                 :            :                   /* If the alternative actually allows memory, make
     693                 :            :                      things a bit cheaper since we won't need an extra
     694                 :            :                      insn to load it.  */
     695                 :   22208300 :                   pp->mem_cost
     696                 :   22208300 :                     = ((out_p ? ira_memory_move_cost[mode][op_class][0] : 0)
     697                 :   22208300 :                        + (in_p ? ira_memory_move_cost[mode][op_class][1] : 0)
     698                 :   22208300 :                        - allows_mem[i]) * frequency;
     699                 :            : 
     700                 :            :                   /* If we have assigned a class to this allocno in
     701                 :            :                      our first pass, add a cost to this alternative
     702                 :            :                      corresponding to what we would add if this
     703                 :            :                      allocno were not in the appropriate class.  */
     704                 :   22208300 :                   if (pref)
     705                 :            :                     {
     706                 :    8647590 :                       enum reg_class pref_class = pref[COST_INDEX (REGNO (op))];
     707                 :            : 
     708                 :    8647590 :                       if (pref_class == NO_REGS)
     709                 :     306503 :                         alt_cost
     710                 :     306503 :                           += ((out_p
     711                 :            :                                ? ira_memory_move_cost[mode][op_class][0] : 0)
     712                 :            :                               + (in_p
     713                 :            :                                  ? ira_memory_move_cost[mode][op_class][1]
     714                 :            :                                  : 0));
     715                 :    8341080 :                       else if (ira_reg_class_intersect
     716                 :    8341080 :                                [pref_class][op_class] == NO_REGS)
     717                 :      83240 :                         alt_cost
     718                 :      83240 :                           += ira_register_move_cost[mode][pref_class][op_class];
     719                 :            :                     }
     720                 :   22208300 :                   if (REGNO (ops[i]) != REGNO (ops[j])
     721                 :   22208300 :                       && ! find_reg_note (insn, REG_DEAD, op))
     722                 :    6698510 :                     alt_cost += 2;
     723                 :            : 
     724                 :   22208300 :                   p++;
     725                 :            :                 }
     726                 :            :             }
     727                 :            : 
     728                 :            :           /* Scan all the constraint letters.  See if the operand
     729                 :            :              matches any of the constraints.  Collect the valid
     730                 :            :              register classes and see if this operand accepts
     731                 :            :              memory.  */
     732                 : 2709720000 :           while ((c = *p))
     733                 :            :             {
     734                 : 2582380000 :               switch (c)
     735                 :            :                 {
     736                 :  488996000 :                 case '*':
     737                 :            :                   /* Ignore the next letter for this pass.  */
     738                 :  488996000 :                   c = *++p;
     739                 :  488996000 :                   break;
     740                 :            : 
     741                 :          0 :                 case '^':
     742                 :          0 :                   alt_cost += 2;
     743                 :          0 :                   break;
     744                 :            : 
     745                 :  210501000 :                 case '?':
     746                 :  210501000 :                   alt_cost += 2;
     747                 :  210501000 :                   break;
     748                 :            : 
     749                 :   10106300 :                 case 'g':
     750                 :   10106300 :                   if (MEM_P (op)
     751                 :   10106300 :                       || (CONSTANT_P (op)
     752                 :    3598870 :                           && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op))))
     753                 :            :                     win = 1;
     754                 :   10106300 :                   insn_allows_mem[i] = allows_mem[i] = 1;
     755                 :   10106300 :                   classes[i] = ira_reg_class_subunion[classes[i]][GENERAL_REGS];
     756                 :   10106300 :                   break;
     757                 :            : 
     758                 : 1872780000 :                 default:
     759                 : 1872780000 :                   enum constraint_num cn = lookup_constraint (p);
     760                 : 1872780000 :                   enum reg_class cl;
     761                 : 1872780000 :                   switch (get_constraint_type (cn))
     762                 :            :                     {
     763                 : 1521390000 :                     case CT_REGISTER:
     764                 : 1521390000 :                       cl = reg_class_for_constraint (cn);
     765                 :  444615000 :                       if (cl != NO_REGS)
     766                 :  429757000 :                         classes[i] = ira_reg_class_subunion[classes[i]][cl];
     767                 :            :                       break;
     768                 :            : 
     769                 :    2834450 :                     case CT_CONST_INT:
     770                 :    2834450 :                       if (CONST_INT_P (op)
     771                 :    2834450 :                           && insn_const_int_ok_for_constraint (INTVAL (op), cn))
     772                 :            :                         win = 1;
     773                 :            :                       break;
     774                 :            : 
     775                 :  189867000 :                     case CT_MEMORY:
     776                 :            :                       /* Every MEM can be reloaded to fit.  */
     777                 :  189867000 :                       insn_allows_mem[i] = allows_mem[i] = 1;
     778                 :  189867000 :                       if (MEM_P (op))
     779                 :   47415600 :                         win = 1;
     780                 :            :                       break;
     781                 :            : 
     782                 :     450316 :                     case CT_SPECIAL_MEMORY:
     783                 :     450316 :                       insn_allows_mem[i] = allows_mem[i] = 1;
     784                 :     450316 :                       if (MEM_P (op) && constraint_satisfied_p (op, cn))
     785                 :            :                         win = 1;
     786                 :            :                       break;
     787                 :            : 
     788                 :     747032 :                     case CT_ADDRESS:
     789                 :            :                       /* Every address can be reloaded to fit.  */
     790                 :     747032 :                       allows_addr = 1;
     791                 :     747032 :                       if (address_operand (op, GET_MODE (op))
     792                 :     747032 :                           || constraint_satisfied_p (op, cn))
     793                 :            :                         win = 1;
     794                 :            :                       /* We know this operand is an address, so we
     795                 :            :                          want it to be allocated to a hard register
     796                 :            :                          that can be the base of an address,
     797                 :            :                          i.e. BASE_REG_CLASS.  */
     798                 :     747032 :                       classes[i]
     799                 :     747032 :                         = ira_reg_class_subunion[classes[i]]
     800                 :     747032 :                           [base_reg_class (VOIDmode, ADDR_SPACE_GENERIC,
     801                 :     747032 :                                            ADDRESS, SCRATCH)];
     802                 :     747032 :                       break;
     803                 :            : 
     804                 :  157484000 :                     case CT_FIXED_FORM:
     805                 :  157484000 :                       if (constraint_satisfied_p (op, cn))
     806                 :            :                         win = 1;
     807                 :            :                       break;
     808                 :            :                     }
     809                 :            :                   break;
     810                 :            :                 }
     811                 : 2582380000 :               p += CONSTRAINT_LEN (c, p);
     812                 : 2582380000 :               if (c == ',')
     813                 :            :                 break;
     814                 :            :             }
     815                 :            : 
     816                 : 1165430000 :           constraints[i] = p;
     817                 :            : 
     818                 : 1165430000 :           if (alt_fail)
     819                 :            :             break;
     820                 :            : 
     821                 :            :           /* How we account for this operand now depends on whether it
     822                 :            :              is a pseudo register or not.  If it is, we first check if
     823                 :            :              any register classes are valid.  If not, we ignore this
     824                 :            :              alternative, since we want to assume that all allocnos get
     825                 :            :              allocated for register preferencing.  If some register
     826                 :            :              class is valid, compute the costs of moving the allocno
     827                 :            :              into that class.  */
     828                 : 1165430000 :           if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
     829                 :            :             {
     830                 :  541323000 :               if (classes[i] == NO_REGS && ! allows_mem[i])
     831                 :            :                 {
     832                 :            :                   /* We must always fail if the operand is a REG, but
     833                 :            :                      we did not find a suitable class and memory is
     834                 :            :                      not allowed.
     835                 :            : 
     836                 :            :                      Otherwise we may perform an uninitialized read
     837                 :            :                      from this_op_costs after the `continue' statement
     838                 :            :                      below.  */
     839                 :            :                   alt_fail = 1;
     840                 :            :                 }
     841                 :            :               else
     842                 :            :                 {
     843                 :  300365000 :                   unsigned int regno = REGNO (op);
     844                 :  300365000 :                   struct costs *pp = this_op_costs[i];
     845                 :  300365000 :                   int *pp_costs = pp->cost;
     846                 :  300365000 :                   cost_classes_t cost_classes_ptr = regno_cost_classes[regno];
     847                 :  300365000 :                   enum reg_class *cost_classes = cost_classes_ptr->classes;
     848                 :  300365000 :                   bool in_p = recog_data.operand_type[i] != OP_OUT;
     849                 :  300365000 :                   bool out_p = recog_data.operand_type[i] != OP_IN;
     850                 :  300365000 :                   enum reg_class op_class = classes[i];
     851                 :            : 
     852                 :  300365000 :                   ira_init_register_move_cost_if_necessary (mode);
     853                 :  300365000 :                   if (! in_p)
     854                 :            :                     {
     855                 :  191425000 :                       ira_assert (out_p);
     856                 :  191425000 :                       if (op_class == NO_REGS)
     857                 :            :                         {
     858                 :   54242800 :                           mem_cost = ira_memory_move_cost[mode];
     859                 :  798974000 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     860                 :            :                             {
     861                 :  744732000 :                               rclass = cost_classes[k];
     862                 :  744732000 :                               pp_costs[k] = mem_cost[rclass][0] * frequency;
     863                 :            :                             }
     864                 :            :                         }
     865                 :            :                       else
     866                 :            :                         {
     867                 :  137183000 :                           move_out_cost = ira_may_move_out_cost[mode];
     868                 : 2008720000 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     869                 :            :                             {
     870                 : 1871530000 :                               rclass = cost_classes[k];
     871                 : 1871530000 :                               pp_costs[k]
     872                 : 1871530000 :                                 = move_out_cost[op_class][rclass] * frequency;
     873                 :            :                             }
     874                 :            :                         }
     875                 :            :                     }
     876                 :  108940000 :                   else if (! out_p)
     877                 :            :                     {
     878                 :  108934000 :                       ira_assert (in_p);
     879                 :  108934000 :                       if (op_class == NO_REGS)
     880                 :            :                         {
     881                 :    8499240 :                           mem_cost = ira_memory_move_cost[mode];
     882                 :  119243000 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     883                 :            :                             {
     884                 :  110743000 :                               rclass = cost_classes[k];
     885                 :  110743000 :                               pp_costs[k] = mem_cost[rclass][1] * frequency;
     886                 :            :                             }
     887                 :            :                         }
     888                 :            :                       else
     889                 :            :                         {
     890                 :  100435000 :                           move_in_cost = ira_may_move_in_cost[mode];
     891                 : 1422270000 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     892                 :            :                             {
     893                 : 1321830000 :                               rclass = cost_classes[k];
     894                 : 1321830000 :                               pp_costs[k]
     895                 : 1321830000 :                                 = move_in_cost[rclass][op_class] * frequency;
     896                 :            :                             }
     897                 :            :                         }
     898                 :            :                     }
     899                 :            :                   else
     900                 :            :                     {
     901                 :       5565 :                       if (op_class == NO_REGS)
     902                 :            :                         {
     903                 :          0 :                           mem_cost = ira_memory_move_cost[mode];
     904                 :          0 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     905                 :            :                             {
     906                 :          0 :                               rclass = cost_classes[k];
     907                 :          0 :                               pp_costs[k] = ((mem_cost[rclass][0]
     908                 :          0 :                                               + mem_cost[rclass][1])
     909                 :          0 :                                              * frequency);
     910                 :            :                             }
     911                 :            :                         }
     912                 :            :                       else
     913                 :            :                         {
     914                 :       5565 :                           move_in_cost = ira_may_move_in_cost[mode];
     915                 :       5565 :                           move_out_cost = ira_may_move_out_cost[mode];
     916                 :      63243 :                           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
     917                 :            :                             {
     918                 :      57678 :                               rclass = cost_classes[k];
     919                 :      57678 :                               pp_costs[k] = ((move_in_cost[rclass][op_class]
     920                 :      57678 :                                               + move_out_cost[op_class][rclass])
     921                 :      57678 :                                              * frequency);
     922                 :            :                             }
     923                 :            :                         }
     924                 :            :                     }
     925                 :            : 
     926                 :  300365000 :                   if (op_class == NO_REGS)
     927                 :            :                     /* Although we don't need insn to reload from
     928                 :            :                        memory, still accessing memory is usually more
     929                 :            :                        expensive than a register.  */
     930                 :   62742100 :                     pp->mem_cost = frequency;
     931                 :            :                   else
     932                 :            :                     /* If the alternative actually allows memory, make
     933                 :            :                        things a bit cheaper since we won't need an
     934                 :            :                        extra insn to load it.  */
     935                 :  237623000 :                     pp->mem_cost
     936                 :  237623000 :                       = ((out_p ? ira_memory_move_cost[mode][op_class][0] : 0)
     937                 :  237623000 :                          + (in_p ? ira_memory_move_cost[mode][op_class][1] : 0)
     938                 :  237623000 :                          - allows_mem[i]) * frequency;
     939                 :            :                   /* If we have assigned a class to this allocno in
     940                 :            :                      our first pass, add a cost to this alternative
     941                 :            :                      corresponding to what we would add if this
     942                 :            :                      allocno were not in the appropriate class.  */
     943                 :  300365000 :                   if (pref)
     944                 :            :                     {
     945                 :  116144000 :                       enum reg_class pref_class = pref[COST_INDEX (REGNO (op))];
     946                 :            : 
     947                 :  116144000 :                       if (pref_class == NO_REGS)
     948                 :            :                         {
     949                 :    5759230 :                           if (op_class != NO_REGS)
     950                 :    4966500 :                             alt_cost
     951                 :    4966500 :                               += ((out_p
     952                 :    4966500 :                                    ? ira_memory_move_cost[mode][op_class][0]
     953                 :            :                                    : 0)
     954                 :    4966500 :                                   + (in_p
     955                 :    4966500 :                                      ? ira_memory_move_cost[mode][op_class][1]
     956                 :            :                                      : 0));
     957                 :            :                         }
     958                 :  110385000 :                       else if (op_class == NO_REGS)
     959                 :   22921500 :                         alt_cost
     960                 :   22921500 :                           += ((out_p
     961                 :   22921500 :                                ? ira_memory_move_cost[mode][pref_class][1]
     962                 :            :                                : 0)
     963                 :   22921500 :                               + (in_p
     964                 :   22921500 :                                  ? ira_memory_move_cost[mode][pref_class][0]
     965                 :            :                                  : 0));
     966                 :   87463300 :                       else if (ira_reg_class_intersect[pref_class][op_class]
     967                 :            :                                == NO_REGS)
     968                 :    4707440 :                         alt_cost += (ira_register_move_cost
     969                 :    4707440 :                                      [mode][pref_class][op_class]);
     970                 :            :                     }
     971                 :            :                 }
     972                 :            :             }
     973                 :            : 
     974                 :            :           /* Otherwise, if this alternative wins, either because we
     975                 :            :              have already determined that or if we have a hard
     976                 :            :              register of the proper class, there is no cost for this
     977                 :            :              alternative.  */
     978                 :  624105000 :           else if (win || (REG_P (op)
     979                 :  162217000 :                            && reg_fits_class_p (op, classes[i],
     980                 :  162217000 :                                                 0, GET_MODE (op))))
     981                 :            :             ;
     982                 :            : 
     983                 :            :           /* If registers are valid, the cost of this alternative
     984                 :            :              includes copying the object to and/or from a
     985                 :            :              register.  */
     986                 :  412014000 :           else if (classes[i] != NO_REGS)
     987                 :            :             {
     988                 :  102327000 :               if (recog_data.operand_type[i] != OP_OUT)
     989                 :   50236400 :                 alt_cost += copy_cost (op, mode, classes[i], 1, NULL);
     990                 :            : 
     991                 :  102327000 :               if (recog_data.operand_type[i] != OP_IN)
     992                 :   52090400 :                 alt_cost += copy_cost (op, mode, classes[i], 0, NULL);
     993                 :            :             }
     994                 :            :           /* The only other way this alternative can be used is if
     995                 :            :              this is a constant that could be placed into memory.  */
     996                 :  309687000 :           else if (CONSTANT_P (op) && (allows_addr || allows_mem[i]))
     997                 :    9645510 :             alt_cost += ira_memory_move_cost[mode][classes[i]][1];
     998                 :            :           else
     999                 :            :             alt_fail = 1;
    1000                 :            : 
    1001                 :            :           if (alt_fail)
    1002                 :            :             break;
    1003                 :            :         }
    1004                 :            : 
    1005                 :  753742000 :       if (alt_fail)
    1006                 :            :         {
    1007                 :            :           /* The loop above might have exited early once the failure
    1008                 :            :              was seen.  Skip over the constraints for the remaining
    1009                 :            :              operands.  */
    1010                 :  541001000 :           i += 1;
    1011                 :  948543000 :           for (; i < n_ops; ++i)
    1012                 :  815083000 :             constraints[i] = skip_alternative (constraints[i]);
    1013                 :  541001000 :           continue;
    1014                 :            :         }
    1015                 :            : 
    1016                 :  212741000 :       op_cost_add = alt_cost * frequency;
    1017                 :            :       /* Finally, update the costs with the information we've
    1018                 :            :          calculated about this alternative.  */
    1019                 :  714945000 :       for (i = 0; i < n_ops; i++)
    1020                 :  502204000 :         if (REG_P (ops[i]) && REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER)
    1021                 :            :           {
    1022                 :  219788000 :             struct costs *pp = op_costs[i], *qq = this_op_costs[i];
    1023                 :  219788000 :             int *pp_costs = pp->cost, *qq_costs = qq->cost;
    1024                 :  219788000 :             int scale = 1 + (recog_data.operand_type[i] == OP_INOUT);
    1025                 :  219788000 :             cost_classes_t cost_classes_ptr
    1026                 :  219788000 :               = regno_cost_classes[REGNO (ops[i])];
    1027                 :            : 
    1028                 :  219788000 :             pp->mem_cost = MIN (pp->mem_cost,
    1029                 :            :                                 (qq->mem_cost + op_cost_add) * scale);
    1030                 :            : 
    1031                 : 3162350000 :             for (k = cost_classes_ptr->num - 1; k >= 0; k--)
    1032                 : 2942570000 :               pp_costs[k]
    1033                 : 2942570000 :                 = MIN (pp_costs[k], (qq_costs[k] + op_cost_add) * scale);
    1034                 :            :           }
    1035                 :            :     }
    1036                 :            : 
    1037                 :   89352000 :   if (allocno_p)
    1038                 :  283634000 :     for (i = 0; i < n_ops; i++)
    1039                 :            :       {
    1040                 :  196887000 :         ira_allocno_t a;
    1041                 :  196887000 :         rtx op = ops[i];
    1042                 :            : 
    1043                 :  196887000 :         if (! REG_P (op) || REGNO (op) < FIRST_PSEUDO_REGISTER)
    1044                 :  118144000 :           continue;
    1045                 :   78742500 :         a = ira_curr_regno_allocno_map [REGNO (op)];
    1046                 :   78742500 :         if (! ALLOCNO_BAD_SPILL_P (a) && insn_allows_mem[i] == 0)
    1047                 :    4423000 :           ALLOCNO_BAD_SPILL_P (a) = true;
    1048                 :            :       }
    1049                 :            : 
    1050                 :   89352000 : }
    1051                 :            : 
    1052                 :            : 
    1053                 :            : 
    1054                 :            : /* Wrapper around REGNO_OK_FOR_INDEX_P, to allow pseudo registers.  */
    1055                 :            : static inline bool
    1056                 :          0 : ok_for_index_p_nonstrict (rtx reg)
    1057                 :            : {
    1058                 :          0 :   unsigned regno = REGNO (reg);
    1059                 :            : 
    1060                 :          0 :   return regno >= FIRST_PSEUDO_REGISTER || REGNO_OK_FOR_INDEX_P (regno);
    1061                 :            : }
    1062                 :            : 
    1063                 :            : /* A version of regno_ok_for_base_p for use here, when all
    1064                 :            :    pseudo-registers should count as OK.  Arguments as for
    1065                 :            :    regno_ok_for_base_p.  */
    1066                 :            : static inline bool
    1067                 :      42215 : ok_for_base_p_nonstrict (rtx reg, machine_mode mode, addr_space_t as,
    1068                 :            :                          enum rtx_code outer_code, enum rtx_code index_code)
    1069                 :            : {
    1070                 :      42215 :   unsigned regno = REGNO (reg);
    1071                 :            : 
    1072                 :      42215 :   if (regno >= FIRST_PSEUDO_REGISTER)
    1073                 :            :     return true;
    1074                 :      42215 :   return ok_for_base_p_1 (regno, mode, as, outer_code, index_code);
    1075                 :            : }
    1076                 :            : 
    1077                 :            : /* Record the pseudo registers we must reload into hard registers in a
    1078                 :            :    subexpression of a memory address, X.
    1079                 :            : 
    1080                 :            :    If CONTEXT is 0, we are looking at the base part of an address,
    1081                 :            :    otherwise we are looking at the index part.
    1082                 :            : 
    1083                 :            :    MODE and AS are the mode and address space of the memory reference;
    1084                 :            :    OUTER_CODE and INDEX_CODE give the context that the rtx appears in.
    1085                 :            :    These four arguments are passed down to base_reg_class.
    1086                 :            : 
    1087                 :            :    SCALE is twice the amount to multiply the cost by (it is twice so
    1088                 :            :    we can represent half-cost adjustments).  */
    1089                 :            : static void
    1090                 :   63612400 : record_address_regs (machine_mode mode, addr_space_t as, rtx x,
    1091                 :            :                      int context, enum rtx_code outer_code,
    1092                 :            :                      enum rtx_code index_code, int scale)
    1093                 :            : {
    1094                 :   63612400 :   enum rtx_code code = GET_CODE (x);
    1095                 :   63612400 :   enum reg_class rclass;
    1096                 :            : 
    1097                 :   63612400 :   if (context == 1)
    1098                 :            :     rclass = INDEX_REG_CLASS;
    1099                 :            :   else
    1100                 :   59218100 :     rclass = base_reg_class (mode, as, outer_code, index_code);
    1101                 :            : 
    1102                 :   63612400 :   switch (code)
    1103                 :            :     {
    1104                 :            :     case CONST_INT:
    1105                 :            :     case CONST:
    1106                 :            :     case CC0:
    1107                 :            :     case PC:
    1108                 :            :     case SYMBOL_REF:
    1109                 :            :     case LABEL_REF:
    1110                 :            :       return;
    1111                 :            : 
    1112                 :   21544100 :     case PLUS:
    1113                 :            :       /* When we have an address that is a sum, we must determine
    1114                 :            :          whether registers are "base" or "index" regs.  If there is a
    1115                 :            :          sum of two registers, we must choose one to be the "base".
    1116                 :            :          Luckily, we can use the REG_POINTER to make a good choice
    1117                 :            :          most of the time.  We only need to do this on machines that
    1118                 :            :          can have two registers in an address and where the base and
    1119                 :            :          index register classes are different.
    1120                 :            : 
    1121                 :            :          ??? This code used to set REGNO_POINTER_FLAG in some cases,
    1122                 :            :          but that seems bogus since it should only be set when we are
    1123                 :            :          sure the register is being used as a pointer.  */
    1124                 :   21544100 :       {
    1125                 :   21544100 :         rtx arg0 = XEXP (x, 0);
    1126                 :   21544100 :         rtx arg1 = XEXP (x, 1);
    1127                 :   21544100 :         enum rtx_code code0 = GET_CODE (arg0);
    1128                 :   21544100 :         enum rtx_code code1 = GET_CODE (arg1);
    1129                 :            : 
    1130                 :            :         /* Look inside subregs.  */
    1131                 :   21544100 :         if (code0 == SUBREG)
    1132                 :       2962 :           arg0 = SUBREG_REG (arg0), code0 = GET_CODE (arg0);
    1133                 :   21544100 :         if (code1 == SUBREG)
    1134                 :       2568 :           arg1 = SUBREG_REG (arg1), code1 = GET_CODE (arg1);
    1135                 :            : 
    1136                 :            :         /* If index registers do not appear, or coincide with base registers,
    1137                 :            :            just record registers in any non-constant operands.  We
    1138                 :            :            assume here, as well as in the tests below, that all
    1139                 :            :            addresses are in canonical form.  */
    1140                 :   21544100 :         if (MAX_REGS_PER_ADDRESS == 1
    1141                 :   21544100 :             || INDEX_REG_CLASS == base_reg_class (VOIDmode, as, PLUS, SCRATCH))
    1142                 :            :           {
    1143                 :            :             record_address_regs (mode, as, arg0, context, PLUS, code1, scale);
    1144                 :            :             if (! CONSTANT_P (arg1))
    1145                 :            :               record_address_regs (mode, as, arg1, context, PLUS, code0, scale);
    1146                 :            :           }
    1147                 :            : 
    1148                 :            :         /* If the second operand is a constant integer, it doesn't
    1149                 :            :            change what class the first operand must be.  */
    1150                 :   21544100 :         else if (CONST_SCALAR_INT_P (arg1))
    1151                 :   19532800 :           record_address_regs (mode, as, arg0, context, PLUS, code1, scale);
    1152                 :            :         /* If the second operand is a symbolic constant, the first
    1153                 :            :            operand must be an index register.  */
    1154                 :    2011280 :         else if (code1 == SYMBOL_REF || code1 == CONST || code1 == LABEL_REF)
    1155                 :     562760 :           record_address_regs (mode, as, arg0, 1, PLUS, code1, scale);
    1156                 :            :         /* If both operands are registers but one is already a hard
    1157                 :            :            register of index or reg-base class, give the other the
    1158                 :            :            class that the hard register is not.  */
    1159                 :    1448520 :         else if (code0 == REG && code1 == REG
    1160                 :     647553 :                  && REGNO (arg0) < FIRST_PSEUDO_REGISTER
    1161                 :    1489980 :                  && (ok_for_base_p_nonstrict (arg0, mode, as, PLUS, REG)
    1162                 :          0 :                      || ok_for_index_p_nonstrict (arg0)))
    1163                 :      41461 :           record_address_regs (mode, as, arg1,
    1164                 :            :                                ok_for_base_p_nonstrict (arg0, mode, as,
    1165                 :            :                                                         PLUS, REG) ? 1 : 0,
    1166                 :            :                                PLUS, REG, scale);
    1167                 :    1407050 :         else if (code0 == REG && code1 == REG
    1168                 :     606092 :                  && REGNO (arg1) < FIRST_PSEUDO_REGISTER
    1169                 :    1407810 :                  && (ok_for_base_p_nonstrict (arg1, mode, as, PLUS, REG)
    1170                 :          0 :                      || ok_for_index_p_nonstrict (arg1)))
    1171                 :        754 :           record_address_regs (mode, as, arg0,
    1172                 :            :                                ok_for_base_p_nonstrict (arg1, mode, as,
    1173                 :            :                                                         PLUS, REG) ? 1 : 0,
    1174                 :            :                                PLUS, REG, scale);
    1175                 :            :         /* If one operand is known to be a pointer, it must be the
    1176                 :            :            base with the other operand the index.  Likewise if the
    1177                 :            :            other operand is a MULT.  */
    1178                 :    1406300 :         else if ((code0 == REG && REG_POINTER (arg0)) || code1 == MULT)
    1179                 :            :           {
    1180                 :     467073 :             record_address_regs (mode, as, arg0, 0, PLUS, code1, scale);
    1181                 :     467073 :             record_address_regs (mode, as, arg1, 1, PLUS, code0, scale);
    1182                 :            :           }
    1183                 :     939227 :         else if ((code1 == REG && REG_POINTER (arg1)) || code0 == MULT)
    1184                 :            :           {
    1185                 :     694183 :             record_address_regs (mode, as, arg0, 1, PLUS, code1, scale);
    1186                 :     694183 :             record_address_regs (mode, as, arg1, 0, PLUS, code0, scale);
    1187                 :            :           }
    1188                 :            :         /* Otherwise, count equal chances that each might be a base or
    1189                 :            :            index register.  This case should be rare.  */
    1190                 :            :         else
    1191                 :            :           {
    1192                 :     245044 :             record_address_regs (mode, as, arg0, 0, PLUS, code1, scale / 2);
    1193                 :     245044 :             record_address_regs (mode, as, arg0, 1, PLUS, code1, scale / 2);
    1194                 :     245044 :             record_address_regs (mode, as, arg1, 0, PLUS, code0, scale / 2);
    1195                 :     245044 :             record_address_regs (mode, as, arg1, 1, PLUS, code0, scale / 2);
    1196                 :            :           }
    1197                 :            :       }
    1198                 :            :       break;
    1199                 :            : 
    1200                 :            :       /* Double the importance of an allocno that is incremented or
    1201                 :            :          decremented, since it would take two extra insns if it ends
    1202                 :            :          up in the wrong place.  */
    1203                 :     129515 :     case POST_MODIFY:
    1204                 :     129515 :     case PRE_MODIFY:
    1205                 :     129515 :       record_address_regs (mode, as, XEXP (x, 0), 0, code,
    1206                 :     129515 :                            GET_CODE (XEXP (XEXP (x, 1), 1)), 2 * scale);
    1207                 :     129515 :       if (REG_P (XEXP (XEXP (x, 1), 1)))
    1208                 :          0 :         record_address_regs (mode, as, XEXP (XEXP (x, 1), 1), 1, code, REG,
    1209                 :            :                              2 * scale);
    1210                 :            :       break;
    1211                 :            : 
    1212                 :    3610250 :     case POST_INC:
    1213                 :    3610250 :     case PRE_INC:
    1214                 :    3610250 :     case POST_DEC:
    1215                 :    3610250 :     case PRE_DEC:
    1216                 :            :       /* Double the importance of an allocno that is incremented or
    1217                 :            :          decremented, since it would take two extra insns if it ends
    1218                 :            :          up in the wrong place.  */
    1219                 :    3610250 :       record_address_regs (mode, as, XEXP (x, 0), 0, code, SCRATCH, 2 * scale);
    1220                 :    3610250 :       break;
    1221                 :            : 
    1222                 :   30140400 :     case REG:
    1223                 :   30140400 :       {
    1224                 :   30140400 :         struct costs *pp;
    1225                 :   30140400 :         int *pp_costs;
    1226                 :   30140400 :         enum reg_class i;
    1227                 :   30140400 :         int k, regno, add_cost;
    1228                 :   30140400 :         cost_classes_t cost_classes_ptr;
    1229                 :   30140400 :         enum reg_class *cost_classes;
    1230                 :   30140400 :         move_table *move_in_cost;
    1231                 :            : 
    1232                 :   30140400 :         if (REGNO (x) < FIRST_PSEUDO_REGISTER)
    1233                 :            :           break;
    1234                 :            : 
    1235                 :   12503700 :         regno = REGNO (x);
    1236                 :   12503700 :         if (allocno_p)
    1237                 :   12321400 :           ALLOCNO_BAD_SPILL_P (ira_curr_regno_allocno_map[regno]) = true;
    1238                 :   12503700 :         pp = COSTS (costs, COST_INDEX (regno));
    1239                 :   15478600 :         add_cost = (ira_memory_move_cost[Pmode][rclass][1] * scale) / 2;
    1240                 :   12503700 :         if (INT_MAX - add_cost < pp->mem_cost)
    1241                 :          0 :           pp->mem_cost = INT_MAX;
    1242                 :            :         else
    1243                 :   12503700 :           pp->mem_cost += add_cost;
    1244                 :   12503700 :         cost_classes_ptr = regno_cost_classes[regno];
    1245                 :   12503700 :         cost_classes = cost_classes_ptr->classes;
    1246                 :   12503700 :         pp_costs = pp->cost;
    1247                 :   12503700 :         ira_init_register_move_cost_if_necessary (Pmode);
    1248                 :   15478600 :         move_in_cost = ira_may_move_in_cost[Pmode];
    1249                 :  182174000 :         for (k = cost_classes_ptr->num - 1; k >= 0; k--)
    1250                 :            :           {
    1251                 :  169671000 :             i = cost_classes[k];
    1252                 :  169671000 :             add_cost = (move_in_cost[i][rclass] * scale) / 2;
    1253                 :  169671000 :             if (INT_MAX - add_cost < pp_costs[k])
    1254                 :          0 :               pp_costs[k] = INT_MAX;
    1255                 :            :             else
    1256                 :  169671000 :               pp_costs[k] += add_cost;
    1257                 :            :           }
    1258                 :            :       }
    1259                 :            :       break;
    1260                 :            : 
    1261                 :    1447910 :     default:
    1262                 :    1447910 :       {
    1263                 :    1447910 :         const char *fmt = GET_RTX_FORMAT (code);
    1264                 :    1447910 :         int i;
    1265                 :    3923860 :         for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
    1266                 :    2475950 :           if (fmt[i] == 'e')
    1267                 :    2464020 :             record_address_regs (mode, as, XEXP (x, i), context, code, SCRATCH,
    1268                 :            :                                  scale);
    1269                 :            :       }
    1270                 :            :     }
    1271                 :            : }
    1272                 :            : 
    1273                 :            : 
    1274                 :            : 
    1275                 :            : /* Calculate the costs of insn operands.  */
    1276                 :            : static void
    1277                 :   90097300 : record_operand_costs (rtx_insn *insn, enum reg_class *pref)
    1278                 :            : {
    1279                 :   90097300 :   const char *constraints[MAX_RECOG_OPERANDS];
    1280                 :   90097300 :   machine_mode modes[MAX_RECOG_OPERANDS];
    1281                 :   90097300 :   rtx set;
    1282                 :   90097300 :   int i;
    1283                 :            : 
    1284                 :   90097300 :   if ((set = single_set (insn)) != NULL_RTX
    1285                 :            :       /* In rare cases the single set insn might have less 2 operands
    1286                 :            :          as the source can be a fixed special reg.  */
    1287                 :   84647900 :       && recog_data.n_operands > 1
    1288                 :   81441000 :       && recog_data.operand[0] == SET_DEST (set)
    1289                 :  157130000 :       && recog_data.operand[1] == SET_SRC (set))
    1290                 :            :     {
    1291                 :   50089000 :       int regno, other_regno;
    1292                 :   50089000 :       rtx dest = SET_DEST (set);
    1293                 :   50089000 :       rtx src = SET_SRC (set);
    1294                 :            : 
    1295                 :   50089000 :       if (GET_CODE (dest) == SUBREG
    1296                 :   51261900 :           && known_eq (GET_MODE_SIZE (GET_MODE (dest)),
    1297                 :            :                        GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))))
    1298                 :      56980 :         dest = SUBREG_REG (dest);
    1299                 :   50089000 :       if (GET_CODE (src) == SUBREG
    1300                 :   51514400 :           && known_eq (GET_MODE_SIZE (GET_MODE (src)),
    1301                 :            :                        GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
    1302                 :     171656 :         src = SUBREG_REG (src);
    1303                 :   64952100 :       if (REG_P (src) && REG_P (dest)
    1304                 :   64952100 :           && (((regno = REGNO (src)) >= FIRST_PSEUDO_REGISTER
    1305                 :   10751400 :                && (other_regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER)
    1306                 :    7999290 :               || ((regno = REGNO (dest)) >= FIRST_PSEUDO_REGISTER
    1307                 :    7981890 :                   && (other_regno = REGNO (src)) < FIRST_PSEUDO_REGISTER)))
    1308                 :            :         {
    1309                 :   10958300 :           machine_mode mode = GET_MODE (SET_SRC (set));
    1310                 :   10958300 :           cost_classes_t cost_classes_ptr = regno_cost_classes[regno];
    1311                 :   10958300 :           enum reg_class *cost_classes = cost_classes_ptr->classes;
    1312                 :   10958300 :           reg_class_t rclass, hard_reg_class, pref_class, bigger_hard_reg_class;
    1313                 :   10958300 :           int cost, k;
    1314                 :   10958300 :           move_table *move_costs;
    1315                 :   10958300 :           bool dead_p = find_regno_note (insn, REG_DEAD, REGNO (src));
    1316                 :            : 
    1317                 :   10958300 :           ira_init_register_move_cost_if_necessary (mode);
    1318                 :   10958300 :           move_costs = ira_register_move_cost[mode];
    1319                 :   10958300 :           hard_reg_class = REGNO_REG_CLASS (other_regno);
    1320                 :   10958300 :           bigger_hard_reg_class = ira_pressure_class_translate[hard_reg_class];
    1321                 :            :           /* Target code may return any cost for mode which does not
    1322                 :            :              fit the hard reg class (e.g. DImode for AREG on
    1323                 :            :              i386).  Check this and use a bigger class to get the
    1324                 :            :              right cost.  */
    1325                 :   10958300 :           if (bigger_hard_reg_class != NO_REGS
    1326                 :   10958300 :               && ! ira_hard_reg_in_set_p (other_regno, mode,
    1327                 :            :                                           reg_class_contents[hard_reg_class]))
    1328                 :            :             hard_reg_class = bigger_hard_reg_class;
    1329                 :   10958300 :           i = regno == (int) REGNO (src) ? 1 : 0;
    1330                 :  192738000 :           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
    1331                 :            :             {
    1332                 :  181780000 :               rclass = cost_classes[k];
    1333                 :  363560000 :               cost = (i == 0
    1334                 :  181780000 :                       ? move_costs[hard_reg_class][rclass]
    1335                 :  114389000 :                       : move_costs[rclass][hard_reg_class]);
    1336                 :            :               
    1337                 :  181780000 :               op_costs[i]->cost[k] = cost * frequency;
    1338                 :            :               /* If we have assigned a class to this allocno in our
    1339                 :            :                  first pass, add a cost to this alternative
    1340                 :            :                  corresponding to what we would add if this allocno
    1341                 :            :                  were not in the appropriate class.  */
    1342                 :  181780000 :               if (pref)
    1343                 :            :                 {
    1344                 :   77385800 :                   if ((pref_class = pref[COST_INDEX (regno)]) == NO_REGS)
    1345                 :    9549290 :                     op_costs[i]->cost[k]
    1346                 :    9549290 :                       += ((i == 0 ? ira_memory_move_cost[mode][rclass][0] : 0)
    1347                 :    9549290 :                           + (i == 1 ? ira_memory_move_cost[mode][rclass][1] : 0)
    1348                 :    9549290 :                           * frequency);
    1349                 :   67836500 :                   else if (ira_reg_class_intersect[pref_class][rclass]
    1350                 :            :                            == NO_REGS)
    1351                 :   41007200 :                     op_costs[i]->cost[k]
    1352                 :   41007200 :                       += (move_costs[pref_class][rclass]
    1353                 :   41007200 :                           * frequency);
    1354                 :            :                 }
    1355                 :            :               /* If this insn is a single set copying operand 1 to
    1356                 :            :                  operand 0 and one operand is an allocno with the
    1357                 :            :                  other a hard reg or an allocno that prefers a hard
    1358                 :            :                  register that is in its own register class then we
    1359                 :            :                  may want to adjust the cost of that register class to
    1360                 :            :                  -1.
    1361                 :            : 
    1362                 :            :                  Avoid the adjustment if the source does not die to
    1363                 :            :                  avoid stressing of register allocator by preferencing
    1364                 :            :                  two colliding registers into single class.  */
    1365                 :  181780000 :               if (dead_p
    1366                 :  147230000 :                   && TEST_HARD_REG_BIT (reg_class_contents[rclass], other_regno)
    1367                 :  181780000 :                   && (reg_class_size[(int) rclass]
    1368                 :            :                       == (ira_reg_class_max_nregs
    1369                 :   57621900 :                           [(int) rclass][(int) GET_MODE(src)])))
    1370                 :            :                 {
    1371                 :    8343020 :                   if (reg_class_size[rclass] == 1)
    1372                 :    8253510 :                     op_costs[i]->cost[k] = -frequency;
    1373                 :      89515 :                   else if (in_hard_reg_set_p (reg_class_contents[rclass],
    1374                 :            :                                               GET_MODE(src), other_regno))
    1375                 :      77816 :                     op_costs[i]->cost[k] = -frequency;
    1376                 :            :                 }
    1377                 :            :             }
    1378                 :   10958300 :           op_costs[i]->mem_cost
    1379                 :   10958300 :             = ira_memory_move_cost[mode][hard_reg_class][i] * frequency;
    1380                 :   10958300 :           if (pref && (pref_class = pref[COST_INDEX (regno)]) != NO_REGS)
    1381                 :    4244540 :             op_costs[i]->mem_cost
    1382                 :    4244540 :               += ira_memory_move_cost[mode][pref_class][i] * frequency;
    1383                 :   10958300 :           return;
    1384                 :            :         }
    1385                 :            :     }
    1386                 :            : 
    1387                 :  250980000 :   for (i = 0; i < recog_data.n_operands; i++)
    1388                 :            :     {
    1389                 :  171841000 :       constraints[i] = recog_data.constraints[i];
    1390                 :  171841000 :       modes[i] = recog_data.operand_mode[i];
    1391                 :            :     }
    1392                 :            : 
    1393                 :            :   /* If we get here, we are set up to record the costs of all the
    1394                 :            :      operands for this insn.  Start by initializing the costs.  Then
    1395                 :            :      handle any address registers.  Finally record the desired classes
    1396                 :            :      for any allocnos, doing it twice if some pair of operands are
    1397                 :            :      commutative.  */
    1398                 :  250980000 :   for (i = 0; i < recog_data.n_operands; i++)
    1399                 :            :     {
    1400                 :  171841000 :       memcpy (op_costs[i], init_cost, struct_costs_size);
    1401                 :            : 
    1402                 :  171841000 :       if (GET_CODE (recog_data.operand[i]) == SUBREG)
    1403                 :    2530010 :         recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
    1404                 :            : 
    1405                 :  171841000 :       if (MEM_P (recog_data.operand[i]))
    1406                 :   30225500 :         record_address_regs (GET_MODE (recog_data.operand[i]),
    1407                 :   30225500 :                              MEM_ADDR_SPACE (recog_data.operand[i]),
    1408                 :            :                              XEXP (recog_data.operand[i], 0),
    1409                 :            :                              0, MEM, SCRATCH, frequency * 2);
    1410                 :  141615000 :       else if (constraints[i][0] == 'p'
    1411                 :  283227000 :                || (insn_extra_address_constraint
    1412                 :  141612000 :                    (lookup_constraint (constraints[i]))))
    1413                 :     747021 :         record_address_regs (VOIDmode, ADDR_SPACE_GENERIC,
    1414                 :            :                              recog_data.operand[i], 0, ADDRESS, SCRATCH,
    1415                 :            :                              frequency * 2);
    1416                 :            :     }
    1417                 :            : 
    1418                 :            :   /* Check for commutative in a separate loop so everything will have
    1419                 :            :      been initialized.  We must do this even if one operand is a
    1420                 :            :      constant--see addsi3 in m68k.md.  */
    1421                 :  172472000 :   for (i = 0; i < (int) recog_data.n_operands - 1; i++)
    1422                 :   93332900 :     if (constraints[i][0] == '%')
    1423                 :            :       {
    1424                 :            :         const char *xconstraints[MAX_RECOG_OPERANDS];
    1425                 :            :         int j;
    1426                 :            : 
    1427                 :            :         /* Handle commutative operands by swapping the
    1428                 :            :            constraints.  We assume the modes are the same.  */
    1429                 :   41188000 :         for (j = 0; j < recog_data.n_operands; j++)
    1430                 :   30975100 :           xconstraints[j] = constraints[j];
    1431                 :            : 
    1432                 :   10212900 :         xconstraints[i] = constraints[i+1];
    1433                 :   10212900 :         xconstraints[i+1] = constraints[i];
    1434                 :   10212900 :         record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
    1435                 :            :                             recog_data.operand, modes,
    1436                 :            :                             xconstraints, insn, pref);
    1437                 :            :       }
    1438                 :   79139000 :   record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
    1439                 :            :                       recog_data.operand, modes,
    1440                 :            :                       constraints, insn, pref);
    1441                 :            : }
    1442                 :            : 
    1443                 :            : 
    1444                 :            : 
    1445                 :            : /* Process one insn INSN.  Scan it and record each time it would save
    1446                 :            :    code to put a certain allocnos in a certain class.  Return the last
    1447                 :            :    insn processed, so that the scan can be continued from there.  */
    1448                 :            : static rtx_insn *
    1449                 :  176563000 : scan_one_insn (rtx_insn *insn)
    1450                 :            : {
    1451                 :  176563000 :   enum rtx_code pat_code;
    1452                 :  176563000 :   rtx set, note;
    1453                 :  176563000 :   int i, k;
    1454                 :  176563000 :   bool counted_mem;
    1455                 :            : 
    1456                 :  176563000 :   if (!NONDEBUG_INSN_P (insn))
    1457                 :            :     return insn;
    1458                 :            : 
    1459                 :   91011600 :   pat_code = GET_CODE (PATTERN (insn));
    1460                 :   91011600 :   if (pat_code == ASM_INPUT)
    1461                 :            :     return insn;
    1462                 :            : 
    1463                 :            :   /* If INSN is a USE/CLOBBER of a pseudo in a mode M then go ahead
    1464                 :            :      and initialize the register move costs of mode M.
    1465                 :            : 
    1466                 :            :      The pseudo may be related to another pseudo via a copy (implicit or
    1467                 :            :      explicit) and if there are no mode M uses/sets of the original
    1468                 :            :      pseudo, then we may leave the register move costs uninitialized for
    1469                 :            :      mode M. */
    1470                 :   91008000 :   if (pat_code == USE || pat_code == CLOBBER)
    1471                 :            :     {
    1472                 :     910759 :       rtx x = XEXP (PATTERN (insn), 0);
    1473                 :     910759 :       if (GET_CODE (x) == REG
    1474                 :     900137 :           && REGNO (x) >= FIRST_PSEUDO_REGISTER
    1475                 :     949250 :           && have_regs_of_mode[GET_MODE (x)])
    1476                 :      38491 :         ira_init_register_move_cost_if_necessary (GET_MODE (x));
    1477                 :     910759 :       return insn;
    1478                 :            :     }
    1479                 :            : 
    1480                 :   90097300 :   counted_mem = false;
    1481                 :   90097300 :   set = single_set (insn);
    1482                 :   90097300 :   extract_insn (insn);
    1483                 :            : 
    1484                 :            :   /* If this insn loads a parameter from its stack slot, then it
    1485                 :            :      represents a savings, rather than a cost, if the parameter is
    1486                 :            :      stored in memory.  Record this fact.
    1487                 :            : 
    1488                 :            :      Similarly if we're loading other constants from memory (constant
    1489                 :            :      pool, TOC references, small data areas, etc) and this is the only
    1490                 :            :      assignment to the destination pseudo.
    1491                 :            : 
    1492                 :            :      Don't do this if SET_SRC (set) isn't a general operand, if it is
    1493                 :            :      a memory requiring special instructions to load it, decreasing
    1494                 :            :      mem_cost might result in it being loaded using the specialized
    1495                 :            :      instruction into a register, then stored into stack and loaded
    1496                 :            :      again from the stack.  See PR52208.
    1497                 :            : 
    1498                 :            :      Don't do this if SET_SRC (set) has side effect.  See PR56124.  */
    1499                 :   84647900 :   if (set != 0 && REG_P (SET_DEST (set)) && MEM_P (SET_SRC (set))
    1500                 :   10525200 :       && (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != NULL_RTX
    1501                 :    3151120 :       && ((MEM_P (XEXP (note, 0))
    1502                 :    2908910 :            && !side_effects_p (SET_SRC (set)))
    1503                 :     242213 :           || (CONSTANT_P (XEXP (note, 0))
    1504                 :     242185 :               && targetm.legitimate_constant_p (GET_MODE (SET_DEST (set)),
    1505                 :            :                                                 XEXP (note, 0))
    1506                 :     141304 :               && REG_N_SETS (REGNO (SET_DEST (set))) == 1))
    1507                 :    3050220 :       && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set)))
    1508                 :            :       /* LRA does not use equiv with a symbol for PIC code.  */
    1509                 :   93147500 :       && (! ira_use_lra_p || ! pic_offset_table_rtx
    1510                 :     291988 :           || ! contains_symbol_ref_p (XEXP (note, 0))))
    1511                 :            :     {
    1512                 :    2995590 :       enum reg_class cl = GENERAL_REGS;
    1513                 :    2995590 :       rtx reg = SET_DEST (set);
    1514                 :    2995590 :       int num = COST_INDEX (REGNO (reg));
    1515                 :            : 
    1516                 :    2995590 :       COSTS (costs, num)->mem_cost
    1517                 :    2995590 :         -= ira_memory_move_cost[GET_MODE (reg)][cl][1] * frequency;
    1518                 :    5991170 :       record_address_regs (GET_MODE (SET_SRC (set)),
    1519                 :    5991170 :                            MEM_ADDR_SPACE (SET_SRC (set)),
    1520                 :    2995590 :                            XEXP (SET_SRC (set), 0), 0, MEM, SCRATCH,
    1521                 :            :                            frequency * 2);
    1522                 :    2995590 :       counted_mem = true;
    1523                 :            :     }
    1524                 :            : 
    1525                 :   90097300 :   record_operand_costs (insn, pref);
    1526                 :            : 
    1527                 :            :   /* Now add the cost for each operand to the total costs for its
    1528                 :            :      allocno.  */
    1529                 :  283855000 :   for (i = 0; i < recog_data.n_operands; i++)
    1530                 :            :     {
    1531                 :  193757000 :       rtx op = recog_data.operand[i];
    1532                 :            :       
    1533                 :  193757000 :       if (GET_CODE (op) == SUBREG)
    1534                 :     113303 :         op = SUBREG_REG (op);
    1535                 :  193757000 :       if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
    1536                 :            :         {
    1537                 :   76820800 :           int regno = REGNO (op);
    1538                 :   76820800 :           struct costs *p = COSTS (costs, COST_INDEX (regno));
    1539                 :   76820800 :           struct costs *q = op_costs[i];
    1540                 :   76820800 :           int *p_costs = p->cost, *q_costs = q->cost;
    1541                 :   76820800 :           cost_classes_t cost_classes_ptr = regno_cost_classes[regno];
    1542                 :   76820800 :           int add_cost;
    1543                 :            :           
    1544                 :            :           /* If the already accounted for the memory "cost" above, don't
    1545                 :            :              do so again.  */
    1546                 :   76820800 :           if (!counted_mem)
    1547                 :            :             {
    1548                 :   73825300 :               add_cost = q->mem_cost;
    1549                 :   73825300 :               if (add_cost > 0 && INT_MAX - add_cost < p->mem_cost)
    1550                 :          0 :                 p->mem_cost = INT_MAX;
    1551                 :            :               else
    1552                 :   73825300 :                 p->mem_cost += add_cost;
    1553                 :            :             }
    1554                 : 1115630000 :           for (k = cost_classes_ptr->num - 1; k >= 0; k--)
    1555                 :            :             {
    1556                 : 1038810000 :               add_cost = q_costs[k];
    1557                 : 1038810000 :               if (add_cost > 0 && INT_MAX - add_cost < p_costs[k])
    1558                 :          0 :                 p_costs[k] = INT_MAX;
    1559                 :            :               else
    1560                 : 1038810000 :                 p_costs[k] += add_cost;
    1561                 :            :             }
    1562                 :            :         }
    1563                 :            :     }
    1564                 :            :   return insn;
    1565                 :            : }
    1566                 :            : 
    1567                 :            : 
    1568                 :            : 
    1569                 :            : /* Print allocnos costs to file F.  */
    1570                 :            : static void
    1571                 :        134 : print_allocno_costs (FILE *f)
    1572                 :            : {
    1573                 :        134 :   int k;
    1574                 :        134 :   ira_allocno_t a;
    1575                 :        134 :   ira_allocno_iterator ai;
    1576                 :            : 
    1577                 :        134 :   ira_assert (allocno_p);
    1578                 :        134 :   fprintf (f, "\n");
    1579                 :       1657 :   FOR_EACH_ALLOCNO (a, ai)
    1580                 :            :     {
    1581                 :       1389 :       int i, rclass;
    1582                 :       1389 :       basic_block bb;
    1583                 :       1389 :       int regno = ALLOCNO_REGNO (a);
    1584                 :       1389 :       cost_classes_t cost_classes_ptr = regno_cost_classes[regno];
    1585                 :       1389 :       enum reg_class *cost_classes = cost_classes_ptr->classes;
    1586                 :            : 
    1587                 :       1389 :       i = ALLOCNO_NUM (a);
    1588                 :       1389 :       fprintf (f, "  a%d(r%d,", i, regno);
    1589                 :       1389 :       if ((bb = ALLOCNO_LOOP_TREE_NODE (a)->bb) != NULL)
    1590                 :          0 :         fprintf (f, "b%d", bb->index);
    1591                 :            :       else
    1592                 :       1389 :         fprintf (f, "l%d", ALLOCNO_LOOP_TREE_NODE (a)->loop_num);
    1593                 :       1389 :       fprintf (f, ") costs:");
    1594                 :      19668 :       for (k = 0; k < cost_classes_ptr->num; k++)
    1595                 :            :         {
    1596                 :      18279 :           rclass = cost_classes[k];
    1597                 :      18279 :           fprintf (f, " %s:%d", reg_class_names[rclass],
    1598                 :      18279 :                    COSTS (costs, i)->cost[k]);
    1599                 :      18279 :           if (flag_ira_region == IRA_REGION_ALL
    1600                 :      18279 :               || flag_ira_region == IRA_REGION_MIXED)
    1601                 :      14322 :             fprintf (f, ",%d", COSTS (total_allocno_costs, i)->cost[k]);
    1602                 :            :         }
    1603                 :       1389 :       fprintf (f, " MEM:%i", COSTS (costs, i)->mem_cost);
    1604                 :       1389 :       if (flag_ira_region == IRA_REGION_ALL
    1605                 :       1389 :           || flag_ira_region == IRA_REGION_MIXED)
    1606                 :       1140 :         fprintf (f, ",%d", COSTS (total_allocno_costs, i)->mem_cost);
    1607                 :       1389 :       fprintf (f, "\n");
    1608                 :            :     }
    1609                 :        134 : }
    1610                 :            : 
    1611                 :            : /* Print pseudo costs to file F.  */
    1612                 :            : static void
    1613                 :         16 : print_pseudo_costs (FILE *f)
    1614                 :            : {
    1615                 :         16 :   int regno, k;
    1616                 :         16 :   int rclass;
    1617                 :         16 :   cost_classes_t cost_classes_ptr;
    1618                 :         16 :   enum reg_class *cost_classes;
    1619                 :            : 
    1620                 :         16 :   ira_assert (! allocno_p);
    1621                 :         16 :   fprintf (f, "\n");
    1622                 :        768 :   for (regno = max_reg_num () - 1; regno >= FIRST_PSEUDO_REGISTER; regno--)
    1623                 :            :     {
    1624                 :        752 :       if (REG_N_REFS (regno) <= 0)
    1625                 :        446 :         continue;
    1626                 :        306 :       cost_classes_ptr = regno_cost_classes[regno];
    1627                 :        306 :       cost_classes = cost_classes_ptr->classes;
    1628                 :        306 :       fprintf (f, "  r%d costs:", regno);
    1629                 :       5197 :       for (k = 0; k < cost_classes_ptr->num; k++)
    1630                 :            :         {
    1631                 :       4891 :           rclass = cost_classes[k];
    1632                 :       4891 :           fprintf (f, " %s:%d", reg_class_names[rclass],
    1633                 :       4891 :                    COSTS (costs, regno)->cost[k]);
    1634                 :            :         }
    1635                 :        306 :       fprintf (f, " MEM:%i\n", COSTS (costs, regno)->mem_cost);
    1636                 :            :     }
    1637                 :         16 : }
    1638                 :            : 
    1639                 :            : /* Traverse the BB represented by LOOP_TREE_NODE to update the allocno
    1640                 :            :    costs.  */
    1641                 :            : static void
    1642                 :   16179300 : process_bb_for_costs (basic_block bb)
    1643                 :            : {
    1644                 :   16179300 :   rtx_insn *insn;
    1645                 :            : 
    1646                 :   16179300 :   frequency = REG_FREQ_FROM_BB (bb);
    1647                 :   16179300 :   if (frequency == 0)
    1648                 :          0 :     frequency = 1;
    1649                 :  192742000 :   FOR_BB_INSNS (bb, insn)
    1650                 :  176563000 :     insn = scan_one_insn (insn);
    1651                 :   16179300 : }
    1652                 :            : 
    1653                 :            : /* Traverse the BB represented by LOOP_TREE_NODE to update the allocno
    1654                 :            :    costs.  */
    1655                 :            : static void
    1656                 :   17891300 : process_bb_node_for_costs (ira_loop_tree_node_t loop_tree_node)
    1657                 :            : {
    1658                 :   17891300 :   basic_block bb;
    1659                 :            : 
    1660                 :   17891300 :   bb = loop_tree_node->bb;
    1661                 :   17891300 :   if (bb != NULL)
    1662                 :   15679400 :     process_bb_for_costs (bb);
    1663                 :   17891300 : }
    1664                 :            : 
    1665                 :            : /* Find costs of register classes and memory for allocnos or pseudos
    1666                 :            :    and their best costs.  Set up preferred, alternative and allocno
    1667                 :            :    classes for pseudos.  */
    1668                 :            : static void
    1669                 :     963156 : find_costs_and_classes (FILE *dump_file)
    1670                 :            : {
    1671                 :     963156 :   int i, k, start, max_cost_classes_num;
    1672                 :     963156 :   int pass;
    1673                 :     963156 :   basic_block bb;
    1674                 :     963156 :   enum reg_class *regno_best_class, new_class;
    1675                 :            : 
    1676                 :     963156 :   init_recog ();
    1677                 :     963156 :   regno_best_class
    1678                 :     963156 :     = (enum reg_class *) ira_allocate (max_reg_num ()
    1679                 :            :                                        * sizeof (enum reg_class));
    1680                 :   42041800 :   for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
    1681                 :   41078700 :     regno_best_class[i] = NO_REGS;
    1682                 :    1906120 :   if (!resize_reg_info () && allocno_p
    1683                 :    1906120 :       && pseudo_classes_defined_p && flag_expensive_optimizations)
    1684                 :            :     {
    1685                 :         72 :       ira_allocno_t a;
    1686                 :         72 :       ira_allocno_iterator ai;
    1687                 :            : 
    1688                 :         72 :       pref = pref_buffer;
    1689                 :         72 :       max_cost_classes_num = 1;
    1690                 :       2672 :       FOR_EACH_ALLOCNO (a, ai)
    1691                 :            :         {
    1692                 :       2600 :           pref[ALLOCNO_NUM (a)] = reg_preferred_class (ALLOCNO_REGNO (a));
    1693                 :       2600 :           setup_regno_cost_classes_by_aclass
    1694                 :       2600 :             (ALLOCNO_REGNO (a), pref[ALLOCNO_NUM (a)]);
    1695                 :       2600 :           max_cost_classes_num
    1696                 :       2600 :             = MAX (max_cost_classes_num,
    1697                 :            :                    regno_cost_classes[ALLOCNO_REGNO (a)]->num);
    1698                 :            :         }
    1699                 :            :       start = 1;
    1700                 :            :     }
    1701                 :            :   else
    1702                 :            :     {
    1703                 :     963084 :       pref = NULL;
    1704                 :     963084 :       max_cost_classes_num = ira_important_classes_num;
    1705                 :   42038000 :       for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
    1706                 :   41074900 :         if (regno_reg_rtx[i] != NULL_RTX)
    1707                 :   40502600 :           setup_regno_cost_classes_by_mode (i, PSEUDO_REGNO_MODE (i));
    1708                 :            :         else
    1709                 :     572254 :           setup_regno_cost_classes_by_aclass (i, ALL_REGS);
    1710                 :            :       start = 0;
    1711                 :            :     }
    1712                 :     963156 :   if (allocno_p)
    1713                 :            :     /* Clear the flag for the next compiled function.  */
    1714                 :     942959 :     pseudo_classes_defined_p = false;
    1715                 :            :   /* Normally we scan the insns once and determine the best class to
    1716                 :            :      use for each allocno.  However, if -fexpensive-optimizations are
    1717                 :            :      on, we do so twice, the second time using the tentative best
    1718                 :            :      classes to guide the selection.  */
    1719                 :    2590710 :   for (pass = start; pass <= flag_expensive_optimizations; pass++)
    1720                 :            :     {
    1721                 :    1627550 :       if ((!allocno_p || internal_flag_ira_verbose > 0) && dump_file)
    1722                 :        150 :         fprintf (dump_file,
    1723                 :            :                  "\nPass %i for finding pseudo/allocno costs\n\n", pass);
    1724                 :            : 
    1725                 :    1627550 :       if (pass != start)
    1726                 :            :         {
    1727                 :     664398 :           max_cost_classes_num = 1;
    1728                 :   31647900 :           for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
    1729                 :            :             {
    1730                 :   30983500 :               setup_regno_cost_classes_by_aclass (i, regno_best_class[i]);
    1731                 :   30983500 :               max_cost_classes_num
    1732                 :   30983500 :                 = MAX (max_cost_classes_num, regno_cost_classes[i]->num);
    1733                 :            :             }
    1734                 :            :         }
    1735                 :            : 
    1736                 :    1627550 :       struct_costs_size
    1737                 :    1627550 :         = sizeof (struct costs) + sizeof (int) * (max_cost_classes_num - 1);
    1738                 :            :       /* Zero out our accumulation of the cost of each class for each
    1739                 :            :          allocno.  */
    1740                 :    1627550 :       memset (costs, 0, cost_elements_num * struct_costs_size);
    1741                 :            : 
    1742                 :    1627550 :       if (allocno_p)
    1743                 :            :         {
    1744                 :            :           /* Scan the instructions and record each time it would save code
    1745                 :            :              to put a certain allocno in a certain class.  */
    1746                 :    1587170 :           ira_traverse_loop_tree (true, ira_loop_tree_root,
    1747                 :            :                                   process_bb_node_for_costs, NULL);
    1748                 :            : 
    1749                 :    1587170 :           memcpy (total_allocno_costs, costs,
    1750                 :    1587170 :                   max_struct_costs_size * ira_allocnos_num);
    1751                 :            :         }
    1752                 :            :       else
    1753                 :            :         {
    1754                 :      40383 :           basic_block bb;
    1755                 :            : 
    1756                 :     540285 :           FOR_EACH_BB_FN (bb, cfun)
    1757                 :     499902 :             process_bb_for_costs (bb);
    1758                 :            :         }
    1759                 :            : 
    1760                 :    1627550 :       if (pass == 0)
    1761                 :     963084 :         pref = pref_buffer;
    1762                 :            : 
    1763                 :            :       /* Now for each allocno look at how desirable each class is and
    1764                 :            :          find which class is preferred.  */
    1765                 :   73689700 :       for (i = max_reg_num () - 1; i >= FIRST_PSEUDO_REGISTER; i--)
    1766                 :            :         {
    1767                 :   72062100 :           ira_allocno_t a, parent_a;
    1768                 :   72062100 :           int rclass, a_num, parent_a_num, add_cost;
    1769                 :   72062100 :           ira_loop_tree_node_t parent;
    1770                 :   72062100 :           int best_cost, allocno_cost;
    1771                 :   72062100 :           enum reg_class best, alt_class;
    1772                 :   72062100 :           cost_classes_t cost_classes_ptr = regno_cost_classes[i];
    1773                 :   72062100 :           enum reg_class *cost_classes;
    1774                 :   72062100 :           int *i_costs = temp_costs->cost;
    1775                 :   72062100 :           int i_mem_cost;
    1776                 :   72062100 :           int equiv_savings = regno_equiv_gains[i];
    1777                 :            : 
    1778                 :   72062100 :           if (! allocno_p)
    1779                 :            :             {
    1780                 :    1968530 :               if (regno_reg_rtx[i] == NULL_RTX)
    1781                 :       4874 :                 continue;
    1782                 :    1963660 :               memcpy (temp_costs, COSTS (costs, i), struct_costs_size);
    1783                 :    1963660 :               i_mem_cost = temp_costs->mem_cost;
    1784                 :    1963660 :               cost_classes = cost_classes_ptr->classes;
    1785                 :            :             }
    1786                 :            :           else
    1787                 :            :             {
    1788                 :   70093600 :               if (ira_regno_allocno_map[i] == NULL)
    1789                 :   40875600 :                 continue;
    1790                 :   29218000 :               memset (temp_costs, 0, struct_costs_size);
    1791                 :   29218000 :               i_mem_cost = 0;
    1792                 :   29218000 :               cost_classes = cost_classes_ptr->classes;
    1793                 :            :               /* Find cost of all allocnos with the same regno.  */
    1794                 :   29218000 :               for (a = ira_regno_allocno_map[i];
    1795                 :   64910500 :                    a != NULL;
    1796                 :   35692500 :                    a = ALLOCNO_NEXT_REGNO_ALLOCNO (a))
    1797                 :            :                 {
    1798                 :   35692500 :                   int *a_costs, *p_costs;
    1799                 :            : 
    1800                 :   35692500 :                   a_num = ALLOCNO_NUM (a);
    1801                 :   35692500 :                   if ((flag_ira_region == IRA_REGION_ALL
    1802                 :   35692500 :                        || flag_ira_region == IRA_REGION_MIXED)
    1803                 :   28937700 :                       && (parent = ALLOCNO_LOOP_TREE_NODE (a)->parent) != NULL
    1804                 :   10768400 :                       && (parent_a = parent->regno_allocno_map[i]) != NULL
    1805                 :            :                       /* There are no caps yet.  */
    1806                 :   42166700 :                       && bitmap_bit_p (ALLOCNO_LOOP_TREE_NODE
    1807                 :    6474180 :                                        (a)->border_allocnos,
    1808                 :            :                                        ALLOCNO_NUM (a)))
    1809                 :            :                     {
    1810                 :            :                       /* Propagate costs to upper levels in the region
    1811                 :            :                          tree.  */
    1812                 :    6459460 :                       parent_a_num = ALLOCNO_NUM (parent_a);
    1813                 :    6459460 :                       a_costs = COSTS (total_allocno_costs, a_num)->cost;
    1814                 :    6459460 :                       p_costs = COSTS (total_allocno_costs, parent_a_num)->cost;
    1815                 :   89902800 :                       for (k = cost_classes_ptr->num - 1; k >= 0; k--)
    1816                 :            :                         {
    1817                 :   83443400 :                           add_cost = a_costs[k];
    1818                 :   83443400 :                           if (add_cost > 0 && INT_MAX - add_cost < p_costs[k])
    1819                 :          0 :                             p_costs[k] = INT_MAX;
    1820                 :            :                           else
    1821                 :   83443400 :                             p_costs[k] += add_cost;
    1822                 :            :                         }
    1823                 :    6459460 :                       add_cost = COSTS (total_allocno_costs, a_num)->mem_cost;
    1824                 :    6459460 :                       if (add_cost > 0
    1825                 :    3142340 :                           && (INT_MAX - add_cost
    1826                 :            :                               < COSTS (total_allocno_costs,
    1827                 :    3142340 :                                        parent_a_num)->mem_cost))
    1828                 :          0 :                         COSTS (total_allocno_costs, parent_a_num)->mem_cost
    1829                 :          0 :                           = INT_MAX;
    1830                 :            :                       else
    1831                 :    6459460 :                         COSTS (total_allocno_costs, parent_a_num)->mem_cost
    1832                 :    6459460 :                           += add_cost;
    1833                 :            : 
    1834                 :    6459460 :                       if (i >= first_moveable_pseudo && i < last_moveable_pseudo)
    1835                 :          0 :                         COSTS (total_allocno_costs, parent_a_num)->mem_cost = 0;
    1836                 :            :                     }
    1837                 :   35692500 :                   a_costs = COSTS (costs, a_num)->cost;
    1838                 :  516341000 :                   for (k = cost_classes_ptr->num - 1; k >= 0; k--)
    1839                 :            :                     {
    1840                 :  480649000 :                       add_cost = a_costs[k];
    1841                 :  480649000 :                       if (add_cost > 0 && INT_MAX - add_cost < i_costs[k])
    1842                 :          0 :                         i_costs[k] = INT_MAX;
    1843                 :            :                       else
    1844                 :  480649000 :                         i_costs[k] += add_cost;
    1845                 :            :                     }
    1846                 :   35692500 :                   add_cost = COSTS (costs, a_num)->mem_cost;
    1847                 :   35692500 :                   if (add_cost > 0 && INT_MAX - add_cost < i_mem_cost)
    1848                 :            :                     i_mem_cost = INT_MAX;
    1849                 :            :                   else
    1850                 :   35692500 :                     i_mem_cost += add_cost;
    1851                 :            :                 }
    1852                 :            :             }
    1853                 :   31181700 :           if (i >= first_moveable_pseudo && i < last_moveable_pseudo)
    1854                 :            :             i_mem_cost = 0;
    1855                 :   31160100 :           else if (equiv_savings < 0)
    1856                 :      85779 :             i_mem_cost = -equiv_savings;
    1857                 :   31074300 :           else if (equiv_savings > 0)
    1858                 :            :             {
    1859                 :     651625 :               i_mem_cost = 0;
    1860                 :   11755800 :               for (k = cost_classes_ptr->num - 1; k >= 0; k--)
    1861                 :   11104100 :                 i_costs[k] += equiv_savings;
    1862                 :            :             }
    1863                 :            : 
    1864                 :   31181700 :           best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1;
    1865                 :   31181700 :           best = ALL_REGS;
    1866                 :   31181700 :           alt_class = NO_REGS;
    1867                 :            :           /* Find best common class for all allocnos with the same
    1868                 :            :              regno.  */
    1869                 :  460017000 :           for (k = 0; k < cost_classes_ptr->num; k++)
    1870                 :            :             {
    1871                 :  428835000 :               rclass = cost_classes[k];
    1872                 :  428835000 :               if (i_costs[k] < best_cost)
    1873                 :            :                 {
    1874                 :            :                   best_cost = i_costs[k];
    1875                 :            :                   best = (enum reg_class) rclass;
    1876                 :            :                 }
    1877                 :  389970000 :               else if (i_costs[k] == best_cost)
    1878                 :  173169000 :                 best = ira_reg_class_subunion[best][rclass];
    1879                 :  428835000 :               if (pass == flag_expensive_optimizations
    1880                 :            :                   /* We still prefer registers to memory even at this
    1881                 :            :                      stage if their costs are the same.  We will make
    1882                 :            :                      a final decision during assigning hard registers
    1883                 :            :                      when we have all info including more accurate
    1884                 :            :                      costs which might be affected by assigning hard
    1885                 :            :                      registers to other pseudos because the pseudos
    1886                 :            :                      involved in moves can be coalesced.  */
    1887                 :  229846000 :                   && i_costs[k] <= i_mem_cost
    1888                 :  146133000 :                   && (reg_class_size[reg_class_subunion[alt_class][rclass]]
    1889                 :  146133000 :                       > reg_class_size[alt_class]))
    1890                 :   51541900 :                 alt_class = reg_class_subunion[alt_class][rclass];
    1891                 :            :             }
    1892                 :   31181700 :           alt_class = ira_allocno_class_translate[alt_class];
    1893                 :   31181700 :           if (best_cost > i_mem_cost
    1894                 :   31181700 :               && ! non_spilled_static_chain_regno_p (i))
    1895                 :    1491080 :             regno_aclass[i] = NO_REGS;
    1896                 :   29690600 :           else if (!optimize && !targetm.class_likely_spilled_p (best))
    1897                 :            :             /* Registers in the alternative class are likely to need
    1898                 :            :                longer or slower sequences than registers in the best class.
    1899                 :            :                When optimizing we make some effort to use the best class
    1900                 :            :                over the alternative class where possible, but at -O0 we
    1901                 :            :                effectively give the alternative class equal weight.
    1902                 :            :                We then run the risk of using slower alternative registers
    1903                 :            :                when plenty of registers from the best class are still free.
    1904                 :            :                This is especially true because live ranges tend to be very
    1905                 :            :                short in -O0 code and so register pressure tends to be low.
    1906                 :            : 
    1907                 :            :                Avoid that by ignoring the alternative class if the best
    1908                 :            :                class has plenty of registers.
    1909                 :            : 
    1910                 :            :                The union class arrays give important classes and only
    1911                 :            :                part of it are allocno classes.  So translate them into
    1912                 :            :                allocno classes.  */
    1913                 :    4882290 :             regno_aclass[i] = ira_allocno_class_translate[best];
    1914                 :            :           else
    1915                 :            :             {
    1916                 :            :               /* Make the common class the biggest class of best and
    1917                 :            :                  alt_class.  Translate the common class into an
    1918                 :            :                  allocno class too.  */
    1919                 :   24808300 :               regno_aclass[i] = (ira_allocno_class_translate
    1920                 :   24808300 :                                  [ira_reg_class_superunion[best][alt_class]]);
    1921                 :   24808300 :               ira_assert (regno_aclass[i] != NO_REGS
    1922                 :            :                           && ira_reg_allocno_class_p[regno_aclass[i]]);
    1923                 :            :             }
    1924                 :   62363400 :           if ((new_class
    1925                 :   62363400 :                = (reg_class) (targetm.ira_change_pseudo_allocno_class
    1926                 :   31181700 :                               (i, regno_aclass[i], best))) != regno_aclass[i])
    1927                 :            :             {
    1928                 :          0 :               regno_aclass[i] = new_class;
    1929                 :          0 :               if (hard_reg_set_subset_p (reg_class_contents[new_class],
    1930                 :          0 :                                          reg_class_contents[best]))
    1931                 :          0 :                 best = new_class;
    1932                 :          0 :               if (hard_reg_set_subset_p (reg_class_contents[new_class],
    1933                 :          0 :                                          reg_class_contents[alt_class]))
    1934                 :          0 :                 alt_class = new_class;
    1935                 :            :             }
    1936                 :   31181700 :           if (pass == flag_expensive_optimizations)
    1937                 :            :             {
    1938                 :   18916700 :               if (best_cost > i_mem_cost
    1939                 :            :                   /* Do not assign NO_REGS to static chain pointer
    1940                 :            :                      pseudo when non-local goto is used.  */
    1941                 :   18916700 :                   && ! non_spilled_static_chain_regno_p (i))
    1942                 :            :                 best = alt_class = NO_REGS;
    1943                 :   18131000 :               else if (best == alt_class)
    1944                 :   12488600 :                 alt_class = NO_REGS;
    1945                 :   18916700 :               setup_reg_classes (i, best, alt_class, regno_aclass[i]);
    1946                 :   18916700 :               if ((!allocno_p || internal_flag_ira_verbose > 2)
    1947                 :   18916700 :                   && dump_file != NULL)
    1948                 :       1066 :                 fprintf (dump_file,
    1949                 :            :                          "    r%d: preferred %s, alternative %s, allocno %s\n",
    1950                 :       1066 :                          i, reg_class_names[best], reg_class_names[alt_class],
    1951                 :       1066 :                          reg_class_names[regno_aclass[i]]);
    1952                 :            :             }
    1953                 :   31181700 :           regno_best_class[i] = best;
    1954                 :   31181700 :           if (! allocno_p)
    1955                 :            :             {
    1956                 :    3927310 :               pref[i] = (best_cost > i_mem_cost
    1957                 :    1963660 :                          && ! non_spilled_static_chain_regno_p (i)
    1958                 :    1963660 :                          ? NO_REGS : best);
    1959                 :    1963660 :               continue;
    1960                 :            :             }
    1961                 :   29218000 :           for (a = ira_regno_allocno_map[i];
    1962                 :   64910500 :                a != NULL;
    1963                 :   35692500 :                a = ALLOCNO_NEXT_REGNO_ALLOCNO (a))
    1964                 :            :             {
    1965                 :   35692500 :               enum reg_class aclass = regno_aclass[i];
    1966                 :   35692500 :               int a_num = ALLOCNO_NUM (a);
    1967                 :   35692500 :               int *total_a_costs = COSTS (total_allocno_costs, a_num)->cost;
    1968                 :   35692500 :               int *a_costs = COSTS (costs, a_num)->cost;
    1969                 :            : 
    1970                 :   35692500 :               if (aclass == NO_REGS)
    1971                 :            :                 best = NO_REGS;
    1972                 :            :               else
    1973                 :            :                 {
    1974                 :            :                   /* Finding best class which is subset of the common
    1975                 :            :                      class.  */
    1976                 :            :                   best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1;
    1977                 :            :                   allocno_cost = best_cost;
    1978                 :            :                   best = ALL_REGS;
    1979                 :  494366000 :                   for (k = 0; k < cost_classes_ptr->num; k++)
    1980                 :            :                     {
    1981                 :  460469000 :                       rclass = cost_classes[k];
    1982                 :  460469000 :                       if (! ira_class_subset_p[rclass][aclass])
    1983                 :  225753000 :                         continue;
    1984                 :  234715000 :                       if (total_a_costs[k] < best_cost)
    1985                 :            :                         {
    1986                 :   37087200 :                           best_cost = total_a_costs[k];
    1987                 :   37087200 :                           allocno_cost = a_costs[k];
    1988                 :   37087200 :                           best = (enum reg_class) rclass;
    1989                 :            :                         }
    1990                 :  197628000 :                       else if (total_a_costs[k] == best_cost)
    1991                 :            :                         {
    1992                 :  158859000 :                           best = ira_reg_class_subunion[best][rclass];
    1993                 :  158859000 :                           allocno_cost = MAX (allocno_cost, a_costs[k]);
    1994                 :            :                         }
    1995                 :            :                     }
    1996                 :   33896900 :                   ALLOCNO_CLASS_COST (a) = allocno_cost;
    1997                 :            :                 }
    1998                 :   35692500 :               if (internal_flag_ira_verbose > 2 && dump_file != NULL
    1999                 :       1389 :                   && (pass == 0 || pref[a_num] != best))
    2000                 :            :                 {
    2001                 :        828 :                   fprintf (dump_file, "    a%d (r%d,", a_num, i);
    2002                 :        828 :                   if ((bb = ALLOCNO_LOOP_TREE_NODE (a)->bb) != NULL)
    2003                 :          0 :                     fprintf (dump_file, "b%d", bb->index);
    2004                 :            :                   else
    2005                 :        828 :                     fprintf (dump_file, "l%d",
    2006                 :            :                              ALLOCNO_LOOP_TREE_NODE (a)->loop_num);
    2007                 :        828 :                   fprintf (dump_file, ") best %s, allocno %s\n",
    2008                 :        828 :                            reg_class_names[best],
    2009                 :        828 :                            reg_class_names[aclass]);
    2010                 :            :                 }
    2011                 :   35692500 :               pref[a_num] = best;
    2012                 :   35692500 :               if (pass == flag_expensive_optimizations && best != aclass
    2013                 :    5091200 :                   && ira_class_hard_regs_num[best] > 0
    2014                 :    5091200 :                   && (ira_reg_class_max_nregs[best][ALLOCNO_MODE (a)]
    2015                 :            :                       >= ira_class_hard_regs_num[best]))
    2016                 :            :                 {
    2017                 :    4674550 :                   int ind = cost_classes_ptr->index[aclass];
    2018                 :            : 
    2019                 :    4674550 :                   ira_assert (ind >= 0);
    2020                 :    4674550 :                   ira_init_register_move_cost_if_necessary (ALLOCNO_MODE (a));
    2021                 :    4674550 :                   ira_add_allocno_pref (a, ira_class_hard_regs[best][0],
    2022                 :    4674550 :                                         (a_costs[ind] - ALLOCNO_CLASS_COST (a))
    2023                 :            :                                         / (ira_register_move_cost
    2024                 :    4674550 :                                            [ALLOCNO_MODE (a)][best][aclass]));
    2025                 :   83358400 :                   for (k = 0; k < cost_classes_ptr->num; k++)
    2026                 :   78683800 :                     if (ira_class_subset_p[cost_classes[k]][best])
    2027                 :    4674550 :                       a_costs[k] = a_costs[ind];
    2028                 :            :                 }
    2029                 :            :             }
    2030                 :            :         }
    2031                 :            : 
    2032                 :    1627550 :       if (internal_flag_ira_verbose > 4 && dump_file)
    2033                 :            :         {
    2034                 :        150 :           if (allocno_p)
    2035                 :        134 :             print_allocno_costs (dump_file);
    2036                 :            :           else
    2037                 :         16 :             print_pseudo_costs (dump_file);
    2038                 :        150 :           fprintf (dump_file,"\n");
    2039                 :            :         }
    2040                 :            :     }
    2041                 :     963156 :   ira_free (regno_best_class);
    2042                 :     963156 : }
    2043                 :            : 
    2044                 :            : 
    2045                 :            : 
    2046                 :            : /* Process moves involving hard regs to modify allocno hard register
    2047                 :            :    costs.  We can do this only after determining allocno class.  If a
    2048                 :            :    hard register forms a register class, then moves with the hard
    2049                 :            :    register are already taken into account in class costs for the
    2050                 :            :    allocno.  */
    2051                 :            : static void
    2052                 :    7981730 : process_bb_node_for_hard_reg_moves (ira_loop_tree_node_t loop_tree_node)
    2053                 :            : {
    2054                 :    7981730 :   int i, freq, src_regno, dst_regno, hard_regno, a_regno;
    2055                 :    7981730 :   bool to_p;
    2056                 :    7981730 :   ira_allocno_t a, curr_a;
    2057                 :    7981730 :   ira_loop_tree_node_t curr_loop_tree_node;
    2058                 :    7981730 :   enum reg_class rclass;
    2059                 :    7981730 :   basic_block bb;
    2060                 :    7981730 :   rtx_insn *insn;
    2061                 :    7981730 :   rtx set, src, dst;
    2062                 :            : 
    2063                 :    7981730 :   bb = loop_tree_node->bb;
    2064                 :    7981730 :   if (bb == NULL)
    2065                 :            :     return;
    2066                 :    6969950 :   freq = REG_FREQ_FROM_BB (bb);
    2067                 :    5522480 :   if (freq == 0)
    2068                 :          0 :     freq = 1;
    2069                 :  166054000 :   FOR_BB_INSNS (bb, insn)
    2070                 :            :     {
    2071                 :   79542100 :       if (!NONDEBUG_INSN_P (insn))
    2072                 :   41067900 :         continue;
    2073                 :   38474300 :       set = single_set (insn);
    2074                 :   38474300 :       if (set == NULL_RTX)
    2075                 :    2740960 :         continue;
    2076                 :   35733300 :       dst = SET_DEST (set);
    2077                 :   35733300 :       src = SET_SRC (set);
    2078                 :   35733300 :       if (! REG_P (dst) || ! REG_P (src))
    2079                 :   29156400 :         continue;
    2080                 :    6576940 :       dst_regno = REGNO (dst);
    2081                 :    6576940 :       src_regno = REGNO (src);
    2082                 :    6576940 :       if (dst_regno >= FIRST_PSEUDO_REGISTER
    2083                 :    6576940 :           && src_regno < FIRST_PSEUDO_REGISTER)
    2084                 :            :         {
    2085                 :    1900300 :           hard_regno = src_regno;
    2086                 :    1900300 :           a = ira_curr_regno_allocno_map[dst_regno];
    2087                 :    1900300 :           to_p = true;
    2088                 :            :         }
    2089                 :    6392010 :       else if (src_regno >= FIRST_PSEUDO_REGISTER
    2090                 :    4676650 :                && dst_regno < FIRST_PSEUDO_REGISTER)
    2091                 :            :         {
    2092                 :    2961280 :           hard_regno = dst_regno;
    2093                 :    2961280 :           a = ira_curr_regno_allocno_map[src_regno];
    2094                 :    2961280 :           to_p = false;
    2095                 :            :         }
    2096                 :            :       else
    2097                 :    1715360 :         continue;
    2098                 :    9449500 :       if (reg_class_size[(int) REGNO_REG_CLASS (hard_regno)]
    2099                 :            :           == (ira_reg_class_max_nregs
    2100                 :    4861580 :               [REGNO_REG_CLASS (hard_regno)][(int) ALLOCNO_MODE(a)]))
    2101                 :            :         /* If the class can provide only one hard reg to the allocno,
    2102                 :            :            we processed the insn record_operand_costs already and we
    2103                 :            :            actually updated the hard reg cost there.  */
    2104                 :    4587920 :         continue;
    2105                 :     273662 :       rclass = ALLOCNO_CLASS (a);
    2106                 :     273662 :       if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], hard_regno))
    2107                 :      19860 :         continue;
    2108                 :     253802 :       i = ira_class_hard_reg_index[rclass][hard_regno];
    2109                 :     253802 :       if (i < 0)
    2110                 :       6585 :         continue;
    2111                 :     247217 :       a_regno = ALLOCNO_REGNO (a);
    2112                 :     247217 :       for (curr_loop_tree_node = ALLOCNO_LOOP_TREE_NODE (a);
    2113                 :     582117 :            curr_loop_tree_node != NULL;
    2114                 :     334900 :            curr_loop_tree_node = curr_loop_tree_node->parent)
    2115                 :     334900 :         if ((curr_a = curr_loop_tree_node->regno_allocno_map[a_regno]) != NULL)
    2116                 :     262124 :           ira_add_allocno_pref (curr_a, hard_regno, freq);
    2117                 :     247217 :       {
    2118                 :     247217 :         int cost;
    2119                 :     247217 :         enum reg_class hard_reg_class;
    2120                 :     247217 :         machine_mode mode;
    2121                 :            : 
    2122                 :     247217 :         mode = ALLOCNO_MODE (a);
    2123                 :     247217 :         hard_reg_class = REGNO_REG_CLASS (hard_regno);
    2124                 :     247217 :         ira_init_register_move_cost_if_necessary (mode);
    2125                 :     247217 :         cost = (to_p ? ira_register_move_cost[mode][hard_reg_class][rclass]
    2126                 :     133824 :                 : ira_register_move_cost[mode][rclass][hard_reg_class]) * freq;
    2127                 :     247217 :         ira_allocate_and_set_costs (&ALLOCNO_HARD_REG_COSTS (a), rclass,
    2128                 :            :                                     ALLOCNO_CLASS_COST (a));
    2129                 :     247217 :         ira_allocate_and_set_costs (&ALLOCNO_CONFLICT_HARD_REG_COSTS (a),
    2130                 :            :                                     rclass, 0);
    2131                 :     247217 :         ALLOCNO_HARD_REG_COSTS (a)[i] -= cost;
    2132                 :     247217 :         ALLOCNO_CONFLICT_HARD_REG_COSTS (a)[i] -= cost;
    2133                 :     247217 :         ALLOCNO_CLASS_COST (a) = MIN (ALLOCNO_CLASS_COST (a),
    2134                 :            :                                       ALLOCNO_HARD_REG_COSTS (a)[i]);
    2135                 :            :       }
    2136                 :            :     }
    2137                 :            : }
    2138                 :            : 
    2139                 :            : /* After we find hard register and memory costs for allocnos, define
    2140                 :            :    its class and modify hard register cost because insns moving
    2141                 :            :    allocno to/from hard registers.  */
    2142                 :            : static void
    2143                 :     942959 : setup_allocno_class_and_costs (void)
    2144                 :            : {
    2145                 :     942959 :   int i, j, n, regno, hard_regno, num;
    2146                 :     942959 :   int *reg_costs;
    2147                 :     942959 :   enum reg_class aclass, rclass;
    2148                 :     942959 :   ira_allocno_t a;
    2149                 :     942959 :   ira_allocno_iterator ai;
    2150                 :     942959 :   cost_classes_t cost_classes_ptr;
    2151                 :            : 
    2152                 :     942959 :   ira_assert (allocno_p);
    2153                 :   22220000 :   FOR_EACH_ALLOCNO (a, ai)
    2154                 :            :     {
    2155                 :   21277000 :       i = ALLOCNO_NUM (a);
    2156                 :   21277000 :       regno = ALLOCNO_REGNO (a);
    2157                 :   21277000 :       aclass = regno_aclass[regno];
    2158                 :   21277000 :       cost_classes_ptr = regno_cost_classes[regno];
    2159                 :   21277000 :       ira_assert (pref[i] == NO_REGS || aclass != NO_REGS);
    2160                 :   21277000 :       ALLOCNO_MEMORY_COST (a) = COSTS (costs, i)->mem_cost;
    2161                 :   21277000 :       ira_set_allocno_class (a, aclass);
    2162                 :   21277000 :       if (aclass == NO_REGS)
    2163                 :     944180 :         continue;
    2164                 :   20332800 :       if (optimize && ALLOCNO_CLASS (a) != pref[i])
    2165                 :            :         {
    2166                 :    4033690 :           n = ira_class_hard_regs_num[aclass];
    2167                 :    4033690 :           ALLOCNO_HARD_REG_COSTS (a)
    2168                 :    4033690 :             = reg_costs = ira_allocate_cost_vector (aclass);
    2169                 :   69415400 :           for (j = n - 1; j >= 0; j--)
    2170                 :            :             {
    2171                 :   65381700 :               hard_regno = ira_class_hard_regs[aclass][j];
    2172                 :   65381700 :               if (TEST_HARD_REG_BIT (reg_class_contents[pref[i]], hard_regno))
    2173                 :    9597530 :                 reg_costs[j] = ALLOCNO_CLASS_COST (a);
    2174                 :            :               else
    2175                 :            :                 {
    2176                 :   55784200 :                   rclass = REGNO_REG_CLASS (hard_regno);
    2177                 :   55784200 :                   num = cost_classes_ptr->index[rclass];
    2178                 :   55784200 :                   if (num < 0)
    2179                 :            :                     {
    2180                 :     365759 :                       num = cost_classes_ptr->hard_regno_index[hard_regno];
    2181                 :     365759 :                       ira_assert (num >= 0);
    2182                 :            :                     }
    2183                 :   55784200 :                   reg_costs[j] = COSTS (costs, i)->cost[num];
    2184                 :            :                 }
    2185                 :            :             }
    2186                 :            :         }
    2187                 :            :     }
    2188                 :     942959 :   if (optimize)
    2189                 :     687425 :     ira_traverse_loop_tree (true, ira_loop_tree_root,
    2190                 :            :                             process_bb_node_for_hard_reg_moves, NULL);
    2191                 :     942959 : }
    2192                 :            : 
    2193                 :            : 
    2194                 :            : 
    2195                 :            : /* Function called once during compiler work.  */
    2196                 :            : void
    2197                 :     149492 : ira_init_costs_once (void)
    2198                 :            : {
    2199                 :     149492 :   int i;
    2200                 :            : 
    2201                 :     149492 :   init_cost = NULL;
    2202                 :    4634250 :   for (i = 0; i < MAX_RECOG_OPERANDS; i++)
    2203                 :            :     {
    2204                 :    4484760 :       op_costs[i] = NULL;
    2205                 :    4484760 :       this_op_costs[i] = NULL;
    2206                 :            :     }
    2207                 :     149492 :   temp_costs = NULL;
    2208                 :     149492 : }
    2209                 :            : 
    2210                 :            : /* Free allocated temporary cost vectors.  */
    2211                 :            : void
    2212                 :     352715 : target_ira_int::free_ira_costs ()
    2213                 :            : {
    2214                 :     352715 :   int i;
    2215                 :            : 
    2216                 :     352715 :   free (x_init_cost);
    2217                 :     352715 :   x_init_cost = NULL;
    2218                 :   10934200 :   for (i = 0; i < MAX_RECOG_OPERANDS; i++)
    2219                 :            :     {
    2220                 :   10581400 :       free (x_op_costs[i]);
    2221                 :   10581400 :       free (x_this_op_costs[i]);
    2222                 :   10581400 :       x_op_costs[i] = x_this_op_costs[i] = NULL;
    2223                 :            :     }
    2224                 :     352715 :   free (x_temp_costs);
    2225                 :     352715 :   x_temp_costs = NULL;
    2226                 :     352715 : }
    2227                 :            : 
    2228                 :            : /* This is called each time register related information is
    2229                 :            :    changed.  */
    2230                 :            : void
    2231                 :     151740 : ira_init_costs (void)
    2232                 :            : {
    2233                 :     151740 :   int i;
    2234                 :            : 
    2235                 :     151740 :   this_target_ira_int->free_ira_costs ();
    2236                 :     151740 :   max_struct_costs_size
    2237                 :     151740 :     = sizeof (struct costs) + sizeof (int) * (ira_important_classes_num - 1);
    2238                 :            :   /* Don't use ira_allocate because vectors live through several IRA
    2239                 :            :      calls.  */
    2240                 :     151740 :   init_cost = (struct costs *) xmalloc (max_struct_costs_size);
    2241                 :     151740 :   init_cost->mem_cost = 1000000;
    2242                 :    4250460 :   for (i = 0; i < ira_important_classes_num; i++)
    2243                 :    4098720 :     init_cost->cost[i] = 1000000;
    2244                 :    4703940 :   for (i = 0; i < MAX_RECOG_OPERANDS; i++)
    2245                 :            :     {
    2246                 :    4552200 :       op_costs[i] = (struct costs *) xmalloc (max_struct_costs_size);
    2247                 :    4552200 :       this_op_costs[i] = (struct costs *) xmalloc (max_struct_costs_size);
    2248                 :            :     }
    2249                 :     151740 :   temp_costs = (struct costs *) xmalloc (max_struct_costs_size);
    2250                 :     151740 : }
    2251                 :            : 
    2252                 :            : 
    2253                 :            : 
    2254                 :            : /* Common initialization function for ira_costs and
    2255                 :            :    ira_set_pseudo_classes.  */
    2256                 :            : static void
    2257                 :     963156 : init_costs (void)
    2258                 :            : {
    2259                 :     963156 :   init_subregs_of_mode ();
    2260                 :    1926310 :   costs = (struct costs *) ira_allocate (max_struct_costs_size
    2261                 :     963156 :                                          * cost_elements_num);
    2262                 :    1926310 :   pref_buffer = (enum reg_class *) ira_allocate (sizeof (enum reg_class)
    2263                 :     963156 :                                                  * cost_elements_num);
    2264                 :    2889470 :   regno_aclass = (enum reg_class *) ira_allocate (sizeof (enum reg_class)
    2265                 :     963156 :                                                  * max_reg_num ());
    2266                 :     963156 :   regno_equiv_gains = (int *) ira_allocate (sizeof (int) * max_reg_num ());
    2267                 :     963156 :   memset (regno_equiv_gains, 0, sizeof (int) * max_reg_num ());
    2268                 :     963156 : }
    2269                 :            : 
    2270                 :            : /* Common finalization function for ira_costs and
    2271                 :            :    ira_set_pseudo_classes.  */
    2272                 :            : static void
    2273                 :     963156 : finish_costs (void)
    2274                 :            : {
    2275                 :     963156 :   finish_subregs_of_mode ();
    2276                 :     963156 :   ira_free (regno_equiv_gains);
    2277                 :     963156 :   ira_free (regno_aclass);
    2278                 :     963156 :   ira_free (pref_buffer);
    2279                 :     963156 :   ira_free (costs);
    2280                 :     963156 : }
    2281                 :            : 
    2282                 :            : /* Entry function which defines register class, memory and hard
    2283                 :            :    register costs for each allocno.  */
    2284                 :            : void
    2285                 :     942959 : ira_costs (void)
    2286                 :            : {
    2287                 :     942959 :   allocno_p = true;
    2288                 :     942959 :   cost_elements_num = ira_allocnos_num;
    2289                 :     942959 :   init_costs ();
    2290                 :    1885920 :   total_allocno_costs = (struct costs *) ira_allocate (max_struct_costs_size
    2291                 :     942959 :                                                        * ira_allocnos_num);
    2292                 :     942959 :   initiate_regno_cost_classes ();
    2293                 :     942959 :   calculate_elim_costs_all_insns ();
    2294                 :     942959 :   find_costs_and_classes (ira_dump_file);
    2295                 :     942959 :   setup_allocno_class_and_costs ();
    2296                 :     942959 :   finish_regno_cost_classes ();
    2297                 :     942959 :   finish_costs ();
    2298                 :     942959 :   ira_free (total_allocno_costs);
    2299                 :     942959 : }
    2300                 :            : 
    2301                 :            : /* Entry function which defines classes for pseudos.
    2302                 :            :    Set pseudo_classes_defined_p only if DEFINE_PSEUDO_CLASSES is true.  */
    2303                 :            : void
    2304                 :      20197 : ira_set_pseudo_classes (bool define_pseudo_classes, FILE *dump_file)
    2305                 :            : {
    2306                 :      20197 :   allocno_p = false;
    2307                 :      20197 :   internal_flag_ira_verbose = flag_ira_verbose;
    2308                 :      20197 :   cost_elements_num = max_reg_num ();
    2309                 :      20197 :   init_costs ();
    2310                 :      20197 :   initiate_regno_cost_classes ();
    2311                 :      20197 :   find_costs_and_classes (dump_file);
    2312                 :      20197 :   finish_regno_cost_classes ();
    2313                 :      20197 :   if (define_pseudo_classes)
    2314                 :         84 :     pseudo_classes_defined_p = true;
    2315                 :            : 
    2316                 :      20197 :   finish_costs ();
    2317                 :      20197 : }
    2318                 :            : 
    2319                 :            : 
    2320                 :            : 
    2321                 :            : /* Change hard register costs for allocnos which lives through
    2322                 :            :    function calls.  This is called only when we found all intersected
    2323                 :            :    calls during building allocno live ranges.  */
    2324                 :            : void
    2325                 :     942959 : ira_tune_allocno_costs (void)
    2326                 :            : {
    2327                 :     942959 :   int j, n, regno;
    2328                 :     942959 :   int cost, min_cost, *reg_costs;
    2329                 :     942959 :   enum reg_class aclass, rclass;
    2330                 :     942959 :   machine_mode mode;
    2331                 :     942959 :   ira_allocno_t a;
    2332                 :     942959 :   ira_allocno_iterator ai;
    2333                 :     942959 :   ira_allocno_object_iterator oi;
    2334                 :     942959 :   ira_object_t obj;
    2335                 :     942959 :   bool skip_p;
    2336                 :            : 
    2337                 :   23830200 :   FOR_EACH_ALLOCNO (a, ai)
    2338                 :            :     {
    2339                 :   22887200 :       aclass = ALLOCNO_CLASS (a);
    2340                 :   22887200 :       if (aclass == NO_REGS)
    2341                 :    1011360 :         continue;
    2342                 :   21875900 :       mode = ALLOCNO_MODE (a);
    2343                 :   21875900 :       n = ira_class_hard_regs_num[aclass];
    2344                 :   21875900 :       min_cost = INT_MAX;
    2345                 :   21875900 :       if (ALLOCNO_CALLS_CROSSED_NUM (a)
    2346                 :   21875900 :           != ALLOCNO_CHEAP_CALLS_CROSSED_NUM (a))
    2347                 :            :         {
    2348                 :    2651890 :           ira_allocate_and_set_costs
    2349                 :    2651890 :             (&ALLOCNO_HARD_REG_COSTS (a), aclass,
    2350                 :            :              ALLOCNO_CLASS_COST (a));
    2351                 :    2651890 :           reg_costs = ALLOCNO_HARD_REG_COSTS (a);
    2352                 :   36394000 :           for (j = n - 1; j >= 0; j--)
    2353                 :            :             {
    2354                 :   33742100 :               regno = ira_class_hard_regs[aclass][j];
    2355                 :   33742100 :               skip_p = false;
    2356                 :   60382900 :               FOR_EACH_ALLOCNO_OBJECT (a, obj, oi)
    2357                 :            :                 {
    2358                 :   34348100 :                   if (ira_hard_reg_set_intersection_p (regno, mode,
    2359                 :            :                                                        OBJECT_CONFLICT_HARD_REGS
    2360                 :            :                                                        (obj)))
    2361                 :            :                     {
    2362                 :            :                       skip_p = true;
    2363                 :            :                       break;
    2364                 :            :                     }
    2365                 :            :                 }
    2366                 :   33742100 :               if (skip_p)
    2367                 :    7707330 :                 continue;
    2368                 :   26034800 :               rclass = REGNO_REG_CLASS (regno);
    2369                 :   26034800 :               cost = 0;
    2370                 :   52069600 :               if (ira_need_caller_save_p (a, regno))
    2371                 :   12777100 :                 cost += (ALLOCNO_CALL_FREQ (a)
    2372                 :   12777100 :                          * (ira_memory_move_cost[mode][rclass][0]
    2373                 :   12777100 :                             + ira_memory_move_cost[mode][rclass][1]));
    2374                 :            : #ifdef IRA_HARD_REGNO_ADD_COST_MULTIPLIER
    2375                 :            :               cost += ((ira_memory_move_cost[mode][rclass][0]
    2376                 :            :                         + ira_memory_move_cost[mode][rclass][1])
    2377                 :            :                        * ALLOCNO_FREQ (a)
    2378                 :            :                        * IRA_HARD_REGNO_ADD_COST_MULTIPLIER (regno) / 2);
    2379                 :            : #endif
    2380                 :   26034800 :               if (INT_MAX - cost < reg_costs[j])
    2381                 :          0 :                 reg_costs[j] = INT_MAX;
    2382                 :            :               else
    2383                 :   26034800 :                 reg_costs[j] += cost;
    2384                 :   26034800 :               if (min_cost > reg_costs[j])
    2385                 :            :                 min_cost = reg_costs[j];
    2386                 :            :             }
    2387                 :            :         }
    2388                 :    2651890 :       if (min_cost != INT_MAX)
    2389                 :    2644120 :         ALLOCNO_CLASS_COST (a) = min_cost;
    2390                 :            : 
    2391                 :            :       /* Some targets allow pseudos to be allocated to unaligned sequences
    2392                 :            :          of hard registers.  However, selecting an unaligned sequence can
    2393                 :            :          unnecessarily restrict later allocations.  So increase the cost of
    2394                 :            :          unaligned hard regs to encourage the use of aligned hard regs.  */
    2395                 :   21875900 :       {
    2396                 :   21875900 :         const int nregs = ira_reg_class_max_nregs[aclass][ALLOCNO_MODE (a)];
    2397                 :            : 
    2398                 :   21875900 :         if (nregs > 1)
    2399                 :            :           {
    2400                 :     551591 :             ira_allocate_and_set_costs
    2401                 :     551591 :               (&ALLOCNO_HARD_REG_COSTS (a), aclass, ALLOCNO_CLASS_COST (a));
    2402                 :     551591 :             reg_costs = ALLOCNO_HARD_REG_COSTS (a);
    2403                 :    9498230 :             for (j = n - 1; j >= 0; j--)
    2404                 :            :               {
    2405                 :    8946640 :                 regno = ira_non_ordered_class_hard_regs[aclass][j];
    2406                 :    8946640 :                 if ((regno % nregs) != 0)
    2407                 :            :                   {
    2408                 :    4330410 :                     int index = ira_class_hard_reg_index[aclass][regno];
    2409                 :    4330410 :                     ira_assert (index != -1);
    2410                 :    4330410 :                     reg_costs[index] += ALLOCNO_FREQ (a);
    2411                 :            :                   }
    2412                 :            :               }
    2413                 :            :           }
    2414                 :            :       }
    2415                 :            :     }
    2416                 :     942959 : }
    2417                 :            : 
    2418                 :            : /* Add COST to the estimated gain for eliminating REGNO with its
    2419                 :            :    equivalence.  If COST is zero, record that no such elimination is
    2420                 :            :    possible.  */
    2421                 :            : 
    2422                 :            : void
    2423                 :     947868 : ira_adjust_equiv_reg_cost (unsigned regno, int cost)
    2424                 :            : {
    2425                 :     947868 :   if (cost == 0)
    2426                 :     118525 :     regno_equiv_gains[regno] = 0;
    2427                 :            :   else
    2428                 :     829343 :     regno_equiv_gains[regno] += cost;
    2429                 :     947868 : }
    2430                 :            : 
    2431                 :            : void
    2432                 :        888 : ira_costs_c_finalize (void)
    2433                 :            : {
    2434                 :        888 :   this_target_ira_int->free_ira_costs ();
    2435                 :        888 : }

Generated by: LCOV version 1.0

LCOV profile is generated on x86_64 machine using following configure options: configure --disable-bootstrap --enable-coverage=opt --enable-languages=c,c++,fortran,go,jit,lto --enable-host-shared. GCC test suite is run with the built compiler.