LCOV - code coverage report
Current view: top level - gcc - reload1.c (source / functions) Hit Total Coverage
Test: gcc.info Lines: 582 3647 16.0 %
Date: 2020-04-04 11:58:09 Functions: 18 91 19.8 %
Legend: Lines: hit not hit | Branches: + taken - not taken # not executed Branches: 0 0 -

           Branch data     Line data    Source code
       1                 :            : /* Reload pseudo regs into hard regs for insns that require hard regs.
       2                 :            :    Copyright (C) 1987-2020 Free Software Foundation, Inc.
       3                 :            : 
       4                 :            : This file is part of GCC.
       5                 :            : 
       6                 :            : GCC is free software; you can redistribute it and/or modify it under
       7                 :            : the terms of the GNU General Public License as published by the Free
       8                 :            : Software Foundation; either version 3, or (at your option) any later
       9                 :            : version.
      10                 :            : 
      11                 :            : GCC is distributed in the hope that it will be useful, but WITHOUT ANY
      12                 :            : WARRANTY; without even the implied warranty of MERCHANTABILITY or
      13                 :            : FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
      14                 :            : for more details.
      15                 :            : 
      16                 :            : You should have received a copy of the GNU General Public License
      17                 :            : along with GCC; see the file COPYING3.  If not see
      18                 :            : <http://www.gnu.org/licenses/>.  */
      19                 :            : 
      20                 :            : #include "config.h"
      21                 :            : #include "system.h"
      22                 :            : #include "coretypes.h"
      23                 :            : #include "backend.h"
      24                 :            : #include "target.h"
      25                 :            : #include "rtl.h"
      26                 :            : #include "tree.h"
      27                 :            : #include "predict.h"
      28                 :            : #include "df.h"
      29                 :            : #include "memmodel.h"
      30                 :            : #include "tm_p.h"
      31                 :            : #include "optabs.h"
      32                 :            : #include "regs.h"
      33                 :            : #include "ira.h"
      34                 :            : #include "recog.h"
      35                 :            : 
      36                 :            : #include "rtl-error.h"
      37                 :            : #include "expr.h"
      38                 :            : #include "addresses.h"
      39                 :            : #include "cfgrtl.h"
      40                 :            : #include "cfgbuild.h"
      41                 :            : #include "reload.h"
      42                 :            : #include "except.h"
      43                 :            : #include "dumpfile.h"
      44                 :            : #include "rtl-iter.h"
      45                 :            : #include "function-abi.h"
      46                 :            : 
      47                 :            : /* This file contains the reload pass of the compiler, which is
      48                 :            :    run after register allocation has been done.  It checks that
      49                 :            :    each insn is valid (operands required to be in registers really
      50                 :            :    are in registers of the proper class) and fixes up invalid ones
      51                 :            :    by copying values temporarily into registers for the insns
      52                 :            :    that need them.
      53                 :            : 
      54                 :            :    The results of register allocation are described by the vector
      55                 :            :    reg_renumber; the insns still contain pseudo regs, but reg_renumber
      56                 :            :    can be used to find which hard reg, if any, a pseudo reg is in.
      57                 :            : 
      58                 :            :    The technique we always use is to free up a few hard regs that are
      59                 :            :    called ``reload regs'', and for each place where a pseudo reg
      60                 :            :    must be in a hard reg, copy it temporarily into one of the reload regs.
      61                 :            : 
      62                 :            :    Reload regs are allocated locally for every instruction that needs
      63                 :            :    reloads.  When there are pseudos which are allocated to a register that
      64                 :            :    has been chosen as a reload reg, such pseudos must be ``spilled''.
      65                 :            :    This means that they go to other hard regs, or to stack slots if no other
      66                 :            :    available hard regs can be found.  Spilling can invalidate more
      67                 :            :    insns, requiring additional need for reloads, so we must keep checking
      68                 :            :    until the process stabilizes.
      69                 :            : 
      70                 :            :    For machines with different classes of registers, we must keep track
      71                 :            :    of the register class needed for each reload, and make sure that
      72                 :            :    we allocate enough reload registers of each class.
      73                 :            : 
      74                 :            :    The file reload.c contains the code that checks one insn for
      75                 :            :    validity and reports the reloads that it needs.  This file
      76                 :            :    is in charge of scanning the entire rtl code, accumulating the
      77                 :            :    reload needs, spilling, assigning reload registers to use for
      78                 :            :    fixing up each insn, and generating the new insns to copy values
      79                 :            :    into the reload registers.  */
      80                 :            : 
      81                 :            : struct target_reload default_target_reload;
      82                 :            : #if SWITCHABLE_TARGET
      83                 :            : struct target_reload *this_target_reload = &default_target_reload;
      84                 :            : #endif
      85                 :            : 
      86                 :            : #define spill_indirect_levels                   \
      87                 :            :   (this_target_reload->x_spill_indirect_levels)
      88                 :            : 
      89                 :            : /* During reload_as_needed, element N contains a REG rtx for the hard reg
      90                 :            :    into which reg N has been reloaded (perhaps for a previous insn).  */
      91                 :            : static rtx *reg_last_reload_reg;
      92                 :            : 
      93                 :            : /* Elt N nonzero if reg_last_reload_reg[N] has been set in this insn
      94                 :            :    for an output reload that stores into reg N.  */
      95                 :            : static regset_head reg_has_output_reload;
      96                 :            : 
      97                 :            : /* Indicates which hard regs are reload-registers for an output reload
      98                 :            :    in the current insn.  */
      99                 :            : static HARD_REG_SET reg_is_output_reload;
     100                 :            : 
     101                 :            : /* Widest mode in which each pseudo reg is referred to (via subreg).  */
     102                 :            : static machine_mode *reg_max_ref_mode;
     103                 :            : 
     104                 :            : /* Vector to remember old contents of reg_renumber before spilling.  */
     105                 :            : static short *reg_old_renumber;
     106                 :            : 
     107                 :            : /* During reload_as_needed, element N contains the last pseudo regno reloaded
     108                 :            :    into hard register N.  If that pseudo reg occupied more than one register,
     109                 :            :    reg_reloaded_contents points to that pseudo for each spill register in
     110                 :            :    use; all of these must remain set for an inheritance to occur.  */
     111                 :            : static int reg_reloaded_contents[FIRST_PSEUDO_REGISTER];
     112                 :            : 
     113                 :            : /* During reload_as_needed, element N contains the insn for which
     114                 :            :    hard register N was last used.   Its contents are significant only
     115                 :            :    when reg_reloaded_valid is set for this register.  */
     116                 :            : static rtx_insn *reg_reloaded_insn[FIRST_PSEUDO_REGISTER];
     117                 :            : 
     118                 :            : /* Indicate if reg_reloaded_insn / reg_reloaded_contents is valid.  */
     119                 :            : static HARD_REG_SET reg_reloaded_valid;
     120                 :            : /* Indicate if the register was dead at the end of the reload.
     121                 :            :    This is only valid if reg_reloaded_contents is set and valid.  */
     122                 :            : static HARD_REG_SET reg_reloaded_dead;
     123                 :            : 
     124                 :            : /* Number of spill-regs so far; number of valid elements of spill_regs.  */
     125                 :            : static int n_spills;
     126                 :            : 
     127                 :            : /* In parallel with spill_regs, contains REG rtx's for those regs.
     128                 :            :    Holds the last rtx used for any given reg, or 0 if it has never
     129                 :            :    been used for spilling yet.  This rtx is reused, provided it has
     130                 :            :    the proper mode.  */
     131                 :            : static rtx spill_reg_rtx[FIRST_PSEUDO_REGISTER];
     132                 :            : 
     133                 :            : /* In parallel with spill_regs, contains nonzero for a spill reg
     134                 :            :    that was stored after the last time it was used.
     135                 :            :    The precise value is the insn generated to do the store.  */
     136                 :            : static rtx_insn *spill_reg_store[FIRST_PSEUDO_REGISTER];
     137                 :            : 
     138                 :            : /* This is the register that was stored with spill_reg_store.  This is a
     139                 :            :    copy of reload_out / reload_out_reg when the value was stored; if
     140                 :            :    reload_out is a MEM, spill_reg_stored_to will be set to reload_out_reg.  */
     141                 :            : static rtx spill_reg_stored_to[FIRST_PSEUDO_REGISTER];
     142                 :            : 
     143                 :            : /* This table is the inverse mapping of spill_regs:
     144                 :            :    indexed by hard reg number,
     145                 :            :    it contains the position of that reg in spill_regs,
     146                 :            :    or -1 for something that is not in spill_regs.
     147                 :            : 
     148                 :            :    ?!?  This is no longer accurate.  */
     149                 :            : static short spill_reg_order[FIRST_PSEUDO_REGISTER];
     150                 :            : 
     151                 :            : /* This reg set indicates registers that can't be used as spill registers for
     152                 :            :    the currently processed insn.  These are the hard registers which are live
     153                 :            :    during the insn, but not allocated to pseudos, as well as fixed
     154                 :            :    registers.  */
     155                 :            : static HARD_REG_SET bad_spill_regs;
     156                 :            : 
     157                 :            : /* These are the hard registers that can't be used as spill register for any
     158                 :            :    insn.  This includes registers used for user variables and registers that
     159                 :            :    we can't eliminate.  A register that appears in this set also can't be used
     160                 :            :    to retry register allocation.  */
     161                 :            : static HARD_REG_SET bad_spill_regs_global;
     162                 :            : 
     163                 :            : /* Describes order of use of registers for reloading
     164                 :            :    of spilled pseudo-registers.  `n_spills' is the number of
     165                 :            :    elements that are actually valid; new ones are added at the end.
     166                 :            : 
     167                 :            :    Both spill_regs and spill_reg_order are used on two occasions:
     168                 :            :    once during find_reload_regs, where they keep track of the spill registers
     169                 :            :    for a single insn, but also during reload_as_needed where they show all
     170                 :            :    the registers ever used by reload.  For the latter case, the information
     171                 :            :    is calculated during finish_spills.  */
     172                 :            : static short spill_regs[FIRST_PSEUDO_REGISTER];
     173                 :            : 
     174                 :            : /* This vector of reg sets indicates, for each pseudo, which hard registers
     175                 :            :    may not be used for retrying global allocation because the register was
     176                 :            :    formerly spilled from one of them.  If we allowed reallocating a pseudo to
     177                 :            :    a register that it was already allocated to, reload might not
     178                 :            :    terminate.  */
     179                 :            : static HARD_REG_SET *pseudo_previous_regs;
     180                 :            : 
     181                 :            : /* This vector of reg sets indicates, for each pseudo, which hard
     182                 :            :    registers may not be used for retrying global allocation because they
     183                 :            :    are used as spill registers during one of the insns in which the
     184                 :            :    pseudo is live.  */
     185                 :            : static HARD_REG_SET *pseudo_forbidden_regs;
     186                 :            : 
     187                 :            : /* All hard regs that have been used as spill registers for any insn are
     188                 :            :    marked in this set.  */
     189                 :            : static HARD_REG_SET used_spill_regs;
     190                 :            : 
     191                 :            : /* Index of last register assigned as a spill register.  We allocate in
     192                 :            :    a round-robin fashion.  */
     193                 :            : static int last_spill_reg;
     194                 :            : 
     195                 :            : /* Record the stack slot for each spilled hard register.  */
     196                 :            : static rtx spill_stack_slot[FIRST_PSEUDO_REGISTER];
     197                 :            : 
     198                 :            : /* Width allocated so far for that stack slot.  */
     199                 :            : static poly_uint64_pod spill_stack_slot_width[FIRST_PSEUDO_REGISTER];
     200                 :            : 
     201                 :            : /* Record which pseudos needed to be spilled.  */
     202                 :            : static regset_head spilled_pseudos;
     203                 :            : 
     204                 :            : /* Record which pseudos changed their allocation in finish_spills.  */
     205                 :            : static regset_head changed_allocation_pseudos;
     206                 :            : 
     207                 :            : /* Used for communication between order_regs_for_reload and count_pseudo.
     208                 :            :    Used to avoid counting one pseudo twice.  */
     209                 :            : static regset_head pseudos_counted;
     210                 :            : 
     211                 :            : /* First uid used by insns created by reload in this function.
     212                 :            :    Used in find_equiv_reg.  */
     213                 :            : int reload_first_uid;
     214                 :            : 
     215                 :            : /* Flag set by local-alloc or global-alloc if anything is live in
     216                 :            :    a call-clobbered reg across calls.  */
     217                 :            : int caller_save_needed;
     218                 :            : 
     219                 :            : /* Set to 1 while reload_as_needed is operating.
     220                 :            :    Required by some machines to handle any generated moves differently.  */
     221                 :            : int reload_in_progress = 0;
     222                 :            : 
     223                 :            : /* This obstack is used for allocation of rtl during register elimination.
     224                 :            :    The allocated storage can be freed once find_reloads has processed the
     225                 :            :    insn.  */
     226                 :            : static struct obstack reload_obstack;
     227                 :            : 
     228                 :            : /* Points to the beginning of the reload_obstack.  All insn_chain structures
     229                 :            :    are allocated first.  */
     230                 :            : static char *reload_startobj;
     231                 :            : 
     232                 :            : /* The point after all insn_chain structures.  Used to quickly deallocate
     233                 :            :    memory allocated in copy_reloads during calculate_needs_all_insns.  */
     234                 :            : static char *reload_firstobj;
     235                 :            : 
     236                 :            : /* This points before all local rtl generated by register elimination.
     237                 :            :    Used to quickly free all memory after processing one insn.  */
     238                 :            : static char *reload_insn_firstobj;
     239                 :            : 
     240                 :            : /* List of insn_chain instructions, one for every insn that reload needs to
     241                 :            :    examine.  */
     242                 :            : class insn_chain *reload_insn_chain;
     243                 :            : 
     244                 :            : /* TRUE if we potentially left dead insns in the insn stream and want to
     245                 :            :    run DCE immediately after reload, FALSE otherwise.  */
     246                 :            : static bool need_dce;
     247                 :            : 
     248                 :            : /* List of all insns needing reloads.  */
     249                 :            : static class insn_chain *insns_need_reload;
     250                 :            : 
     251                 :            : /* This structure is used to record information about register eliminations.
     252                 :            :    Each array entry describes one possible way of eliminating a register
     253                 :            :    in favor of another.   If there is more than one way of eliminating a
     254                 :            :    particular register, the most preferred should be specified first.  */
     255                 :            : 
     256                 :            : struct elim_table
     257                 :            : {
     258                 :            :   int from;                     /* Register number to be eliminated.  */
     259                 :            :   int to;                       /* Register number used as replacement.  */
     260                 :            :   poly_int64_pod initial_offset; /* Initial difference between values.  */
     261                 :            :   int can_eliminate;            /* Nonzero if this elimination can be done.  */
     262                 :            :   int can_eliminate_previous;   /* Value returned by TARGET_CAN_ELIMINATE
     263                 :            :                                    target hook in previous scan over insns
     264                 :            :                                    made by reload.  */
     265                 :            :   poly_int64_pod offset;        /* Current offset between the two regs.  */
     266                 :            :   poly_int64_pod previous_offset; /* Offset at end of previous insn.  */
     267                 :            :   int ref_outside_mem;          /* "to" has been referenced outside a MEM.  */
     268                 :            :   rtx from_rtx;                 /* REG rtx for the register to be eliminated.
     269                 :            :                                    We cannot simply compare the number since
     270                 :            :                                    we might then spuriously replace a hard
     271                 :            :                                    register corresponding to a pseudo
     272                 :            :                                    assigned to the reg to be eliminated.  */
     273                 :            :   rtx to_rtx;                   /* REG rtx for the replacement.  */
     274                 :            : };
     275                 :            : 
     276                 :            : static struct elim_table *reg_eliminate = 0;
     277                 :            : 
     278                 :            : /* This is an intermediate structure to initialize the table.  It has
     279                 :            :    exactly the members provided by ELIMINABLE_REGS.  */
     280                 :            : static const struct elim_table_1
     281                 :            : {
     282                 :            :   const int from;
     283                 :            :   const int to;
     284                 :            : } reg_eliminate_1[] =
     285                 :            : 
     286                 :            :   ELIMINABLE_REGS;
     287                 :            : 
     288                 :            : #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
     289                 :            : 
     290                 :            : /* Record the number of pending eliminations that have an offset not equal
     291                 :            :    to their initial offset.  If nonzero, we use a new copy of each
     292                 :            :    replacement result in any insns encountered.  */
     293                 :            : int num_not_at_initial_offset;
     294                 :            : 
     295                 :            : /* Count the number of registers that we may be able to eliminate.  */
     296                 :            : static int num_eliminable;
     297                 :            : /* And the number of registers that are equivalent to a constant that
     298                 :            :    can be eliminated to frame_pointer / arg_pointer + constant.  */
     299                 :            : static int num_eliminable_invariants;
     300                 :            : 
     301                 :            : /* For each label, we record the offset of each elimination.  If we reach
     302                 :            :    a label by more than one path and an offset differs, we cannot do the
     303                 :            :    elimination.  This information is indexed by the difference of the
     304                 :            :    number of the label and the first label number.  We can't offset the
     305                 :            :    pointer itself as this can cause problems on machines with segmented
     306                 :            :    memory.  The first table is an array of flags that records whether we
     307                 :            :    have yet encountered a label and the second table is an array of arrays,
     308                 :            :    one entry in the latter array for each elimination.  */
     309                 :            : 
     310                 :            : static int first_label_num;
     311                 :            : static char *offsets_known_at;
     312                 :            : static poly_int64_pod (*offsets_at)[NUM_ELIMINABLE_REGS];
     313                 :            : 
     314                 :            : vec<reg_equivs_t, va_gc> *reg_equivs;
     315                 :            : 
     316                 :            : /* Stack of addresses where an rtx has been changed.  We can undo the 
     317                 :            :    changes by popping items off the stack and restoring the original
     318                 :            :    value at each location. 
     319                 :            : 
     320                 :            :    We use this simplistic undo capability rather than copy_rtx as copy_rtx
     321                 :            :    will not make a deep copy of a normally sharable rtx, such as
     322                 :            :    (const (plus (symbol_ref) (const_int))).  If such an expression appears
     323                 :            :    as R1 in gen_reload_chain_without_interm_reg_p, then a shared
     324                 :            :    rtx expression would be changed.  See PR 42431.  */
     325                 :            : 
     326                 :            : typedef rtx *rtx_p;
     327                 :            : static vec<rtx_p> substitute_stack;
     328                 :            : 
     329                 :            : /* Number of labels in the current function.  */
     330                 :            : 
     331                 :            : static int num_labels;
     332                 :            : 
     333                 :            : static void replace_pseudos_in (rtx *, machine_mode, rtx);
     334                 :            : static void maybe_fix_stack_asms (void);
     335                 :            : static void copy_reloads (class insn_chain *);
     336                 :            : static void calculate_needs_all_insns (int);
     337                 :            : static int find_reg (class insn_chain *, int);
     338                 :            : static void find_reload_regs (class insn_chain *);
     339                 :            : static void select_reload_regs (void);
     340                 :            : static void delete_caller_save_insns (void);
     341                 :            : 
     342                 :            : static void spill_failure (rtx_insn *, enum reg_class);
     343                 :            : static void count_spilled_pseudo (int, int, int);
     344                 :            : static void delete_dead_insn (rtx_insn *);
     345                 :            : static void alter_reg (int, int, bool);
     346                 :            : static void set_label_offsets (rtx, rtx_insn *, int);
     347                 :            : static void check_eliminable_occurrences (rtx);
     348                 :            : static void elimination_effects (rtx, machine_mode);
     349                 :            : static rtx eliminate_regs_1 (rtx, machine_mode, rtx, bool, bool);
     350                 :            : static int eliminate_regs_in_insn (rtx_insn *, int);
     351                 :            : static void update_eliminable_offsets (void);
     352                 :            : static void mark_not_eliminable (rtx, const_rtx, void *);
     353                 :            : static void set_initial_elim_offsets (void);
     354                 :            : static bool verify_initial_elim_offsets (void);
     355                 :            : static void set_initial_label_offsets (void);
     356                 :            : static void set_offsets_for_label (rtx_insn *);
     357                 :            : static void init_eliminable_invariants (rtx_insn *, bool);
     358                 :            : static void init_elim_table (void);
     359                 :            : static void free_reg_equiv (void);
     360                 :            : static void update_eliminables (HARD_REG_SET *);
     361                 :            : static bool update_eliminables_and_spill (void);
     362                 :            : static void elimination_costs_in_insn (rtx_insn *);
     363                 :            : static void spill_hard_reg (unsigned int, int);
     364                 :            : static int finish_spills (int);
     365                 :            : static void scan_paradoxical_subregs (rtx);
     366                 :            : static void count_pseudo (int);
     367                 :            : static void order_regs_for_reload (class insn_chain *);
     368                 :            : static void reload_as_needed (int);
     369                 :            : static void forget_old_reloads_1 (rtx, const_rtx, void *);
     370                 :            : static void forget_marked_reloads (regset);
     371                 :            : static int reload_reg_class_lower (const void *, const void *);
     372                 :            : static void mark_reload_reg_in_use (unsigned int, int, enum reload_type,
     373                 :            :                                     machine_mode);
     374                 :            : static void clear_reload_reg_in_use (unsigned int, int, enum reload_type,
     375                 :            :                                      machine_mode);
     376                 :            : static int reload_reg_free_p (unsigned int, int, enum reload_type);
     377                 :            : static int reload_reg_free_for_value_p (int, int, int, enum reload_type,
     378                 :            :                                         rtx, rtx, int, int);
     379                 :            : static int free_for_value_p (int, machine_mode, int, enum reload_type,
     380                 :            :                              rtx, rtx, int, int);
     381                 :            : static int allocate_reload_reg (class insn_chain *, int, int);
     382                 :            : static int conflicts_with_override (rtx);
     383                 :            : static void failed_reload (rtx_insn *, int);
     384                 :            : static int set_reload_reg (int, int);
     385                 :            : static void choose_reload_regs_init (class insn_chain *, rtx *);
     386                 :            : static void choose_reload_regs (class insn_chain *);
     387                 :            : static void emit_input_reload_insns (class insn_chain *, struct reload *,
     388                 :            :                                      rtx, int);
     389                 :            : static void emit_output_reload_insns (class insn_chain *, struct reload *,
     390                 :            :                                       int);
     391                 :            : static void do_input_reload (class insn_chain *, struct reload *, int);
     392                 :            : static void do_output_reload (class insn_chain *, struct reload *, int);
     393                 :            : static void emit_reload_insns (class insn_chain *);
     394                 :            : static void delete_output_reload (rtx_insn *, int, int, rtx);
     395                 :            : static void delete_address_reloads (rtx_insn *, rtx_insn *);
     396                 :            : static void delete_address_reloads_1 (rtx_insn *, rtx, rtx_insn *);
     397                 :            : static void inc_for_reload (rtx, rtx, rtx, poly_int64);
     398                 :            : static void add_auto_inc_notes (rtx_insn *, rtx);
     399                 :            : static void substitute (rtx *, const_rtx, rtx);
     400                 :            : static bool gen_reload_chain_without_interm_reg_p (int, int);
     401                 :            : static int reloads_conflict (int, int);
     402                 :            : static rtx_insn *gen_reload (rtx, rtx, int, enum reload_type);
     403                 :            : static rtx_insn *emit_insn_if_valid_for_reload (rtx);
     404                 :            : 
     405                 :            : /* Initialize the reload pass.  This is called at the beginning of compilation
     406                 :            :    and may be called again if the target is reinitialized.  */
     407                 :            : 
     408                 :            : void
     409                 :          0 : init_reload (void)
     410                 :            : {
     411                 :          0 :   int i;
     412                 :            : 
     413                 :            :   /* Often (MEM (REG n)) is still valid even if (REG n) is put on the stack.
     414                 :            :      Set spill_indirect_levels to the number of levels such addressing is
     415                 :            :      permitted, zero if it is not permitted at all.  */
     416                 :            : 
     417                 :          0 :   rtx tem
     418                 :          0 :     = gen_rtx_MEM (Pmode,
     419                 :          0 :                    gen_rtx_PLUS (Pmode,
     420                 :            :                                  gen_rtx_REG (Pmode,
     421                 :            :                                               LAST_VIRTUAL_REGISTER + 1),
     422                 :            :                                  gen_int_mode (4, Pmode)));
     423                 :          0 :   spill_indirect_levels = 0;
     424                 :            : 
     425                 :          0 :   while (memory_address_p (QImode, tem))
     426                 :            :     {
     427                 :          0 :       spill_indirect_levels++;
     428                 :          0 :       tem = gen_rtx_MEM (Pmode, tem);
     429                 :            :     }
     430                 :            : 
     431                 :            :   /* See if indirect addressing is valid for (MEM (SYMBOL_REF ...)).  */
     432                 :            : 
     433                 :          0 :   tem = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (Pmode, "foo"));
     434                 :          0 :   indirect_symref_ok = memory_address_p (QImode, tem);
     435                 :            : 
     436                 :            :   /* See if reg+reg is a valid (and offsettable) address.  */
     437                 :            : 
     438                 :          0 :   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
     439                 :            :     {
     440                 :          0 :       tem = gen_rtx_PLUS (Pmode,
     441                 :            :                           gen_rtx_REG (Pmode, HARD_FRAME_POINTER_REGNUM),
     442                 :            :                           gen_rtx_REG (Pmode, i));
     443                 :            : 
     444                 :            :       /* This way, we make sure that reg+reg is an offsettable address.  */
     445                 :          0 :       tem = plus_constant (Pmode, tem, 4);
     446                 :            : 
     447                 :          0 :       for (int mode = 0; mode < MAX_MACHINE_MODE; mode++)
     448                 :          0 :         if (!double_reg_address_ok[mode]
     449                 :          0 :             && memory_address_p ((enum machine_mode)mode, tem))
     450                 :          0 :           double_reg_address_ok[mode] = 1;
     451                 :            :     }
     452                 :            : 
     453                 :            :   /* Initialize obstack for our rtl allocation.  */
     454                 :          0 :   if (reload_startobj == NULL)
     455                 :            :     {
     456                 :          0 :       gcc_obstack_init (&reload_obstack);
     457                 :          0 :       reload_startobj = XOBNEWVAR (&reload_obstack, char, 0);
     458                 :            :     }
     459                 :            : 
     460                 :          0 :   INIT_REG_SET (&spilled_pseudos);
     461                 :          0 :   INIT_REG_SET (&changed_allocation_pseudos);
     462                 :          0 :   INIT_REG_SET (&pseudos_counted);
     463                 :          0 : }
     464                 :            : 
     465                 :            : /* List of insn chains that are currently unused.  */
     466                 :            : static class insn_chain *unused_insn_chains = 0;
     467                 :            : 
     468                 :            : /* Allocate an empty insn_chain structure.  */
     469                 :            : class insn_chain *
     470                 :          0 : new_insn_chain (void)
     471                 :            : {
     472                 :          0 :   class insn_chain *c;
     473                 :            : 
     474                 :          0 :   if (unused_insn_chains == 0)
     475                 :            :     {
     476                 :          0 :       c = XOBNEW (&reload_obstack, class insn_chain);
     477                 :          0 :       INIT_REG_SET (&c->live_throughout);
     478                 :          0 :       INIT_REG_SET (&c->dead_or_set);
     479                 :            :     }
     480                 :            :   else
     481                 :            :     {
     482                 :          0 :       c = unused_insn_chains;
     483                 :          0 :       unused_insn_chains = c->next;
     484                 :            :     }
     485                 :          0 :   c->is_caller_save_insn = 0;
     486                 :          0 :   c->need_operand_change = 0;
     487                 :          0 :   c->need_reload = 0;
     488                 :          0 :   c->need_elim = 0;
     489                 :          0 :   return c;
     490                 :            : }
     491                 :            : 
     492                 :            : /* Small utility function to set all regs in hard reg set TO which are
     493                 :            :    allocated to pseudos in regset FROM.  */
     494                 :            : 
     495                 :            : void
     496                 :    3356540 : compute_use_by_pseudos (HARD_REG_SET *to, regset from)
     497                 :            : {
     498                 :    3356540 :   unsigned int regno;
     499                 :    3356540 :   reg_set_iterator rsi;
     500                 :            : 
     501                 :    3356540 :   EXECUTE_IF_SET_IN_REG_SET (from, FIRST_PSEUDO_REGISTER, regno, rsi)
     502                 :            :     {
     503                 :          0 :       int r = reg_renumber[regno];
     504                 :            : 
     505                 :          0 :       if (r < 0)
     506                 :            :         {
     507                 :            :           /* reload_combine uses the information from DF_LIVE_IN,
     508                 :            :              which might still contain registers that have not
     509                 :            :              actually been allocated since they have an
     510                 :            :              equivalence.  */
     511                 :          0 :           gcc_assert (ira_conflicts_p || reload_completed);
     512                 :            :         }
     513                 :            :       else
     514                 :          0 :         add_to_hard_reg_set (to, PSEUDO_REGNO_MODE (regno), r);
     515                 :            :     }
     516                 :    3356540 : }
     517                 :            : 
     518                 :            : /* Replace all pseudos found in LOC with their corresponding
     519                 :            :    equivalences.  */
     520                 :            : 
     521                 :            : static void
     522                 :          0 : replace_pseudos_in (rtx *loc, machine_mode mem_mode, rtx usage)
     523                 :            : {
     524                 :          0 :   rtx x = *loc;
     525                 :          0 :   enum rtx_code code;
     526                 :          0 :   const char *fmt;
     527                 :          0 :   int i, j;
     528                 :            : 
     529                 :          0 :   if (! x)
     530                 :            :     return;
     531                 :            : 
     532                 :          0 :   code = GET_CODE (x);
     533                 :          0 :   if (code == REG)
     534                 :            :     {
     535                 :          0 :       unsigned int regno = REGNO (x);
     536                 :            : 
     537                 :          0 :       if (regno < FIRST_PSEUDO_REGISTER)
     538                 :            :         return;
     539                 :            : 
     540                 :          0 :       x = eliminate_regs_1 (x, mem_mode, usage, true, false);
     541                 :          0 :       if (x != *loc)
     542                 :            :         {
     543                 :          0 :           *loc = x;
     544                 :          0 :           replace_pseudos_in (loc, mem_mode, usage);
     545                 :          0 :           return;
     546                 :            :         }
     547                 :            : 
     548                 :          0 :       if (reg_equiv_constant (regno))
     549                 :          0 :         *loc = reg_equiv_constant (regno);
     550                 :          0 :       else if (reg_equiv_invariant (regno))
     551                 :          0 :         *loc = reg_equiv_invariant (regno);
     552                 :          0 :       else if (reg_equiv_mem (regno))
     553                 :          0 :         *loc = reg_equiv_mem (regno);
     554                 :          0 :       else if (reg_equiv_address (regno))
     555                 :          0 :         *loc = gen_rtx_MEM (GET_MODE (x), reg_equiv_address (regno));
     556                 :            :       else
     557                 :            :         {
     558                 :          0 :           gcc_assert (!REG_P (regno_reg_rtx[regno])
     559                 :            :                       || REGNO (regno_reg_rtx[regno]) != regno);
     560                 :          0 :           *loc = regno_reg_rtx[regno];
     561                 :            :         }
     562                 :            : 
     563                 :          0 :       return;
     564                 :            :     }
     565                 :          0 :   else if (code == MEM)
     566                 :            :     {
     567                 :          0 :       replace_pseudos_in (& XEXP (x, 0), GET_MODE (x), usage);
     568                 :          0 :       return;
     569                 :            :     }
     570                 :            : 
     571                 :            :   /* Process each of our operands recursively.  */
     572                 :          0 :   fmt = GET_RTX_FORMAT (code);
     573                 :          0 :   for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
     574                 :          0 :     if (*fmt == 'e')
     575                 :          0 :       replace_pseudos_in (&XEXP (x, i), mem_mode, usage);
     576                 :          0 :     else if (*fmt == 'E')
     577                 :          0 :       for (j = 0; j < XVECLEN (x, i); j++)
     578                 :          0 :         replace_pseudos_in (& XVECEXP (x, i, j), mem_mode, usage);
     579                 :            : }
     580                 :            : 
     581                 :            : /* Determine if the current function has an exception receiver block
     582                 :            :    that reaches the exit block via non-exceptional edges  */
     583                 :            : 
     584                 :            : static bool
     585                 :          0 : has_nonexceptional_receiver (void)
     586                 :            : {
     587                 :          0 :   edge e;
     588                 :          0 :   edge_iterator ei;
     589                 :          0 :   basic_block *tos, *worklist, bb;
     590                 :            : 
     591                 :            :   /* If we're not optimizing, then just err on the safe side.  */
     592                 :          0 :   if (!optimize)
     593                 :            :     return true;
     594                 :            : 
     595                 :            :   /* First determine which blocks can reach exit via normal paths.  */
     596                 :          0 :   tos = worklist = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun) + 1);
     597                 :            : 
     598                 :          0 :   FOR_EACH_BB_FN (bb, cfun)
     599                 :          0 :     bb->flags &= ~BB_REACHABLE;
     600                 :            : 
     601                 :            :   /* Place the exit block on our worklist.  */
     602                 :          0 :   EXIT_BLOCK_PTR_FOR_FN (cfun)->flags |= BB_REACHABLE;
     603                 :          0 :   *tos++ = EXIT_BLOCK_PTR_FOR_FN (cfun);
     604                 :            : 
     605                 :            :   /* Iterate: find everything reachable from what we've already seen.  */
     606                 :          0 :   while (tos != worklist)
     607                 :            :     {
     608                 :          0 :       bb = *--tos;
     609                 :            : 
     610                 :          0 :       FOR_EACH_EDGE (e, ei, bb->preds)
     611                 :          0 :         if (!(e->flags & EDGE_ABNORMAL))
     612                 :            :           {
     613                 :          0 :             basic_block src = e->src;
     614                 :            : 
     615                 :          0 :             if (!(src->flags & BB_REACHABLE))
     616                 :            :               {
     617                 :          0 :                 src->flags |= BB_REACHABLE;
     618                 :          0 :                 *tos++ = src;
     619                 :            :               }
     620                 :            :           }
     621                 :            :     }
     622                 :          0 :   free (worklist);
     623                 :            : 
     624                 :            :   /* Now see if there's a reachable block with an exceptional incoming
     625                 :            :      edge.  */
     626                 :          0 :   FOR_EACH_BB_FN (bb, cfun)
     627                 :          0 :     if (bb->flags & BB_REACHABLE && bb_has_abnormal_pred (bb))
     628                 :            :       return true;
     629                 :            : 
     630                 :            :   /* No exceptional block reached exit unexceptionally.  */
     631                 :            :   return false;
     632                 :            : }
     633                 :            : 
     634                 :            : /* Grow (or allocate) the REG_EQUIVS array from its current size (which may be
     635                 :            :    zero elements) to MAX_REG_NUM elements.
     636                 :            : 
     637                 :            :    Initialize all new fields to NULL and update REG_EQUIVS_SIZE.  */
     638                 :            : void
     639                 :    2713530 : grow_reg_equivs (void)
     640                 :            : {
     641                 :    2713530 :   int old_size = vec_safe_length (reg_equivs);
     642                 :    2713530 :   int max_regno = max_reg_num ();
     643                 :    2713530 :   int i;
     644                 :    2713530 :   reg_equivs_t ze;
     645                 :            : 
     646                 :    2713530 :   memset (&ze, 0, sizeof (reg_equivs_t));
     647                 :    2713530 :   vec_safe_reserve (reg_equivs, max_regno);
     648                 :  115261000 :   for (i = old_size; i < max_regno; i++)
     649                 :  112548000 :     reg_equivs->quick_insert (i, ze);
     650                 :    2713530 : }
     651                 :            : 
     652                 :            : 
     653                 :            : /* Global variables used by reload and its subroutines.  */
     654                 :            : 
     655                 :            : /* The current basic block while in calculate_elim_costs_all_insns.  */
     656                 :            : static basic_block elim_bb;
     657                 :            : 
     658                 :            : /* Set during calculate_needs if an insn needs register elimination.  */
     659                 :            : static int something_needs_elimination;
     660                 :            : /* Set during calculate_needs if an insn needs an operand changed.  */
     661                 :            : static int something_needs_operands_changed;
     662                 :            : /* Set by alter_regs if we spilled a register to the stack.  */
     663                 :            : static bool something_was_spilled;
     664                 :            : 
     665                 :            : /* Nonzero means we couldn't get enough spill regs.  */
     666                 :            : static int failure;
     667                 :            : 
     668                 :            : /* Temporary array of pseudo-register number.  */
     669                 :            : static int *temp_pseudo_reg_arr;
     670                 :            : 
     671                 :            : /* If a pseudo has no hard reg, delete the insns that made the equivalence.
     672                 :            :    If that insn didn't set the register (i.e., it copied the register to
     673                 :            :    memory), just delete that insn instead of the equivalencing insn plus
     674                 :            :    anything now dead.  If we call delete_dead_insn on that insn, we may
     675                 :            :    delete the insn that actually sets the register if the register dies
     676                 :            :    there and that is incorrect.  */
     677                 :            : static void
     678                 :          0 : remove_init_insns ()
     679                 :            : {
     680                 :          0 :   for (int i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
     681                 :            :     {
     682                 :          0 :       if (reg_renumber[i] < 0 && reg_equiv_init (i) != 0)
     683                 :            :         {
     684                 :            :           rtx list;
     685                 :          0 :           for (list = reg_equiv_init (i); list; list = XEXP (list, 1))
     686                 :            :             {
     687                 :          0 :               rtx_insn *equiv_insn = as_a <rtx_insn *> (XEXP (list, 0));
     688                 :            : 
     689                 :            :               /* If we already deleted the insn or if it may trap, we can't
     690                 :            :                  delete it.  The latter case shouldn't happen, but can
     691                 :            :                  if an insn has a variable address, gets a REG_EH_REGION
     692                 :            :                  note added to it, and then gets converted into a load
     693                 :            :                  from a constant address.  */
     694                 :          0 :               if (NOTE_P (equiv_insn)
     695                 :          0 :                   || can_throw_internal (equiv_insn))
     696                 :            :                 ;
     697                 :          0 :               else if (reg_set_p (regno_reg_rtx[i], PATTERN (equiv_insn)))
     698                 :          0 :                 delete_dead_insn (equiv_insn);
     699                 :            :               else
     700                 :          0 :                 SET_INSN_DELETED (equiv_insn);
     701                 :            :             }
     702                 :            :         }
     703                 :            :     }
     704                 :          0 : }
     705                 :            : 
     706                 :            : /* Return true if remove_init_insns will delete INSN.  */
     707                 :            : static bool
     708                 :          0 : will_delete_init_insn_p (rtx_insn *insn)
     709                 :            : {
     710                 :          0 :   rtx set = single_set (insn);
     711                 :          0 :   if (!set || !REG_P (SET_DEST (set)))
     712                 :            :     return false;
     713                 :          0 :   unsigned regno = REGNO (SET_DEST (set));
     714                 :            : 
     715                 :          0 :   if (can_throw_internal (insn))
     716                 :            :     return false;
     717                 :            : 
     718                 :          0 :   if (regno < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
     719                 :            :     return false;
     720                 :            : 
     721                 :          0 :   for (rtx list = reg_equiv_init (regno); list; list = XEXP (list, 1))
     722                 :            :     {
     723                 :          0 :       rtx equiv_insn = XEXP (list, 0);
     724                 :          0 :       if (equiv_insn == insn)
     725                 :            :         return true;
     726                 :            :     }
     727                 :            :   return false;
     728                 :            : }
     729                 :            : 
     730                 :            : /* Main entry point for the reload pass.
     731                 :            : 
     732                 :            :    FIRST is the first insn of the function being compiled.
     733                 :            : 
     734                 :            :    GLOBAL nonzero means we were called from global_alloc
     735                 :            :    and should attempt to reallocate any pseudoregs that we
     736                 :            :    displace from hard regs we will use for reloads.
     737                 :            :    If GLOBAL is zero, we do not have enough information to do that,
     738                 :            :    so any pseudo reg that is spilled must go to the stack.
     739                 :            : 
     740                 :            :    Return value is TRUE if reload likely left dead insns in the
     741                 :            :    stream and a DCE pass should be run to elimiante them.  Else the
     742                 :            :    return value is FALSE.  */
     743                 :            : 
     744                 :            : bool
     745                 :          0 : reload (rtx_insn *first, int global)
     746                 :            : {
     747                 :          0 :   int i, n;
     748                 :          0 :   rtx_insn *insn;
     749                 :          0 :   struct elim_table *ep;
     750                 :          0 :   basic_block bb;
     751                 :          0 :   bool inserted;
     752                 :            : 
     753                 :            :   /* Make sure even insns with volatile mem refs are recognizable.  */
     754                 :          0 :   init_recog ();
     755                 :            : 
     756                 :          0 :   failure = 0;
     757                 :            : 
     758                 :          0 :   reload_firstobj = XOBNEWVAR (&reload_obstack, char, 0);
     759                 :            : 
     760                 :            :   /* Make sure that the last insn in the chain
     761                 :            :      is not something that needs reloading.  */
     762                 :          0 :   emit_note (NOTE_INSN_DELETED);
     763                 :            : 
     764                 :            :   /* Enable find_equiv_reg to distinguish insns made by reload.  */
     765                 :          0 :   reload_first_uid = get_max_uid ();
     766                 :            : 
     767                 :            :   /* Initialize the secondary memory table.  */
     768                 :          0 :   clear_secondary_mem ();
     769                 :            : 
     770                 :            :   /* We don't have a stack slot for any spill reg yet.  */
     771                 :          0 :   memset (spill_stack_slot, 0, sizeof spill_stack_slot);
     772                 :          0 :   memset (spill_stack_slot_width, 0, sizeof spill_stack_slot_width);
     773                 :            : 
     774                 :            :   /* Initialize the save area information for caller-save, in case some
     775                 :            :      are needed.  */
     776                 :          0 :   init_save_areas ();
     777                 :            : 
     778                 :            :   /* Compute which hard registers are now in use
     779                 :            :      as homes for pseudo registers.
     780                 :            :      This is done here rather than (eg) in global_alloc
     781                 :            :      because this point is reached even if not optimizing.  */
     782                 :          0 :   for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
     783                 :          0 :     mark_home_live (i);
     784                 :            : 
     785                 :            :   /* A function that has a nonlocal label that can reach the exit
     786                 :            :      block via non-exceptional paths must save all call-saved
     787                 :            :      registers.  */
     788                 :          0 :   if (cfun->has_nonlocal_label
     789                 :          0 :       && has_nonexceptional_receiver ())
     790                 :          0 :     crtl->saves_all_registers = 1;
     791                 :            : 
     792                 :          0 :   if (crtl->saves_all_registers)
     793                 :          0 :     for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
     794                 :          0 :       if (! crtl->abi->clobbers_full_reg_p (i)
     795                 :          0 :           && ! fixed_regs[i]
     796                 :          0 :           && ! LOCAL_REGNO (i))
     797                 :          0 :         df_set_regs_ever_live (i, true);
     798                 :            : 
     799                 :            :   /* Find all the pseudo registers that didn't get hard regs
     800                 :            :      but do have known equivalent constants or memory slots.
     801                 :            :      These include parameters (known equivalent to parameter slots)
     802                 :            :      and cse'd or loop-moved constant memory addresses.
     803                 :            : 
     804                 :            :      Record constant equivalents in reg_equiv_constant
     805                 :            :      so they will be substituted by find_reloads.
     806                 :            :      Record memory equivalents in reg_mem_equiv so they can
     807                 :            :      be substituted eventually by altering the REG-rtx's.  */
     808                 :            : 
     809                 :          0 :   grow_reg_equivs ();
     810                 :          0 :   reg_old_renumber = XCNEWVEC (short, max_regno);
     811                 :          0 :   memcpy (reg_old_renumber, reg_renumber, max_regno * sizeof (short));
     812                 :          0 :   pseudo_forbidden_regs = XNEWVEC (HARD_REG_SET, max_regno);
     813                 :          0 :   pseudo_previous_regs = XCNEWVEC (HARD_REG_SET, max_regno);
     814                 :            : 
     815                 :          0 :   CLEAR_HARD_REG_SET (bad_spill_regs_global);
     816                 :            : 
     817                 :          0 :   init_eliminable_invariants (first, true);
     818                 :          0 :   init_elim_table ();
     819                 :            : 
     820                 :            :   /* Alter each pseudo-reg rtx to contain its hard reg number.  Assign
     821                 :            :      stack slots to the pseudos that lack hard regs or equivalents.
     822                 :            :      Do not touch virtual registers.  */
     823                 :            : 
     824                 :          0 :   temp_pseudo_reg_arr = XNEWVEC (int, max_regno - LAST_VIRTUAL_REGISTER - 1);
     825                 :          0 :   for (n = 0, i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++)
     826                 :          0 :     temp_pseudo_reg_arr[n++] = i;
     827                 :            : 
     828                 :          0 :   if (ira_conflicts_p)
     829                 :            :     /* Ask IRA to order pseudo-registers for better stack slot
     830                 :            :        sharing.  */
     831                 :          0 :     ira_sort_regnos_for_alter_reg (temp_pseudo_reg_arr, n, reg_max_ref_mode);
     832                 :            : 
     833                 :          0 :   for (i = 0; i < n; i++)
     834                 :          0 :     alter_reg (temp_pseudo_reg_arr[i], -1, false);
     835                 :            : 
     836                 :            :   /* If we have some registers we think can be eliminated, scan all insns to
     837                 :            :      see if there is an insn that sets one of these registers to something
     838                 :            :      other than itself plus a constant.  If so, the register cannot be
     839                 :            :      eliminated.  Doing this scan here eliminates an extra pass through the
     840                 :            :      main reload loop in the most common case where register elimination
     841                 :            :      cannot be done.  */
     842                 :          0 :   for (insn = first; insn && num_eliminable; insn = NEXT_INSN (insn))
     843                 :          0 :     if (INSN_P (insn))
     844                 :          0 :       note_pattern_stores (PATTERN (insn), mark_not_eliminable, NULL);
     845                 :            : 
     846                 :          0 :   maybe_fix_stack_asms ();
     847                 :            : 
     848                 :          0 :   insns_need_reload = 0;
     849                 :          0 :   something_needs_elimination = 0;
     850                 :            : 
     851                 :            :   /* Initialize to -1, which means take the first spill register.  */
     852                 :          0 :   last_spill_reg = -1;
     853                 :            : 
     854                 :            :   /* Spill any hard regs that we know we can't eliminate.  */
     855                 :          0 :   CLEAR_HARD_REG_SET (used_spill_regs);
     856                 :            :   /* There can be multiple ways to eliminate a register;
     857                 :            :      they should be listed adjacently.
     858                 :            :      Elimination for any register fails only if all possible ways fail.  */
     859                 :          0 :   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; )
     860                 :            :     {
     861                 :          0 :       int from = ep->from;
     862                 :          0 :       int can_eliminate = 0;
     863                 :          0 :       do
     864                 :            :         {
     865                 :          0 :           can_eliminate |= ep->can_eliminate;
     866                 :          0 :           ep++;
     867                 :            :         }
     868                 :          0 :       while (ep < &reg_eliminate[NUM_ELIMINABLE_REGS] && ep->from == from);
     869                 :          0 :       if (! can_eliminate)
     870                 :          0 :         spill_hard_reg (from, 1);
     871                 :            :     }
     872                 :            : 
     873                 :          0 :   if (!HARD_FRAME_POINTER_IS_FRAME_POINTER && frame_pointer_needed)
     874                 :          0 :     spill_hard_reg (HARD_FRAME_POINTER_REGNUM, 1);
     875                 :            : 
     876                 :          0 :   finish_spills (global);
     877                 :            : 
     878                 :            :   /* From now on, we may need to generate moves differently.  We may also
     879                 :            :      allow modifications of insns which cause them to not be recognized.
     880                 :            :      Any such modifications will be cleaned up during reload itself.  */
     881                 :          0 :   reload_in_progress = 1;
     882                 :            : 
     883                 :            :   /* This loop scans the entire function each go-round
     884                 :            :      and repeats until one repetition spills no additional hard regs.  */
     885                 :          0 :   for (;;)
     886                 :            :     {
     887                 :          0 :       int something_changed;
     888                 :          0 :       poly_int64 starting_frame_size;
     889                 :            : 
     890                 :          0 :       starting_frame_size = get_frame_size ();
     891                 :          0 :       something_was_spilled = false;
     892                 :            : 
     893                 :          0 :       set_initial_elim_offsets ();
     894                 :          0 :       set_initial_label_offsets ();
     895                 :            : 
     896                 :            :       /* For each pseudo register that has an equivalent location defined,
     897                 :            :          try to eliminate any eliminable registers (such as the frame pointer)
     898                 :            :          assuming initial offsets for the replacement register, which
     899                 :            :          is the normal case.
     900                 :            : 
     901                 :            :          If the resulting location is directly addressable, substitute
     902                 :            :          the MEM we just got directly for the old REG.
     903                 :            : 
     904                 :            :          If it is not addressable but is a constant or the sum of a hard reg
     905                 :            :          and constant, it is probably not addressable because the constant is
     906                 :            :          out of range, in that case record the address; we will generate
     907                 :            :          hairy code to compute the address in a register each time it is
     908                 :            :          needed.  Similarly if it is a hard register, but one that is not
     909                 :            :          valid as an address register.
     910                 :            : 
     911                 :            :          If the location is not addressable, but does not have one of the
     912                 :            :          above forms, assign a stack slot.  We have to do this to avoid the
     913                 :            :          potential of producing lots of reloads if, e.g., a location involves
     914                 :            :          a pseudo that didn't get a hard register and has an equivalent memory
     915                 :            :          location that also involves a pseudo that didn't get a hard register.
     916                 :            : 
     917                 :            :          Perhaps at some point we will improve reload_when_needed handling
     918                 :            :          so this problem goes away.  But that's very hairy.  */
     919                 :            : 
     920                 :          0 :       for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
     921                 :          0 :         if (reg_renumber[i] < 0 && reg_equiv_memory_loc (i))
     922                 :            :           {
     923                 :          0 :             rtx x = eliminate_regs (reg_equiv_memory_loc (i), VOIDmode,
     924                 :            :                                     NULL_RTX);
     925                 :            : 
     926                 :          0 :             if (strict_memory_address_addr_space_p
     927                 :          0 :                   (GET_MODE (regno_reg_rtx[i]), XEXP (x, 0),
     928                 :          0 :                    MEM_ADDR_SPACE (x)))
     929                 :          0 :               reg_equiv_mem (i) = x, reg_equiv_address (i) = 0;
     930                 :          0 :             else if (CONSTANT_P (XEXP (x, 0))
     931                 :          0 :                      || (REG_P (XEXP (x, 0))
     932                 :          0 :                          && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
     933                 :          0 :                      || (GET_CODE (XEXP (x, 0)) == PLUS
     934                 :          0 :                          && REG_P (XEXP (XEXP (x, 0), 0))
     935                 :          0 :                          && (REGNO (XEXP (XEXP (x, 0), 0))
     936                 :            :                              < FIRST_PSEUDO_REGISTER)
     937                 :          0 :                          && CONSTANT_P (XEXP (XEXP (x, 0), 1))))
     938                 :          0 :               reg_equiv_address (i) = XEXP (x, 0), reg_equiv_mem (i) = 0;
     939                 :            :             else
     940                 :            :               {
     941                 :            :                 /* Make a new stack slot.  Then indicate that something
     942                 :            :                    changed so we go back and recompute offsets for
     943                 :            :                    eliminable registers because the allocation of memory
     944                 :            :                    below might change some offset.  reg_equiv_{mem,address}
     945                 :            :                    will be set up for this pseudo on the next pass around
     946                 :            :                    the loop.  */
     947                 :          0 :                 reg_equiv_memory_loc (i) = 0;
     948                 :          0 :                 reg_equiv_init (i) = 0;
     949                 :          0 :                 alter_reg (i, -1, true);
     950                 :            :               }
     951                 :            :           }
     952                 :            : 
     953                 :          0 :       if (caller_save_needed)
     954                 :          0 :         setup_save_areas ();
     955                 :            : 
     956                 :          0 :       if (maybe_ne (starting_frame_size, 0) && crtl->stack_alignment_needed)
     957                 :            :         {
     958                 :            :           /* If we have a stack frame, we must align it now.  The
     959                 :            :              stack size may be a part of the offset computation for
     960                 :            :              register elimination.  So if this changes the stack size,
     961                 :            :              then repeat the elimination bookkeeping.  We don't
     962                 :            :              realign when there is no stack, as that will cause a
     963                 :            :              stack frame when none is needed should
     964                 :            :              TARGET_STARTING_FRAME_OFFSET not be already aligned to
     965                 :            :              STACK_BOUNDARY.  */
     966                 :          0 :           assign_stack_local (BLKmode, 0, crtl->stack_alignment_needed);
     967                 :            :         }
     968                 :            :       /* If we allocated another stack slot, redo elimination bookkeeping.  */
     969                 :          0 :       if (something_was_spilled
     970                 :          0 :           || maybe_ne (starting_frame_size, get_frame_size ()))
     971                 :            :         {
     972                 :          0 :           if (update_eliminables_and_spill ())
     973                 :          0 :             finish_spills (0);
     974                 :          0 :           continue;
     975                 :            :         }
     976                 :            : 
     977                 :          0 :       if (caller_save_needed)
     978                 :            :         {
     979                 :          0 :           save_call_clobbered_regs ();
     980                 :            :           /* That might have allocated new insn_chain structures.  */
     981                 :          0 :           reload_firstobj = XOBNEWVAR (&reload_obstack, char, 0);
     982                 :            :         }
     983                 :            : 
     984                 :          0 :       calculate_needs_all_insns (global);
     985                 :            : 
     986                 :          0 :       if (! ira_conflicts_p)
     987                 :            :         /* Don't do it for IRA.  We need this info because we don't
     988                 :            :            change live_throughout and dead_or_set for chains when IRA
     989                 :            :            is used.  */
     990                 :          0 :         CLEAR_REG_SET (&spilled_pseudos);
     991                 :            : 
     992                 :          0 :       something_changed = 0;
     993                 :            : 
     994                 :            :       /* If we allocated any new memory locations, make another pass
     995                 :            :          since it might have changed elimination offsets.  */
     996                 :          0 :       if (something_was_spilled
     997                 :          0 :           || maybe_ne (starting_frame_size, get_frame_size ()))
     998                 :            :         something_changed = 1;
     999                 :            : 
    1000                 :            :       /* Even if the frame size remained the same, we might still have
    1001                 :            :          changed elimination offsets, e.g. if find_reloads called
    1002                 :            :          force_const_mem requiring the back end to allocate a constant
    1003                 :            :          pool base register that needs to be saved on the stack.  */
    1004                 :          0 :       else if (!verify_initial_elim_offsets ())
    1005                 :          0 :         something_changed = 1;
    1006                 :            : 
    1007                 :          0 :       if (update_eliminables_and_spill ())
    1008                 :            :         {
    1009                 :          0 :           finish_spills (0);
    1010                 :          0 :           something_changed = 1;
    1011                 :            :         }
    1012                 :            :       else
    1013                 :            :         {
    1014                 :          0 :           select_reload_regs ();
    1015                 :          0 :           if (failure)
    1016                 :          0 :             goto failed;
    1017                 :          0 :           if (insns_need_reload)
    1018                 :          0 :             something_changed |= finish_spills (global);
    1019                 :            :         }
    1020                 :            : 
    1021                 :          0 :       if (! something_changed)
    1022                 :            :         break;
    1023                 :            : 
    1024                 :          0 :       if (caller_save_needed)
    1025                 :          0 :         delete_caller_save_insns ();
    1026                 :            : 
    1027                 :          0 :       obstack_free (&reload_obstack, reload_firstobj);
    1028                 :            :     }
    1029                 :            : 
    1030                 :            :   /* If global-alloc was run, notify it of any register eliminations we have
    1031                 :            :      done.  */
    1032                 :          0 :   if (global)
    1033                 :          0 :     for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    1034                 :          0 :       if (ep->can_eliminate)
    1035                 :          0 :         mark_elimination (ep->from, ep->to);
    1036                 :            : 
    1037                 :          0 :   remove_init_insns ();
    1038                 :            : 
    1039                 :            :   /* Use the reload registers where necessary
    1040                 :            :      by generating move instructions to move the must-be-register
    1041                 :            :      values into or out of the reload registers.  */
    1042                 :            : 
    1043                 :          0 :   if (insns_need_reload != 0 || something_needs_elimination
    1044                 :          0 :       || something_needs_operands_changed)
    1045                 :            :     {
    1046                 :          0 :       poly_int64 old_frame_size = get_frame_size ();
    1047                 :            : 
    1048                 :          0 :       reload_as_needed (global);
    1049                 :            : 
    1050                 :          0 :       gcc_assert (known_eq (old_frame_size, get_frame_size ()));
    1051                 :            : 
    1052                 :          0 :       gcc_assert (verify_initial_elim_offsets ());
    1053                 :            :     }
    1054                 :            : 
    1055                 :            :   /* If we were able to eliminate the frame pointer, show that it is no
    1056                 :            :      longer live at the start of any basic block.  If it ls live by
    1057                 :            :      virtue of being in a pseudo, that pseudo will be marked live
    1058                 :            :      and hence the frame pointer will be known to be live via that
    1059                 :            :      pseudo.  */
    1060                 :            : 
    1061                 :          0 :   if (! frame_pointer_needed)
    1062                 :          0 :     FOR_EACH_BB_FN (bb, cfun)
    1063                 :          0 :       bitmap_clear_bit (df_get_live_in (bb), HARD_FRAME_POINTER_REGNUM);
    1064                 :            : 
    1065                 :            :   /* Come here (with failure set nonzero) if we can't get enough spill
    1066                 :            :      regs.  */
    1067                 :          0 :  failed:
    1068                 :            : 
    1069                 :          0 :   CLEAR_REG_SET (&changed_allocation_pseudos);
    1070                 :          0 :   CLEAR_REG_SET (&spilled_pseudos);
    1071                 :          0 :   reload_in_progress = 0;
    1072                 :            : 
    1073                 :            :   /* Now eliminate all pseudo regs by modifying them into
    1074                 :            :      their equivalent memory references.
    1075                 :            :      The REG-rtx's for the pseudos are modified in place,
    1076                 :            :      so all insns that used to refer to them now refer to memory.
    1077                 :            : 
    1078                 :            :      For a reg that has a reg_equiv_address, all those insns
    1079                 :            :      were changed by reloading so that no insns refer to it any longer;
    1080                 :            :      but the DECL_RTL of a variable decl may refer to it,
    1081                 :            :      and if so this causes the debugging info to mention the variable.  */
    1082                 :            : 
    1083                 :          0 :   for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
    1084                 :            :     {
    1085                 :          0 :       rtx addr = 0;
    1086                 :            : 
    1087                 :          0 :       if (reg_equiv_mem (i))
    1088                 :          0 :         addr = XEXP (reg_equiv_mem (i), 0);
    1089                 :            : 
    1090                 :          0 :       if (reg_equiv_address (i))
    1091                 :          0 :         addr = reg_equiv_address (i);
    1092                 :            : 
    1093                 :          0 :       if (addr)
    1094                 :            :         {
    1095                 :          0 :           if (reg_renumber[i] < 0)
    1096                 :            :             {
    1097                 :          0 :               rtx reg = regno_reg_rtx[i];
    1098                 :            : 
    1099                 :          0 :               REG_USERVAR_P (reg) = 0;
    1100                 :          0 :               PUT_CODE (reg, MEM);
    1101                 :          0 :               XEXP (reg, 0) = addr;
    1102                 :          0 :               if (reg_equiv_memory_loc (i))
    1103                 :          0 :                 MEM_COPY_ATTRIBUTES (reg, reg_equiv_memory_loc (i));
    1104                 :            :               else
    1105                 :          0 :                 MEM_ATTRS (reg) = 0;
    1106                 :          0 :               MEM_NOTRAP_P (reg) = 1;
    1107                 :            :             }
    1108                 :          0 :           else if (reg_equiv_mem (i))
    1109                 :          0 :             XEXP (reg_equiv_mem (i), 0) = addr;
    1110                 :            :         }
    1111                 :            : 
    1112                 :            :       /* We don't want complex addressing modes in debug insns
    1113                 :            :          if simpler ones will do, so delegitimize equivalences
    1114                 :            :          in debug insns.  */
    1115                 :          0 :       if (MAY_HAVE_DEBUG_BIND_INSNS && reg_renumber[i] < 0)
    1116                 :            :         {
    1117                 :          0 :           rtx reg = regno_reg_rtx[i];
    1118                 :          0 :           rtx equiv = 0;
    1119                 :          0 :           df_ref use, next;
    1120                 :            : 
    1121                 :          0 :           if (reg_equiv_constant (i))
    1122                 :          0 :             equiv = reg_equiv_constant (i);
    1123                 :          0 :           else if (reg_equiv_invariant (i))
    1124                 :          0 :             equiv = reg_equiv_invariant (i);
    1125                 :          0 :           else if (reg && MEM_P (reg))
    1126                 :          0 :             equiv = targetm.delegitimize_address (reg);
    1127                 :          0 :           else if (reg && REG_P (reg) && (int)REGNO (reg) != i)
    1128                 :            :             equiv = reg;
    1129                 :            : 
    1130                 :          0 :           if (equiv == reg)
    1131                 :          0 :             continue;
    1132                 :            : 
    1133                 :          0 :           for (use = DF_REG_USE_CHAIN (i); use; use = next)
    1134                 :            :             {
    1135                 :          0 :               insn = DF_REF_INSN (use);
    1136                 :            : 
    1137                 :            :               /* Make sure the next ref is for a different instruction,
    1138                 :            :                  so that we're not affected by the rescan.  */
    1139                 :          0 :               next = DF_REF_NEXT_REG (use);
    1140                 :          0 :               while (next && DF_REF_INSN (next) == insn)
    1141                 :          0 :                 next = DF_REF_NEXT_REG (next);
    1142                 :            : 
    1143                 :          0 :               if (DEBUG_BIND_INSN_P (insn))
    1144                 :            :                 {
    1145                 :          0 :                   if (!equiv)
    1146                 :            :                     {
    1147                 :          0 :                       INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
    1148                 :          0 :                       df_insn_rescan_debug_internal (insn);
    1149                 :            :                     }
    1150                 :            :                   else
    1151                 :          0 :                     INSN_VAR_LOCATION_LOC (insn)
    1152                 :          0 :                       = simplify_replace_rtx (INSN_VAR_LOCATION_LOC (insn),
    1153                 :            :                                               reg, equiv);
    1154                 :            :                 }
    1155                 :            :             }
    1156                 :            :         }
    1157                 :            :     }
    1158                 :            : 
    1159                 :            :   /* We must set reload_completed now since the cleanup_subreg_operands call
    1160                 :            :      below will re-recognize each insn and reload may have generated insns
    1161                 :            :      which are only valid during and after reload.  */
    1162                 :          0 :   reload_completed = 1;
    1163                 :            : 
    1164                 :            :   /* Make a pass over all the insns and delete all USEs which we inserted
    1165                 :            :      only to tag a REG_EQUAL note on them.  Remove all REG_DEAD and REG_UNUSED
    1166                 :            :      notes.  Delete all CLOBBER insns, except those that refer to the return
    1167                 :            :      value and the special mem:BLK CLOBBERs added to prevent the scheduler
    1168                 :            :      from misarranging variable-array code, and simplify (subreg (reg))
    1169                 :            :      operands.  Strip and regenerate REG_INC notes that may have been moved
    1170                 :            :      around.  */
    1171                 :            : 
    1172                 :          0 :   for (insn = first; insn; insn = NEXT_INSN (insn))
    1173                 :          0 :     if (INSN_P (insn))
    1174                 :            :       {
    1175                 :          0 :         rtx *pnote;
    1176                 :            : 
    1177                 :          0 :         if (CALL_P (insn))
    1178                 :          0 :           replace_pseudos_in (& CALL_INSN_FUNCTION_USAGE (insn),
    1179                 :            :                               VOIDmode, CALL_INSN_FUNCTION_USAGE (insn));
    1180                 :            : 
    1181                 :          0 :         if ((GET_CODE (PATTERN (insn)) == USE
    1182                 :            :              /* We mark with QImode USEs introduced by reload itself.  */
    1183                 :          0 :              && (GET_MODE (insn) == QImode
    1184                 :          0 :                  || find_reg_note (insn, REG_EQUAL, NULL_RTX)))
    1185                 :          0 :             || (GET_CODE (PATTERN (insn)) == CLOBBER
    1186                 :          0 :                 && (!MEM_P (XEXP (PATTERN (insn), 0))
    1187                 :          0 :                     || GET_MODE (XEXP (PATTERN (insn), 0)) != BLKmode
    1188                 :          0 :                     || (GET_CODE (XEXP (XEXP (PATTERN (insn), 0), 0)) != SCRATCH
    1189                 :          0 :                         && XEXP (XEXP (PATTERN (insn), 0), 0)
    1190                 :          0 :                                 != stack_pointer_rtx))
    1191                 :          0 :                 && (!REG_P (XEXP (PATTERN (insn), 0))
    1192                 :          0 :                     || ! REG_FUNCTION_VALUE_P (XEXP (PATTERN (insn), 0)))))
    1193                 :            :           {
    1194                 :          0 :             delete_insn (insn);
    1195                 :          0 :             continue;
    1196                 :            :           }
    1197                 :            : 
    1198                 :            :         /* Some CLOBBERs may survive until here and still reference unassigned
    1199                 :            :            pseudos with const equivalent, which may in turn cause ICE in later
    1200                 :            :            passes if the reference remains in place.  */
    1201                 :          0 :         if (GET_CODE (PATTERN (insn)) == CLOBBER)
    1202                 :          0 :           replace_pseudos_in (& XEXP (PATTERN (insn), 0),
    1203                 :          0 :                               VOIDmode, PATTERN (insn));
    1204                 :            : 
    1205                 :            :         /* Discard obvious no-ops, even without -O.  This optimization
    1206                 :            :            is fast and doesn't interfere with debugging.  */
    1207                 :          0 :         if (NONJUMP_INSN_P (insn)
    1208                 :          0 :             && GET_CODE (PATTERN (insn)) == SET
    1209                 :          0 :             && REG_P (SET_SRC (PATTERN (insn)))
    1210                 :          0 :             && REG_P (SET_DEST (PATTERN (insn)))
    1211                 :          0 :             && (REGNO (SET_SRC (PATTERN (insn)))
    1212                 :          0 :                 == REGNO (SET_DEST (PATTERN (insn)))))
    1213                 :            :           {
    1214                 :          0 :             delete_insn (insn);
    1215                 :          0 :             continue;
    1216                 :            :           }
    1217                 :            : 
    1218                 :          0 :         pnote = &REG_NOTES (insn);
    1219                 :          0 :         while (*pnote != 0)
    1220                 :            :           {
    1221                 :          0 :             if (REG_NOTE_KIND (*pnote) == REG_DEAD
    1222                 :          0 :                 || REG_NOTE_KIND (*pnote) == REG_UNUSED
    1223                 :          0 :                 || REG_NOTE_KIND (*pnote) == REG_INC)
    1224                 :          0 :               *pnote = XEXP (*pnote, 1);
    1225                 :            :             else
    1226                 :          0 :               pnote = &XEXP (*pnote, 1);
    1227                 :            :           }
    1228                 :            : 
    1229                 :          0 :         if (AUTO_INC_DEC)
    1230                 :            :           add_auto_inc_notes (insn, PATTERN (insn));
    1231                 :            : 
    1232                 :            :         /* Simplify (subreg (reg)) if it appears as an operand.  */
    1233                 :          0 :         cleanup_subreg_operands (insn);
    1234                 :            : 
    1235                 :            :         /* Clean up invalid ASMs so that they don't confuse later passes.
    1236                 :            :            See PR 21299.  */
    1237                 :          0 :         if (asm_noperands (PATTERN (insn)) >= 0)
    1238                 :            :           {
    1239                 :          0 :             extract_insn (insn);
    1240                 :          0 :             if (!constrain_operands (1, get_enabled_alternatives (insn)))
    1241                 :            :               {
    1242                 :          0 :                 error_for_asm (insn,
    1243                 :            :                                "%<asm%> operand has impossible constraints");
    1244                 :          0 :                 delete_insn (insn);
    1245                 :          0 :                 continue;
    1246                 :            :               }
    1247                 :            :           }
    1248                 :            :       }
    1249                 :            : 
    1250                 :          0 :   free (temp_pseudo_reg_arr);
    1251                 :            : 
    1252                 :            :   /* Indicate that we no longer have known memory locations or constants.  */
    1253                 :          0 :   free_reg_equiv ();
    1254                 :            : 
    1255                 :          0 :   free (reg_max_ref_mode);
    1256                 :          0 :   free (reg_old_renumber);
    1257                 :          0 :   free (pseudo_previous_regs);
    1258                 :          0 :   free (pseudo_forbidden_regs);
    1259                 :            : 
    1260                 :          0 :   CLEAR_HARD_REG_SET (used_spill_regs);
    1261                 :          0 :   for (i = 0; i < n_spills; i++)
    1262                 :          0 :     SET_HARD_REG_BIT (used_spill_regs, spill_regs[i]);
    1263                 :            : 
    1264                 :            :   /* Free all the insn_chain structures at once.  */
    1265                 :          0 :   obstack_free (&reload_obstack, reload_startobj);
    1266                 :          0 :   unused_insn_chains = 0;
    1267                 :            : 
    1268                 :          0 :   inserted = fixup_abnormal_edges ();
    1269                 :            : 
    1270                 :            :   /* We've possibly turned single trapping insn into multiple ones.  */
    1271                 :          0 :   if (cfun->can_throw_non_call_exceptions)
    1272                 :            :     {
    1273                 :          0 :       auto_sbitmap blocks (last_basic_block_for_fn (cfun));
    1274                 :          0 :       bitmap_ones (blocks);
    1275                 :          0 :       find_many_sub_basic_blocks (blocks);
    1276                 :            :     }
    1277                 :            : 
    1278                 :          0 :   if (inserted)
    1279                 :          0 :     commit_edge_insertions ();
    1280                 :            : 
    1281                 :            :   /* Replacing pseudos with their memory equivalents might have
    1282                 :            :      created shared rtx.  Subsequent passes would get confused
    1283                 :            :      by this, so unshare everything here.  */
    1284                 :          0 :   unshare_all_rtl_again (first);
    1285                 :            : 
    1286                 :            : #ifdef STACK_BOUNDARY
    1287                 :            :   /* init_emit has set the alignment of the hard frame pointer
    1288                 :            :      to STACK_BOUNDARY.  It is very likely no longer valid if
    1289                 :            :      the hard frame pointer was used for register allocation.  */
    1290                 :          0 :   if (!frame_pointer_needed)
    1291                 :          0 :     REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = BITS_PER_UNIT;
    1292                 :            : #endif
    1293                 :            : 
    1294                 :          0 :   substitute_stack.release ();
    1295                 :            : 
    1296                 :          0 :   gcc_assert (bitmap_empty_p (&spilled_pseudos));
    1297                 :            : 
    1298                 :          0 :   reload_completed = !failure;
    1299                 :            : 
    1300                 :          0 :   return need_dce;
    1301                 :            : }
    1302                 :            : 
    1303                 :            : /* Yet another special case.  Unfortunately, reg-stack forces people to
    1304                 :            :    write incorrect clobbers in asm statements.  These clobbers must not
    1305                 :            :    cause the register to appear in bad_spill_regs, otherwise we'll call
    1306                 :            :    fatal_insn later.  We clear the corresponding regnos in the live
    1307                 :            :    register sets to avoid this.
    1308                 :            :    The whole thing is rather sick, I'm afraid.  */
    1309                 :            : 
    1310                 :            : static void
    1311                 :          0 : maybe_fix_stack_asms (void)
    1312                 :            : {
    1313                 :            : #ifdef STACK_REGS
    1314                 :          0 :   const char *constraints[MAX_RECOG_OPERANDS];
    1315                 :          0 :   machine_mode operand_mode[MAX_RECOG_OPERANDS];
    1316                 :          0 :   class insn_chain *chain;
    1317                 :            : 
    1318                 :          0 :   for (chain = reload_insn_chain; chain != 0; chain = chain->next)
    1319                 :            :     {
    1320                 :          0 :       int i, noperands;
    1321                 :          0 :       HARD_REG_SET clobbered, allowed;
    1322                 :          0 :       rtx pat;
    1323                 :            : 
    1324                 :          0 :       if (! INSN_P (chain->insn)
    1325                 :          0 :           || (noperands = asm_noperands (PATTERN (chain->insn))) < 0)
    1326                 :          0 :         continue;
    1327                 :          0 :       pat = PATTERN (chain->insn);
    1328                 :          0 :       if (GET_CODE (pat) != PARALLEL)
    1329                 :          0 :         continue;
    1330                 :            : 
    1331                 :          0 :       CLEAR_HARD_REG_SET (clobbered);
    1332                 :          0 :       CLEAR_HARD_REG_SET (allowed);
    1333                 :            : 
    1334                 :            :       /* First, make a mask of all stack regs that are clobbered.  */
    1335                 :          0 :       for (i = 0; i < XVECLEN (pat, 0); i++)
    1336                 :            :         {
    1337                 :          0 :           rtx t = XVECEXP (pat, 0, i);
    1338                 :          0 :           if (GET_CODE (t) == CLOBBER && STACK_REG_P (XEXP (t, 0)))
    1339                 :          0 :             SET_HARD_REG_BIT (clobbered, REGNO (XEXP (t, 0)));
    1340                 :            :         }
    1341                 :            : 
    1342                 :            :       /* Get the operand values and constraints out of the insn.  */
    1343                 :          0 :       decode_asm_operands (pat, recog_data.operand, recog_data.operand_loc,
    1344                 :            :                            constraints, operand_mode, NULL);
    1345                 :            : 
    1346                 :            :       /* For every operand, see what registers are allowed.  */
    1347                 :          0 :       for (i = 0; i < noperands; i++)
    1348                 :            :         {
    1349                 :          0 :           const char *p = constraints[i];
    1350                 :            :           /* For every alternative, we compute the class of registers allowed
    1351                 :            :              for reloading in CLS, and merge its contents into the reg set
    1352                 :            :              ALLOWED.  */
    1353                 :          0 :           int cls = (int) NO_REGS;
    1354                 :            : 
    1355                 :          0 :           for (;;)
    1356                 :            :             {
    1357                 :          0 :               char c = *p;
    1358                 :            : 
    1359                 :          0 :               if (c == '\0' || c == ',' || c == '#')
    1360                 :            :                 {
    1361                 :            :                   /* End of one alternative - mark the regs in the current
    1362                 :            :                      class, and reset the class.  */
    1363                 :          0 :                   allowed |= reg_class_contents[cls];
    1364                 :          0 :                   cls = NO_REGS;
    1365                 :          0 :                   p++;
    1366                 :          0 :                   if (c == '#')
    1367                 :          0 :                     do {
    1368                 :          0 :                       c = *p++;
    1369                 :          0 :                     } while (c != '\0' && c != ',');
    1370                 :          0 :                   if (c == '\0')
    1371                 :            :                     break;
    1372                 :          0 :                   continue;
    1373                 :            :                 }
    1374                 :            : 
    1375                 :          0 :               switch (c)
    1376                 :            :                 {
    1377                 :          0 :                 case 'g':
    1378                 :          0 :                   cls = (int) reg_class_subunion[cls][(int) GENERAL_REGS];
    1379                 :          0 :                   break;
    1380                 :            : 
    1381                 :          0 :                 default:
    1382                 :          0 :                   enum constraint_num cn = lookup_constraint (p);
    1383                 :          0 :                   if (insn_extra_address_constraint (cn))
    1384                 :          0 :                     cls = (int) reg_class_subunion[cls]
    1385                 :          0 :                       [(int) base_reg_class (VOIDmode, ADDR_SPACE_GENERIC,
    1386                 :          0 :                                              ADDRESS, SCRATCH)];
    1387                 :            :                   else
    1388                 :          0 :                     cls = (int) reg_class_subunion[cls]
    1389                 :          0 :                       [reg_class_for_constraint (cn)];
    1390                 :            :                   break;
    1391                 :            :                 }
    1392                 :          0 :               p += CONSTRAINT_LEN (c, p);
    1393                 :            :             }
    1394                 :            :         }
    1395                 :            :       /* Those of the registers which are clobbered, but allowed by the
    1396                 :            :          constraints, must be usable as reload registers.  So clear them
    1397                 :            :          out of the life information.  */
    1398                 :          0 :       allowed &= clobbered;
    1399                 :          0 :       for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
    1400                 :          0 :         if (TEST_HARD_REG_BIT (allowed, i))
    1401                 :            :           {
    1402                 :          0 :             CLEAR_REGNO_REG_SET (&chain->live_throughout, i);
    1403                 :          0 :             CLEAR_REGNO_REG_SET (&chain->dead_or_set, i);
    1404                 :            :           }
    1405                 :            :     }
    1406                 :            : 
    1407                 :            : #endif
    1408                 :          0 : }
    1409                 :            : 
    1410                 :            : /* Copy the global variables n_reloads and rld into the corresponding elts
    1411                 :            :    of CHAIN.  */
    1412                 :            : static void
    1413                 :          0 : copy_reloads (class insn_chain *chain)
    1414                 :            : {
    1415                 :          0 :   chain->n_reloads = n_reloads;
    1416                 :          0 :   chain->rld = XOBNEWVEC (&reload_obstack, struct reload, n_reloads);
    1417                 :          0 :   memcpy (chain->rld, rld, n_reloads * sizeof (struct reload));
    1418                 :          0 :   reload_insn_firstobj = XOBNEWVAR (&reload_obstack, char, 0);
    1419                 :          0 : }
    1420                 :            : 
    1421                 :            : /* Walk the chain of insns, and determine for each whether it needs reloads
    1422                 :            :    and/or eliminations.  Build the corresponding insns_need_reload list, and
    1423                 :            :    set something_needs_elimination as appropriate.  */
    1424                 :            : static void
    1425                 :          0 : calculate_needs_all_insns (int global)
    1426                 :            : {
    1427                 :          0 :   class insn_chain **pprev_reload = &insns_need_reload;
    1428                 :          0 :   class insn_chain *chain, *next = 0;
    1429                 :            : 
    1430                 :          0 :   something_needs_elimination = 0;
    1431                 :            : 
    1432                 :          0 :   reload_insn_firstobj = XOBNEWVAR (&reload_obstack, char, 0);
    1433                 :          0 :   for (chain = reload_insn_chain; chain != 0; chain = next)
    1434                 :            :     {
    1435                 :          0 :       rtx_insn *insn = chain->insn;
    1436                 :            : 
    1437                 :          0 :       next = chain->next;
    1438                 :            : 
    1439                 :            :       /* Clear out the shortcuts.  */
    1440                 :          0 :       chain->n_reloads = 0;
    1441                 :          0 :       chain->need_elim = 0;
    1442                 :          0 :       chain->need_reload = 0;
    1443                 :          0 :       chain->need_operand_change = 0;
    1444                 :            : 
    1445                 :            :       /* If this is a label, a JUMP_INSN, or has REG_NOTES (which might
    1446                 :            :          include REG_LABEL_OPERAND and REG_LABEL_TARGET), we need to see
    1447                 :            :          what effects this has on the known offsets at labels.  */
    1448                 :            : 
    1449                 :          0 :       if (LABEL_P (insn) || JUMP_P (insn) || JUMP_TABLE_DATA_P (insn)
    1450                 :          0 :           || (INSN_P (insn) && REG_NOTES (insn) != 0))
    1451                 :          0 :         set_label_offsets (insn, insn, 0);
    1452                 :            : 
    1453                 :          0 :       if (INSN_P (insn))
    1454                 :            :         {
    1455                 :          0 :           rtx old_body = PATTERN (insn);
    1456                 :          0 :           int old_code = INSN_CODE (insn);
    1457                 :          0 :           rtx old_notes = REG_NOTES (insn);
    1458                 :          0 :           int did_elimination = 0;
    1459                 :          0 :           int operands_changed = 0;
    1460                 :            : 
    1461                 :            :           /* Skip insns that only set an equivalence.  */
    1462                 :          0 :           if (will_delete_init_insn_p (insn))
    1463                 :          0 :             continue;
    1464                 :            : 
    1465                 :            :           /* If needed, eliminate any eliminable registers.  */
    1466                 :          0 :           if (num_eliminable || num_eliminable_invariants)
    1467                 :          0 :             did_elimination = eliminate_regs_in_insn (insn, 0);
    1468                 :            : 
    1469                 :            :           /* Analyze the instruction.  */
    1470                 :          0 :           operands_changed = find_reloads (insn, 0, spill_indirect_levels,
    1471                 :            :                                            global, spill_reg_order);
    1472                 :            : 
    1473                 :            :           /* If a no-op set needs more than one reload, this is likely
    1474                 :            :              to be something that needs input address reloads.  We
    1475                 :            :              can't get rid of this cleanly later, and it is of no use
    1476                 :            :              anyway, so discard it now.
    1477                 :            :              We only do this when expensive_optimizations is enabled,
    1478                 :            :              since this complements reload inheritance / output
    1479                 :            :              reload deletion, and it can make debugging harder.  */
    1480                 :          0 :           if (flag_expensive_optimizations && n_reloads > 1)
    1481                 :            :             {
    1482                 :          0 :               rtx set = single_set (insn);
    1483                 :          0 :               if (set
    1484                 :          0 :                   &&
    1485                 :          0 :                   ((SET_SRC (set) == SET_DEST (set)
    1486                 :          0 :                     && REG_P (SET_SRC (set))
    1487                 :          0 :                     && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
    1488                 :          0 :                    || (REG_P (SET_SRC (set)) && REG_P (SET_DEST (set))
    1489                 :          0 :                        && reg_renumber[REGNO (SET_SRC (set))] < 0
    1490                 :          0 :                        && reg_renumber[REGNO (SET_DEST (set))] < 0
    1491                 :          0 :                        && reg_equiv_memory_loc (REGNO (SET_SRC (set))) != NULL
    1492                 :          0 :                        && reg_equiv_memory_loc (REGNO (SET_DEST (set))) != NULL
    1493                 :          0 :                        && rtx_equal_p (reg_equiv_memory_loc (REGNO (SET_SRC (set))),
    1494                 :          0 :                                        reg_equiv_memory_loc (REGNO (SET_DEST (set)))))))
    1495                 :            :                 {
    1496                 :          0 :                   if (ira_conflicts_p)
    1497                 :            :                     /* Inform IRA about the insn deletion.  */
    1498                 :          0 :                     ira_mark_memory_move_deletion (REGNO (SET_DEST (set)),
    1499                 :          0 :                                                    REGNO (SET_SRC (set)));
    1500                 :          0 :                   delete_insn (insn);
    1501                 :            :                   /* Delete it from the reload chain.  */
    1502                 :          0 :                   if (chain->prev)
    1503                 :          0 :                     chain->prev->next = next;
    1504                 :            :                   else
    1505                 :          0 :                     reload_insn_chain = next;
    1506                 :          0 :                   if (next)
    1507                 :          0 :                     next->prev = chain->prev;
    1508                 :          0 :                   chain->next = unused_insn_chains;
    1509                 :          0 :                   unused_insn_chains = chain;
    1510                 :          0 :                   continue;
    1511                 :            :                 }
    1512                 :            :             }
    1513                 :          0 :           if (num_eliminable)
    1514                 :          0 :             update_eliminable_offsets ();
    1515                 :            : 
    1516                 :            :           /* Remember for later shortcuts which insns had any reloads or
    1517                 :            :              register eliminations.  */
    1518                 :          0 :           chain->need_elim = did_elimination;
    1519                 :          0 :           chain->need_reload = n_reloads > 0;
    1520                 :          0 :           chain->need_operand_change = operands_changed;
    1521                 :            : 
    1522                 :            :           /* Discard any register replacements done.  */
    1523                 :          0 :           if (did_elimination)
    1524                 :            :             {
    1525                 :          0 :               obstack_free (&reload_obstack, reload_insn_firstobj);
    1526                 :          0 :               PATTERN (insn) = old_body;
    1527                 :          0 :               INSN_CODE (insn) = old_code;
    1528                 :          0 :               REG_NOTES (insn) = old_notes;
    1529                 :          0 :               something_needs_elimination = 1;
    1530                 :            :             }
    1531                 :            : 
    1532                 :          0 :           something_needs_operands_changed |= operands_changed;
    1533                 :            : 
    1534                 :          0 :           if (n_reloads != 0)
    1535                 :            :             {
    1536                 :          0 :               copy_reloads (chain);
    1537                 :          0 :               *pprev_reload = chain;
    1538                 :          0 :               pprev_reload = &chain->next_need_reload;
    1539                 :            :             }
    1540                 :            :         }
    1541                 :            :     }
    1542                 :          0 :   *pprev_reload = 0;
    1543                 :          0 : }
    1544                 :            : 
    1545                 :            : /* This function is called from the register allocator to set up estimates
    1546                 :            :    for the cost of eliminating pseudos which have REG_EQUIV equivalences to
    1547                 :            :    an invariant.  The structure is similar to calculate_needs_all_insns.  */
    1548                 :            : 
    1549                 :            : void
    1550                 :     944096 : calculate_elim_costs_all_insns (void)
    1551                 :            : {
    1552                 :     944096 :   int *reg_equiv_init_cost;
    1553                 :     944096 :   basic_block bb;
    1554                 :     944096 :   int i;
    1555                 :            : 
    1556                 :     944096 :   reg_equiv_init_cost = XCNEWVEC (int, max_regno);
    1557                 :     944096 :   init_elim_table ();
    1558                 :     944096 :   init_eliminable_invariants (get_insns (), false);
    1559                 :            : 
    1560                 :     944096 :   set_initial_elim_offsets ();
    1561                 :     944096 :   set_initial_label_offsets ();
    1562                 :            : 
    1563                 :   10020200 :   FOR_EACH_BB_FN (bb, cfun)
    1564                 :            :     {
    1565                 :    9076070 :       rtx_insn *insn;
    1566                 :    9076070 :       elim_bb = bb;
    1567                 :            : 
    1568                 :  202752000 :       FOR_BB_INSNS (bb, insn)
    1569                 :            :         {
    1570                 :            :           /* If this is a label, a JUMP_INSN, or has REG_NOTES (which might
    1571                 :            :              include REG_LABEL_OPERAND and REG_LABEL_TARGET), we need to see
    1572                 :            :              what effects this has on the known offsets at labels.  */
    1573                 :            : 
    1574                 :   96838000 :           if (LABEL_P (insn) || JUMP_P (insn) || JUMP_TABLE_DATA_P (insn)
    1575                 :   87201800 :               || (INSN_P (insn) && REG_NOTES (insn) != 0))
    1576                 :   40711200 :             set_label_offsets (insn, insn, 0);
    1577                 :            : 
    1578                 :   96838000 :           if (INSN_P (insn))
    1579                 :            :             {
    1580                 :   80226600 :               rtx set = single_set (insn);
    1581                 :            : 
    1582                 :            :               /* Skip insns that only set an equivalence.  */
    1583                 :   48569600 :               if (set && REG_P (SET_DEST (set))
    1584                 :   33430500 :                   && reg_renumber[REGNO (SET_DEST (set))] < 0
    1585                 :  113657000 :                   && (reg_equiv_constant (REGNO (SET_DEST (set)))
    1586                 :   33076200 :                       || reg_equiv_invariant (REGNO (SET_DEST (set)))))
    1587                 :            :                 {
    1588                 :    1017750 :                   unsigned regno = REGNO (SET_DEST (set));
    1589                 :    1017750 :                   rtx_insn_list *init = reg_equiv_init (regno);
    1590                 :    1017750 :                   if (init)
    1591                 :            :                     {
    1592                 :     935775 :                       rtx t = eliminate_regs_1 (SET_SRC (set), VOIDmode, insn,
    1593                 :            :                                                 false, true);
    1594                 :     935775 :                       machine_mode mode = GET_MODE (SET_DEST (set));
    1595                 :     935775 :                       int cost = set_src_cost (t, mode,
    1596                 :     935775 :                                                optimize_bb_for_speed_p (bb));
    1597                 :     935775 :                       int freq = REG_FREQ_FROM_BB (bb);
    1598                 :            : 
    1599                 :     935775 :                       reg_equiv_init_cost[regno] = cost * freq;
    1600                 :     935775 :                       continue;
    1601                 :            :                     }
    1602                 :            :                 }
    1603                 :            :               /* If needed, eliminate any eliminable registers.  */
    1604                 :   79290900 :               if (num_eliminable || num_eliminable_invariants)
    1605                 :   79290900 :                 elimination_costs_in_insn (insn);
    1606                 :            : 
    1607                 :   79290900 :               if (num_eliminable)
    1608                 :   79290900 :                 update_eliminable_offsets ();
    1609                 :            :             }
    1610                 :            :         }
    1611                 :            :     }
    1612                 :   41089400 :   for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
    1613                 :            :     {
    1614                 :   40145300 :       if (reg_equiv_invariant (i))
    1615                 :            :         {
    1616                 :     663472 :           if (reg_equiv_init (i))
    1617                 :            :             {
    1618                 :     544693 :               int cost = reg_equiv_init_cost[i];
    1619                 :     544693 :               if (dump_file)
    1620                 :          0 :                 fprintf (dump_file,
    1621                 :            :                          "Reg %d has equivalence, initial gains %d\n", i, cost);
    1622                 :     544693 :               if (cost != 0)
    1623                 :     544421 :                 ira_adjust_equiv_reg_cost (i, cost);
    1624                 :            :             }
    1625                 :            :           else
    1626                 :            :             {
    1627                 :     118779 :               if (dump_file)
    1628                 :          0 :                 fprintf (dump_file,
    1629                 :            :                          "Reg %d had equivalence, but can't be eliminated\n",
    1630                 :            :                          i);
    1631                 :     118779 :               ira_adjust_equiv_reg_cost (i, 0);
    1632                 :            :             }
    1633                 :            :         }
    1634                 :            :     }
    1635                 :            : 
    1636                 :     944096 :   free (reg_equiv_init_cost);
    1637                 :     944096 :   free (offsets_known_at);
    1638                 :     944096 :   free (offsets_at);
    1639                 :     944096 :   offsets_at = NULL;
    1640                 :     944096 :   offsets_known_at = NULL;
    1641                 :     944096 : }
    1642                 :            : 
    1643                 :            : /* Comparison function for qsort to decide which of two reloads
    1644                 :            :    should be handled first.  *P1 and *P2 are the reload numbers.  */
    1645                 :            : 
    1646                 :            : static int
    1647                 :          0 : reload_reg_class_lower (const void *r1p, const void *r2p)
    1648                 :            : {
    1649                 :          0 :   int r1 = *(const short *) r1p, r2 = *(const short *) r2p;
    1650                 :          0 :   int t;
    1651                 :            : 
    1652                 :            :   /* Consider required reloads before optional ones.  */
    1653                 :          0 :   t = rld[r1].optional - rld[r2].optional;
    1654                 :          0 :   if (t != 0)
    1655                 :            :     return t;
    1656                 :            : 
    1657                 :            :   /* Count all solitary classes before non-solitary ones.  */
    1658                 :          0 :   t = ((reg_class_size[(int) rld[r2].rclass] == 1)
    1659                 :          0 :        - (reg_class_size[(int) rld[r1].rclass] == 1));
    1660                 :          0 :   if (t != 0)
    1661                 :            :     return t;
    1662                 :            : 
    1663                 :            :   /* Aside from solitaires, consider all multi-reg groups first.  */
    1664                 :          0 :   t = rld[r2].nregs - rld[r1].nregs;
    1665                 :          0 :   if (t != 0)
    1666                 :            :     return t;
    1667                 :            : 
    1668                 :            :   /* Consider reloads in order of increasing reg-class number.  */
    1669                 :          0 :   t = (int) rld[r1].rclass - (int) rld[r2].rclass;
    1670                 :          0 :   if (t != 0)
    1671                 :            :     return t;
    1672                 :            : 
    1673                 :            :   /* If reloads are equally urgent, sort by reload number,
    1674                 :            :      so that the results of qsort leave nothing to chance.  */
    1675                 :          0 :   return r1 - r2;
    1676                 :            : }
    1677                 :            : 
    1678                 :            : /* The cost of spilling each hard reg.  */
    1679                 :            : static int spill_cost[FIRST_PSEUDO_REGISTER];
    1680                 :            : 
    1681                 :            : /* When spilling multiple hard registers, we use SPILL_COST for the first
    1682                 :            :    spilled hard reg and SPILL_ADD_COST for subsequent regs.  SPILL_ADD_COST
    1683                 :            :    only the first hard reg for a multi-reg pseudo.  */
    1684                 :            : static int spill_add_cost[FIRST_PSEUDO_REGISTER];
    1685                 :            : 
    1686                 :            : /* Map of hard regno to pseudo regno currently occupying the hard
    1687                 :            :    reg.  */
    1688                 :            : static int hard_regno_to_pseudo_regno[FIRST_PSEUDO_REGISTER];
    1689                 :            : 
    1690                 :            : /* Update the spill cost arrays, considering that pseudo REG is live.  */
    1691                 :            : 
    1692                 :            : static void
    1693                 :          0 : count_pseudo (int reg)
    1694                 :            : {
    1695                 :          0 :   int freq = REG_FREQ (reg);
    1696                 :          0 :   int r = reg_renumber[reg];
    1697                 :          0 :   int nregs;
    1698                 :            : 
    1699                 :            :   /* Ignore spilled pseudo-registers which can be here only if IRA is used.  */
    1700                 :          0 :   if (ira_conflicts_p && r < 0)
    1701                 :            :     return;
    1702                 :            : 
    1703                 :          0 :   if (REGNO_REG_SET_P (&pseudos_counted, reg)
    1704                 :          0 :       || REGNO_REG_SET_P (&spilled_pseudos, reg))
    1705                 :          0 :     return;
    1706                 :            : 
    1707                 :          0 :   SET_REGNO_REG_SET (&pseudos_counted, reg);
    1708                 :            : 
    1709                 :          0 :   gcc_assert (r >= 0);
    1710                 :            : 
    1711                 :          0 :   spill_add_cost[r] += freq;
    1712                 :          0 :   nregs = hard_regno_nregs (r, PSEUDO_REGNO_MODE (reg));
    1713                 :          0 :   while (nregs-- > 0)
    1714                 :            :     {
    1715                 :          0 :       hard_regno_to_pseudo_regno[r + nregs] = reg;
    1716                 :          0 :       spill_cost[r + nregs] += freq;
    1717                 :            :     }
    1718                 :            : }
    1719                 :            : 
    1720                 :            : /* Calculate the SPILL_COST and SPILL_ADD_COST arrays and determine the
    1721                 :            :    contents of BAD_SPILL_REGS for the insn described by CHAIN.  */
    1722                 :            : 
    1723                 :            : static void
    1724                 :          0 : order_regs_for_reload (class insn_chain *chain)
    1725                 :            : {
    1726                 :          0 :   unsigned i;
    1727                 :          0 :   HARD_REG_SET used_by_pseudos;
    1728                 :          0 :   HARD_REG_SET used_by_pseudos2;
    1729                 :          0 :   reg_set_iterator rsi;
    1730                 :            : 
    1731                 :          0 :   bad_spill_regs = fixed_reg_set;
    1732                 :            : 
    1733                 :          0 :   memset (spill_cost, 0, sizeof spill_cost);
    1734                 :          0 :   memset (spill_add_cost, 0, sizeof spill_add_cost);
    1735                 :          0 :   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
    1736                 :          0 :     hard_regno_to_pseudo_regno[i] = -1;
    1737                 :            : 
    1738                 :            :   /* Count number of uses of each hard reg by pseudo regs allocated to it
    1739                 :            :      and then order them by decreasing use.  First exclude hard registers
    1740                 :            :      that are live in or across this insn.  */
    1741                 :            : 
    1742                 :          0 :   REG_SET_TO_HARD_REG_SET (used_by_pseudos, &chain->live_throughout);
    1743                 :          0 :   REG_SET_TO_HARD_REG_SET (used_by_pseudos2, &chain->dead_or_set);
    1744                 :          0 :   bad_spill_regs |= used_by_pseudos;
    1745                 :          0 :   bad_spill_regs |= used_by_pseudos2;
    1746                 :            : 
    1747                 :            :   /* Now find out which pseudos are allocated to it, and update
    1748                 :            :      hard_reg_n_uses.  */
    1749                 :          0 :   CLEAR_REG_SET (&pseudos_counted);
    1750                 :            : 
    1751                 :          0 :   EXECUTE_IF_SET_IN_REG_SET
    1752                 :            :     (&chain->live_throughout, FIRST_PSEUDO_REGISTER, i, rsi)
    1753                 :            :     {
    1754                 :          0 :       count_pseudo (i);
    1755                 :            :     }
    1756                 :          0 :   EXECUTE_IF_SET_IN_REG_SET
    1757                 :            :     (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, i, rsi)
    1758                 :            :     {
    1759                 :          0 :       count_pseudo (i);
    1760                 :            :     }
    1761                 :          0 :   CLEAR_REG_SET (&pseudos_counted);
    1762                 :          0 : }
    1763                 :            : 
    1764                 :            : /* Vector of reload-numbers showing the order in which the reloads should
    1765                 :            :    be processed.  */
    1766                 :            : static short reload_order[MAX_RELOADS];
    1767                 :            : 
    1768                 :            : /* This is used to keep track of the spill regs used in one insn.  */
    1769                 :            : static HARD_REG_SET used_spill_regs_local;
    1770                 :            : 
    1771                 :            : /* We decided to spill hard register SPILLED, which has a size of
    1772                 :            :    SPILLED_NREGS.  Determine how pseudo REG, which is live during the insn,
    1773                 :            :    is affected.  We will add it to SPILLED_PSEUDOS if necessary, and we will
    1774                 :            :    update SPILL_COST/SPILL_ADD_COST.  */
    1775                 :            : 
    1776                 :            : static void
    1777                 :          0 : count_spilled_pseudo (int spilled, int spilled_nregs, int reg)
    1778                 :            : {
    1779                 :          0 :   int freq = REG_FREQ (reg);
    1780                 :          0 :   int r = reg_renumber[reg];
    1781                 :          0 :   int nregs;
    1782                 :            : 
    1783                 :            :   /* Ignore spilled pseudo-registers which can be here only if IRA is used.  */
    1784                 :          0 :   if (ira_conflicts_p && r < 0)
    1785                 :            :     return;
    1786                 :            : 
    1787                 :          0 :   gcc_assert (r >= 0);
    1788                 :            : 
    1789                 :          0 :   nregs = hard_regno_nregs (r, PSEUDO_REGNO_MODE (reg));
    1790                 :            : 
    1791                 :          0 :   if (REGNO_REG_SET_P (&spilled_pseudos, reg)
    1792                 :          0 :       || spilled + spilled_nregs <= r || r + nregs <= spilled)
    1793                 :            :     return;
    1794                 :            : 
    1795                 :          0 :   SET_REGNO_REG_SET (&spilled_pseudos, reg);
    1796                 :            : 
    1797                 :          0 :   spill_add_cost[r] -= freq;
    1798                 :          0 :   while (nregs-- > 0)
    1799                 :            :     {
    1800                 :          0 :       hard_regno_to_pseudo_regno[r + nregs] = -1;
    1801                 :          0 :       spill_cost[r + nregs] -= freq;
    1802                 :            :     }
    1803                 :            : }
    1804                 :            : 
    1805                 :            : /* Find reload register to use for reload number ORDER.  */
    1806                 :            : 
    1807                 :            : static int
    1808                 :          0 : find_reg (class insn_chain *chain, int order)
    1809                 :            : {
    1810                 :          0 :   int rnum = reload_order[order];
    1811                 :          0 :   struct reload *rl = rld + rnum;
    1812                 :          0 :   int best_cost = INT_MAX;
    1813                 :          0 :   int best_reg = -1;
    1814                 :          0 :   unsigned int i, j, n;
    1815                 :          0 :   int k;
    1816                 :          0 :   HARD_REG_SET not_usable;
    1817                 :          0 :   HARD_REG_SET used_by_other_reload;
    1818                 :          0 :   reg_set_iterator rsi;
    1819                 :          0 :   static int regno_pseudo_regs[FIRST_PSEUDO_REGISTER];
    1820                 :          0 :   static int best_regno_pseudo_regs[FIRST_PSEUDO_REGISTER];
    1821                 :            : 
    1822                 :          0 :   not_usable = (bad_spill_regs
    1823                 :          0 :                 | bad_spill_regs_global
    1824                 :          0 :                 | ~reg_class_contents[rl->rclass]);
    1825                 :            : 
    1826                 :          0 :   CLEAR_HARD_REG_SET (used_by_other_reload);
    1827                 :          0 :   for (k = 0; k < order; k++)
    1828                 :            :     {
    1829                 :          0 :       int other = reload_order[k];
    1830                 :            : 
    1831                 :          0 :       if (rld[other].regno >= 0 && reloads_conflict (other, rnum))
    1832                 :          0 :         for (j = 0; j < rld[other].nregs; j++)
    1833                 :          0 :           SET_HARD_REG_BIT (used_by_other_reload, rld[other].regno + j);
    1834                 :            :     }
    1835                 :            : 
    1836                 :          0 :   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
    1837                 :            :     {
    1838                 :            : #ifdef REG_ALLOC_ORDER
    1839                 :          0 :       unsigned int regno = reg_alloc_order[i];
    1840                 :            : #else
    1841                 :            :       unsigned int regno = i;
    1842                 :            : #endif
    1843                 :            : 
    1844                 :          0 :       if (! TEST_HARD_REG_BIT (not_usable, regno)
    1845                 :          0 :           && ! TEST_HARD_REG_BIT (used_by_other_reload, regno)
    1846                 :          0 :           && targetm.hard_regno_mode_ok (regno, rl->mode))
    1847                 :            :         {
    1848                 :          0 :           int this_cost = spill_cost[regno];
    1849                 :          0 :           int ok = 1;
    1850                 :          0 :           unsigned int this_nregs = hard_regno_nregs (regno, rl->mode);
    1851                 :            : 
    1852                 :          0 :           for (j = 1; j < this_nregs; j++)
    1853                 :            :             {
    1854                 :          0 :               this_cost += spill_add_cost[regno + j];
    1855                 :          0 :               if ((TEST_HARD_REG_BIT (not_usable, regno + j))
    1856                 :          0 :                   || TEST_HARD_REG_BIT (used_by_other_reload, regno + j))
    1857                 :            :                 ok = 0;
    1858                 :            :             }
    1859                 :          0 :           if (! ok)
    1860                 :          0 :             continue;
    1861                 :            : 
    1862                 :          0 :           if (ira_conflicts_p)
    1863                 :            :             {
    1864                 :            :               /* Ask IRA to find a better pseudo-register for
    1865                 :            :                  spilling.  */
    1866                 :          0 :               for (n = j = 0; j < this_nregs; j++)
    1867                 :            :                 {
    1868                 :          0 :                   int r = hard_regno_to_pseudo_regno[regno + j];
    1869                 :            : 
    1870                 :          0 :                   if (r < 0)
    1871                 :          0 :                     continue;
    1872                 :          0 :                   if (n == 0 || regno_pseudo_regs[n - 1] != r)
    1873                 :          0 :                     regno_pseudo_regs[n++] = r;
    1874                 :            :                 }
    1875                 :          0 :               regno_pseudo_regs[n++] = -1;
    1876                 :          0 :               if (best_reg < 0
    1877                 :          0 :                   || ira_better_spill_reload_regno_p (regno_pseudo_regs,
    1878                 :            :                                                       best_regno_pseudo_regs,
    1879                 :            :                                                       rl->in, rl->out,
    1880                 :            :                                                       chain->insn))
    1881                 :            :                 {
    1882                 :          0 :                   best_reg = regno;
    1883                 :          0 :                   for (j = 0;; j++)
    1884                 :            :                     {
    1885                 :          0 :                       best_regno_pseudo_regs[j] = regno_pseudo_regs[j];
    1886                 :          0 :                       if (regno_pseudo_regs[j] < 0)
    1887                 :            :                         break;
    1888                 :            :                     }
    1889                 :            :                 }
    1890                 :          0 :               continue;
    1891                 :            :             }
    1892                 :            : 
    1893                 :          0 :           if (rl->in && REG_P (rl->in) && REGNO (rl->in) == regno)
    1894                 :          0 :             this_cost--;
    1895                 :          0 :           if (rl->out && REG_P (rl->out) && REGNO (rl->out) == regno)
    1896                 :          0 :             this_cost--;
    1897                 :          0 :           if (this_cost < best_cost
    1898                 :            :               /* Among registers with equal cost, prefer caller-saved ones, or
    1899                 :            :                  use REG_ALLOC_ORDER if it is defined.  */
    1900                 :          0 :               || (this_cost == best_cost
    1901                 :            : #ifdef REG_ALLOC_ORDER
    1902                 :          0 :                   && (inv_reg_alloc_order[regno]
    1903                 :          0 :                       < inv_reg_alloc_order[best_reg])
    1904                 :            : #else
    1905                 :            :                   && crtl->abi->clobbers_full_reg_p (regno)
    1906                 :            :                   && !crtl->abi->clobbers_full_reg_p (best_reg)
    1907                 :            : #endif
    1908                 :            :                   ))
    1909                 :            :             {
    1910                 :          0 :               best_reg = regno;
    1911                 :          0 :               best_cost = this_cost;
    1912                 :            :             }
    1913                 :            :         }
    1914                 :            :     }
    1915                 :          0 :   if (best_reg == -1)
    1916                 :            :     return 0;
    1917                 :            : 
    1918                 :          0 :   if (dump_file)
    1919                 :          0 :     fprintf (dump_file, "Using reg %d for reload %d\n", best_reg, rnum);
    1920                 :            : 
    1921                 :          0 :   rl->nregs = hard_regno_nregs (best_reg, rl->mode);
    1922                 :          0 :   rl->regno = best_reg;
    1923                 :            : 
    1924                 :          0 :   EXECUTE_IF_SET_IN_REG_SET
    1925                 :            :     (&chain->live_throughout, FIRST_PSEUDO_REGISTER, j, rsi)
    1926                 :            :     {
    1927                 :          0 :       count_spilled_pseudo (best_reg, rl->nregs, j);
    1928                 :            :     }
    1929                 :            : 
    1930                 :          0 :   EXECUTE_IF_SET_IN_REG_SET
    1931                 :            :     (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, j, rsi)
    1932                 :            :     {
    1933                 :          0 :       count_spilled_pseudo (best_reg, rl->nregs, j);
    1934                 :            :     }
    1935                 :            : 
    1936                 :          0 :   for (i = 0; i < rl->nregs; i++)
    1937                 :            :     {
    1938                 :          0 :       gcc_assert (spill_cost[best_reg + i] == 0);
    1939                 :          0 :       gcc_assert (spill_add_cost[best_reg + i] == 0);
    1940                 :          0 :       gcc_assert (hard_regno_to_pseudo_regno[best_reg + i] == -1);
    1941                 :          0 :       SET_HARD_REG_BIT (used_spill_regs_local, best_reg + i);
    1942                 :            :     }
    1943                 :            :   return 1;
    1944                 :            : }
    1945                 :            : 
    1946                 :            : /* Find more reload regs to satisfy the remaining need of an insn, which
    1947                 :            :    is given by CHAIN.
    1948                 :            :    Do it by ascending class number, since otherwise a reg
    1949                 :            :    might be spilled for a big class and might fail to count
    1950                 :            :    for a smaller class even though it belongs to that class.  */
    1951                 :            : 
    1952                 :            : static void
    1953                 :          0 : find_reload_regs (class insn_chain *chain)
    1954                 :            : {
    1955                 :          0 :   int i;
    1956                 :            : 
    1957                 :            :   /* In order to be certain of getting the registers we need,
    1958                 :            :      we must sort the reloads into order of increasing register class.
    1959                 :            :      Then our grabbing of reload registers will parallel the process
    1960                 :            :      that provided the reload registers.  */
    1961                 :          0 :   for (i = 0; i < chain->n_reloads; i++)
    1962                 :            :     {
    1963                 :            :       /* Show whether this reload already has a hard reg.  */
    1964                 :          0 :       if (chain->rld[i].reg_rtx)
    1965                 :            :         {
    1966                 :          0 :           chain->rld[i].regno = REGNO (chain->rld[i].reg_rtx);
    1967                 :          0 :           chain->rld[i].nregs = REG_NREGS (chain->rld[i].reg_rtx);
    1968                 :            :         }
    1969                 :            :       else
    1970                 :          0 :         chain->rld[i].regno = -1;
    1971                 :          0 :       reload_order[i] = i;
    1972                 :            :     }
    1973                 :            : 
    1974                 :          0 :   n_reloads = chain->n_reloads;
    1975                 :          0 :   memcpy (rld, chain->rld, n_reloads * sizeof (struct reload));
    1976                 :            : 
    1977                 :          0 :   CLEAR_HARD_REG_SET (used_spill_regs_local);
    1978                 :            : 
    1979                 :          0 :   if (dump_file)
    1980                 :          0 :     fprintf (dump_file, "Spilling for insn %d.\n", INSN_UID (chain->insn));
    1981                 :            : 
    1982                 :          0 :   qsort (reload_order, n_reloads, sizeof (short), reload_reg_class_lower);
    1983                 :            : 
    1984                 :            :   /* Compute the order of preference for hard registers to spill.  */
    1985                 :            : 
    1986                 :          0 :   order_regs_for_reload (chain);
    1987                 :            : 
    1988                 :          0 :   for (i = 0; i < n_reloads; i++)
    1989                 :            :     {
    1990                 :          0 :       int r = reload_order[i];
    1991                 :            : 
    1992                 :            :       /* Ignore reloads that got marked inoperative.  */
    1993                 :          0 :       if ((rld[r].out != 0 || rld[r].in != 0 || rld[r].secondary_p)
    1994                 :          0 :           && ! rld[r].optional
    1995                 :          0 :           && rld[r].regno == -1)
    1996                 :          0 :         if (! find_reg (chain, i))
    1997                 :            :           {
    1998                 :          0 :             if (dump_file)
    1999                 :          0 :               fprintf (dump_file, "reload failure for reload %d\n", r);
    2000                 :          0 :             spill_failure (chain->insn, rld[r].rclass);
    2001                 :          0 :             failure = 1;
    2002                 :          0 :             return;
    2003                 :            :           }
    2004                 :            :     }
    2005                 :            : 
    2006                 :          0 :   chain->used_spill_regs = used_spill_regs_local;
    2007                 :          0 :   used_spill_regs |= used_spill_regs_local;
    2008                 :            : 
    2009                 :          0 :   memcpy (chain->rld, rld, n_reloads * sizeof (struct reload));
    2010                 :            : }
    2011                 :            : 
    2012                 :            : static void
    2013                 :          0 : select_reload_regs (void)
    2014                 :            : {
    2015                 :          0 :   class insn_chain *chain;
    2016                 :            : 
    2017                 :            :   /* Try to satisfy the needs for each insn.  */
    2018                 :          0 :   for (chain = insns_need_reload; chain != 0;
    2019                 :          0 :        chain = chain->next_need_reload)
    2020                 :          0 :     find_reload_regs (chain);
    2021                 :          0 : }
    2022                 :            : 
    2023                 :            : /* Delete all insns that were inserted by emit_caller_save_insns during
    2024                 :            :    this iteration.  */
    2025                 :            : static void
    2026                 :          0 : delete_caller_save_insns (void)
    2027                 :            : {
    2028                 :          0 :   class insn_chain *c = reload_insn_chain;
    2029                 :            : 
    2030                 :          0 :   while (c != 0)
    2031                 :            :     {
    2032                 :          0 :       while (c != 0 && c->is_caller_save_insn)
    2033                 :            :         {
    2034                 :          0 :           class insn_chain *next = c->next;
    2035                 :          0 :           rtx_insn *insn = c->insn;
    2036                 :            : 
    2037                 :          0 :           if (c == reload_insn_chain)
    2038                 :          0 :             reload_insn_chain = next;
    2039                 :          0 :           delete_insn (insn);
    2040                 :            : 
    2041                 :          0 :           if (next)
    2042                 :          0 :             next->prev = c->prev;
    2043                 :          0 :           if (c->prev)
    2044                 :          0 :             c->prev->next = next;
    2045                 :          0 :           c->next = unused_insn_chains;
    2046                 :          0 :           unused_insn_chains = c;
    2047                 :          0 :           c = next;
    2048                 :            :         }
    2049                 :          0 :       if (c != 0)
    2050                 :          0 :         c = c->next;
    2051                 :            :     }
    2052                 :          0 : }
    2053                 :            : 
    2054                 :            : /* Handle the failure to find a register to spill.
    2055                 :            :    INSN should be one of the insns which needed this particular spill reg.  */
    2056                 :            : 
    2057                 :            : static void
    2058                 :          0 : spill_failure (rtx_insn *insn, enum reg_class rclass)
    2059                 :            : {
    2060                 :          0 :   if (asm_noperands (PATTERN (insn)) >= 0)
    2061                 :          0 :     error_for_asm (insn, "cannot find a register in class %qs while "
    2062                 :            :                    "reloading %<asm%>",
    2063                 :          0 :                    reg_class_names[rclass]);
    2064                 :            :   else
    2065                 :            :     {
    2066                 :          0 :       error ("unable to find a register to spill in class %qs",
    2067                 :          0 :              reg_class_names[rclass]);
    2068                 :            : 
    2069                 :          0 :       if (dump_file)
    2070                 :            :         {
    2071                 :          0 :           fprintf (dump_file, "\nReloads for insn # %d\n", INSN_UID (insn));
    2072                 :          0 :           debug_reload_to_stream (dump_file);
    2073                 :            :         }
    2074                 :          0 :       fatal_insn ("this is the insn:", insn);
    2075                 :            :     }
    2076                 :          0 : }
    2077                 :            : 
    2078                 :            : /* Delete an unneeded INSN and any previous insns who sole purpose is loading
    2079                 :            :    data that is dead in INSN.  */
    2080                 :            : 
    2081                 :            : static void
    2082                 :          0 : delete_dead_insn (rtx_insn *insn)
    2083                 :            : {
    2084                 :          0 :   rtx_insn *prev = prev_active_insn (insn);
    2085                 :          0 :   rtx prev_dest;
    2086                 :            : 
    2087                 :            :   /* If the previous insn sets a register that dies in our insn make
    2088                 :            :      a note that we want to run DCE immediately after reload.
    2089                 :            : 
    2090                 :            :      We used to delete the previous insn & recurse, but that's wrong for
    2091                 :            :      block local equivalences.  Instead of trying to figure out the exact
    2092                 :            :      circumstances where we can delete the potentially dead insns, just
    2093                 :            :      let DCE do the job.  */
    2094                 :          0 :   if (prev && BLOCK_FOR_INSN (prev) == BLOCK_FOR_INSN (insn)
    2095                 :          0 :       && GET_CODE (PATTERN (prev)) == SET
    2096                 :          0 :       && (prev_dest = SET_DEST (PATTERN (prev)), REG_P (prev_dest))
    2097                 :          0 :       && reg_mentioned_p (prev_dest, PATTERN (insn))
    2098                 :          0 :       && find_regno_note (insn, REG_DEAD, REGNO (prev_dest))
    2099                 :          0 :       && ! side_effects_p (SET_SRC (PATTERN (prev))))
    2100                 :          0 :     need_dce = 1;
    2101                 :            : 
    2102                 :          0 :   SET_INSN_DELETED (insn);
    2103                 :          0 : }
    2104                 :            : 
    2105                 :            : /* Modify the home of pseudo-reg I.
    2106                 :            :    The new home is present in reg_renumber[I].
    2107                 :            : 
    2108                 :            :    FROM_REG may be the hard reg that the pseudo-reg is being spilled from;
    2109                 :            :    or it may be -1, meaning there is none or it is not relevant.
    2110                 :            :    This is used so that all pseudos spilled from a given hard reg
    2111                 :            :    can share one stack slot.  */
    2112                 :            : 
    2113                 :            : static void
    2114                 :          0 : alter_reg (int i, int from_reg, bool dont_share_p)
    2115                 :            : {
    2116                 :            :   /* When outputting an inline function, this can happen
    2117                 :            :      for a reg that isn't actually used.  */
    2118                 :          0 :   if (regno_reg_rtx[i] == 0)
    2119                 :            :     return;
    2120                 :            : 
    2121                 :            :   /* If the reg got changed to a MEM at rtl-generation time,
    2122                 :            :      ignore it.  */
    2123                 :          0 :   if (!REG_P (regno_reg_rtx[i]))
    2124                 :            :     return;
    2125                 :            : 
    2126                 :            :   /* Modify the reg-rtx to contain the new hard reg
    2127                 :            :      number or else to contain its pseudo reg number.  */
    2128                 :          0 :   SET_REGNO (regno_reg_rtx[i],
    2129                 :            :              reg_renumber[i] >= 0 ? reg_renumber[i] : i);
    2130                 :            : 
    2131                 :            :   /* If we have a pseudo that is needed but has no hard reg or equivalent,
    2132                 :            :      allocate a stack slot for it.  */
    2133                 :            : 
    2134                 :          0 :   if (reg_renumber[i] < 0
    2135                 :          0 :       && REG_N_REFS (i) > 0
    2136                 :          0 :       && reg_equiv_constant (i) == 0
    2137                 :          0 :       && (reg_equiv_invariant (i) == 0
    2138                 :          0 :           || reg_equiv_init (i) == 0)
    2139                 :          0 :       && reg_equiv_memory_loc (i) == 0)
    2140                 :            :     {
    2141                 :          0 :       rtx x = NULL_RTX;
    2142                 :          0 :       machine_mode mode = GET_MODE (regno_reg_rtx[i]);
    2143                 :          0 :       poly_uint64 inherent_size = GET_MODE_SIZE (mode);
    2144                 :          0 :       unsigned int inherent_align = GET_MODE_ALIGNMENT (mode);
    2145                 :          0 :       machine_mode wider_mode = wider_subreg_mode (mode, reg_max_ref_mode[i]);
    2146                 :          0 :       poly_uint64 total_size = GET_MODE_SIZE (wider_mode);
    2147                 :            :       /* ??? Seems strange to derive the minimum alignment from the size,
    2148                 :            :          but that's the traditional behavior.  For polynomial-size modes,
    2149                 :            :          the natural extension is to use the minimum possible size.  */
    2150                 :          0 :       unsigned int min_align
    2151                 :          0 :         = constant_lower_bound (GET_MODE_BITSIZE (reg_max_ref_mode[i]));
    2152                 :          0 :       poly_int64 adjust = 0;
    2153                 :            : 
    2154                 :          0 :       something_was_spilled = true;
    2155                 :            : 
    2156                 :          0 :       if (ira_conflicts_p)
    2157                 :            :         {
    2158                 :            :           /* Mark the spill for IRA.  */
    2159                 :          0 :           SET_REGNO_REG_SET (&spilled_pseudos, i);
    2160                 :          0 :           if (!dont_share_p)
    2161                 :          0 :             x = ira_reuse_stack_slot (i, inherent_size, total_size);
    2162                 :            :         }
    2163                 :            : 
    2164                 :          0 :       if (x)
    2165                 :            :         ;
    2166                 :            : 
    2167                 :            :       /* Each pseudo reg has an inherent size which comes from its own mode,
    2168                 :            :          and a total size which provides room for paradoxical subregs
    2169                 :            :          which refer to the pseudo reg in wider modes.
    2170                 :            : 
    2171                 :            :          We can use a slot already allocated if it provides both
    2172                 :            :          enough inherent space and enough total space.
    2173                 :            :          Otherwise, we allocate a new slot, making sure that it has no less
    2174                 :            :          inherent space, and no less total space, then the previous slot.  */
    2175                 :          0 :       else if (from_reg == -1 || (!dont_share_p && ira_conflicts_p))
    2176                 :            :         {
    2177                 :          0 :           rtx stack_slot;
    2178                 :            : 
    2179                 :            :           /* The sizes are taken from a subreg operation, which guarantees
    2180                 :            :              that they're ordered.  */
    2181                 :          0 :           gcc_checking_assert (ordered_p (total_size, inherent_size));
    2182                 :            : 
    2183                 :            :           /* No known place to spill from => no slot to reuse.  */
    2184                 :          0 :           x = assign_stack_local (mode, total_size,
    2185                 :            :                                   min_align > inherent_align
    2186                 :          0 :                                   || maybe_gt (total_size, inherent_size)
    2187                 :            :                                   ? -1 : 0);
    2188                 :            : 
    2189                 :          0 :           stack_slot = x;
    2190                 :            : 
    2191                 :            :           /* Cancel the big-endian correction done in assign_stack_local.
    2192                 :            :              Get the address of the beginning of the slot.  This is so we
    2193                 :            :              can do a big-endian correction unconditionally below.  */
    2194                 :          0 :           if (BYTES_BIG_ENDIAN)
    2195                 :            :             {
    2196                 :            :               adjust = inherent_size - total_size;
    2197                 :            :               if (maybe_ne (adjust, 0))
    2198                 :            :                 {
    2199                 :            :                   poly_uint64 total_bits = total_size * BITS_PER_UNIT;
    2200                 :            :                   machine_mode mem_mode
    2201                 :            :                     = int_mode_for_size (total_bits, 1).else_blk ();
    2202                 :            :                   stack_slot = adjust_address_nv (x, mem_mode, adjust);
    2203                 :            :                 }
    2204                 :            :             }
    2205                 :            : 
    2206                 :          0 :           if (! dont_share_p && ira_conflicts_p)
    2207                 :            :             /* Inform IRA about allocation a new stack slot.  */
    2208                 :          0 :             ira_mark_new_stack_slot (stack_slot, i, total_size);
    2209                 :            :         }
    2210                 :            : 
    2211                 :            :       /* Reuse a stack slot if possible.  */
    2212                 :          0 :       else if (spill_stack_slot[from_reg] != 0
    2213                 :          0 :                && known_ge (spill_stack_slot_width[from_reg], total_size)
    2214                 :          0 :                && known_ge (GET_MODE_SIZE
    2215                 :            :                             (GET_MODE (spill_stack_slot[from_reg])),
    2216                 :            :                             inherent_size)
    2217                 :          0 :                && MEM_ALIGN (spill_stack_slot[from_reg]) >= min_align)
    2218                 :            :         x = spill_stack_slot[from_reg];
    2219                 :            : 
    2220                 :            :       /* Allocate a bigger slot.  */
    2221                 :            :       else
    2222                 :            :         {
    2223                 :            :           /* Compute maximum size needed, both for inherent size
    2224                 :            :              and for total size.  */
    2225                 :          0 :           rtx stack_slot;
    2226                 :            : 
    2227                 :          0 :           if (spill_stack_slot[from_reg])
    2228                 :            :             {
    2229                 :          0 :               if (partial_subreg_p (mode,
    2230                 :          0 :                                     GET_MODE (spill_stack_slot[from_reg])))
    2231                 :          0 :                 mode = GET_MODE (spill_stack_slot[from_reg]);
    2232                 :          0 :               total_size = ordered_max (total_size,
    2233                 :          0 :                                         spill_stack_slot_width[from_reg]);
    2234                 :          0 :               if (MEM_ALIGN (spill_stack_slot[from_reg]) > min_align)
    2235                 :          0 :                 min_align = MEM_ALIGN (spill_stack_slot[from_reg]);
    2236                 :            :             }
    2237                 :            : 
    2238                 :            :           /* The sizes are taken from a subreg operation, which guarantees
    2239                 :            :              that they're ordered.  */
    2240                 :          0 :           gcc_checking_assert (ordered_p (total_size, inherent_size));
    2241                 :            : 
    2242                 :            :           /* Make a slot with that size.  */
    2243                 :          0 :           x = assign_stack_local (mode, total_size,
    2244                 :            :                                   min_align > inherent_align
    2245                 :          0 :                                   || maybe_gt (total_size, inherent_size)
    2246                 :            :                                   ? -1 : 0);
    2247                 :          0 :           stack_slot = x;
    2248                 :            : 
    2249                 :            :           /* Cancel the  big-endian correction done in assign_stack_local.
    2250                 :            :              Get the address of the beginning of the slot.  This is so we
    2251                 :            :              can do a big-endian correction unconditionally below.  */
    2252                 :          0 :           if (BYTES_BIG_ENDIAN)
    2253                 :            :             {
    2254                 :            :               adjust = GET_MODE_SIZE (mode) - total_size;
    2255                 :            :               if (maybe_ne (adjust, 0))
    2256                 :            :                 {
    2257                 :            :                   poly_uint64 total_bits = total_size * BITS_PER_UNIT;
    2258                 :            :                   machine_mode mem_mode
    2259                 :            :                     = int_mode_for_size (total_bits, 1).else_blk ();
    2260                 :            :                   stack_slot = adjust_address_nv (x, mem_mode, adjust);
    2261                 :            :                 }
    2262                 :            :             }
    2263                 :            : 
    2264                 :          0 :           spill_stack_slot[from_reg] = stack_slot;
    2265                 :          0 :           spill_stack_slot_width[from_reg] = total_size;
    2266                 :            :         }
    2267                 :            : 
    2268                 :            :       /* On a big endian machine, the "address" of the slot
    2269                 :            :          is the address of the low part that fits its inherent mode.  */
    2270                 :          0 :       adjust += subreg_size_lowpart_offset (inherent_size, total_size);
    2271                 :            : 
    2272                 :            :       /* If we have any adjustment to make, or if the stack slot is the
    2273                 :            :          wrong mode, make a new stack slot.  */
    2274                 :          0 :       x = adjust_address_nv (x, GET_MODE (regno_reg_rtx[i]), adjust);
    2275                 :            : 
    2276                 :            :       /* Set all of the memory attributes as appropriate for a spill.  */
    2277                 :          0 :       set_mem_attrs_for_spill (x);
    2278                 :            : 
    2279                 :            :       /* Save the stack slot for later.  */
    2280                 :          0 :       reg_equiv_memory_loc (i) = x;
    2281                 :            :     }
    2282                 :            : }
    2283                 :            : 
    2284                 :            : /* Mark the slots in regs_ever_live for the hard regs used by
    2285                 :            :    pseudo-reg number REGNO, accessed in MODE.  */
    2286                 :            : 
    2287                 :            : static void
    2288                 :          0 : mark_home_live_1 (int regno, machine_mode mode)
    2289                 :            : {
    2290                 :          0 :   int i, lim;
    2291                 :            : 
    2292                 :          0 :   i = reg_renumber[regno];
    2293                 :          0 :   if (i < 0)
    2294                 :            :     return;
    2295                 :          0 :   lim = end_hard_regno (mode, i);
    2296                 :          0 :   while (i < lim)
    2297                 :          0 :     df_set_regs_ever_live (i++, true);
    2298                 :            : }
    2299                 :            : 
    2300                 :            : /* Mark the slots in regs_ever_live for the hard regs
    2301                 :            :    used by pseudo-reg number REGNO.  */
    2302                 :            : 
    2303                 :            : void
    2304                 :          0 : mark_home_live (int regno)
    2305                 :            : {
    2306                 :          0 :   if (reg_renumber[regno] >= 0)
    2307                 :          0 :     mark_home_live_1 (regno, PSEUDO_REGNO_MODE (regno));
    2308                 :          0 : }
    2309                 :            : 
    2310                 :            : /* This function handles the tracking of elimination offsets around branches.
    2311                 :            : 
    2312                 :            :    X is a piece of RTL being scanned.
    2313                 :            : 
    2314                 :            :    INSN is the insn that it came from, if any.
    2315                 :            : 
    2316                 :            :    INITIAL_P is nonzero if we are to set the offset to be the initial
    2317                 :            :    offset and zero if we are setting the offset of the label to be the
    2318                 :            :    current offset.  */
    2319                 :            : 
    2320                 :            : static void
    2321                 :   50145200 : set_label_offsets (rtx x, rtx_insn *insn, int initial_p)
    2322                 :            : {
    2323                 :   51726600 :   enum rtx_code code = GET_CODE (x);
    2324                 :   51726600 :   rtx tem;
    2325                 :   51726600 :   unsigned int i;
    2326                 :   51726600 :   struct elim_table *p;
    2327                 :            : 
    2328                 :   51726600 :   switch (code)
    2329                 :            :     {
    2330                 :    1581350 :     case LABEL_REF:
    2331                 :    1581350 :       if (LABEL_REF_NONLOCAL_P (x))
    2332                 :            :         return;
    2333                 :            : 
    2334                 :    1581350 :       x = label_ref_label (x);
    2335                 :            : 
    2336                 :            :       /* fall through */
    2337                 :            : 
    2338                 :    9807330 :     case CODE_LABEL:
    2339                 :            :       /* If we know nothing about this label, set the desired offsets.  Note
    2340                 :            :          that this sets the offset at a label to be the offset before a label
    2341                 :            :          if we don't know anything about the label.  This is not correct for
    2342                 :            :          the label after a BARRIER, but is the best guess we can make.  If
    2343                 :            :          we guessed wrong, we will suppress an elimination that might have
    2344                 :            :          been possible had we been able to guess correctly.  */
    2345                 :            : 
    2346                 :    9807330 :       if (! offsets_known_at[CODE_LABEL_NUMBER (x) - first_label_num])
    2347                 :            :         {
    2348                 :   21175100 :           for (i = 0; i < NUM_ELIMINABLE_REGS; i++)
    2349                 :   33880100 :             offsets_at[CODE_LABEL_NUMBER (x) - first_label_num][i]
    2350                 :   33180300 :               = (initial_p ? reg_eliminate[i].initial_offset
    2351                 :   16240200 :                  : reg_eliminate[i].offset);
    2352                 :    4235010 :           offsets_known_at[CODE_LABEL_NUMBER (x) - first_label_num] = 1;
    2353                 :            :         }
    2354                 :            : 
    2355                 :            :       /* Otherwise, if this is the definition of a label and it is
    2356                 :            :          preceded by a BARRIER, set our offsets to the known offset of
    2357                 :            :          that label.  */
    2358                 :            : 
    2359                 :    5572320 :       else if (x == insn
    2360                 :    3516080 :                && (tem = prev_nonnote_insn (insn)) != 0
    2361                 :    9088350 :                && BARRIER_P (tem))
    2362                 :    1958630 :         set_offsets_for_label (insn);
    2363                 :            :       else
    2364                 :            :         /* If neither of the above cases is true, compare each offset
    2365                 :            :            with those previously recorded and suppress any eliminations
    2366                 :            :            where the offsets disagree.  */
    2367                 :            : 
    2368                 :   18068400 :         for (i = 0; i < NUM_ELIMINABLE_REGS; i++)
    2369                 :   28909500 :           if (maybe_ne (offsets_at[CODE_LABEL_NUMBER (x) - first_label_num][i],
    2370                 :      29628 :                         (initial_p ? reg_eliminate[i].initial_offset
    2371                 :   14425100 :                          : reg_eliminate[i].offset)))
    2372                 :       9480 :             reg_eliminate[i].can_eliminate = 0;
    2373                 :            : 
    2374                 :            :       return;
    2375                 :            : 
    2376                 :          0 :     case JUMP_TABLE_DATA:
    2377                 :          0 :       set_label_offsets (PATTERN (insn), insn, initial_p);
    2378                 :          0 :       return;
    2379                 :            : 
    2380                 :    5411000 :     case JUMP_INSN:
    2381                 :    5411000 :       set_label_offsets (PATTERN (insn), insn, initial_p);
    2382                 :            : 
    2383                 :            :       /* fall through */
    2384                 :            : 
    2385                 :   36485900 :     case INSN:
    2386                 :   36485900 :     case CALL_INSN:
    2387                 :            :       /* Any labels mentioned in REG_LABEL_OPERAND notes can be branched
    2388                 :            :          to indirectly and hence must have all eliminations at their
    2389                 :            :          initial offsets.  */
    2390                 :   92059300 :       for (tem = REG_NOTES (x); tem; tem = XEXP (tem, 1))
    2391                 :   55573300 :         if (REG_NOTE_KIND (tem) == REG_LABEL_OPERAND)
    2392                 :      17341 :           set_label_offsets (XEXP (tem, 0), insn, 1);
    2393                 :            :       return;
    2394                 :            : 
    2395                 :            :     case PARALLEL:
    2396                 :            :     case ADDR_VEC:
    2397                 :            :     case ADDR_DIFF_VEC:
    2398                 :            :       /* Each of the labels in the parallel or address vector must be
    2399                 :            :          at their initial offsets.  We want the first field for PARALLEL
    2400                 :            :          and ADDR_VEC and the second field for ADDR_DIFF_VEC.  */
    2401                 :            : 
    2402                 :      30442 :       for (i = 0; i < (unsigned) XVECLEN (x, code == ADDR_DIFF_VEC); i++)
    2403                 :      20315 :         set_label_offsets (XVECEXP (x, code == ADDR_DIFF_VEC, i),
    2404                 :            :                            insn, initial_p);
    2405                 :            :       return;
    2406                 :            : 
    2407                 :    5410740 :     case SET:
    2408                 :            :       /* We only care about setting PC.  If the source is not RETURN,
    2409                 :            :          IF_THEN_ELSE, or a label, disable any eliminations not at
    2410                 :            :          their initial offsets.  Similarly if any arm of the IF_THEN_ELSE
    2411                 :            :          isn't one of those possibilities.  For branches to a label,
    2412                 :            :          call ourselves recursively.
    2413                 :            : 
    2414                 :            :          Note that this can disable elimination unnecessarily when we have
    2415                 :            :          a non-local goto since it will look like a non-constant jump to
    2416                 :            :          someplace in the current function.  This isn't a significant
    2417                 :            :          problem since such jumps will normally be when all elimination
    2418                 :            :          pairs are back to their initial offsets.  */
    2419                 :            : 
    2420                 :    5410740 :       if (SET_DEST (x) != pc_rtx)
    2421                 :            :         return;
    2422                 :            : 
    2423                 :    5410720 :       switch (GET_CODE (SET_SRC (x)))
    2424                 :            :         {
    2425                 :            :         case PC:
    2426                 :            :         case RETURN:
    2427                 :            :           return;
    2428                 :            : 
    2429                 :            :         case LABEL_REF:
    2430                 :            :           set_label_offsets (SET_SRC (x), insn, initial_p);
    2431                 :            :           return;
    2432                 :            : 
    2433                 :    3818370 :         case IF_THEN_ELSE:
    2434                 :    3818370 :           tem = XEXP (SET_SRC (x), 1);
    2435                 :    3818370 :           if (GET_CODE (tem) == LABEL_REF)
    2436                 :    3818370 :             set_label_offsets (label_ref_label (tem), insn, initial_p);
    2437                 :          0 :           else if (GET_CODE (tem) != PC && GET_CODE (tem) != RETURN)
    2438                 :            :             break;
    2439                 :            : 
    2440                 :    3818370 :           tem = XEXP (SET_SRC (x), 2);
    2441                 :    3818370 :           if (GET_CODE (tem) == LABEL_REF)
    2442                 :          0 :             set_label_offsets (label_ref_label (tem), insn, initial_p);
    2443                 :    3818370 :           else if (GET_CODE (tem) != PC && GET_CODE (tem) != RETURN)
    2444                 :            :             break;
    2445                 :            :           return;
    2446                 :            : 
    2447                 :            :         default:
    2448                 :            :           break;
    2449                 :            :         }
    2450                 :            : 
    2451                 :            :       /* If we reach here, all eliminations must be at their initial
    2452                 :            :          offset because we are doing a jump to a variable address.  */
    2453                 :      55010 :       for (p = reg_eliminate; p < &reg_eliminate[NUM_ELIMINABLE_REGS]; p++)
    2454                 :      44008 :         if (maybe_ne (p->offset, p->initial_offset))
    2455                 :         28 :           p->can_eliminate = 0;
    2456                 :            :       break;
    2457                 :            : 
    2458                 :            :     default:
    2459                 :            :       break;
    2460                 :            :     }
    2461                 :            : }
    2462                 :            : 
    2463                 :            : /* This function examines every reg that occurs in X and adjusts the
    2464                 :            :    costs for its elimination which are gathered by IRA.  INSN is the
    2465                 :            :    insn in which X occurs.  We do not recurse into MEM expressions.  */
    2466                 :            : 
    2467                 :            : static void
    2468                 :    9250000 : note_reg_elim_costly (const_rtx x, rtx insn)
    2469                 :            : {
    2470                 :    9250000 :   subrtx_iterator::array_type array;
    2471                 :   18636900 :   FOR_EACH_SUBRTX (iter, array, x, NONCONST)
    2472                 :            :     {
    2473                 :    9386880 :       const_rtx x = *iter;
    2474                 :    9386880 :       if (MEM_P (x))
    2475                 :     719596 :         iter.skip_subrtxes ();
    2476                 :    8667280 :       else if (REG_P (x)
    2477                 :    5416040 :                && REGNO (x) >= FIRST_PSEUDO_REGISTER
    2478                 :    4957870 :                && reg_equiv_init (REGNO (x))
    2479                 :   10433100 :                && reg_equiv_invariant (REGNO (x)))
    2480                 :            :         {
    2481                 :     291920 :           rtx t = reg_equiv_invariant (REGNO (x));
    2482                 :     467520 :           rtx new_rtx = eliminate_regs_1 (t, Pmode, insn, true, true);
    2483                 :     467520 :           int cost = set_src_cost (new_rtx, Pmode,
    2484                 :     291920 :                                    optimize_bb_for_speed_p (elim_bb));
    2485                 :     291920 :           int freq = REG_FREQ_FROM_BB (elim_bb);
    2486                 :            : 
    2487                 :     291920 :           if (cost != 0)
    2488                 :     285718 :             ira_adjust_equiv_reg_cost (REGNO (x), -cost * freq);
    2489                 :            :         }
    2490                 :            :     }
    2491                 :    9250000 : }
    2492                 :            : 
    2493                 :            : /* Scan X and replace any eliminable registers (such as fp) with a
    2494                 :            :    replacement (such as sp), plus an offset.
    2495                 :            : 
    2496                 :            :    MEM_MODE is the mode of an enclosing MEM.  We need this to know how
    2497                 :            :    much to adjust a register for, e.g., PRE_DEC.  Also, if we are inside a
    2498                 :            :    MEM, we are allowed to replace a sum of a register and the constant zero
    2499                 :            :    with the register, which we cannot do outside a MEM.  In addition, we need
    2500                 :            :    to record the fact that a register is referenced outside a MEM.
    2501                 :            : 
    2502                 :            :    If INSN is an insn, it is the insn containing X.  If we replace a REG
    2503                 :            :    in a SET_DEST with an equivalent MEM and INSN is nonzero, write a
    2504                 :            :    CLOBBER of the pseudo after INSN so find_equiv_regs will know that
    2505                 :            :    the REG is being modified.
    2506                 :            : 
    2507                 :            :    Alternatively, INSN may be a note (an EXPR_LIST or INSN_LIST).
    2508                 :            :    That's used when we eliminate in expressions stored in notes.
    2509                 :            :    This means, do not set ref_outside_mem even if the reference
    2510                 :            :    is outside of MEMs.
    2511                 :            : 
    2512                 :            :    If FOR_COSTS is true, we are being called before reload in order to
    2513                 :            :    estimate the costs of keeping registers with an equivalence unallocated.
    2514                 :            : 
    2515                 :            :    REG_EQUIV_MEM and REG_EQUIV_ADDRESS contain address that have had
    2516                 :            :    replacements done assuming all offsets are at their initial values.  If
    2517                 :            :    they are not, or if REG_EQUIV_ADDRESS is nonzero for a pseudo we
    2518                 :            :    encounter, return the actual location so that find_reloads will do
    2519                 :            :    the proper thing.  */
    2520                 :            : 
    2521                 :            : static rtx
    2522                 :  135353000 : eliminate_regs_1 (rtx x, machine_mode mem_mode, rtx insn,
    2523                 :            :                   bool may_use_invariant, bool for_costs)
    2524                 :            : {
    2525                 :  135353000 :   enum rtx_code code = GET_CODE (x);
    2526                 :  135353000 :   struct elim_table *ep;
    2527                 :  135353000 :   int regno;
    2528                 :  135353000 :   rtx new_rtx;
    2529                 :  135353000 :   int i, j;
    2530                 :  135353000 :   const char *fmt;
    2531                 :  135353000 :   int copied = 0;
    2532                 :            : 
    2533                 :  135353000 :   if (! current_function_decl)
    2534                 :            :     return x;
    2535                 :            : 
    2536                 :  135353000 :   switch (code)
    2537                 :            :     {
    2538                 :            :     CASE_CONST_ANY:
    2539                 :            :     case CONST:
    2540                 :            :     case SYMBOL_REF:
    2541                 :            :     case CODE_LABEL:
    2542                 :            :     case PC:
    2543                 :            :     case CC0:
    2544                 :            :     case ASM_INPUT:
    2545                 :            :     case ADDR_VEC:
    2546                 :            :     case ADDR_DIFF_VEC:
    2547                 :            :     case RETURN:
    2548                 :            :       return x;
    2549                 :            : 
    2550                 :   63827600 :     case REG:
    2551                 :   63827600 :       regno = REGNO (x);
    2552                 :            : 
    2553                 :            :       /* First handle the case where we encounter a bare register that
    2554                 :            :          is eliminable.  Replace it with a PLUS.  */
    2555                 :   63827600 :       if (regno < FIRST_PSEUDO_REGISTER)
    2556                 :            :         {
    2557                 :   71334800 :           for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
    2558                 :            :                ep++)
    2559                 :   57471600 :             if (ep->from_rtx == x && ep->can_eliminate)
    2560                 :    1144680 :               return plus_constant (Pmode, ep->to_rtx, ep->previous_offset);
    2561                 :            : 
    2562                 :            :         }
    2563                 :   49064800 :       else if (reg_renumber && reg_renumber[regno] < 0
    2564                 :   49064800 :                && reg_equivs
    2565                 :   98128700 :                && reg_equiv_invariant (regno))
    2566                 :            :         {
    2567                 :    1270810 :           if (may_use_invariant || (insn && DEBUG_INSN_P (insn)))
    2568                 :    1126050 :             return eliminate_regs_1 (copy_rtx (reg_equiv_invariant (regno)),
    2569                 :    1126050 :                                      mem_mode, insn, true, for_costs);
    2570                 :            :           /* There exists at least one use of REGNO that cannot be
    2571                 :            :              eliminated.  Prevent the defining insn from being deleted.  */
    2572                 :     144761 :           reg_equiv_init (regno) = NULL;
    2573                 :     144761 :           if (!for_costs)
    2574                 :          0 :             alter_reg (regno, -1, true);
    2575                 :            :         }
    2576                 :            :       return x;
    2577                 :            : 
    2578                 :            :     /* You might think handling MINUS in a manner similar to PLUS is a
    2579                 :            :        good idea.  It is not.  It has been tried multiple times and every
    2580                 :            :        time the change has had to have been reverted.
    2581                 :            : 
    2582                 :            :        Other parts of reload know a PLUS is special (gen_reload for example)
    2583                 :            :        and require special code to handle code a reloaded PLUS operand.
    2584                 :            : 
    2585                 :            :        Also consider backends where the flags register is clobbered by a
    2586                 :            :        MINUS, but we can emit a PLUS that does not clobber flags (IA-32,
    2587                 :            :        lea instruction comes to mind).  If we try to reload a MINUS, we
    2588                 :            :        may kill the flags register that was holding a useful value.
    2589                 :            : 
    2590                 :            :        So, please before trying to handle MINUS, consider reload as a
    2591                 :            :        whole instead of this little section as well as the backend issues.  */
    2592                 :   13445600 :     case PLUS:
    2593                 :            :       /* If this is the sum of an eliminable register and a constant, rework
    2594                 :            :          the sum.  */
    2595                 :   13445600 :       if (REG_P (XEXP (x, 0))
    2596                 :   12603700 :           && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
    2597                 :   23088000 :           && CONSTANT_P (XEXP (x, 1)))
    2598                 :            :         {
    2599                 :   31458400 :           for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
    2600                 :            :                ep++)
    2601                 :   31456000 :             if (ep->from_rtx == XEXP (x, 0) && ep->can_eliminate)
    2602                 :            :               {
    2603                 :            :                 /* The only time we want to replace a PLUS with a REG (this
    2604                 :            :                    occurs when the constant operand of the PLUS is the negative
    2605                 :            :                    of the offset) is when we are inside a MEM.  We won't want
    2606                 :            :                    to do so at other times because that would change the
    2607                 :            :                    structure of the insn in a way that reload can't handle.
    2608                 :            :                    We special-case the commonest situation in
    2609                 :            :                    eliminate_regs_in_insn, so just replace a PLUS with a
    2610                 :            :                    PLUS here, unless inside a MEM.  */
    2611                 :    9618620 :                 if (mem_mode != 0
    2612                 :    7888780 :                     && CONST_INT_P (XEXP (x, 1))
    2613                 :   17507400 :                     && known_eq (INTVAL (XEXP (x, 1)), -ep->previous_offset))
    2614                 :     148877 :                   return ep->to_rtx;
    2615                 :            :                 else
    2616                 :   13019500 :                   return gen_rtx_PLUS (Pmode, ep->to_rtx,
    2617                 :            :                                        plus_constant (Pmode, XEXP (x, 1),
    2618                 :            :                                                       ep->previous_offset));
    2619                 :            :               }
    2620                 :            : 
    2621                 :            :           /* If the register is not eliminable, we are done since the other
    2622                 :            :              operand is a constant.  */
    2623                 :            :           return x;
    2624                 :            :         }
    2625                 :            : 
    2626                 :            :       /* If this is part of an address, we want to bring any constant to the
    2627                 :            :          outermost PLUS.  We will do this by doing register replacement in
    2628                 :            :          our operands and seeing if a constant shows up in one of them.
    2629                 :            : 
    2630                 :            :          Note that there is no risk of modifying the structure of the insn,
    2631                 :            :          since we only get called for its operands, thus we are either
    2632                 :            :          modifying the address inside a MEM, or something like an address
    2633                 :            :          operand of a load-address insn.  */
    2634                 :            : 
    2635                 :    3824620 :       {
    2636                 :    3824620 :         rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true,
    2637                 :            :                                      for_costs);
    2638                 :    3824620 :         rtx new1 = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true,
    2639                 :            :                                      for_costs);
    2640                 :            : 
    2641                 :    3824620 :         if (reg_renumber && (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)))
    2642                 :            :           {
    2643                 :            :             /* If one side is a PLUS and the other side is a pseudo that
    2644                 :            :                didn't get a hard register but has a reg_equiv_constant,
    2645                 :            :                we must replace the constant here since it may no longer
    2646                 :            :                be in the position of any operand.  */
    2647                 :     105705 :             if (GET_CODE (new0) == PLUS && REG_P (new1)
    2648                 :      38690 :                 && REGNO (new1) >= FIRST_PSEUDO_REGISTER
    2649                 :      38683 :                 && reg_renumber[REGNO (new1)] < 0
    2650                 :      38683 :                 && reg_equivs
    2651                 :     209705 :                 && reg_equiv_constant (REGNO (new1)) != 0)
    2652                 :     171022 :               new1 = reg_equiv_constant (REGNO (new1));
    2653                 :      46204 :             else if (GET_CODE (new1) == PLUS && REG_P (new0)
    2654                 :       1305 :                      && REGNO (new0) >= FIRST_PSEUDO_REGISTER
    2655                 :       1305 :                      && reg_renumber[REGNO (new0)] < 0
    2656                 :     172129 :                      && reg_equiv_constant (REGNO (new0)) != 0)
    2657                 :     171022 :               new0 = reg_equiv_constant (REGNO (new0));
    2658                 :            : 
    2659                 :     171022 :             new_rtx = form_sum (GET_MODE (x), new0, new1);
    2660                 :            : 
    2661                 :            :             /* As above, if we are not inside a MEM we do not want to
    2662                 :            :                turn a PLUS into something else.  We might try to do so here
    2663                 :            :                for an addition of 0 if we aren't optimizing.  */
    2664                 :     171022 :             if (! mem_mode && GET_CODE (new_rtx) != PLUS)
    2665                 :         42 :               return gen_rtx_PLUS (GET_MODE (x), new_rtx, const0_rtx);
    2666                 :            :             else
    2667                 :            :               return new_rtx;
    2668                 :            :           }
    2669                 :            :       }
    2670                 :            :       return x;
    2671                 :            : 
    2672                 :     453370 :     case MULT:
    2673                 :            :       /* If this is the product of an eliminable register and a
    2674                 :            :          constant, apply the distribute law and move the constant out
    2675                 :            :          so that we have (plus (mult ..) ..).  This is needed in order
    2676                 :            :          to keep load-address insns valid.   This case is pathological.
    2677                 :            :          We ignore the possibility of overflow here.  */
    2678                 :     453370 :       if (REG_P (XEXP (x, 0))
    2679                 :     453370 :           && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
    2680                 :     453370 :           && CONST_INT_P (XEXP (x, 1)))
    2681                 :          0 :         for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
    2682                 :            :              ep++)
    2683                 :          0 :           if (ep->from_rtx == XEXP (x, 0) && ep->can_eliminate)
    2684                 :            :             {
    2685                 :          0 :               if (! mem_mode
    2686                 :            :                   /* Refs inside notes or in DEBUG_INSNs don't count for
    2687                 :            :                      this purpose.  */
    2688                 :          0 :                   && ! (insn != 0 && (GET_CODE (insn) == EXPR_LIST
    2689                 :          0 :                                       || GET_CODE (insn) == INSN_LIST
    2690                 :          0 :                                       || DEBUG_INSN_P (insn))))
    2691                 :          0 :                 ep->ref_outside_mem = 1;
    2692                 :            : 
    2693                 :          0 :               return
    2694                 :          0 :                 plus_constant (Pmode,
    2695                 :          0 :                                gen_rtx_MULT (Pmode, ep->to_rtx, XEXP (x, 1)),
    2696                 :          0 :                                ep->previous_offset * INTVAL (XEXP (x, 1)));
    2697                 :            :             }
    2698                 :            : 
    2699                 :            :       /* fall through */
    2700                 :            : 
    2701                 :     598429 :     case CALL:
    2702                 :     598429 :     case COMPARE:
    2703                 :            :     /* See comments before PLUS about handling MINUS.  */
    2704                 :     598429 :     case MINUS:
    2705                 :     598429 :     case DIV:      case UDIV:
    2706                 :     598429 :     case MOD:      case UMOD:
    2707                 :     598429 :     case AND:      case IOR:      case XOR:
    2708                 :     598429 :     case ROTATERT: case ROTATE:
    2709                 :     598429 :     case ASHIFTRT: case LSHIFTRT: case ASHIFT:
    2710                 :     598429 :     case NE:       case EQ:
    2711                 :     598429 :     case GE:       case GT:       case GEU:    case GTU:
    2712                 :     598429 :     case LE:       case LT:       case LEU:    case LTU:
    2713                 :     598429 :       {
    2714                 :     598429 :         rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false,
    2715                 :            :                                      for_costs);
    2716                 :     598429 :         rtx new1 = XEXP (x, 1)
    2717                 :     598429 :           ? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, false,
    2718                 :     598429 :                               for_costs) : 0;
    2719                 :            : 
    2720                 :     598429 :         if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
    2721                 :          0 :           return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
    2722                 :            :       }
    2723                 :            :       return x;
    2724                 :            : 
    2725                 :      14263 :     case EXPR_LIST:
    2726                 :            :       /* If we have something in XEXP (x, 0), the usual case, eliminate it.  */
    2727                 :      14263 :       if (XEXP (x, 0))
    2728                 :            :         {
    2729                 :      14263 :           new_rtx = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true,
    2730                 :            :                                       for_costs);
    2731                 :      14263 :           if (new_rtx != XEXP (x, 0))
    2732                 :            :             {
    2733                 :            :               /* If this is a REG_DEAD note, it is not valid anymore.
    2734                 :            :                  Using the eliminated version could result in creating a
    2735                 :            :                  REG_DEAD note for the stack or frame pointer.  */
    2736                 :          0 :               if (REG_NOTE_KIND (x) == REG_DEAD)
    2737                 :          0 :                 return (XEXP (x, 1)
    2738                 :          0 :                         ? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true,
    2739                 :            :                                             for_costs)
    2740                 :            :                         : NULL_RTX);
    2741                 :            : 
    2742                 :          0 :               x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
    2743                 :            :             }
    2744                 :            :         }
    2745                 :            : 
    2746                 :            :       /* fall through */
    2747                 :            : 
    2748                 :      14263 :     case INSN_LIST:
    2749                 :      14263 :     case INT_LIST:
    2750                 :            :       /* Now do eliminations in the rest of the chain.  If this was
    2751                 :            :          an EXPR_LIST, this might result in allocating more memory than is
    2752                 :            :          strictly needed, but it simplifies the code.  */
    2753                 :      14263 :       if (XEXP (x, 1))
    2754                 :            :         {
    2755                 :      14263 :           new_rtx = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true,
    2756                 :            :                                       for_costs);
    2757                 :      14263 :           if (new_rtx != XEXP (x, 1))
    2758                 :          0 :             return
    2759                 :          0 :               gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x), XEXP (x, 0), new_rtx);
    2760                 :            :         }
    2761                 :            :       return x;
    2762                 :            : 
    2763                 :            :     case PRE_INC:
    2764                 :            :     case POST_INC:
    2765                 :            :     case PRE_DEC:
    2766                 :            :     case POST_DEC:
    2767                 :            :       /* We do not support elimination of a register that is modified.
    2768                 :            :          elimination_effects has already make sure that this does not
    2769                 :            :          happen.  */
    2770                 :            :       return x;
    2771                 :            : 
    2772                 :      73145 :     case PRE_MODIFY:
    2773                 :      73145 :     case POST_MODIFY:
    2774                 :            :       /* We do not support elimination of a register that is modified.
    2775                 :            :          elimination_effects has already make sure that this does not
    2776                 :            :          happen.  The only remaining case we need to consider here is
    2777                 :            :          that the increment value may be an eliminable register.  */
    2778                 :      73145 :       if (GET_CODE (XEXP (x, 1)) == PLUS
    2779                 :      73145 :           && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
    2780                 :            :         {
    2781                 :      73145 :           rtx new_rtx = eliminate_regs_1 (XEXP (XEXP (x, 1), 1), mem_mode,
    2782                 :            :                                           insn, true, for_costs);
    2783                 :            : 
    2784                 :      73145 :           if (new_rtx != XEXP (XEXP (x, 1), 1))
    2785                 :          0 :             return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
    2786                 :            :                                    gen_rtx_PLUS (GET_MODE (x),
    2787                 :            :                                                  XEXP (x, 0), new_rtx));
    2788                 :            :         }
    2789                 :            :       return x;
    2790                 :            : 
    2791                 :      33603 :     case STRICT_LOW_PART:
    2792                 :      33603 :     case NEG:          case NOT:
    2793                 :      33603 :     case SIGN_EXTEND:  case ZERO_EXTEND:
    2794                 :      33603 :     case TRUNCATE:     case FLOAT_EXTEND: case FLOAT_TRUNCATE:
    2795                 :      33603 :     case FLOAT:        case FIX:
    2796                 :      33603 :     case UNSIGNED_FIX: case UNSIGNED_FLOAT:
    2797                 :      33603 :     case ABS:
    2798                 :      33603 :     case SQRT:
    2799                 :      33603 :     case FFS:
    2800                 :      33603 :     case CLZ:
    2801                 :      33603 :     case CTZ:
    2802                 :      33603 :     case POPCOUNT:
    2803                 :      33603 :     case PARITY:
    2804                 :      33603 :     case BSWAP:
    2805                 :      33603 :       new_rtx = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false,
    2806                 :            :                                   for_costs);
    2807                 :      33603 :       if (new_rtx != XEXP (x, 0))
    2808                 :          0 :         return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
    2809                 :            :       return x;
    2810                 :            : 
    2811                 :    1533290 :     case SUBREG:
    2812                 :            :       /* Similar to above processing, but preserve SUBREG_BYTE.
    2813                 :            :          Convert (subreg (mem)) to (mem) if not paradoxical.
    2814                 :            :          Also, if we have a non-paradoxical (subreg (pseudo)) and the
    2815                 :            :          pseudo didn't get a hard reg, we must replace this with the
    2816                 :            :          eliminated version of the memory location because push_reload
    2817                 :            :          may do the replacement in certain circumstances.  */
    2818                 :    1533290 :       if (REG_P (SUBREG_REG (x))
    2819                 :    1532780 :           && !paradoxical_subreg_p (x)
    2820                 :    1312970 :           && reg_equivs
    2821                 :    2846270 :           && reg_equiv_memory_loc (REGNO (SUBREG_REG (x))) != 0)
    2822                 :            :         {
    2823                 :            :           new_rtx = SUBREG_REG (x);
    2824                 :            :         }
    2825                 :            :       else
    2826                 :    1464180 :         new_rtx = eliminate_regs_1 (SUBREG_REG (x), mem_mode, insn, false, for_costs);
    2827                 :            : 
    2828                 :    1533290 :       if (new_rtx != SUBREG_REG (x))
    2829                 :            :         {
    2830                 :        110 :           poly_int64 x_size = GET_MODE_SIZE (GET_MODE (x));
    2831                 :        110 :           poly_int64 new_size = GET_MODE_SIZE (GET_MODE (new_rtx));
    2832                 :            : 
    2833                 :         55 :           if (MEM_P (new_rtx)
    2834                 :         55 :               && ((partial_subreg_p (GET_MODE (x), GET_MODE (new_rtx))
    2835                 :            :                    /* On RISC machines, combine can create rtl of the form
    2836                 :            :                       (set (subreg:m1 (reg:m2 R) 0) ...)
    2837                 :            :                       where m1 < m2, and expects something interesting to
    2838                 :            :                       happen to the entire word.  Moreover, it will use the
    2839                 :            :                       (reg:m2 R) later, expecting all bits to be preserved.
    2840                 :            :                       So if the number of words is the same, preserve the
    2841                 :            :                       subreg so that push_reload can see it.  */
    2842                 :            :                    && !(WORD_REGISTER_OPERATIONS
    2843                 :            :                         && known_equal_after_align_down (x_size - 1,
    2844                 :            :                                                          new_size - 1,
    2845                 :            :                                                          UNITS_PER_WORD)))
    2846                 :          0 :                   || known_eq (x_size, new_size))
    2847                 :            :               )
    2848                 :          0 :             return adjust_address_nv (new_rtx, GET_MODE (x), SUBREG_BYTE (x));
    2849                 :         55 :           else if (insn && GET_CODE (insn) == DEBUG_INSN)
    2850                 :          0 :             return gen_rtx_raw_SUBREG (GET_MODE (x), new_rtx, SUBREG_BYTE (x));
    2851                 :            :           else
    2852                 :         55 :             return gen_rtx_SUBREG (GET_MODE (x), new_rtx, SUBREG_BYTE (x));
    2853                 :            :         }
    2854                 :            : 
    2855                 :            :       return x;
    2856                 :            : 
    2857                 :   18295900 :     case MEM:
    2858                 :            :       /* Our only special processing is to pass the mode of the MEM to our
    2859                 :            :          recursive call and copy the flags.  While we are here, handle this
    2860                 :            :          case more efficiently.  */
    2861                 :            : 
    2862                 :   18295900 :       new_rtx = eliminate_regs_1 (XEXP (x, 0), GET_MODE (x), insn, true,
    2863                 :            :                                   for_costs);
    2864                 :   18295900 :       if (for_costs
    2865                 :   18293300 :           && memory_address_p (GET_MODE (x), XEXP (x, 0))
    2866                 :   34388000 :           && !memory_address_p (GET_MODE (x), new_rtx))
    2867                 :         72 :         note_reg_elim_costly (XEXP (x, 0), insn);
    2868                 :            : 
    2869                 :   18295900 :       return replace_equiv_address_nv (x, new_rtx);
    2870                 :            : 
    2871                 :          0 :     case USE:
    2872                 :            :       /* Handle insn_list USE that a call to a pure function may generate.  */
    2873                 :          0 :       new_rtx = eliminate_regs_1 (XEXP (x, 0), VOIDmode, insn, false,
    2874                 :            :                                   for_costs);
    2875                 :          0 :       if (new_rtx != XEXP (x, 0))
    2876                 :          0 :         return gen_rtx_USE (GET_MODE (x), new_rtx);
    2877                 :            :       return x;
    2878                 :            : 
    2879                 :          0 :     case CLOBBER:
    2880                 :          0 :     case ASM_OPERANDS:
    2881                 :          0 :       gcc_assert (insn && DEBUG_INSN_P (insn));
    2882                 :            :       break;
    2883                 :            : 
    2884                 :          0 :     case SET:
    2885                 :          0 :       gcc_unreachable ();
    2886                 :            : 
    2887                 :            :     default:
    2888                 :            :       break;
    2889                 :            :     }
    2890                 :            : 
    2891                 :            :   /* Process each of our operands recursively.  If any have changed, make a
    2892                 :            :      copy of the rtx.  */
    2893                 :     130933 :   fmt = GET_RTX_FORMAT (code);
    2894                 :     158696 :   for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
    2895                 :            :     {
    2896                 :      27763 :       if (*fmt == 'e')
    2897                 :            :         {
    2898                 :       1002 :           new_rtx = eliminate_regs_1 (XEXP (x, i), mem_mode, insn, false,
    2899                 :            :                                       for_costs);
    2900                 :       1002 :           if (new_rtx != XEXP (x, i) && ! copied)
    2901                 :            :             {
    2902                 :          0 :               x = shallow_copy_rtx (x);
    2903                 :          0 :               copied = 1;
    2904                 :            :             }
    2905                 :       1002 :           XEXP (x, i) = new_rtx;
    2906                 :            :         }
    2907                 :      26761 :       else if (*fmt == 'E')
    2908                 :            :         {
    2909                 :            :           int copied_vec = 0;
    2910                 :      23669 :           for (j = 0; j < XVECLEN (x, i); j++)
    2911                 :            :             {
    2912                 :      14768 :               new_rtx = eliminate_regs_1 (XVECEXP (x, i, j), mem_mode, insn, false,
    2913                 :            :                                           for_costs);
    2914                 :      14768 :               if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
    2915                 :            :                 {
    2916                 :          0 :                   rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
    2917                 :          0 :                                              XVEC (x, i)->elem);
    2918                 :          0 :                   if (! copied)
    2919                 :            :                     {
    2920                 :          0 :                       x = shallow_copy_rtx (x);
    2921                 :          0 :                       copied = 1;
    2922                 :            :                     }
    2923                 :          0 :                   XVEC (x, i) = new_v;
    2924                 :          0 :                   copied_vec = 1;
    2925                 :            :                 }
    2926                 :      14768 :               XVECEXP (x, i, j) = new_rtx;
    2927                 :            :             }
    2928                 :            :         }
    2929                 :            :     }
    2930                 :            : 
    2931                 :            :   return x;
    2932                 :            : }
    2933                 :            : 
    2934                 :            : rtx
    2935                 :     345960 : eliminate_regs (rtx x, machine_mode mem_mode, rtx insn)
    2936                 :            : {
    2937                 :     345960 :   if (reg_eliminate == NULL)
    2938                 :            :     {
    2939                 :          0 :       gcc_assert (targetm.no_register_allocation);
    2940                 :            :       return x;
    2941                 :            :     }
    2942                 :     345960 :   return eliminate_regs_1 (x, mem_mode, insn, false, false);
    2943                 :            : }
    2944                 :            : 
    2945                 :            : /* Scan rtx X for modifications of elimination target registers.  Update
    2946                 :            :    the table of eliminables to reflect the changed state.  MEM_MODE is
    2947                 :            :    the mode of an enclosing MEM rtx, or VOIDmode if not within a MEM.  */
    2948                 :            : 
    2949                 :            : static void
    2950                 :  271924000 : elimination_effects (rtx x, machine_mode mem_mode)
    2951                 :            : {
    2952                 :  271924000 :   enum rtx_code code = GET_CODE (x);
    2953                 :  271924000 :   struct elim_table *ep;
    2954                 :  271924000 :   int regno;
    2955                 :  271924000 :   int i, j;
    2956                 :  271924000 :   const char *fmt;
    2957                 :            : 
    2958                 :  271924000 :   switch (code)
    2959                 :            :     {
    2960                 :            :     CASE_CONST_ANY:
    2961                 :            :     case CONST:
    2962                 :            :     case SYMBOL_REF:
    2963                 :            :     case CODE_LABEL:
    2964                 :            :     case PC:
    2965                 :            :     case CC0:
    2966                 :            :     case ASM_INPUT:
    2967                 :            :     case ADDR_VEC:
    2968                 :            :     case ADDR_DIFF_VEC:
    2969                 :            :     case RETURN:
    2970                 :            :       return;
    2971                 :            : 
    2972                 :   88515000 :     case REG:
    2973                 :   88515000 :       regno = REGNO (x);
    2974                 :            : 
    2975                 :            :       /* First handle the case where we encounter a bare register that
    2976                 :            :          is eliminable.  Replace it with a PLUS.  */
    2977                 :   88515000 :       if (regno < FIRST_PSEUDO_REGISTER)
    2978                 :            :         {
    2979                 :  180823000 :           for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
    2980                 :            :                ep++)
    2981                 :  150093000 :             if (ep->from_rtx == x && ep->can_eliminate)
    2982                 :            :               {
    2983                 :    8198680 :                 if (! mem_mode)
    2984                 :     460744 :                   ep->ref_outside_mem = 1;
    2985                 :    8198680 :                 return;
    2986                 :            :               }
    2987                 :            : 
    2988                 :            :         }
    2989                 :   49586500 :       else if (reg_renumber[regno] < 0
    2990                 :   49586500 :                && reg_equivs
    2991                 :   49586500 :                && reg_equiv_constant (regno)
    2992                 :   50338100 :                && ! function_invariant_p (reg_equiv_constant (regno)))
    2993                 :          0 :         elimination_effects (reg_equiv_constant (regno), mem_mode);
    2994                 :            :       return;
    2995                 :            : 
    2996                 :    2097180 :     case PRE_INC:
    2997                 :    2097180 :     case POST_INC:
    2998                 :    2097180 :     case PRE_DEC:
    2999                 :    2097180 :     case POST_DEC:
    3000                 :    2097180 :     case POST_MODIFY:
    3001                 :    2097180 :     case PRE_MODIFY:
    3002                 :            :       /* If we modify the source of an elimination rule, disable it.  */
    3003                 :   10485900 :       for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3004                 :    8388700 :         if (ep->from_rtx == XEXP (x, 0))
    3005                 :          0 :           ep->can_eliminate = 0;
    3006                 :            : 
    3007                 :            :       /* If we modify the target of an elimination rule by adding a constant,
    3008                 :            :          update its offset.  If we modify the target in any other way, we'll
    3009                 :            :          have to disable the rule as well.  */
    3010                 :   10485900 :       for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3011                 :    8388700 :         if (ep->to_rtx == XEXP (x, 0))
    3012                 :            :           {
    3013                 :    8388700 :             poly_int64 size = GET_MODE_SIZE (mem_mode);
    3014                 :            : 
    3015                 :            :             /* If more bytes than MEM_MODE are pushed, account for them.  */
    3016                 :            : #ifdef PUSH_ROUNDING
    3017                 :    4194350 :             if (ep->to_rtx == stack_pointer_rtx)
    3018                 :    4194350 :               size = PUSH_ROUNDING (size);
    3019                 :            : #endif
    3020                 :    4194350 :             if (code == PRE_DEC || code == POST_DEC)
    3021                 :    4048020 :               ep->offset += size;
    3022                 :     146332 :             else if (code == PRE_INC || code == POST_INC)
    3023                 :         42 :               ep->offset -= size;
    3024                 :     146290 :             else if (code == PRE_MODIFY || code == POST_MODIFY)
    3025                 :            :               {
    3026                 :     146290 :                 if (GET_CODE (XEXP (x, 1)) == PLUS
    3027                 :     146290 :                     && XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
    3028                 :     146290 :                     && CONST_INT_P (XEXP (XEXP (x, 1), 1)))
    3029                 :    8388700 :                   ep->offset -= INTVAL (XEXP (XEXP (x, 1), 1));
    3030                 :            :                 else
    3031                 :          0 :                   ep->can_eliminate = 0;
    3032                 :            :               }
    3033                 :            :           }
    3034                 :            : 
    3035                 :            :       /* These two aren't unary operators.  */
    3036                 :    2097180 :       if (code == POST_MODIFY || code == PRE_MODIFY)
    3037                 :            :         break;
    3038                 :            : 
    3039                 :            :       /* Fall through to generic unary operation case.  */
    3040                 :    3129940 :       gcc_fallthrough ();
    3041                 :    3129940 :     case STRICT_LOW_PART:
    3042                 :    3129940 :     case NEG:          case NOT:
    3043                 :    3129940 :     case SIGN_EXTEND:  case ZERO_EXTEND:
    3044                 :    3129940 :     case TRUNCATE:     case FLOAT_EXTEND: case FLOAT_TRUNCATE:
    3045                 :    3129940 :     case FLOAT:        case FIX:
    3046                 :    3129940 :     case UNSIGNED_FIX: case UNSIGNED_FLOAT:
    3047                 :    3129940 :     case ABS:
    3048                 :    3129940 :     case SQRT:
    3049                 :    3129940 :     case FFS:
    3050                 :    3129940 :     case CLZ:
    3051                 :    3129940 :     case CTZ:
    3052                 :    3129940 :     case POPCOUNT:
    3053                 :    3129940 :     case PARITY:
    3054                 :    3129940 :     case BSWAP:
    3055                 :    3129940 :       elimination_effects (XEXP (x, 0), mem_mode);
    3056                 :    3129940 :       return;
    3057                 :            : 
    3058                 :    1547910 :     case SUBREG:
    3059                 :    1547910 :       if (REG_P (SUBREG_REG (x))
    3060                 :    1546760 :           && !paradoxical_subreg_p (x)
    3061                 :    1326840 :           && reg_equivs
    3062                 :    2874750 :           && reg_equiv_memory_loc (REGNO (SUBREG_REG (x))) != 0)
    3063                 :            :         return;
    3064                 :            : 
    3065                 :    1478540 :       elimination_effects (SUBREG_REG (x), mem_mode);
    3066                 :    1478540 :       return;
    3067                 :            : 
    3068                 :     117188 :     case USE:
    3069                 :            :       /* If using a register that is the source of an eliminate we still
    3070                 :            :          think can be performed, note it cannot be performed since we don't
    3071                 :            :          know how this register is used.  */
    3072                 :     585940 :       for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3073                 :     468752 :         if (ep->from_rtx == XEXP (x, 0))
    3074                 :          0 :           ep->can_eliminate = 0;
    3075                 :            : 
    3076                 :     117188 :       elimination_effects (XEXP (x, 0), mem_mode);
    3077                 :     117188 :       return;
    3078                 :            : 
    3079                 :    6196330 :     case CLOBBER:
    3080                 :            :       /* If clobbering a register that is the replacement register for an
    3081                 :            :          elimination we still think can be performed, note that it cannot
    3082                 :            :          be performed.  Otherwise, we need not be concerned about it.  */
    3083                 :   30981600 :       for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3084                 :   24785300 :         if (ep->to_rtx == XEXP (x, 0))
    3085                 :       2564 :           ep->can_eliminate = 0;
    3086                 :            : 
    3087                 :    6196330 :       elimination_effects (XEXP (x, 0), mem_mode);
    3088                 :    6196330 :       return;
    3089                 :            : 
    3090                 :   48279300 :     case SET:
    3091                 :            :       /* Check for setting a register that we know about.  */
    3092                 :   48279300 :       if (REG_P (SET_DEST (x)))
    3093                 :            :         {
    3094                 :            :           /* See if this is setting the replacement register for an
    3095                 :            :              elimination.
    3096                 :            : 
    3097                 :            :              If DEST is the hard frame pointer, we do nothing because we
    3098                 :            :              assume that all assignments to the frame pointer are for
    3099                 :            :              non-local gotos and are being done at a time when they are valid
    3100                 :            :              and do not disturb anything else.  Some machines want to
    3101                 :            :              eliminate a fake argument pointer (or even a fake frame pointer)
    3102                 :            :              with either the real frame or the stack pointer.  Assignments to
    3103                 :            :              the hard frame pointer must not prevent this elimination.  */
    3104                 :            : 
    3105                 :  165426000 :           for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
    3106                 :            :                ep++)
    3107                 :  132341000 :             if (ep->to_rtx == SET_DEST (x)
    3108                 :    2931610 :                 && SET_DEST (x) != hard_frame_pointer_rtx)
    3109                 :            :               {
    3110                 :            :                 /* If it is being incremented, adjust the offset.  Otherwise,
    3111                 :            :                    this elimination can't be done.  */
    3112                 :    2929890 :                 rtx src = SET_SRC (x);
    3113                 :            : 
    3114                 :    2929890 :                 if (GET_CODE (src) == PLUS
    3115                 :    2904910 :                     && XEXP (src, 0) == SET_DEST (x)
    3116                 :    2904910 :                     && CONST_INT_P (XEXP (src, 1)))
    3117                 :  132341000 :                   ep->offset -= INTVAL (XEXP (src, 1));
    3118                 :            :                 else
    3119                 :      24980 :                   ep->can_eliminate = 0;
    3120                 :            :               }
    3121                 :            :         }
    3122                 :            : 
    3123                 :   48279300 :       elimination_effects (SET_DEST (x), VOIDmode);
    3124                 :   48279300 :       elimination_effects (SET_SRC (x), VOIDmode);
    3125                 :   48279300 :       return;
    3126                 :            : 
    3127                 :   22489000 :     case MEM:
    3128                 :            :       /* Our only special processing is to pass the mode of the MEM to our
    3129                 :            :          recursive call.  */
    3130                 :   22489000 :       elimination_effects (XEXP (x, 0), GET_MODE (x));
    3131                 :   22489000 :       return;
    3132                 :            : 
    3133                 :            :     default:
    3134                 :            :       break;
    3135                 :            :     }
    3136                 :            : 
    3137                 :   49252500 :   fmt = GET_RTX_FORMAT (code);
    3138                 :  139879000 :   for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
    3139                 :            :     {
    3140                 :   90626100 :       if (*fmt == 'e')
    3141                 :   76058100 :         elimination_effects (XEXP (x, i), mem_mode);
    3142                 :   14568000 :       else if (*fmt == 'E')
    3143                 :   22934900 :         for (j = 0; j < XVECLEN (x, i); j++)
    3144                 :   15165400 :           elimination_effects (XVECEXP (x, i, j), mem_mode);
    3145                 :            :     }
    3146                 :            : }
    3147                 :            : 
    3148                 :            : /* Descend through rtx X and verify that no references to eliminable registers
    3149                 :            :    remain.  If any do remain, mark the involved register as not
    3150                 :            :    eliminable.  */
    3151                 :            : 
    3152                 :            : static void
    3153                 :  225471000 : check_eliminable_occurrences (rtx x)
    3154                 :            : {
    3155                 :  225471000 :   const char *fmt;
    3156                 :  225471000 :   int i;
    3157                 :  225471000 :   enum rtx_code code;
    3158                 :            : 
    3159                 :  225471000 :   if (x == 0)
    3160                 :            :     return;
    3161                 :            : 
    3162                 :  126235000 :   code = GET_CODE (x);
    3163                 :            : 
    3164                 :  126235000 :   if (code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
    3165                 :            :     {
    3166                 :   14695000 :       struct elim_table *ep;
    3167                 :            : 
    3168                 :   73474800 :       for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3169                 :   58779900 :         if (ep->from_rtx == x)
    3170                 :          0 :           ep->can_eliminate = 0;
    3171                 :            :       return;
    3172                 :            :     }
    3173                 :            : 
    3174                 :  111540000 :   fmt = GET_RTX_FORMAT (code);
    3175                 :  295624000 :   for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
    3176                 :            :     {
    3177                 :  184084000 :       if (*fmt == 'e')
    3178                 :  159569000 :         check_eliminable_occurrences (XEXP (x, i));
    3179                 :   24515400 :       else if (*fmt == 'E')
    3180                 :            :         {
    3181                 :            :           int j;
    3182                 :   22935600 :           for (j = 0; j < XVECLEN (x, i); j++)
    3183                 :   15171600 :             check_eliminable_occurrences (XVECEXP (x, i, j));
    3184                 :            :         }
    3185                 :            :     }
    3186                 :            : }
    3187                 :            : 
    3188                 :            : /* Scan INSN and eliminate all eliminable registers in it.
    3189                 :            : 
    3190                 :            :    If REPLACE is nonzero, do the replacement destructively.  Also
    3191                 :            :    delete the insn as dead it if it is setting an eliminable register.
    3192                 :            : 
    3193                 :            :    If REPLACE is zero, do all our allocations in reload_obstack.
    3194                 :            : 
    3195                 :            :    If no eliminations were done and this insn doesn't require any elimination
    3196                 :            :    processing (these are not identical conditions: it might be updating sp,
    3197                 :            :    but not referencing fp; this needs to be seen during reload_as_needed so
    3198                 :            :    that the offset between fp and sp can be taken into consideration), zero
    3199                 :            :    is returned.  Otherwise, 1 is returned.  */
    3200                 :            : 
    3201                 :            : static int
    3202                 :          0 : eliminate_regs_in_insn (rtx_insn *insn, int replace)
    3203                 :            : {
    3204                 :          0 :   int icode = recog_memoized (insn);
    3205                 :          0 :   rtx old_body = PATTERN (insn);
    3206                 :          0 :   int insn_is_asm = asm_noperands (old_body) >= 0;
    3207                 :          0 :   rtx old_set = single_set (insn);
    3208                 :          0 :   rtx new_body;
    3209                 :          0 :   int val = 0;
    3210                 :          0 :   int i;
    3211                 :          0 :   rtx substed_operand[MAX_RECOG_OPERANDS];
    3212                 :          0 :   rtx orig_operand[MAX_RECOG_OPERANDS];
    3213                 :          0 :   struct elim_table *ep;
    3214                 :          0 :   rtx plus_src, plus_cst_src;
    3215                 :            : 
    3216                 :          0 :   if (! insn_is_asm && icode < 0)
    3217                 :            :     {
    3218                 :          0 :       gcc_assert (DEBUG_INSN_P (insn)
    3219                 :            :                   || GET_CODE (PATTERN (insn)) == USE
    3220                 :            :                   || GET_CODE (PATTERN (insn)) == CLOBBER
    3221                 :            :                   || GET_CODE (PATTERN (insn)) == ASM_INPUT);
    3222                 :          0 :       if (DEBUG_BIND_INSN_P (insn))
    3223                 :          0 :         INSN_VAR_LOCATION_LOC (insn)
    3224                 :          0 :           = eliminate_regs (INSN_VAR_LOCATION_LOC (insn), VOIDmode, insn);
    3225                 :          0 :       return 0;
    3226                 :            :     }
    3227                 :            : 
    3228                 :            :   /* We allow one special case which happens to work on all machines we
    3229                 :            :      currently support: a single set with the source or a REG_EQUAL
    3230                 :            :      note being a PLUS of an eliminable register and a constant.  */
    3231                 :          0 :   plus_src = plus_cst_src = 0;
    3232                 :          0 :   if (old_set && REG_P (SET_DEST (old_set)))
    3233                 :            :     {
    3234                 :          0 :       if (GET_CODE (SET_SRC (old_set)) == PLUS)
    3235                 :          0 :         plus_src = SET_SRC (old_set);
    3236                 :            :       /* First see if the source is of the form (plus (...) CST).  */
    3237                 :          0 :       if (plus_src
    3238                 :          0 :           && CONST_INT_P (XEXP (plus_src, 1)))
    3239                 :            :         plus_cst_src = plus_src;
    3240                 :          0 :       else if (REG_P (SET_SRC (old_set))
    3241                 :          0 :                || plus_src)
    3242                 :            :         {
    3243                 :            :           /* Otherwise, see if we have a REG_EQUAL note of the form
    3244                 :            :              (plus (...) CST).  */
    3245                 :          0 :           rtx links;
    3246                 :          0 :           for (links = REG_NOTES (insn); links; links = XEXP (links, 1))
    3247                 :            :             {
    3248                 :          0 :               if ((REG_NOTE_KIND (links) == REG_EQUAL
    3249                 :          0 :                    || REG_NOTE_KIND (links) == REG_EQUIV)
    3250                 :          0 :                   && GET_CODE (XEXP (links, 0)) == PLUS
    3251                 :          0 :                   && CONST_INT_P (XEXP (XEXP (links, 0), 1)))
    3252                 :            :                 {
    3253                 :            :                   plus_cst_src = XEXP (links, 0);
    3254                 :            :                   break;
    3255                 :            :                 }
    3256                 :            :             }
    3257                 :            :         }
    3258                 :            : 
    3259                 :            :       /* Check that the first operand of the PLUS is a hard reg or
    3260                 :            :          the lowpart subreg of one.  */
    3261                 :          0 :       if (plus_cst_src)
    3262                 :            :         {
    3263                 :          0 :           rtx reg = XEXP (plus_cst_src, 0);
    3264                 :          0 :           if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
    3265                 :          0 :             reg = SUBREG_REG (reg);
    3266                 :            : 
    3267                 :          0 :           if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
    3268                 :            :             plus_cst_src = 0;
    3269                 :            :         }
    3270                 :            :     }
    3271                 :          0 :   if (plus_cst_src)
    3272                 :            :     {
    3273                 :          0 :       rtx reg = XEXP (plus_cst_src, 0);
    3274                 :          0 :       poly_int64 offset = INTVAL (XEXP (plus_cst_src, 1));
    3275                 :            : 
    3276                 :          0 :       if (GET_CODE (reg) == SUBREG)
    3277                 :          0 :         reg = SUBREG_REG (reg);
    3278                 :            : 
    3279                 :          0 :       for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3280                 :          0 :         if (ep->from_rtx == reg && ep->can_eliminate)
    3281                 :            :           {
    3282                 :          0 :             rtx to_rtx = ep->to_rtx;
    3283                 :          0 :             offset += ep->offset;
    3284                 :          0 :             offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
    3285                 :            : 
    3286                 :          0 :             if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
    3287                 :          0 :               to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)),
    3288                 :            :                                     to_rtx);
    3289                 :            :             /* If we have a nonzero offset, and the source is already
    3290                 :            :                a simple REG, the following transformation would
    3291                 :            :                increase the cost of the insn by replacing a simple REG
    3292                 :            :                with (plus (reg sp) CST).  So try only when we already
    3293                 :            :                had a PLUS before.  */
    3294                 :          0 :             if (known_eq (offset, 0) || plus_src)
    3295                 :            :               {
    3296                 :          0 :                 rtx new_src = plus_constant (GET_MODE (to_rtx),
    3297                 :            :                                              to_rtx, offset);
    3298                 :            : 
    3299                 :          0 :                 new_body = old_body;
    3300                 :          0 :                 if (! replace)
    3301                 :            :                   {
    3302                 :          0 :                     new_body = copy_insn (old_body);
    3303                 :          0 :                     if (REG_NOTES (insn))
    3304                 :          0 :                       REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn));
    3305                 :            :                   }
    3306                 :          0 :                 PATTERN (insn) = new_body;
    3307                 :          0 :                 old_set = single_set (insn);
    3308                 :            : 
    3309                 :            :                 /* First see if this insn remains valid when we make the
    3310                 :            :                    change.  If not, try to replace the whole pattern with
    3311                 :            :                    a simple set (this may help if the original insn was a
    3312                 :            :                    PARALLEL that was only recognized as single_set due to
    3313                 :            :                    REG_UNUSED notes).  If this isn't valid either, keep
    3314                 :            :                    the INSN_CODE the same and let reload fix it up.  */
    3315                 :          0 :                 if (!validate_change (insn, &SET_SRC (old_set), new_src, 0))
    3316                 :            :                   {
    3317                 :          0 :                     rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src);
    3318                 :            : 
    3319                 :          0 :                     if (!validate_change (insn, &PATTERN (insn), new_pat, 0))
    3320                 :          0 :                       SET_SRC (old_set) = new_src;
    3321                 :            :                   }
    3322                 :            :               }
    3323                 :            :             else
    3324                 :            :               break;
    3325                 :            : 
    3326                 :          0 :             val = 1;
    3327                 :            :             /* This can't have an effect on elimination offsets, so skip right
    3328                 :            :                to the end.  */
    3329                 :          0 :             goto done;
    3330                 :            :           }
    3331                 :            :     }
    3332                 :            : 
    3333                 :            :   /* Determine the effects of this insn on elimination offsets.  */
    3334                 :          0 :   elimination_effects (old_body, VOIDmode);
    3335                 :            : 
    3336                 :            :   /* Eliminate all eliminable registers occurring in operands that
    3337                 :            :      can be handled by reload.  */
    3338                 :          0 :   extract_insn (insn);
    3339                 :          0 :   for (i = 0; i < recog_data.n_operands; i++)
    3340                 :            :     {
    3341                 :          0 :       orig_operand[i] = recog_data.operand[i];
    3342                 :          0 :       substed_operand[i] = recog_data.operand[i];
    3343                 :            : 
    3344                 :            :       /* For an asm statement, every operand is eliminable.  */
    3345                 :          0 :       if (insn_is_asm || insn_data[icode].operand[i].eliminable)
    3346                 :            :         {
    3347                 :          0 :           bool is_set_src, in_plus;
    3348                 :            : 
    3349                 :            :           /* Check for setting a register that we know about.  */
    3350                 :          0 :           if (recog_data.operand_type[i] != OP_IN
    3351                 :          0 :               && REG_P (orig_operand[i]))
    3352                 :            :             {
    3353                 :            :               /* If we are assigning to a register that can be eliminated, it
    3354                 :            :                  must be as part of a PARALLEL, since the code above handles
    3355                 :            :                  single SETs.  We must indicate that we can no longer
    3356                 :            :                  eliminate this reg.  */
    3357                 :          0 :               for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
    3358                 :            :                    ep++)
    3359                 :          0 :                 if (ep->from_rtx == orig_operand[i])
    3360                 :          0 :                   ep->can_eliminate = 0;
    3361                 :            :             }
    3362                 :            : 
    3363                 :            :           /* Companion to the above plus substitution, we can allow
    3364                 :            :              invariants as the source of a plain move.  */
    3365                 :          0 :           is_set_src = false;
    3366                 :          0 :           if (old_set
    3367                 :          0 :               && recog_data.operand_loc[i] == &SET_SRC (old_set))
    3368                 :          0 :             is_set_src = true;
    3369                 :          0 :           in_plus = false;
    3370                 :          0 :           if (plus_src
    3371                 :          0 :               && (recog_data.operand_loc[i] == &XEXP (plus_src, 0)
    3372                 :          0 :                   || recog_data.operand_loc[i] == &XEXP (plus_src, 1)))
    3373                 :          0 :             in_plus = true;
    3374                 :            : 
    3375                 :          0 :           substed_operand[i]
    3376                 :          0 :             = eliminate_regs_1 (recog_data.operand[i], VOIDmode,
    3377                 :            :                                 replace ? insn : NULL_RTX,
    3378                 :          0 :                                 is_set_src || in_plus, false);
    3379                 :          0 :           if (substed_operand[i] != orig_operand[i])
    3380                 :          0 :             val = 1;
    3381                 :            :           /* Terminate the search in check_eliminable_occurrences at
    3382                 :            :              this point.  */
    3383                 :          0 :           *recog_data.operand_loc[i] = 0;
    3384                 :            : 
    3385                 :            :           /* If an output operand changed from a REG to a MEM and INSN is an
    3386                 :            :              insn, write a CLOBBER insn.  */
    3387                 :          0 :           if (recog_data.operand_type[i] != OP_IN
    3388                 :          0 :               && REG_P (orig_operand[i])
    3389                 :          0 :               && MEM_P (substed_operand[i])
    3390                 :          0 :               && replace)
    3391                 :          0 :             emit_insn_after (gen_clobber (orig_operand[i]), insn);
    3392                 :            :         }
    3393                 :            :     }
    3394                 :            : 
    3395                 :          0 :   for (i = 0; i < recog_data.n_dups; i++)
    3396                 :          0 :     *recog_data.dup_loc[i]
    3397                 :          0 :       = *recog_data.operand_loc[(int) recog_data.dup_num[i]];
    3398                 :            : 
    3399                 :            :   /* If any eliminable remain, they aren't eliminable anymore.  */
    3400                 :          0 :   check_eliminable_occurrences (old_body);
    3401                 :            : 
    3402                 :            :   /* Substitute the operands; the new values are in the substed_operand
    3403                 :            :      array.  */
    3404                 :          0 :   for (i = 0; i < recog_data.n_operands; i++)
    3405                 :          0 :     *recog_data.operand_loc[i] = substed_operand[i];
    3406                 :          0 :   for (i = 0; i < recog_data.n_dups; i++)
    3407                 :          0 :     *recog_data.dup_loc[i] = substed_operand[(int) recog_data.dup_num[i]];
    3408                 :            : 
    3409                 :            :   /* If we are replacing a body that was a (set X (plus Y Z)), try to
    3410                 :            :      re-recognize the insn.  We do this in case we had a simple addition
    3411                 :            :      but now can do this as a load-address.  This saves an insn in this
    3412                 :            :      common case.
    3413                 :            :      If re-recognition fails, the old insn code number will still be used,
    3414                 :            :      and some register operands may have changed into PLUS expressions.
    3415                 :            :      These will be handled by find_reloads by loading them into a register
    3416                 :            :      again.  */
    3417                 :            : 
    3418                 :          0 :   if (val)
    3419                 :            :     {
    3420                 :            :       /* If we aren't replacing things permanently and we changed something,
    3421                 :            :          make another copy to ensure that all the RTL is new.  Otherwise
    3422                 :            :          things can go wrong if find_reload swaps commutative operands
    3423                 :            :          and one is inside RTL that has been copied while the other is not.  */
    3424                 :          0 :       new_body = old_body;
    3425                 :          0 :       if (! replace)
    3426                 :            :         {
    3427                 :          0 :           new_body = copy_insn (old_body);
    3428                 :          0 :           if (REG_NOTES (insn))
    3429                 :          0 :             REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn));
    3430                 :            :         }
    3431                 :          0 :       PATTERN (insn) = new_body;
    3432                 :            : 
    3433                 :            :       /* If we had a move insn but now we don't, rerecognize it.  This will
    3434                 :            :          cause spurious re-recognition if the old move had a PARALLEL since
    3435                 :            :          the new one still will, but we can't call single_set without
    3436                 :            :          having put NEW_BODY into the insn and the re-recognition won't
    3437                 :            :          hurt in this rare case.  */
    3438                 :            :       /* ??? Why this huge if statement - why don't we just rerecognize the
    3439                 :            :          thing always?  */
    3440                 :          0 :       if (! insn_is_asm
    3441                 :          0 :           && old_set != 0
    3442                 :          0 :           && ((REG_P (SET_SRC (old_set))
    3443                 :          0 :                && (GET_CODE (new_body) != SET
    3444                 :          0 :                    || !REG_P (SET_SRC (new_body))))
    3445                 :            :               /* If this was a load from or store to memory, compare
    3446                 :            :                  the MEM in recog_data.operand to the one in the insn.
    3447                 :            :                  If they are not equal, then rerecognize the insn.  */
    3448                 :            :               || (old_set != 0
    3449                 :          0 :                   && ((MEM_P (SET_SRC (old_set))
    3450                 :          0 :                        && SET_SRC (old_set) != recog_data.operand[1])
    3451                 :          0 :                       || (MEM_P (SET_DEST (old_set))
    3452                 :          0 :                           && SET_DEST (old_set) != recog_data.operand[0])))
    3453                 :            :               /* If this was an add insn before, rerecognize.  */
    3454                 :          0 :               || GET_CODE (SET_SRC (old_set)) == PLUS))
    3455                 :            :         {
    3456                 :          0 :           int new_icode = recog (PATTERN (insn), insn, 0);
    3457                 :          0 :           if (new_icode >= 0)
    3458                 :          0 :             INSN_CODE (insn) = new_icode;
    3459                 :            :         }
    3460                 :            :     }
    3461                 :            : 
    3462                 :            :   /* Restore the old body.  If there were any changes to it, we made a copy
    3463                 :            :      of it while the changes were still in place, so we'll correctly return
    3464                 :            :      a modified insn below.  */
    3465                 :          0 :   if (! replace)
    3466                 :            :     {
    3467                 :            :       /* Restore the old body.  */
    3468                 :          0 :       for (i = 0; i < recog_data.n_operands; i++)
    3469                 :            :         /* Restoring a top-level match_parallel would clobber the new_body
    3470                 :            :            we installed in the insn.  */
    3471                 :          0 :         if (recog_data.operand_loc[i] != &PATTERN (insn))
    3472                 :          0 :           *recog_data.operand_loc[i] = orig_operand[i];
    3473                 :          0 :       for (i = 0; i < recog_data.n_dups; i++)
    3474                 :          0 :         *recog_data.dup_loc[i] = orig_operand[(int) recog_data.dup_num[i]];
    3475                 :            :     }
    3476                 :            : 
    3477                 :            :   /* Update all elimination pairs to reflect the status after the current
    3478                 :            :      insn.  The changes we make were determined by the earlier call to
    3479                 :            :      elimination_effects.
    3480                 :            : 
    3481                 :            :      We also detect cases where register elimination cannot be done,
    3482                 :            :      namely, if a register would be both changed and referenced outside a MEM
    3483                 :            :      in the resulting insn since such an insn is often undefined and, even if
    3484                 :            :      not, we cannot know what meaning will be given to it.  Note that it is
    3485                 :            :      valid to have a register used in an address in an insn that changes it
    3486                 :            :      (presumably with a pre- or post-increment or decrement).
    3487                 :            : 
    3488                 :            :      If anything changes, return nonzero.  */
    3489                 :            : 
    3490                 :          0 :   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3491                 :            :     {
    3492                 :          0 :       if (maybe_ne (ep->previous_offset, ep->offset) && ep->ref_outside_mem)
    3493                 :          0 :         ep->can_eliminate = 0;
    3494                 :            : 
    3495                 :          0 :       ep->ref_outside_mem = 0;
    3496                 :            : 
    3497                 :          0 :       if (maybe_ne (ep->previous_offset, ep->offset))
    3498                 :          0 :         val = 1;
    3499                 :            :     }
    3500                 :            : 
    3501                 :          0 :  done:
    3502                 :            :   /* If we changed something, perform elimination in REG_NOTES.  This is
    3503                 :            :      needed even when REPLACE is zero because a REG_DEAD note might refer
    3504                 :            :      to a register that we eliminate and could cause a different number
    3505                 :            :      of spill registers to be needed in the final reload pass than in
    3506                 :            :      the pre-passes.  */
    3507                 :          0 :   if (val && REG_NOTES (insn) != 0)
    3508                 :          0 :     REG_NOTES (insn)
    3509                 :          0 :       = eliminate_regs_1 (REG_NOTES (insn), VOIDmode, REG_NOTES (insn), true,
    3510                 :            :                           false);
    3511                 :            : 
    3512                 :            :   return val;
    3513                 :            : }
    3514                 :            : 
    3515                 :            : /* Like eliminate_regs_in_insn, but only estimate costs for the use of the
    3516                 :            :    register allocator.  INSN is the instruction we need to examine, we perform
    3517                 :            :    eliminations in its operands and record cases where eliminating a reg with
    3518                 :            :    an invariant equivalence would add extra cost.  */
    3519                 :            : 
    3520                 :            : #pragma GCC diagnostic push
    3521                 :            : #pragma GCC diagnostic warning "-Wmaybe-uninitialized"
    3522                 :            : static void
    3523                 :   79290900 : elimination_costs_in_insn (rtx_insn *insn)
    3524                 :            : {
    3525                 :   79290900 :   int icode = recog_memoized (insn);
    3526                 :   79290900 :   rtx old_body = PATTERN (insn);
    3527                 :   79290900 :   int insn_is_asm = asm_noperands (old_body) >= 0;
    3528                 :   79290900 :   rtx old_set = single_set (insn);
    3529                 :   79290900 :   int i;
    3530                 :   79290900 :   rtx orig_operand[MAX_RECOG_OPERANDS];
    3531                 :   79290900 :   rtx orig_dup[MAX_RECOG_OPERANDS];
    3532                 :   79290900 :   struct elim_table *ep;
    3533                 :   79290900 :   rtx plus_src, plus_cst_src;
    3534                 :   79290900 :   bool sets_reg_p;
    3535                 :            : 
    3536                 :   79290900 :   if (! insn_is_asm && icode < 0)
    3537                 :            :     {
    3538                 :   28560100 :       gcc_assert (DEBUG_INSN_P (insn)
    3539                 :            :                   || GET_CODE (PATTERN (insn)) == USE
    3540                 :            :                   || GET_CODE (PATTERN (insn)) == CLOBBER
    3541                 :            :                   || GET_CODE (PATTERN (insn)) == ASM_INPUT);
    3542                 :            :       return;
    3543                 :            :     }
    3544                 :            : 
    3545                 :   47633800 :   if (old_set != 0 && REG_P (SET_DEST (old_set))
    3546                 :   83225400 :       && REGNO (SET_DEST (old_set)) < FIRST_PSEUDO_REGISTER)
    3547                 :            :     {
    3548                 :            :       /* Check for setting an eliminable register.  */
    3549                 :   69468600 :       for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3550                 :   55574900 :         if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate)
    3551                 :            :           return;
    3552                 :            :     }
    3553                 :            : 
    3554                 :            :   /* We allow one special case which happens to work on all machines we
    3555                 :            :      currently support: a single set with the source or a REG_EQUAL
    3556                 :            :      note being a PLUS of an eliminable register and a constant.  */
    3557                 :   50730700 :   plus_src = plus_cst_src = 0;
    3558                 :   50730700 :   sets_reg_p = false;
    3559                 :   50730700 :   if (old_set && REG_P (SET_DEST (old_set)))
    3560                 :            :     {
    3561                 :   32494700 :       sets_reg_p = true;
    3562                 :   32494700 :       if (GET_CODE (SET_SRC (old_set)) == PLUS)
    3563                 :    4410840 :         plus_src = SET_SRC (old_set);
    3564                 :            :       /* First see if the source is of the form (plus (...) CST).  */
    3565                 :    4410840 :       if (plus_src
    3566                 :    4410840 :           && CONST_INT_P (XEXP (plus_src, 1)))
    3567                 :   50730700 :         plus_cst_src = plus_src;
    3568                 :   28999700 :       else if (REG_P (SET_SRC (old_set))
    3569                 :   20855800 :                || plus_src)
    3570                 :            :         {
    3571                 :            :           /* Otherwise, see if we have a REG_EQUAL note of the form
    3572                 :            :              (plus (...) CST).  */
    3573                 :    9059760 :           rtx links;
    3574                 :   17744200 :           for (links = REG_NOTES (insn); links; links = XEXP (links, 1))
    3575                 :            :             {
    3576                 :    9472690 :               if ((REG_NOTE_KIND (links) == REG_EQUAL
    3577                 :    9472690 :                    || REG_NOTE_KIND (links) == REG_EQUIV)
    3578                 :    1041000 :                   && GET_CODE (XEXP (links, 0)) == PLUS
    3579                 :     830868 :                   && CONST_INT_P (XEXP (XEXP (links, 0), 1)))
    3580                 :            :                 {
    3581                 :            :                   plus_cst_src = XEXP (links, 0);
    3582                 :            :                   break;
    3583                 :            :                 }
    3584                 :            :             }
    3585                 :            :         }
    3586                 :            :     }
    3587                 :            : 
    3588                 :            :   /* Determine the effects of this insn on elimination offsets.  */
    3589                 :   50730700 :   elimination_effects (old_body, VOIDmode);
    3590                 :            : 
    3591                 :            :   /* Eliminate all eliminable registers occurring in operands that
    3592                 :            :      can be handled by reload.  */
    3593                 :   50730700 :   extract_insn (insn);
    3594                 :   50730700 :   int n_dups = recog_data.n_dups;
    3595                 :   51423500 :   for (i = 0; i < n_dups; i++)
    3596                 :     692777 :     orig_dup[i] = *recog_data.dup_loc[i];
    3597                 :            : 
    3598                 :   50730700 :   int n_operands = recog_data.n_operands;
    3599                 :  159222000 :   for (i = 0; i < n_operands; i++)
    3600                 :            :     {
    3601                 :  108491000 :       orig_operand[i] = recog_data.operand[i];
    3602                 :            : 
    3603                 :            :       /* For an asm statement, every operand is eliminable.  */
    3604                 :  108491000 :       if (insn_is_asm || insn_data[icode].operand[i].eliminable)
    3605                 :            :         {
    3606                 :  103896000 :           bool is_set_src, in_plus;
    3607                 :            : 
    3608                 :            :           /* Check for setting a register that we know about.  */
    3609                 :  103896000 :           if (recog_data.operand_type[i] != OP_IN
    3610                 :   36967100 :               && REG_P (orig_operand[i]))
    3611                 :            :             {
    3612                 :            :               /* If we are assigning to a register that can be eliminated, it
    3613                 :            :                  must be as part of a PARALLEL, since the code above handles
    3614                 :            :                  single SETs.  We must indicate that we can no longer
    3615                 :            :                  eliminate this reg.  */
    3616                 :  136708000 :               for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
    3617                 :            :                    ep++)
    3618                 :  109366000 :                 if (ep->from_rtx == orig_operand[i])
    3619                 :          0 :                   ep->can_eliminate = 0;
    3620                 :            :             }
    3621                 :            : 
    3622                 :            :           /* Companion to the above plus substitution, we can allow
    3623                 :            :              invariants as the source of a plain move.  */
    3624                 :  103896000 :           is_set_src = false;
    3625                 :  103896000 :           if (old_set && recog_data.operand_loc[i] == &SET_SRC (old_set))
    3626                 :   28611300 :             is_set_src = true;
    3627                 :  103896000 :           if (is_set_src && !sets_reg_p)
    3628                 :    9249930 :             note_reg_elim_costly (SET_SRC (old_set), insn);
    3629                 :  103896000 :           in_plus = false;
    3630                 :  103896000 :           if (plus_src && sets_reg_p
    3631                 :   12923700 :               && (recog_data.operand_loc[i] == &XEXP (plus_src, 0)
    3632                 :    8830420 :                   || recog_data.operand_loc[i] == &XEXP (plus_src, 1)))
    3633                 :    8190390 :             in_plus = true;
    3634                 :            : 
    3635                 :  103896000 :           eliminate_regs_1 (recog_data.operand[i], VOIDmode,
    3636                 :            :                             NULL_RTX,
    3637                 :  103896000 :                             is_set_src || in_plus, true);
    3638                 :            :           /* Terminate the search in check_eliminable_occurrences at
    3639                 :            :              this point.  */
    3640                 :  103896000 :           *recog_data.operand_loc[i] = 0;
    3641                 :            :         }
    3642                 :            :     }
    3643                 :            : 
    3644                 :   51423500 :   for (i = 0; i < n_dups; i++)
    3645                 :     692777 :     *recog_data.dup_loc[i]
    3646                 :     692777 :       = *recog_data.operand_loc[(int) recog_data.dup_num[i]];
    3647                 :            : 
    3648                 :            :   /* If any eliminable remain, they aren't eliminable anymore.  */
    3649                 :   50730700 :   check_eliminable_occurrences (old_body);
    3650                 :            : 
    3651                 :            :   /* Restore the old body.  */
    3652                 :  159222000 :   for (i = 0; i < n_operands; i++)
    3653                 :  108491000 :     *recog_data.operand_loc[i] = orig_operand[i];
    3654                 :   51423500 :   for (i = 0; i < n_dups; i++)
    3655                 :     692777 :     *recog_data.dup_loc[i] = orig_dup[i];
    3656                 :            : 
    3657                 :            :   /* Update all elimination pairs to reflect the status after the current
    3658                 :            :      insn.  The changes we make were determined by the earlier call to
    3659                 :            :      elimination_effects.  */
    3660                 :            : 
    3661                 :  253654000 :   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3662                 :            :     {
    3663                 :  202923000 :       if (maybe_ne (ep->previous_offset, ep->offset) && ep->ref_outside_mem)
    3664                 :          0 :         ep->can_eliminate = 0;
    3665                 :            : 
    3666                 :  202923000 :       ep->ref_outside_mem = 0;
    3667                 :            :     }
    3668                 :            : 
    3669                 :            :   return;
    3670                 :            : }
    3671                 :            : #pragma GCC diagnostic pop
    3672                 :            : 
    3673                 :            : /* Loop through all elimination pairs.
    3674                 :            :    Recalculate the number not at initial offset.
    3675                 :            : 
    3676                 :            :    Compute the maximum offset (minimum offset if the stack does not
    3677                 :            :    grow downward) for each elimination pair.  */
    3678                 :            : 
    3679                 :            : static void
    3680                 :   79290900 : update_eliminable_offsets (void)
    3681                 :            : {
    3682                 :   79290900 :   struct elim_table *ep;
    3683                 :            : 
    3684                 :   79290900 :   num_not_at_initial_offset = 0;
    3685                 :  396454000 :   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3686                 :            :     {
    3687                 :  317163000 :       ep->previous_offset = ep->offset;
    3688                 :  317163000 :       if (ep->can_eliminate && maybe_ne (ep->offset, ep->initial_offset))
    3689                 :   10990400 :         num_not_at_initial_offset++;
    3690                 :            :     }
    3691                 :   79290900 : }
    3692                 :            : 
    3693                 :            : /* Given X, a SET or CLOBBER of DEST, if DEST is the target of a register
    3694                 :            :    replacement we currently believe is valid, mark it as not eliminable if X
    3695                 :            :    modifies DEST in any way other than by adding a constant integer to it.
    3696                 :            : 
    3697                 :            :    If DEST is the frame pointer, we do nothing because we assume that
    3698                 :            :    all assignments to the hard frame pointer are nonlocal gotos and are being
    3699                 :            :    done at a time when they are valid and do not disturb anything else.
    3700                 :            :    Some machines want to eliminate a fake argument pointer with either the
    3701                 :            :    frame or stack pointer.  Assignments to the hard frame pointer must not
    3702                 :            :    prevent this elimination.
    3703                 :            : 
    3704                 :            :    Called via note_stores from reload before starting its passes to scan
    3705                 :            :    the insns of the function.  */
    3706                 :            : 
    3707                 :            : static void
    3708                 :          0 : mark_not_eliminable (rtx dest, const_rtx x, void *data ATTRIBUTE_UNUSED)
    3709                 :            : {
    3710                 :          0 :   unsigned int i;
    3711                 :            : 
    3712                 :            :   /* A SUBREG of a hard register here is just changing its mode.  We should
    3713                 :            :      not see a SUBREG of an eliminable hard register, but check just in
    3714                 :            :      case.  */
    3715                 :          0 :   if (GET_CODE (dest) == SUBREG)
    3716                 :          0 :     dest = SUBREG_REG (dest);
    3717                 :            : 
    3718                 :          0 :   if (dest == hard_frame_pointer_rtx)
    3719                 :            :     return;
    3720                 :            : 
    3721                 :          0 :   for (i = 0; i < NUM_ELIMINABLE_REGS; i++)
    3722                 :          0 :     if (reg_eliminate[i].can_eliminate && dest == reg_eliminate[i].to_rtx
    3723                 :          0 :         && (GET_CODE (x) != SET
    3724                 :          0 :             || GET_CODE (SET_SRC (x)) != PLUS
    3725                 :          0 :             || XEXP (SET_SRC (x), 0) != dest
    3726                 :          0 :             || !CONST_INT_P (XEXP (SET_SRC (x), 1))))
    3727                 :            :       {
    3728                 :          0 :         reg_eliminate[i].can_eliminate_previous
    3729                 :          0 :           = reg_eliminate[i].can_eliminate = 0;
    3730                 :          0 :         num_eliminable--;
    3731                 :            :       }
    3732                 :            : }
    3733                 :            : 
    3734                 :            : /* Verify that the initial elimination offsets did not change since the
    3735                 :            :    last call to set_initial_elim_offsets.  This is used to catch cases
    3736                 :            :    where something illegal happened during reload_as_needed that could
    3737                 :            :    cause incorrect code to be generated if we did not check for it.  */
    3738                 :            : 
    3739                 :            : static bool
    3740                 :          0 : verify_initial_elim_offsets (void)
    3741                 :            : {
    3742                 :          0 :   poly_int64 t;
    3743                 :          0 :   struct elim_table *ep;
    3744                 :            : 
    3745                 :          0 :   if (!num_eliminable)
    3746                 :            :     return true;
    3747                 :            : 
    3748                 :          0 :   targetm.compute_frame_layout ();
    3749                 :          0 :   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3750                 :            :     {
    3751                 :          0 :       INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, t);
    3752                 :          0 :       if (maybe_ne (t, ep->initial_offset))
    3753                 :            :         return false;
    3754                 :            :     }
    3755                 :            : 
    3756                 :            :   return true;
    3757                 :            : }
    3758                 :            : 
    3759                 :            : /* Reset all offsets on eliminable registers to their initial values.  */
    3760                 :            : 
    3761                 :            : static void
    3762                 :     944096 : set_initial_elim_offsets (void)
    3763                 :            : {
    3764                 :     944096 :   struct elim_table *ep = reg_eliminate;
    3765                 :            : 
    3766                 :     944096 :   targetm.compute_frame_layout ();
    3767                 :    4720480 :   for (; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3768                 :            :     {
    3769                 :    3776380 :       INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->initial_offset);
    3770                 :    3776380 :       ep->previous_offset = ep->offset = ep->initial_offset;
    3771                 :            :     }
    3772                 :            : 
    3773                 :     944096 :   num_not_at_initial_offset = 0;
    3774                 :     944096 : }
    3775                 :            : 
    3776                 :            : /* Subroutine of set_initial_label_offsets called via for_each_eh_label.  */
    3777                 :            : 
    3778                 :            : static void
    3779                 :     156281 : set_initial_eh_label_offset (rtx label)
    3780                 :            : {
    3781                 :     156281 :   set_label_offsets (label, NULL, 1);
    3782                 :     156281 : }
    3783                 :            : 
    3784                 :            : /* Initialize the known label offsets.
    3785                 :            :    Set a known offset for each forced label to be at the initial offset
    3786                 :            :    of each elimination.  We do this because we assume that all
    3787                 :            :    computed jumps occur from a location where each elimination is
    3788                 :            :    at its initial offset.
    3789                 :            :    For all other labels, show that we don't know the offsets.  */
    3790                 :            : 
    3791                 :            : static void
    3792                 :     944096 : set_initial_label_offsets (void)
    3793                 :            : {
    3794                 :     944096 :   memset (offsets_known_at, 0, num_labels);
    3795                 :            : 
    3796                 :     944096 :   unsigned int i;
    3797                 :     944096 :   rtx_insn *insn;
    3798                 :     953597 :   FOR_EACH_VEC_SAFE_ELT (forced_labels, i, insn)
    3799                 :       9501 :     set_label_offsets (insn, NULL, 1);
    3800                 :            : 
    3801                 :     945875 :   for (rtx_insn_list *x = nonlocal_goto_handler_labels; x; x = x->next ())
    3802                 :       1270 :     if (x->insn ())
    3803                 :       1270 :       set_label_offsets (x->insn (), NULL, 1);
    3804                 :            : 
    3805                 :     944096 :   for_each_eh_label (set_initial_eh_label_offset);
    3806                 :     944096 : }
    3807                 :            : 
    3808                 :            : /* Set all elimination offsets to the known values for the code label given
    3809                 :            :    by INSN.  */
    3810                 :            : 
    3811                 :            : static void
    3812                 :    1958630 : set_offsets_for_label (rtx_insn *insn)
    3813                 :            : {
    3814                 :    1958630 :   unsigned int i;
    3815                 :    1958630 :   int label_nr = CODE_LABEL_NUMBER (insn);
    3816                 :    1958630 :   struct elim_table *ep;
    3817                 :            : 
    3818                 :    1958630 :   num_not_at_initial_offset = 0;
    3819                 :    9793170 :   for (i = 0, ep = reg_eliminate; i < NUM_ELIMINABLE_REGS; ep++, i++)
    3820                 :            :     {
    3821                 :    7834540 :       ep->offset = ep->previous_offset
    3822                 :    7834540 :                  = offsets_at[label_nr - first_label_num][i];
    3823                 :    7834540 :       if (ep->can_eliminate && maybe_ne (ep->offset, ep->initial_offset))
    3824                 :       5970 :         num_not_at_initial_offset++;
    3825                 :            :     }
    3826                 :    1958630 : }
    3827                 :            : 
    3828                 :            : /* See if anything that happened changes which eliminations are valid.
    3829                 :            :    For example, on the SPARC, whether or not the frame pointer can
    3830                 :            :    be eliminated can depend on what registers have been used.  We need
    3831                 :            :    not check some conditions again (such as flag_omit_frame_pointer)
    3832                 :            :    since they can't have changed.  */
    3833                 :            : 
    3834                 :            : static void
    3835                 :          0 : update_eliminables (HARD_REG_SET *pset)
    3836                 :            : {
    3837                 :          0 :   int previous_frame_pointer_needed = frame_pointer_needed;
    3838                 :          0 :   struct elim_table *ep;
    3839                 :            : 
    3840                 :          0 :   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3841                 :          0 :     if ((ep->from == HARD_FRAME_POINTER_REGNUM
    3842                 :          0 :          && targetm.frame_pointer_required ())
    3843                 :          0 :         || ! targetm.can_eliminate (ep->from, ep->to)
    3844                 :            :         )
    3845                 :          0 :       ep->can_eliminate = 0;
    3846                 :            : 
    3847                 :            :   /* Look for the case where we have discovered that we can't replace
    3848                 :            :      register A with register B and that means that we will now be
    3849                 :            :      trying to replace register A with register C.  This means we can
    3850                 :            :      no longer replace register C with register B and we need to disable
    3851                 :            :      such an elimination, if it exists.  This occurs often with A == ap,
    3852                 :            :      B == sp, and C == fp.  */
    3853                 :            : 
    3854                 :          0 :   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3855                 :            :     {
    3856                 :          0 :       struct elim_table *op;
    3857                 :          0 :       int new_to = -1;
    3858                 :            : 
    3859                 :          0 :       if (! ep->can_eliminate && ep->can_eliminate_previous)
    3860                 :            :         {
    3861                 :            :           /* Find the current elimination for ep->from, if there is a
    3862                 :            :              new one.  */
    3863                 :          0 :           for (op = reg_eliminate;
    3864                 :          0 :                op < &reg_eliminate[NUM_ELIMINABLE_REGS]; op++)
    3865                 :          0 :             if (op->from == ep->from && op->can_eliminate)
    3866                 :            :               {
    3867                 :          0 :                 new_to = op->to;
    3868                 :          0 :                 break;
    3869                 :            :               }
    3870                 :            : 
    3871                 :            :           /* See if there is an elimination of NEW_TO -> EP->TO.  If so,
    3872                 :            :              disable it.  */
    3873                 :          0 :           for (op = reg_eliminate;
    3874                 :          0 :                op < &reg_eliminate[NUM_ELIMINABLE_REGS]; op++)
    3875                 :          0 :             if (op->from == new_to && op->to == ep->to)
    3876                 :          0 :               op->can_eliminate = 0;
    3877                 :            :         }
    3878                 :            :     }
    3879                 :            : 
    3880                 :            :   /* See if any registers that we thought we could eliminate the previous
    3881                 :            :      time are no longer eliminable.  If so, something has changed and we
    3882                 :            :      must spill the register.  Also, recompute the number of eliminable
    3883                 :            :      registers and see if the frame pointer is needed; it is if there is
    3884                 :            :      no elimination of the frame pointer that we can perform.  */
    3885                 :            : 
    3886                 :          0 :   frame_pointer_needed = 1;
    3887                 :          0 :   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3888                 :            :     {
    3889                 :          0 :       if (ep->can_eliminate
    3890                 :          0 :           && ep->from == FRAME_POINTER_REGNUM
    3891                 :          0 :           && ep->to != HARD_FRAME_POINTER_REGNUM
    3892                 :          0 :           && (! SUPPORTS_STACK_ALIGNMENT
    3893                 :          0 :               || ! crtl->stack_realign_needed))
    3894                 :          0 :         frame_pointer_needed = 0;
    3895                 :            : 
    3896                 :          0 :       if (! ep->can_eliminate && ep->can_eliminate_previous)
    3897                 :            :         {
    3898                 :          0 :           ep->can_eliminate_previous = 0;
    3899                 :          0 :           SET_HARD_REG_BIT (*pset, ep->from);
    3900                 :          0 :           num_eliminable--;
    3901                 :            :         }
    3902                 :            :     }
    3903                 :            : 
    3904                 :            :   /* If we didn't need a frame pointer last time, but we do now, spill
    3905                 :            :      the hard frame pointer.  */
    3906                 :          0 :   if (frame_pointer_needed && ! previous_frame_pointer_needed)
    3907                 :          0 :     SET_HARD_REG_BIT (*pset, HARD_FRAME_POINTER_REGNUM);
    3908                 :          0 : }
    3909                 :            : 
    3910                 :            : /* Call update_eliminables an spill any registers we can't eliminate anymore.
    3911                 :            :    Return true iff a register was spilled.  */
    3912                 :            : 
    3913                 :            : static bool
    3914                 :          0 : update_eliminables_and_spill (void)
    3915                 :            : {
    3916                 :          0 :   int i;
    3917                 :          0 :   bool did_spill = false;
    3918                 :          0 :   HARD_REG_SET to_spill;
    3919                 :          0 :   CLEAR_HARD_REG_SET (to_spill);
    3920                 :          0 :   update_eliminables (&to_spill);
    3921                 :          0 :   used_spill_regs &= ~to_spill;
    3922                 :            : 
    3923                 :          0 :   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
    3924                 :          0 :     if (TEST_HARD_REG_BIT (to_spill, i))
    3925                 :            :       {
    3926                 :          0 :         spill_hard_reg (i, 1);
    3927                 :          0 :         did_spill = true;
    3928                 :            : 
    3929                 :            :         /* Regardless of the state of spills, if we previously had
    3930                 :            :            a register that we thought we could eliminate, but now
    3931                 :            :            cannot eliminate, we must run another pass.
    3932                 :            : 
    3933                 :            :            Consider pseudos which have an entry in reg_equiv_* which
    3934                 :            :            reference an eliminable register.  We must make another pass
    3935                 :            :            to update reg_equiv_* so that we do not substitute in the
    3936                 :            :            old value from when we thought the elimination could be
    3937                 :            :            performed.  */
    3938                 :            :       }
    3939                 :          0 :   return did_spill;
    3940                 :            : }
    3941                 :            : 
    3942                 :            : /* Return true if X is used as the target register of an elimination.  */
    3943                 :            : 
    3944                 :            : bool
    3945                 :          0 : elimination_target_reg_p (rtx x)
    3946                 :            : {
    3947                 :          0 :   struct elim_table *ep;
    3948                 :            : 
    3949                 :          0 :   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3950                 :          0 :     if (ep->to_rtx == x && ep->can_eliminate)
    3951                 :            :       return true;
    3952                 :            : 
    3953                 :            :   return false;
    3954                 :            : }
    3955                 :            : 
    3956                 :            : /* Initialize the table of registers to eliminate.
    3957                 :            :    Pre-condition: global flag frame_pointer_needed has been set before
    3958                 :            :    calling this function.  */
    3959                 :            : 
    3960                 :            : static void
    3961                 :     944096 : init_elim_table (void)
    3962                 :            : {
    3963                 :     944096 :   struct elim_table *ep;
    3964                 :     944096 :   const struct elim_table_1 *ep1;
    3965                 :            : 
    3966                 :     944096 :   if (!reg_eliminate)
    3967                 :     148706 :     reg_eliminate = XCNEWVEC (struct elim_table, NUM_ELIMINABLE_REGS);
    3968                 :            : 
    3969                 :     944096 :   num_eliminable = 0;
    3970                 :            : 
    3971                 :     944096 :   for (ep = reg_eliminate, ep1 = reg_eliminate_1;
    3972                 :    4720480 :        ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
    3973                 :            :     {
    3974                 :    3776380 :       ep->from = ep1->from;
    3975                 :    3776380 :       ep->to = ep1->to;
    3976                 :    7552770 :       ep->can_eliminate = ep->can_eliminate_previous
    3977                 :    3776380 :         = (targetm.can_eliminate (ep->from, ep->to)
    3978                 :    5101420 :            && ! (ep->to == STACK_POINTER_REGNUM
    3979                 :    1325040 :                  && frame_pointer_needed
    3980                 :      40003 :                  && (! SUPPORTS_STACK_ALIGNMENT
    3981                 :      40003 :                      || ! stack_realign_fp)));
    3982                 :            :     }
    3983                 :            : 
    3984                 :            :   /* Count the number of eliminable registers and build the FROM and TO
    3985                 :            :      REG rtx's.  Note that code in gen_rtx_REG will cause, e.g.,
    3986                 :            :      gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to equal stack_pointer_rtx.
    3987                 :            :      We depend on this.  */
    3988                 :    4720480 :   for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
    3989                 :            :     {
    3990                 :    3776380 :       num_eliminable += ep->can_eliminate;
    3991                 :    4156940 :       ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
    3992                 :    4156940 :       ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
    3993                 :            :     }
    3994                 :     944096 : }
    3995                 :            : 
    3996                 :            : /* Find all the pseudo registers that didn't get hard regs
    3997                 :            :    but do have known equivalent constants or memory slots.
    3998                 :            :    These include parameters (known equivalent to parameter slots)
    3999                 :            :    and cse'd or loop-moved constant memory addresses.
    4000                 :            : 
    4001                 :            :    Record constant equivalents in reg_equiv_constant
    4002                 :            :    so they will be substituted by find_reloads.
    4003                 :            :    Record memory equivalents in reg_mem_equiv so they can
    4004                 :            :    be substituted eventually by altering the REG-rtx's.  */
    4005                 :            : 
    4006                 :            : static void
    4007                 :     944096 : init_eliminable_invariants (rtx_insn *first, bool do_subregs)
    4008                 :            : {
    4009                 :     944096 :   int i;
    4010                 :     944096 :   rtx_insn *insn;
    4011                 :            : 
    4012                 :     944096 :   grow_reg_equivs ();
    4013                 :     944096 :   if (do_subregs)
    4014                 :          0 :     reg_max_ref_mode = XCNEWVEC (machine_mode, max_regno);
    4015                 :            :   else
    4016                 :     944096 :     reg_max_ref_mode = NULL;
    4017                 :            : 
    4018                 :     944096 :   num_eliminable_invariants = 0;
    4019                 :            : 
    4020                 :     944096 :   first_label_num = get_first_label_num ();
    4021                 :     944096 :   num_labels = max_label_num () - first_label_num;
    4022                 :            : 
    4023                 :            :   /* Allocate the tables used to store offset information at labels.  */
    4024                 :     944096 :   offsets_known_at = XNEWVEC (char, num_labels);
    4025                 :    1888190 :   offsets_at = (poly_int64_pod (*)[NUM_ELIMINABLE_REGS])
    4026                 :     944096 :     xmalloc (num_labels * NUM_ELIMINABLE_REGS * sizeof (poly_int64));
    4027                 :            : 
    4028                 :            : /* Look for REG_EQUIV notes; record what each pseudo is equivalent
    4029                 :            :    to.  If DO_SUBREGS is true, also find all paradoxical subregs and
    4030                 :            :    find largest such for each pseudo.  FIRST is the head of the insn
    4031                 :            :    list.  */
    4032                 :            : 
    4033                 :  201021000 :   for (insn = first; insn; insn = NEXT_INSN (insn))
    4034                 :            :     {
    4035                 :  100039000 :       rtx set = single_set (insn);
    4036                 :            : 
    4037                 :            :       /* We may introduce USEs that we want to remove at the end, so
    4038                 :            :          we'll mark them with QImode.  Make sure there are no
    4039                 :            :          previously-marked insns left by say regmove.  */
    4040                 :   80226600 :       if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
    4041                 :  100521000 :           && GET_MODE (insn) != VOIDmode)
    4042                 :          0 :         PUT_MODE (insn, VOIDmode);
    4043                 :            : 
    4044                 :  100039000 :       if (do_subregs && NONDEBUG_INSN_P (insn))
    4045                 :          0 :         scan_paradoxical_subregs (PATTERN (insn));
    4046                 :            : 
    4047                 :  100039000 :       if (set != 0 && REG_P (SET_DEST (set)))
    4048                 :            :         {
    4049                 :   33430500 :           rtx note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
    4050                 :   33430500 :           rtx x;
    4051                 :            : 
    4052                 :   33430500 :           if (! note)
    4053                 :   30521000 :             continue;
    4054                 :            : 
    4055                 :    2909440 :           i = REGNO (SET_DEST (set));
    4056                 :    2909440 :           x = XEXP (note, 0);
    4057                 :            : 
    4058                 :    2909440 :           if (i <= LAST_VIRTUAL_REGISTER)
    4059                 :          0 :             continue;
    4060                 :            : 
    4061                 :            :           /* If flag_pic and we have constant, verify it's legitimate.  */
    4062                 :    2909440 :           if (!CONSTANT_P (x)
    4063                 :    2909440 :               || !flag_pic || LEGITIMATE_PIC_OPERAND_P (x))
    4064                 :            :             {
    4065                 :            :               /* It can happen that a REG_EQUIV note contains a MEM
    4066                 :            :                  that is not a legitimate memory operand.  As later
    4067                 :            :                  stages of reload assume that all addresses found
    4068                 :            :                  in the reg_equiv_* arrays were originally legitimate,
    4069                 :            :                  we ignore such REG_EQUIV notes.  */
    4070                 :    2875060 :               if (memory_operand (x, VOIDmode))
    4071                 :            :                 {
    4072                 :            :                   /* Always unshare the equivalence, so we can
    4073                 :            :                      substitute into this insn without touching the
    4074                 :            :                        equivalence.  */
    4075                 :    1766130 :                   reg_equiv_memory_loc (i) = copy_rtx (x);
    4076                 :            :                 }
    4077                 :    1108930 :               else if (function_invariant_p (x))
    4078                 :            :                 {
    4079                 :    1072290 :                   machine_mode mode;
    4080                 :            : 
    4081                 :    1072290 :                   mode = GET_MODE (SET_DEST (set));
    4082                 :    1072290 :                   if (GET_CODE (x) == PLUS)
    4083                 :            :                     {
    4084                 :            :                       /* This is PLUS of frame pointer and a constant,
    4085                 :            :                          and might be shared.  Unshare it.  */
    4086                 :     661095 :                       reg_equiv_invariant (i) = copy_rtx (x);
    4087                 :     661095 :                       num_eliminable_invariants++;
    4088                 :            :                     }
    4089                 :     411197 :                   else if (x == frame_pointer_rtx || x == arg_pointer_rtx)
    4090                 :            :                     {
    4091                 :       2377 :                       reg_equiv_invariant (i) = x;
    4092                 :       2377 :                       num_eliminable_invariants++;
    4093                 :            :                     }
    4094                 :     408820 :                   else if (targetm.legitimate_constant_p (mode, x))
    4095                 :     354277 :                     reg_equiv_constant (i) = x;
    4096                 :            :                   else
    4097                 :            :                     {
    4098                 :      54543 :                       reg_equiv_memory_loc (i) = force_const_mem (mode, x);
    4099                 :      54543 :                       if (! reg_equiv_memory_loc (i))
    4100                 :        537 :                         reg_equiv_init (i) = NULL;
    4101                 :            :                     }
    4102                 :            :                 }
    4103                 :            :               else
    4104                 :            :                 {
    4105                 :      36635 :                   reg_equiv_init (i) = NULL;
    4106                 :      36635 :                   continue;
    4107                 :            :                 }
    4108                 :            :             }
    4109                 :            :           else
    4110                 :      34387 :             reg_equiv_init (i) = NULL;
    4111                 :            :         }
    4112                 :            :     }
    4113                 :            : 
    4114                 :     944096 :   if (dump_file)
    4115                 :       1979 :     for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
    4116                 :       1877 :       if (reg_equiv_init (i))
    4117                 :            :         {
    4118                 :        132 :           fprintf (dump_file, "init_insns for %u: ", i);
    4119                 :        132 :           print_inline_rtx (dump_file, reg_equiv_init (i), 20);
    4120                 :        132 :           fprintf (dump_file, "\n");
    4121                 :            :         }
    4122                 :     944096 : }
    4123                 :            : 
    4124                 :            : /* Indicate that we no longer have known memory locations or constants.
    4125                 :            :    Free all data involved in tracking these.  */
    4126                 :            : 
    4127                 :            : static void
    4128                 :          0 : free_reg_equiv (void)
    4129                 :            : {
    4130                 :          0 :   int i;
    4131                 :            : 
    4132                 :          0 :   free (offsets_known_at);
    4133                 :          0 :   free (offsets_at);
    4134                 :          0 :   offsets_at = 0;
    4135                 :          0 :   offsets_known_at = 0;
    4136                 :            : 
    4137                 :          0 :   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
    4138                 :          0 :     if (reg_equiv_alt_mem_list (i))
    4139                 :          0 :       free_EXPR_LIST_list (&reg_equiv_alt_mem_list (i));
    4140                 :          0 :   vec_free (reg_equivs);
    4141                 :          0 : }
    4142                 :            : 
    4143                 :            : /* Kick all pseudos out of hard register REGNO.
    4144                 :            : 
    4145                 :            :    If CANT_ELIMINATE is nonzero, it means that we are doing this spill
    4146                 :            :    because we found we can't eliminate some register.  In the case, no pseudos
    4147                 :            :    are allowed to be in the register, even if they are only in a block that
    4148                 :            :    doesn't require spill registers, unlike the case when we are spilling this
    4149                 :            :    hard reg to produce another spill register.
    4150                 :            : 
    4151                 :            :    Return nonzero if any pseudos needed to be kicked out.  */
    4152                 :            : 
    4153                 :            : static void
    4154                 :          0 : spill_hard_reg (unsigned int regno, int cant_eliminate)
    4155                 :            : {
    4156                 :          0 :   int i;
    4157                 :            : 
    4158                 :          0 :   if (cant_eliminate)
    4159                 :            :     {
    4160                 :          0 :       SET_HARD_REG_BIT (bad_spill_regs_global, regno);
    4161                 :          0 :       df_set_regs_ever_live (regno, true);
    4162                 :            :     }
    4163                 :            : 
    4164                 :            :   /* Spill every pseudo reg that was allocated to this reg
    4165                 :            :      or to something that overlaps this reg.  */
    4166                 :            : 
    4167                 :          0 :   for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
    4168                 :          0 :     if (reg_renumber[i] >= 0
    4169                 :          0 :         && (unsigned int) reg_renumber[i] <= regno
    4170                 :          0 :         && end_hard_regno (PSEUDO_REGNO_MODE (i), reg_renumber[i]) > regno)
    4171                 :          0 :       SET_REGNO_REG_SET (&spilled_pseudos, i);
    4172                 :          0 : }
    4173                 :            : 
    4174                 :            : /* After spill_hard_reg was called and/or find_reload_regs was run for all
    4175                 :            :    insns that need reloads, this function is used to actually spill pseudo
    4176                 :            :    registers and try to reallocate them.  It also sets up the spill_regs
    4177                 :            :    array for use by choose_reload_regs.
    4178                 :            : 
    4179                 :            :    GLOBAL nonzero means we should attempt to reallocate any pseudo registers
    4180                 :            :    that we displace from hard registers.  */
    4181                 :            : 
    4182                 :            : static int
    4183                 :          0 : finish_spills (int global)
    4184                 :            : {
    4185                 :          0 :   class insn_chain *chain;
    4186                 :          0 :   int something_changed = 0;
    4187                 :          0 :   unsigned i;
    4188                 :          0 :   reg_set_iterator rsi;
    4189                 :            : 
    4190                 :            :   /* Build the spill_regs array for the function.  */
    4191                 :            :   /* If there are some registers still to eliminate and one of the spill regs
    4192                 :            :      wasn't ever used before, additional stack space may have to be
    4193                 :            :      allocated to store this register.  Thus, we may have changed the offset
    4194                 :            :      between the stack and frame pointers, so mark that something has changed.
    4195                 :            : 
    4196                 :            :      One might think that we need only set VAL to 1 if this is a call-used
    4197                 :            :      register.  However, the set of registers that must be saved by the
    4198                 :            :      prologue is not identical to the call-used set.  For example, the
    4199                 :            :      register used by the call insn for the return PC is a call-used register,
    4200                 :            :      but must be saved by the prologue.  */
    4201                 :            : 
    4202                 :          0 :   n_spills = 0;
    4203                 :          0 :   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
    4204                 :          0 :     if (TEST_HARD_REG_BIT (used_spill_regs, i))
    4205                 :            :       {
    4206                 :          0 :         spill_reg_order[i] = n_spills;
    4207                 :          0 :         spill_regs[n_spills++] = i;
    4208                 :          0 :         if (num_eliminable && ! df_regs_ever_live_p (i))
    4209                 :            :           something_changed = 1;
    4210                 :          0 :         df_set_regs_ever_live (i, true);
    4211                 :            :       }
    4212                 :            :     else
    4213                 :          0 :       spill_reg_order[i] = -1;
    4214                 :            : 
    4215                 :          0 :   EXECUTE_IF_SET_IN_REG_SET (&spilled_pseudos, FIRST_PSEUDO_REGISTER, i, rsi)
    4216                 :          0 :     if (reg_renumber[i] >= 0)
    4217                 :            :       {
    4218                 :          0 :         SET_HARD_REG_BIT (pseudo_previous_regs[i], reg_renumber[i]);
    4219                 :            :         /* Mark it as no longer having a hard register home.  */
    4220                 :          0 :         reg_renumber[i] = -1;
    4221                 :          0 :         if (ira_conflicts_p)
    4222                 :            :           /* Inform IRA about the change.  */
    4223                 :          0 :           ira_mark_allocation_change (i);
    4224                 :            :         /* We will need to scan everything again.  */
    4225                 :            :         something_changed = 1;
    4226                 :            :       }
    4227                 :            : 
    4228                 :            :   /* Retry global register allocation if possible.  */
    4229                 :          0 :   if (global && ira_conflicts_p)
    4230                 :            :     {
    4231                 :          0 :       unsigned int n;
    4232                 :            : 
    4233                 :          0 :       memset (pseudo_forbidden_regs, 0, max_regno * sizeof (HARD_REG_SET));
    4234                 :            :       /* For every insn that needs reloads, set the registers used as spill
    4235                 :            :          regs in pseudo_forbidden_regs for every pseudo live across the
    4236                 :            :          insn.  */
    4237                 :          0 :       for (chain = insns_need_reload; chain; chain = chain->next_need_reload)
    4238                 :            :         {
    4239                 :          0 :           EXECUTE_IF_SET_IN_REG_SET
    4240                 :            :             (&chain->live_throughout, FIRST_PSEUDO_REGISTER, i, rsi)
    4241                 :            :             {
    4242                 :          0 :               pseudo_forbidden_regs[i] |= chain->used_spill_regs;
    4243                 :            :             }
    4244                 :          0 :           EXECUTE_IF_SET_IN_REG_SET
    4245                 :            :             (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, i, rsi)
    4246                 :            :             {
    4247                 :          0 :               pseudo_forbidden_regs[i] |= chain->used_spill_regs;
    4248                 :            :             }
    4249                 :            :         }
    4250                 :            : 
    4251                 :            :       /* Retry allocating the pseudos spilled in IRA and the
    4252                 :            :          reload.  For each reg, merge the various reg sets that
    4253                 :            :          indicate which hard regs can't be used, and call
    4254                 :            :          ira_reassign_pseudos.  */
    4255                 :          0 :       for (n = 0, i = FIRST_PSEUDO_REGISTER; i < (unsigned) max_regno; i++)
    4256                 :          0 :         if (reg_old_renumber[i] != reg_renumber[i])
    4257                 :            :           {
    4258                 :          0 :             if (reg_renumber[i] < 0)
    4259                 :          0 :               temp_pseudo_reg_arr[n++] = i;
    4260                 :            :             else
    4261                 :          0 :               CLEAR_REGNO_REG_SET (&spilled_pseudos, i);
    4262                 :            :           }
    4263                 :          0 :       if (ira_reassign_pseudos (temp_pseudo_reg_arr, n,
    4264                 :            :                                 bad_spill_regs_global,
    4265                 :            :                                 pseudo_forbidden_regs, pseudo_previous_regs,
    4266                 :            :                                 &spilled_pseudos))
    4267                 :          0 :         something_changed = 1;
    4268                 :            :     }
    4269                 :            :   /* Fix up the register information in the insn chain.
    4270                 :            :      This involves deleting those of the spilled pseudos which did not get
    4271                 :            :      a new hard register home from the live_{before,after} sets.  */
    4272                 :          0 :   for (chain = reload_insn_chain; chain; chain = chain->next)
    4273                 :            :     {
    4274                 :          0 :       HARD_REG_SET used_by_pseudos;
    4275                 :          0 :       HARD_REG_SET used_by_pseudos2;
    4276                 :            : 
    4277                 :          0 :       if (! ira_conflicts_p)
    4278                 :            :         {
    4279                 :            :           /* Don't do it for IRA because IRA and the reload still can
    4280                 :            :              assign hard registers to the spilled pseudos on next
    4281                 :            :              reload iterations.  */
    4282                 :          0 :           AND_COMPL_REG_SET (&chain->live_throughout, &spilled_pseudos);
    4283                 :          0 :           AND_COMPL_REG_SET (&chain->dead_or_set, &spilled_pseudos);
    4284                 :            :         }
    4285                 :            :       /* Mark any unallocated hard regs as available for spills.  That
    4286                 :            :          makes inheritance work somewhat better.  */
    4287                 :          0 :       if (chain->need_reload)
    4288                 :            :         {
    4289                 :          0 :           REG_SET_TO_HARD_REG_SET (used_by_pseudos, &chain->live_throughout);
    4290                 :          0 :           REG_SET_TO_HARD_REG_SET (used_by_pseudos2, &chain->dead_or_set);
    4291                 :          0 :           used_by_pseudos |= used_by_pseudos2;
    4292                 :            : 
    4293                 :          0 :           compute_use_by_pseudos (&used_by_pseudos, &chain->live_throughout);
    4294                 :          0 :           compute_use_by_pseudos (&used_by_pseudos, &chain->dead_or_set);
    4295                 :            :           /* Value of chain->used_spill_regs from previous iteration
    4296                 :            :              may be not included in the value calculated here because
    4297                 :            :              of possible removing caller-saves insns (see function
    4298                 :            :              delete_caller_save_insns.  */
    4299                 :          0 :           chain->used_spill_regs = ~used_by_pseudos & used_spill_regs;
    4300                 :            :         }
    4301                 :            :     }
    4302                 :            : 
    4303                 :          0 :   CLEAR_REG_SET (&changed_allocation_pseudos);
    4304                 :            :   /* Let alter_reg modify the reg rtx's for the modified pseudos.  */
    4305                 :          0 :   for (i = FIRST_PSEUDO_REGISTER; i < (unsigned)max_regno; i++)
    4306                 :            :     {
    4307                 :          0 :       int regno = reg_renumber[i];
    4308                 :          0 :       if (reg_old_renumber[i] == regno)
    4309                 :          0 :         continue;
    4310                 :            : 
    4311                 :          0 :       SET_REGNO_REG_SET (&changed_allocation_pseudos, i);
    4312                 :            : 
    4313                 :          0 :       alter_reg (i, reg_old_renumber[i], false);
    4314                 :          0 :       reg_old_renumber[i] = regno;
    4315                 :          0 :       if (dump_file)
    4316                 :            :         {
    4317                 :          0 :           if (regno == -1)
    4318                 :          0 :             fprintf (dump_file, " Register %d now on stack.\n\n", i);
    4319                 :            :           else
    4320                 :          0 :             fprintf (dump_file, " Register %d now in %d.\n\n",
    4321                 :          0 :                      i, reg_renumber[i]);
    4322                 :            :         }
    4323                 :            :     }
    4324                 :            : 
    4325                 :          0 :   return something_changed;
    4326                 :            : }
    4327                 :            : 
    4328                 :            : /* Find all paradoxical subregs within X and update reg_max_ref_mode.  */
    4329                 :            : 
    4330                 :            : static void
    4331                 :          0 : scan_paradoxical_subregs (rtx x)
    4332                 :            : {
    4333                 :          0 :   int i;
    4334                 :          0 :   const char *fmt;
    4335                 :          0 :   enum rtx_code code = GET_CODE (x);
    4336                 :            : 
    4337                 :          0 :   switch (code)
    4338                 :            :     {
    4339                 :            :     case REG:
    4340                 :            :     case CONST:
    4341                 :            :     case SYMBOL_REF:
    4342                 :            :     case LABEL_REF:
    4343                 :            :     CASE_CONST_ANY:
    4344                 :            :     case CC0:
    4345                 :            :     case PC:
    4346                 :            :     case USE:
    4347                 :            :     case CLOBBER:
    4348                 :            :       return;
    4349                 :            : 
    4350                 :          0 :     case SUBREG:
    4351                 :          0 :       if (REG_P (SUBREG_REG (x)))
    4352                 :            :         {
    4353                 :          0 :           unsigned int regno = REGNO (SUBREG_REG (x));
    4354                 :          0 :           if (partial_subreg_p (reg_max_ref_mode[regno], GET_MODE (x)))
    4355                 :            :             {
    4356                 :          0 :               reg_max_ref_mode[regno] = GET_MODE (x);
    4357                 :          0 :               mark_home_live_1 (regno, GET_MODE (x));
    4358                 :            :             }
    4359                 :            :         }
    4360                 :            :       return;
    4361                 :            : 
    4362                 :          0 :     default:
    4363                 :          0 :       break;
    4364                 :            :     }
    4365                 :            : 
    4366                 :          0 :   fmt = GET_RTX_FORMAT (code);
    4367                 :          0 :   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
    4368                 :            :     {
    4369                 :          0 :       if (fmt[i] == 'e')
    4370                 :          0 :         scan_paradoxical_subregs (XEXP (x, i));
    4371                 :          0 :       else if (fmt[i] == 'E')
    4372                 :            :         {
    4373                 :          0 :           int j;
    4374                 :          0 :           for (j = XVECLEN (x, i) - 1; j >= 0; j--)
    4375                 :          0 :             scan_paradoxical_subregs (XVECEXP (x, i, j));
    4376                 :            :         }
    4377                 :            :     }
    4378                 :            : }
    4379                 :            : 
    4380                 :            : /* *OP_PTR and *OTHER_PTR are two operands to a conceptual reload.
    4381                 :            :    If *OP_PTR is a paradoxical subreg, try to remove that subreg
    4382                 :            :    and apply the corresponding narrowing subreg to *OTHER_PTR.
    4383                 :            :    Return true if the operands were changed, false otherwise.  */
    4384                 :            : 
    4385                 :            : static bool
    4386                 :          0 : strip_paradoxical_subreg (rtx *op_ptr, rtx *other_ptr)
    4387                 :            : {
    4388                 :          0 :   rtx op, inner, other, tem;
    4389                 :            : 
    4390                 :          0 :   op = *op_ptr;
    4391                 :          0 :   if (!paradoxical_subreg_p (op))
    4392                 :            :     return false;
    4393                 :          0 :   inner = SUBREG_REG (op);
    4394                 :            : 
    4395                 :          0 :   other = *other_ptr;
    4396                 :          0 :   tem = gen_lowpart_common (GET_MODE (inner), other);
    4397                 :          0 :   if (!tem)
    4398                 :            :     return false;
    4399                 :            : 
    4400                 :            :   /* If the lowpart operation turned a hard register into a subreg,
    4401                 :            :      rather than simplifying it to another hard register, then the
    4402                 :            :      mode change cannot be properly represented.  For example, OTHER
    4403                 :            :      might be valid in its current mode, but not in the new one.  */
    4404                 :          0 :   if (GET_CODE (tem) == SUBREG
    4405                 :          0 :       && REG_P (other)
    4406                 :          0 :       && HARD_REGISTER_P (other))
    4407                 :            :     return false;
    4408                 :            : 
    4409                 :          0 :   *op_ptr = inner;
    4410                 :          0 :   *other_ptr = tem;
    4411                 :          0 :   return true;
    4412                 :            : }
    4413                 :            : 
    4414                 :            : /* A subroutine of reload_as_needed.  If INSN has a REG_EH_REGION note,
    4415                 :            :    examine all of the reload insns between PREV and NEXT exclusive, and
    4416                 :            :    annotate all that may trap.  */
    4417                 :            : 
    4418                 :            : static void
    4419                 :          0 : fixup_eh_region_note (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
    4420                 :            : {
    4421                 :          0 :   rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
    4422                 :          0 :   if (note == NULL)
    4423                 :            :     return;
    4424                 :          0 :   if (!insn_could_throw_p (insn))
    4425                 :          0 :     remove_note (insn, note);
    4426                 :          0 :   copy_reg_eh_region_note_forward (note, NEXT_INSN (prev), next);
    4427                 :            : }
    4428                 :            : 
    4429                 :            : /* Reload pseudo-registers into hard regs around each insn as needed.
    4430                 :            :    Additional register load insns are output before the insn that needs it
    4431                 :            :    and perhaps store insns after insns that modify the reloaded pseudo reg.
    4432                 :            : 
    4433                 :            :    reg_last_reload_reg and reg_reloaded_contents keep track of
    4434                 :            :    which registers are already available in reload registers.
    4435                 :            :    We update these for the reloads that we perform,
    4436                 :            :    as the insns are scanned.  */
    4437                 :            : 
    4438                 :            : static void
    4439                 :          0 : reload_as_needed (int live_known)
    4440                 :            : {
    4441                 :          0 :   class insn_chain *chain;
    4442                 :            : #if AUTO_INC_DEC
    4443                 :            :   int i;
    4444                 :            : #endif
    4445                 :          0 :   rtx_note *marker;
    4446                 :            : 
    4447                 :          0 :   memset (spill_reg_rtx, 0, sizeof spill_reg_rtx);
    4448                 :          0 :   memset (spill_reg_store, 0, sizeof spill_reg_store);
    4449                 :          0 :   reg_last_reload_reg = XCNEWVEC (rtx, max_regno);
    4450                 :          0 :   INIT_REG_SET (&reg_has_output_reload);
    4451                 :          0 :   CLEAR_HARD_REG_SET (reg_reloaded_valid);
    4452                 :            : 
    4453                 :          0 :   set_initial_elim_offsets ();
    4454                 :            : 
    4455                 :            :   /* Generate a marker insn that we will move around.  */
    4456                 :          0 :   marker = emit_note (NOTE_INSN_DELETED);
    4457                 :          0 :   unlink_insn_chain (marker, marker);
    4458                 :            : 
    4459                 :          0 :   for (chain = reload_insn_chain; chain; chain = chain->next)
    4460                 :            :     {
    4461                 :          0 :       rtx_insn *prev = 0;
    4462                 :          0 :       rtx_insn *insn = chain->insn;
    4463                 :          0 :       rtx_insn *old_next = NEXT_INSN (insn);
    4464                 :            : #if AUTO_INC_DEC
    4465                 :            :       rtx_insn *old_prev = PREV_INSN (insn);
    4466                 :            : #endif
    4467                 :            : 
    4468                 :          0 :       if (will_delete_init_insn_p (insn))
    4469                 :          0 :         continue;
    4470                 :            : 
    4471                 :            :       /* If we pass a label, copy the offsets from the label information
    4472                 :            :          into the current offsets of each elimination.  */
    4473                 :          0 :       if (LABEL_P (insn))
    4474                 :          0 :         set_offsets_for_label (insn);
    4475                 :            : 
    4476                 :          0 :       else if (INSN_P (insn))
    4477                 :            :         {
    4478                 :          0 :           regset_head regs_to_forget;
    4479                 :          0 :           INIT_REG_SET (&regs_to_forget);
    4480                 :          0 :           note_stores (insn, forget_old_reloads_1, &regs_to_forget);
    4481                 :            : 
    4482                 :            :           /* If this is a USE and CLOBBER of a MEM, ensure that any
    4483                 :            :              references to eliminable registers have been removed.  */
    4484                 :            : 
    4485                 :          0 :           if ((GET_CODE (PATTERN (insn)) == USE
    4486                 :          0 :                || GET_CODE (PATTERN (insn)) == CLOBBER)
    4487                 :          0 :               && MEM_P (XEXP (PATTERN (insn), 0)))
    4488                 :          0 :             XEXP (XEXP (PATTERN (insn), 0), 0)
    4489                 :          0 :               = eliminate_regs (XEXP (XEXP (PATTERN (insn), 0), 0),
    4490                 :          0 :                                 GET_MODE (XEXP (PATTERN (insn), 0)),
    4491                 :            :                                 NULL_RTX);
    4492                 :            : 
    4493                 :            :           /* If we need to do register elimination processing, do so.
    4494                 :            :              This might delete the insn, in which case we are done.  */
    4495                 :          0 :           if ((num_eliminable || num_eliminable_invariants) && chain->need_elim)
    4496                 :            :             {
    4497                 :          0 :               eliminate_regs_in_insn (insn, 1);
    4498                 :          0 :               if (NOTE_P (insn))
    4499                 :            :                 {
    4500                 :          0 :                   update_eliminable_offsets ();
    4501                 :          0 :                   CLEAR_REG_SET (&regs_to_forget);
    4502                 :          0 :                   continue;
    4503                 :            :                 }
    4504                 :            :             }
    4505                 :            : 
    4506                 :            :           /* If need_elim is nonzero but need_reload is zero, one might think
    4507                 :            :              that we could simply set n_reloads to 0.  However, find_reloads
    4508                 :            :              could have done some manipulation of the insn (such as swapping
    4509                 :            :              commutative operands), and these manipulations are lost during
    4510                 :            :              the first pass for every insn that needs register elimination.
    4511                 :            :              So the actions of find_reloads must be redone here.  */
    4512                 :            : 
    4513                 :          0 :           if (! chain->need_elim && ! chain->need_reload
    4514                 :          0 :               && ! chain->need_operand_change)
    4515                 :          0 :             n_reloads = 0;
    4516                 :            :           /* First find the pseudo regs that must be reloaded for this insn.
    4517                 :            :              This info is returned in the tables reload_... (see reload.h).
    4518                 :            :              Also modify the body of INSN by substituting RELOAD
    4519                 :            :              rtx's for those pseudo regs.  */
    4520                 :            :           else
    4521                 :            :             {
    4522                 :          0 :               CLEAR_REG_SET (&reg_has_output_reload);
    4523                 :          0 :               CLEAR_HARD_REG_SET (reg_is_output_reload);
    4524                 :            : 
    4525                 :          0 :               find_reloads (insn, 1, spill_indirect_levels, live_known,
    4526                 :            :                             spill_reg_order);
    4527                 :            :             }
    4528                 :            : 
    4529                 :          0 :           if (n_reloads > 0)
    4530                 :            :             {
    4531                 :          0 :               rtx_insn *next = NEXT_INSN (insn);
    4532                 :            : 
    4533                 :            :               /* ??? PREV can get deleted by reload inheritance.
    4534                 :            :                  Work around this by emitting a marker note.  */
    4535                 :          0 :               prev = PREV_INSN (insn);
    4536                 :          0 :               reorder_insns_nobb (marker, marker, prev);
    4537                 :            : 
    4538                 :            :               /* Now compute which reload regs to reload them into.  Perhaps
    4539                 :            :                  reusing reload regs from previous insns, or else output
    4540                 :            :                  load insns to reload them.  Maybe output store insns too.
    4541                 :            :                  Record the choices of reload reg in reload_reg_rtx.  */
    4542                 :          0 :               choose_reload_regs (chain);
    4543                 :            : 
    4544                 :            :               /* Generate the insns to reload operands into or out of
    4545                 :            :                  their reload regs.  */
    4546                 :          0 :               emit_reload_insns (chain);
    4547                 :            : 
    4548                 :            :               /* Substitute the chosen reload regs from reload_reg_rtx
    4549                 :            :                  into the insn's body (or perhaps into the bodies of other
    4550                 :            :                  load and store insn that we just made for reloading
    4551                 :            :                  and that we moved the structure into).  */
    4552                 :          0 :               subst_reloads (insn);
    4553                 :            : 
    4554                 :          0 :               prev = PREV_INSN (marker);
    4555                 :          0 :               unlink_insn_chain (marker, marker);
    4556                 :            : 
    4557                 :            :               /* Adjust the exception region notes for loads and stores.  */
    4558                 :          0 :               if (cfun->can_throw_non_call_exceptions && !CALL_P (insn))
    4559                 :          0 :                 fixup_eh_region_note (insn, prev, next);
    4560                 :            : 
    4561                 :            :               /* Adjust the location of REG_ARGS_SIZE.  */
    4562                 :          0 :               rtx p = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
    4563                 :          0 :               if (p)
    4564                 :            :                 {
    4565                 :          0 :                   remove_note (insn, p);
    4566                 :          0 :                   fixup_args_size_notes (prev, PREV_INSN (next),
    4567                 :          0 :                                          get_args_size (p));
    4568                 :            :                 }
    4569                 :            : 
    4570                 :            :               /* If this was an ASM, make sure that all the reload insns
    4571                 :            :                  we have generated are valid.  If not, give an error
    4572                 :            :                  and delete them.  */
    4573                 :          0 :               if (asm_noperands (PATTERN (insn)) >= 0)
    4574                 :          0 :                 for (rtx_insn *p = NEXT_INSN (prev);
    4575                 :          0 :                      p != next;
    4576                 :          0 :                      p = NEXT_INSN (p))
    4577                 :          0 :                   if (p != insn && INSN_P (p)
    4578                 :          0 :                       && GET_CODE (PATTERN (p)) != USE
    4579                 :          0 :                       && (recog_memoized (p) < 0
    4580                 :          0 :                           || (extract_insn (p),
    4581                 :          0 :                               !(constrain_operands (1,
    4582                 :            :                                   get_enabled_alternatives (p))))))
    4583                 :            :                     {
    4584                 :          0 :                       error_for_asm (insn,
    4585                 :            :                                      "%<asm%> operand requires "
    4586                 :            :                                      "impossible reload");
    4587                 :          0 :                       delete_insn (p);
    4588                 :            :                     }
    4589                 :            :             }
    4590                 :            : 
    4591                 :          0 :           if (num_eliminable && chain->need_elim)
    4592                 :          0 :             update_eliminable_offsets ();
    4593                 :            : 
    4594                 :            :           /* Any previously reloaded spilled pseudo reg, stored in this insn,
    4595                 :            :              is no longer validly lying around to save a future reload.
    4596                 :            :              Note that this does not detect pseudos that were reloaded
    4597                 :            :              for this insn in order to be stored in
    4598                 :            :              (obeying register constraints).  That is correct; such reload
    4599                 :            :              registers ARE still valid.  */
    4600                 :          0 :           forget_marked_reloads (&regs_to_forget);
    4601                 :          0 :           CLEAR_REG_SET (&regs_to_forget);
    4602                 :            : 
    4603                 :            :           /* There may have been CLOBBER insns placed after INSN.  So scan
    4604                 :            :              between INSN and NEXT and use them to forget old reloads.  */
    4605                 :          0 :           for (rtx_insn *x = NEXT_INSN (insn); x != old_next; x = NEXT_INSN (x))
    4606                 :          0 :             if (NONJUMP_INSN_P (x) && GET_CODE (PATTERN (x)) == CLOBBER)
    4607                 :          0 :               note_stores (x, forget_old_reloads_1, NULL);
    4608                 :            : 
    4609                 :            : #if AUTO_INC_DEC
    4610                 :            :           /* Likewise for regs altered by auto-increment in this insn.
    4611                 :            :              REG_INC notes have been changed by reloading:
    4612                 :            :              find_reloads_address_1 records substitutions for them,
    4613                 :            :              which have been performed by subst_reloads above.  */
    4614                 :            :           for (i = n_reloads - 1; i >= 0; i--)
    4615                 :            :             {
    4616                 :            :               rtx in_reg = rld[i].in_reg;
    4617                 :            :               if (in_reg)
    4618                 :            :                 {
    4619                 :            :                   enum rtx_code code = GET_CODE (in_reg);
    4620                 :            :                   /* PRE_INC / PRE_DEC will have the reload register ending up
    4621                 :            :                      with the same value as the stack slot, but that doesn't
    4622                 :            :                      hold true for POST_INC / POST_DEC.  Either we have to
    4623                 :            :                      convert the memory access to a true POST_INC / POST_DEC,
    4624                 :            :                      or we can't use the reload register for inheritance.  */
    4625                 :            :                   if ((code == POST_INC || code == POST_DEC)
    4626                 :            :                       && TEST_HARD_REG_BIT (reg_reloaded_valid,
    4627                 :            :                                             REGNO (rld[i].reg_rtx))
    4628                 :            :                       /* Make sure it is the inc/dec pseudo, and not
    4629                 :            :                          some other (e.g. output operand) pseudo.  */
    4630                 :            :                       && ((unsigned) reg_reloaded_contents[REGNO (rld[i].reg_rtx)]
    4631                 :            :                           == REGNO (XEXP (in_reg, 0))))
    4632                 :            : 
    4633                 :            :                     {
    4634                 :            :                       rtx reload_reg = rld[i].reg_rtx;
    4635                 :            :                       machine_mode mode = GET_MODE (reload_reg);
    4636                 :            :                       int n = 0;
    4637                 :            :                       rtx_insn *p;
    4638                 :            : 
    4639                 :            :                       for (p = PREV_INSN (old_next); p != prev; p = PREV_INSN (p))
    4640                 :            :                         {
    4641                 :            :                           /* We really want to ignore REG_INC notes here, so
    4642                 :            :                              use PATTERN (p) as argument to reg_set_p .  */
    4643                 :            :                           if (reg_set_p (reload_reg, PATTERN (p)))
    4644                 :            :                             break;
    4645                 :            :                           n = count_occurrences (PATTERN (p), reload_reg, 0);
    4646                 :            :                           if (! n)
    4647                 :            :                             continue;
    4648                 :            :                           if (n == 1)
    4649                 :            :                             {
    4650                 :            :                               rtx replace_reg
    4651                 :            :                                 = gen_rtx_fmt_e (code, mode, reload_reg);
    4652                 :            : 
    4653                 :            :                               validate_replace_rtx_group (reload_reg,
    4654                 :            :                                                           replace_reg, p);
    4655                 :            :                               n = verify_changes (0);
    4656                 :            : 
    4657                 :            :                               /* We must also verify that the constraints
    4658                 :            :                                  are met after the replacement.  Make sure
    4659                 :            :                                  extract_insn is only called for an insn
    4660                 :            :                                  where the replacements were found to be
    4661                 :            :                                  valid so far. */
    4662                 :            :                               if (n)
    4663                 :            :                                 {
    4664                 :            :                                   extract_insn (p);
    4665                 :            :                                   n = constrain_operands (1,
    4666                 :            :                                     get_enabled_alternatives (p));
    4667                 :            :                                 }
    4668                 :            : 
    4669                 :            :                               /* If the constraints were not met, then
    4670                 :            :                                  undo the replacement, else confirm it.  */
    4671                 :            :                               if (!n)
    4672                 :            :                                 cancel_changes (0);
    4673                 :            :                               else
    4674                 :            :                                 confirm_change_group ();
    4675                 :            :                             }
    4676                 :            :                           break;
    4677                 :            :                         }
    4678                 :            :                       if (n == 1)
    4679                 :            :                         {
    4680                 :            :                           add_reg_note (p, REG_INC, reload_reg);
    4681                 :            :                           /* Mark this as having an output reload so that the
    4682                 :            :                              REG_INC processing code below won't invalidate
    4683                 :            :                              the reload for inheritance.  */
    4684                 :            :                           SET_HARD_REG_BIT (reg_is_output_reload,
    4685                 :            :                                             REGNO (reload_reg));
    4686                 :            :                           SET_REGNO_REG_SET (&reg_has_output_reload,
    4687                 :            :                                              REGNO (XEXP (in_reg, 0)));
    4688                 :            :                         }
    4689                 :            :                       else
    4690                 :            :                         forget_old_reloads_1 (XEXP (in_reg, 0), NULL_RTX,
    4691                 :            :                                               NULL);
    4692                 :            :                     }
    4693                 :            :                   else if ((code == PRE_INC || code == PRE_DEC)
    4694                 :            :                            && TEST_HARD_REG_BIT (reg_reloaded_valid,
    4695                 :            :                                                  REGNO (rld[i].reg_rtx))
    4696                 :            :                            /* Make sure it is the inc/dec pseudo, and not
    4697                 :            :                               some other (e.g. output operand) pseudo.  */
    4698                 :            :                            && ((unsigned) reg_reloaded_contents[REGNO (rld[i].reg_rtx)]
    4699                 :            :                                == REGNO (XEXP (in_reg, 0))))
    4700                 :            :                     {
    4701                 :            :                       SET_HARD_REG_BIT (reg_is_output_reload,
    4702                 :            :                                         REGNO (rld[i].reg_rtx));
    4703                 :            :                       SET_REGNO_REG_SET (&reg_has_output_reload,
    4704                 :            :                                          REGNO (XEXP (in_reg, 0)));
    4705                 :            :                     }
    4706                 :            :                   else if (code == PRE_INC || code == PRE_DEC
    4707                 :            :                            || code == POST_INC || code == POST_DEC)
    4708                 :            :                     {
    4709                 :            :                       int in_regno = REGNO (XEXP (in_reg, 0));
    4710                 :            : 
    4711                 :            :                       if (reg_last_reload_reg[in_regno] != NULL_RTX)
    4712                 :            :                         {
    4713                 :            :                           int in_hard_regno;
    4714                 :            :                           bool forget_p = true;
    4715                 :            : 
    4716                 :            :                           in_hard_regno = REGNO (reg_last_reload_reg[in_regno]);
    4717                 :            :                           if (TEST_HARD_REG_BIT (reg_reloaded_valid,
    4718                 :            :                                                  in_hard_regno))
    4719                 :            :                             {
    4720                 :            :                               for (rtx_insn *x = (old_prev ?
    4721                 :            :                                                   NEXT_INSN (old_prev) : insn);
    4722                 :            :                                    x != old_next;
    4723                 :            :                                    x = NEXT_INSN (x))
    4724                 :            :                                 if (x == reg_reloaded_insn[in_hard_regno])
    4725                 :            :                                   {
    4726                 :            :                                     forget_p = false;
    4727                 :            :                                     break;
    4728                 :            :                                   }
    4729                 :            :                             }
    4730                 :            :                           /* If for some reasons, we didn't set up
    4731                 :            :                              reg_last_reload_reg in this insn,
    4732                 :            :                              invalidate inheritance from previous
    4733                 :            :                              insns for the incremented/decremented
    4734                 :            :                              register.  Such registers will be not in
    4735                 :            :                              reg_has_output_reload.  Invalidate it
    4736                 :            :                              also if the corresponding element in
    4737                 :            :                              reg_reloaded_insn is also
    4738                 :            :                              invalidated.  */
    4739                 :            :                           if (forget_p)
    4740                 :            :                             forget_old_reloads_1 (XEXP (in_reg, 0),
    4741                 :            :                                                   NULL_RTX, NULL);
    4742                 :            :                         }
    4743                 :            :                     }
    4744                 :            :                 }
    4745                 :            :             }
    4746                 :            :           /* If a pseudo that got a hard register is auto-incremented,
    4747                 :            :              we must purge records of copying it into pseudos without
    4748                 :            :              hard registers.  */
    4749                 :            :           for (rtx x = REG_NOTES (insn); x; x = XEXP (x, 1))
    4750                 :            :             if (REG_NOTE_KIND (x) == REG_INC)
    4751                 :            :               {
    4752                 :            :                 /* See if this pseudo reg was reloaded in this insn.
    4753                 :            :                    If so, its last-reload info is still valid
    4754                 :            :                    because it is based on this insn's reload.  */
    4755                 :            :                 for (i = 0; i < n_reloads; i++)
    4756                 :            :                   if (rld[i].out == XEXP (x, 0))
    4757                 :            :                     break;
    4758                 :            : 
    4759                 :            :                 if (i == n_reloads)
    4760                 :            :                   forget_old_reloads_1 (XEXP (x, 0), NULL_RTX, NULL);
    4761                 :            :               }
    4762                 :            : #endif
    4763                 :            :         }
    4764                 :            :       /* A reload reg's contents are unknown after a label.  */
    4765                 :          0 :       if (LABEL_P (insn))
    4766                 :          0 :         CLEAR_HARD_REG_SET (reg_reloaded_valid);
    4767                 :            : 
    4768                 :            :       /* Don't assume a reload reg is still good after a call insn
    4769                 :            :          if it is a call-used reg, or if it contains a value that will
    4770                 :            :          be partially clobbered by the call.  */
    4771                 :          0 :       else if (CALL_P (insn))
    4772                 :            :         {
    4773                 :          0 :           reg_reloaded_valid
    4774                 :          0 :             &= ~insn_callee_abi (insn).full_and_partial_reg_clobbers ();
    4775                 :            : 
    4776                 :            :           /* If this is a call to a setjmp-type function, we must not
    4777                 :            :              reuse any reload reg contents across the call; that will
    4778                 :            :              just be clobbered by other uses of the register in later
    4779                 :            :              code, before the longjmp.  */
    4780                 :          0 :           if (find_reg_note (insn, REG_SETJMP, NULL_RTX))
    4781                 :          0 :             CLEAR_HARD_REG_SET (reg_reloaded_valid);
    4782                 :            :         }
    4783                 :            :     }
    4784                 :            : 
    4785                 :            :   /* Clean up.  */
    4786                 :          0 :   free (reg_last_reload_reg);
    4787                 :          0 :   CLEAR_REG_SET (&reg_has_output_reload);
    4788                 :          0 : }
    4789                 :            : 
    4790                 :            : /* Discard all record of any value reloaded from X,
    4791                 :            :    or reloaded in X from someplace else;
    4792                 :            :    unless X is an output reload reg of the current insn.
    4793                 :            : 
    4794                 :            :    X may be a hard reg (the reload reg)
    4795                 :            :    or it may be a pseudo reg that was reloaded from.
    4796                 :            : 
    4797                 :            :    When DATA is non-NULL just mark the registers in regset
    4798                 :            :    to be forgotten later.  */
    4799                 :            : 
    4800                 :            : static void
    4801                 :          0 : forget_old_reloads_1 (rtx x, const_rtx, void *data)
    4802                 :            : {
    4803                 :          0 :   unsigned int regno;
    4804                 :          0 :   unsigned int nr;
    4805                 :          0 :   regset regs = (regset) data;
    4806                 :            : 
    4807                 :            :   /* note_stores does give us subregs of hard regs,
    4808                 :            :      subreg_regno_offset requires a hard reg.  */
    4809                 :          0 :   while (GET_CODE (x) == SUBREG)
    4810                 :            :     {
    4811                 :            :       /* We ignore the subreg offset when calculating the regno,
    4812                 :            :          because we are using the entire underlying hard register
    4813                 :            :          below.  */
    4814                 :          0 :       x = SUBREG_REG (x);
    4815                 :            :     }
    4816                 :            : 
    4817                 :          0 :   if (!REG_P (x))
    4818                 :            :     return;
    4819                 :            : 
    4820                 :          0 :   regno = REGNO (x);
    4821                 :            : 
    4822                 :          0 :   if (regno >= FIRST_PSEUDO_REGISTER)
    4823                 :            :     nr = 1;
    4824                 :            :   else
    4825                 :            :     {
    4826                 :          0 :       unsigned int i;
    4827                 :            : 
    4828                 :          0 :       nr = REG_NREGS (x);
    4829                 :            :       /* Storing into a spilled-reg invalidates its contents.
    4830                 :            :          This can happen if a block-local pseudo is allocated to that reg
    4831                 :            :          and it wasn't spilled because this block's total need is 0.
    4832                 :            :          Then some insn might have an optional reload and use this reg.  */
    4833                 :          0 :       if (!regs)
    4834                 :          0 :         for (i = 0; i < nr; i++)
    4835                 :            :           /* But don't do this if the reg actually serves as an output
    4836                 :            :              reload reg in the current instruction.  */
    4837                 :          0 :           if (n_reloads == 0
    4838                 :          0 :               || ! TEST_HARD_REG_BIT (reg_is_output_reload, regno + i))
    4839                 :            :             {
    4840                 :          0 :               CLEAR_HARD_REG_BIT (reg_reloaded_valid, regno + i);
    4841                 :          0 :               spill_reg_store[regno + i] = 0;
    4842                 :            :             }
    4843                 :            :     }
    4844                 :            : 
    4845                 :          0 :   if (regs)
    4846                 :          0 :     while (nr-- > 0)
    4847                 :          0 :       SET_REGNO_REG_SET (regs, regno + nr);
    4848                 :            :   else
    4849                 :            :     {
    4850                 :            :       /* Since value of X has changed,
    4851                 :            :          forget any value previously copied from it.  */
    4852                 :            : 
    4853                 :          0 :       while (nr-- > 0)
    4854                 :            :         /* But don't forget a copy if this is the output reload
    4855                 :            :            that establishes the copy's validity.  */
    4856                 :          0 :         if (n_reloads == 0
    4857                 :          0 :             || !REGNO_REG_SET_P (&reg_has_output_reload, regno + nr))
    4858                 :          0 :           reg_last_reload_reg[regno + nr] = 0;
    4859                 :            :      }
    4860                 :            : }
    4861                 :            : 
    4862                 :            : /* Forget the reloads marked in regset by previous function.  */
    4863                 :            : static void
    4864                 :          0 : forget_marked_reloads (regset regs)
    4865                 :            : {
    4866                 :          0 :   unsigned int reg;
    4867                 :          0 :   reg_set_iterator rsi;
    4868                 :          0 :   EXECUTE_IF_SET_IN_REG_SET (regs, 0, reg, rsi)
    4869                 :            :     {
    4870                 :          0 :       if (reg < FIRST_PSEUDO_REGISTER
    4871                 :            :           /* But don't do this if the reg actually serves as an output
    4872                 :            :              reload reg in the current instruction.  */
    4873                 :          0 :           && (n_reloads == 0
    4874                 :          0 :               || ! TEST_HARD_REG_BIT (reg_is_output_reload, reg)))
    4875                 :            :           {
    4876                 :          0 :             CLEAR_HARD_REG_BIT (reg_reloaded_valid, reg);
    4877                 :          0 :             spill_reg_store[reg] = 0;
    4878                 :            :           }
    4879                 :          0 :       if (n_reloads == 0
    4880                 :          0 :           || !REGNO_REG_SET_P (&reg_has_output_reload, reg))
    4881                 :          0 :         reg_last_reload_reg[reg] = 0;
    4882                 :            :     }
    4883                 :          0 : }
    4884                 :            : 
    4885                 :            : /* The following HARD_REG_SETs indicate when each hard register is
    4886                 :            :    used for a reload of various parts of the current insn.  */
    4887                 :            : 
    4888                 :            : /* If reg is unavailable for all reloads.  */
    4889                 :            : static HARD_REG_SET reload_reg_unavailable;
    4890                 :            : /* If reg is in use as a reload reg for a RELOAD_OTHER reload.  */
    4891                 :            : static HARD_REG_SET reload_reg_used;
    4892                 :            : /* If reg is in use for a RELOAD_FOR_INPUT_ADDRESS reload for operand I.  */
    4893                 :            : static HARD_REG_SET reload_reg_used_in_input_addr[MAX_RECOG_OPERANDS];
    4894                 :            : /* If reg is in use for a RELOAD_FOR_INPADDR_ADDRESS reload for operand I.  */
    4895                 :            : static HARD_REG_SET reload_reg_used_in_inpaddr_addr[MAX_RECOG_OPERANDS];
    4896                 :            : /* If reg is in use for a RELOAD_FOR_OUTPUT_ADDRESS reload for operand I.  */
    4897                 :            : static HARD_REG_SET reload_reg_used_in_output_addr[MAX_RECOG_OPERANDS];
    4898                 :            : /* If reg is in use for a RELOAD_FOR_OUTADDR_ADDRESS reload for operand I.  */
    4899                 :            : static HARD_REG_SET reload_reg_used_in_outaddr_addr[MAX_RECOG_OPERANDS];
    4900                 :            : /* If reg is in use for a RELOAD_FOR_INPUT reload for operand I.  */
    4901                 :            : static HARD_REG_SET reload_reg_used_in_input[MAX_RECOG_OPERANDS];
    4902                 :            : /* If reg is in use for a RELOAD_FOR_OUTPUT reload for operand I.  */
    4903                 :            : static HARD_REG_SET reload_reg_used_in_output[MAX_RECOG_OPERANDS];
    4904                 :            : /* If reg is in use for a RELOAD_FOR_OPERAND_ADDRESS reload.  */
    4905                 :            : static HARD_REG_SET reload_reg_used_in_op_addr;
    4906                 :            : /* If reg is in use for a RELOAD_FOR_OPADDR_ADDR reload.  */
    4907                 :            : static HARD_REG_SET reload_reg_used_in_op_addr_reload;
    4908                 :            : /* If reg is in use for a RELOAD_FOR_INSN reload.  */
    4909                 :            : static HARD_REG_SET reload_reg_used_in_insn;
    4910                 :            : /* If reg is in use for a RELOAD_FOR_OTHER_ADDRESS reload.  */
    4911                 :            : static HARD_REG_SET reload_reg_used_in_other_addr;
    4912                 :            : 
    4913                 :            : /* If reg is in use as a reload reg for any sort of reload.  */
    4914                 :            : static HARD_REG_SET reload_reg_used_at_all;
    4915                 :            : 
    4916                 :            : /* If reg is use as an inherited reload.  We just mark the first register
    4917                 :            :    in the group.  */
    4918                 :            : static HARD_REG_SET reload_reg_used_for_inherit;
    4919                 :            : 
    4920                 :            : /* Records which hard regs are used in any way, either as explicit use or
    4921                 :            :    by being allocated to a pseudo during any point of the current insn.  */
    4922                 :            : static HARD_REG_SET reg_used_in_insn;
    4923                 :            : 
    4924                 :            : /* Mark reg REGNO as in use for a reload of the sort spec'd by OPNUM and
    4925                 :            :    TYPE. MODE is used to indicate how many consecutive regs are
    4926                 :            :    actually used.  */
    4927                 :            : 
    4928                 :            : static void
    4929                 :          0 : mark_reload_reg_in_use (unsigned int regno, int opnum, enum reload_type type,
    4930                 :            :                         machine_mode mode)
    4931                 :            : {
    4932                 :          0 :   switch (type)
    4933                 :            :     {
    4934                 :          0 :     case RELOAD_OTHER:
    4935                 :          0 :       add_to_hard_reg_set (&reload_reg_used, mode, regno);
    4936                 :            :       break;
    4937                 :            : 
    4938                 :          0 :     case RELOAD_FOR_INPUT_ADDRESS:
    4939                 :          0 :       add_to_hard_reg_set (&reload_reg_used_in_input_addr[opnum], mode, regno);
    4940                 :            :       break;
    4941                 :            : 
    4942                 :          0 :     case RELOAD_FOR_INPADDR_ADDRESS:
    4943                 :          0 :       add_to_hard_reg_set (&reload_reg_used_in_inpaddr_addr[opnum], mode, regno);
    4944                 :            :       break;
    4945                 :            : 
    4946                 :          0 :     case RELOAD_FOR_OUTPUT_ADDRESS:
    4947                 :          0 :       add_to_hard_reg_set (&reload_reg_used_in_output_addr[opnum], mode, regno);
    4948                 :            :       break;
    4949                 :            : 
    4950                 :          0 :     case RELOAD_FOR_OUTADDR_ADDRESS:
    4951                 :          0 :       add_to_hard_reg_set (&reload_reg_used_in_outaddr_addr[opnum], mode, regno);
    4952                 :            :       break;
    4953                 :            : 
    4954                 :          0 :     case RELOAD_FOR_OPERAND_ADDRESS:
    4955                 :          0 :       add_to_hard_reg_set (&reload_reg_used_in_op_addr, mode, regno);
    4956                 :            :       break;
    4957                 :            : 
    4958                 :          0 :     case RELOAD_FOR_OPADDR_ADDR:
    4959                 :          0 :       add_to_hard_reg_set (&reload_reg_used_in_op_addr_reload, mode, regno);
    4960                 :            :       break;
    4961                 :            : 
    4962                 :          0 :     case RELOAD_FOR_OTHER_ADDRESS:
    4963                 :          0 :       add_to_hard_reg_set (&reload_reg_used_in_other_addr, mode, regno);
    4964                 :            :       break;
    4965                 :            : 
    4966                 :          0 :     case RELOAD_FOR_INPUT:
    4967                 :          0 :       add_to_hard_reg_set (&reload_reg_used_in_input[opnum], mode, regno);
    4968                 :            :       break;
    4969                 :            : 
    4970                 :          0 :     case RELOAD_FOR_OUTPUT:
    4971                 :          0 :       add_to_hard_reg_set (&reload_reg_used_in_output[opnum], mode, regno);
    4972                 :            :       break;
    4973                 :            : 
    4974                 :          0 :     case RELOAD_FOR_INSN:
    4975                 :          0 :       add_to_hard_reg_set (&reload_reg_used_in_insn,  mode, regno);
    4976                 :            :       break;
    4977                 :            :     }
    4978                 :            : 
    4979                 :          0 :   add_to_hard_reg_set (&reload_reg_used_at_all, mode, regno);
    4980                 :          0 : }
    4981                 :            : 
    4982                 :            : /* Similarly, but show REGNO is no longer in use for a reload.  */
    4983                 :            : 
    4984                 :            : static void
    4985                 :          0 : clear_reload_reg_in_use (unsigned int regno, int opnum,
    4986                 :            :                          enum reload_type type, machine_mode mode)
    4987                 :            : {
    4988                 :          0 :   unsigned int nregs = hard_regno_nregs (regno, mode);
    4989                 :          0 :   unsigned int start_regno, end_regno, r;
    4990                 :          0 :   int i;
    4991                 :            :   /* A complication is that for some reload types, inheritance might
    4992                 :            :      allow multiple reloads of the same types to share a reload register.
    4993                 :            :      We set check_opnum if we have to check only reloads with the same
    4994                 :            :      operand number, and check_any if we have to check all reloads.  */
    4995                 :          0 :   int check_opnum = 0;
    4996                 :          0 :   int check_any = 0;
    4997                 :          0 :   HARD_REG_SET *used_in_set;
    4998                 :            : 
    4999                 :          0 :   switch (type)
    5000                 :            :     {
    5001                 :            :     case RELOAD_OTHER:
    5002                 :            :       used_in_set = &reload_reg_used;
    5003                 :            :       break;
    5004                 :            : 
    5005                 :          0 :     case RELOAD_FOR_INPUT_ADDRESS:
    5006                 :          0 :       used_in_set = &reload_reg_used_in_input_addr[opnum];
    5007                 :          0 :       break;
    5008                 :            : 
    5009                 :          0 :     case RELOAD_FOR_INPADDR_ADDRESS:
    5010                 :          0 :       check_opnum = 1;
    5011                 :          0 :       used_in_set = &reload_reg_used_in_inpaddr_addr[opnum];
    5012                 :          0 :       break;
    5013                 :            : 
    5014                 :          0 :     case RELOAD_FOR_OUTPUT_ADDRESS:
    5015                 :          0 :       used_in_set = &reload_reg_used_in_output_addr[opnum];
    5016                 :          0 :       break;
    5017                 :            : 
    5018                 :          0 :     case RELOAD_FOR_OUTADDR_ADDRESS:
    5019                 :          0 :       check_opnum = 1;
    5020                 :          0 :       used_in_set = &reload_reg_used_in_outaddr_addr[opnum];
    5021                 :          0 :       break;
    5022                 :            : 
    5023                 :          0 :     case RELOAD_FOR_OPERAND_ADDRESS:
    5024                 :          0 :       used_in_set = &reload_reg_used_in_op_addr;
    5025                 :          0 :       break;
    5026                 :            : 
    5027                 :          0 :     case RELOAD_FOR_OPADDR_ADDR:
    5028                 :          0 :       check_any = 1;
    5029                 :          0 :       used_in_set = &reload_reg_used_in_op_addr_reload;
    5030                 :          0 :       break;
    5031                 :            : 
    5032                 :          0 :     case RELOAD_FOR_OTHER_ADDRESS:
    5033                 :          0 :       used_in_set = &reload_reg_used_in_other_addr;
    5034                 :          0 :       check_any = 1;
    5035                 :          0 :       break;
    5036                 :            : 
    5037                 :          0 :     case RELOAD_FOR_INPUT:
    5038                 :          0 :       used_in_set = &reload_reg_used_in_input[opnum];
    5039                 :          0 :       break;
    5040                 :            : 
    5041                 :          0 :     case RELOAD_FOR_OUTPUT:
    5042                 :          0 :       used_in_set = &reload_reg_used_in_output[opnum];
    5043                 :          0 :       break;
    5044                 :            : 
    5045                 :          0 :     case RELOAD_FOR_INSN:
    5046                 :          0 :       used_in_set = &reload_reg_used_in_insn;
    5047                 :          0 :       break;
    5048                 :          0 :     default:
    5049                 :          0 :       gcc_unreachable ();
    5050                 :            :     }
    5051                 :            :   /* We resolve conflicts with remaining reloads of the same type by
    5052                 :            :      excluding the intervals of reload registers by them from the
    5053                 :            :      interval of freed reload registers.  Since we only keep track of
    5054                 :            :      one set of interval bounds, we might have to exclude somewhat
    5055                 :            :      more than what would be necessary if we used a HARD_REG_SET here.
    5056                 :            :      But this should only happen very infrequently, so there should
    5057                 :            :      be no reason to worry about it.  */
    5058                 :            : 
    5059                 :          0 :   start_regno = regno;
    5060                 :          0 :   end_regno = regno + nregs;
    5061                 :          0 :   if (check_opnum || check_any)
    5062                 :            :     {
    5063                 :          0 :       for (i = n_reloads - 1; i >= 0; i--)
    5064                 :            :         {
    5065                 :          0 :           if (rld[i].when_needed == type
    5066                 :          0 :               && (check_any || rld[i].opnum == opnum)
    5067                 :          0 :               && rld[i].reg_rtx)
    5068                 :            :             {
    5069                 :          0 :               unsigned int conflict_start = true_regnum (rld[i].reg_rtx);
    5070                 :          0 :               unsigned int conflict_end
    5071                 :          0 :                 = end_hard_regno (rld[i].mode, conflict_start);
    5072                 :            : 
    5073                 :            :               /* If there is an overlap with the first to-be-freed register,
    5074                 :            :                  adjust the interval start.  */
    5075                 :          0 :               if (conflict_start <= start_regno && conflict_end > start_regno)
    5076                 :          0 :                 start_regno = conflict_end;
    5077                 :            :               /* Otherwise, if there is a conflict with one of the other
    5078                 :            :                  to-be-freed registers, adjust the interval end.  */
    5079                 :          0 :               if (conflict_start > start_regno && conflict_start < end_regno)
    5080                 :          0 :                 end_regno = conflict_start;
    5081                 :            :             }
    5082                 :            :         }
    5083                 :            :     }
    5084                 :            : 
    5085                 :          0 :   for (r = start_regno; r < end_regno; r++)
    5086                 :          0 :     CLEAR_HARD_REG_BIT (*used_in_set, r);
    5087                 :          0 : }
    5088                 :            : 
    5089                 :            : /* 1 if reg REGNO is free as a reload reg for a reload of the sort
    5090                 :            :    specified by OPNUM and TYPE.  */
    5091                 :            : 
    5092                 :            : static int
    5093                 :          0 : reload_reg_free_p (unsigned int regno, int opnum, enum reload_type type)
    5094                 :            : {
    5095                 :          0 :   int i;
    5096                 :            : 
    5097                 :            :   /* In use for a RELOAD_OTHER means it's not available for anything.  */
    5098                 :          0 :   if (TEST_HARD_REG_BIT (reload_reg_used, regno)
    5099                 :          0 :       || TEST_HARD_REG_BIT (reload_reg_unavailable, regno))
    5100                 :            :     return 0;
    5101                 :            : 
    5102                 :          0 :   switch (type)
    5103                 :            :     {
    5104                 :          0 :     case RELOAD_OTHER:
    5105                 :            :       /* In use for anything means we can't use it for RELOAD_OTHER.  */
    5106                 :          0 :       if (TEST_HARD_REG_BIT (reload_reg_used_in_other_addr, regno)
    5107                 :          0 :           || TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)
    5108                 :          0 :           || TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno)
    5109                 :          0 :           || TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno))
    5110                 :            :         return 0;
    5111                 :            : 
    5112                 :          0 :       for (i = 0; i < reload_n_operands; i++)
    5113                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno)
    5114                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno)
    5115                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno)
    5116                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno)
    5117                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)
    5118                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno))
    5119                 :            :           return 0;
    5120                 :            : 
    5121                 :            :       return 1;
    5122                 :            : 
    5123                 :          0 :     case RELOAD_FOR_INPUT:
    5124                 :          0 :       if (TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno)
    5125                 :          0 :           || TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno))
    5126                 :            :         return 0;
    5127                 :            : 
    5128                 :          0 :       if (TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno))
    5129                 :            :         return 0;
    5130                 :            : 
    5131                 :            :       /* If it is used for some other input, can't use it.  */
    5132                 :          0 :       for (i = 0; i < reload_n_operands; i++)
    5133                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno))
    5134                 :            :           return 0;
    5135                 :            : 
    5136                 :            :       /* If it is used in a later operand's address, can't use it.  */
    5137                 :          0 :       for (i = opnum + 1; i < reload_n_operands; i++)
    5138                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno)
    5139                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno))
    5140                 :            :           return 0;
    5141                 :            : 
    5142                 :            :       return 1;
    5143                 :            : 
    5144                 :          0 :     case RELOAD_FOR_INPUT_ADDRESS:
    5145                 :            :       /* Can't use a register if it is used for an input address for this
    5146                 :            :          operand or used as an input in an earlier one.  */
    5147                 :          0 :       if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[opnum], regno)
    5148                 :          0 :           || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[opnum], regno))
    5149                 :            :         return 0;
    5150                 :            : 
    5151                 :          0 :       for (i = 0; i < opnum; i++)
    5152                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno))
    5153                 :            :           return 0;
    5154                 :            : 
    5155                 :            :       return 1;
    5156                 :            : 
    5157                 :          0 :     case RELOAD_FOR_INPADDR_ADDRESS:
    5158                 :            :       /* Can't use a register if it is used for an input address
    5159                 :            :          for this operand or used as an input in an earlier
    5160                 :            :          one.  */
    5161                 :          0 :       if (TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[opnum], regno))
    5162                 :            :         return 0;
    5163                 :            : 
    5164                 :          0 :       for (i = 0; i < opnum; i++)
    5165                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno))
    5166                 :            :           return 0;
    5167                 :            : 
    5168                 :            :       return 1;
    5169                 :            : 
    5170                 :          0 :     case RELOAD_FOR_OUTPUT_ADDRESS:
    5171                 :            :       /* Can't use a register if it is used for an output address for this
    5172                 :            :          operand or used as an output in this or a later operand.  Note
    5173                 :            :          that multiple output operands are emitted in reverse order, so
    5174                 :            :          the conflicting ones are those with lower indices.  */
    5175                 :          0 :       if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[opnum], regno))
    5176                 :            :         return 0;
    5177                 :            : 
    5178                 :          0 :       for (i = 0; i <= opnum; i++)
    5179                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno))
    5180                 :            :           return 0;
    5181                 :            : 
    5182                 :            :       return 1;
    5183                 :            : 
    5184                 :          0 :     case RELOAD_FOR_OUTADDR_ADDRESS:
    5185                 :            :       /* Can't use a register if it is used for an output address
    5186                 :            :          for this operand or used as an output in this or a
    5187                 :            :          later operand.  Note that multiple output operands are
    5188                 :            :          emitted in reverse order, so the conflicting ones are
    5189                 :            :          those with lower indices.  */
    5190                 :          0 :       if (TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[opnum], regno))
    5191                 :            :         return 0;
    5192                 :            : 
    5193                 :          0 :       for (i = 0; i <= opnum; i++)
    5194                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno))
    5195                 :            :           return 0;
    5196                 :            : 
    5197                 :            :       return 1;
    5198                 :            : 
    5199                 :            :     case RELOAD_FOR_OPERAND_ADDRESS:
    5200                 :          0 :       for (i = 0; i < reload_n_operands; i++)
    5201                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno))
    5202                 :            :           return 0;
    5203                 :            : 
    5204                 :          0 :       return (! TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno)
    5205                 :          0 :               && ! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno));
    5206                 :            : 
    5207                 :            :     case RELOAD_FOR_OPADDR_ADDR:
    5208                 :          0 :       for (i = 0; i < reload_n_operands; i++)
    5209                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno))
    5210                 :            :           return 0;
    5211                 :            : 
    5212                 :          0 :       return (!TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno));
    5213                 :            : 
    5214                 :          0 :     case RELOAD_FOR_OUTPUT:
    5215                 :            :       /* This cannot share a register with RELOAD_FOR_INSN reloads, other
    5216                 :            :          outputs, or an operand address for this or an earlier output.
    5217                 :            :          Note that multiple output operands are emitted in reverse order,
    5218                 :            :          so the conflicting ones are those with higher indices.  */
    5219                 :          0 :       if (TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno))
    5220                 :            :         return 0;
    5221                 :            : 
    5222                 :          0 :       for (i = 0; i < reload_n_operands; i++)
    5223                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno))
    5224                 :            :           return 0;
    5225                 :            : 
    5226                 :          0 :       for (i = opnum; i < reload_n_operands; i++)
    5227                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno)
    5228                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno))
    5229                 :            :           return 0;
    5230                 :            : 
    5231                 :            :       return 1;
    5232                 :            : 
    5233                 :            :     case RELOAD_FOR_INSN:
    5234                 :          0 :       for (i = 0; i < reload_n_operands; i++)
    5235                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno)
    5236                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno))
    5237                 :            :           return 0;
    5238                 :            : 
    5239                 :          0 :       return (! TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno)
    5240                 :          0 :               && ! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno));
    5241                 :            : 
    5242                 :          0 :     case RELOAD_FOR_OTHER_ADDRESS:
    5243                 :          0 :       return ! TEST_HARD_REG_BIT (reload_reg_used_in_other_addr, regno);
    5244                 :            : 
    5245                 :          0 :     default:
    5246                 :          0 :       gcc_unreachable ();
    5247                 :            :     }
    5248                 :            : }
    5249                 :            : 
    5250                 :            : /* Return 1 if the value in reload reg REGNO, as used by the reload with
    5251                 :            :    the number RELOADNUM, is still available in REGNO at the end of the insn.
    5252                 :            : 
    5253                 :            :    We can assume that the reload reg was already tested for availability
    5254                 :            :    at the time it is needed, and we should not check this again,
    5255                 :            :    in case the reg has already been marked in use.  */
    5256                 :            : 
    5257                 :            : static int
    5258                 :          0 : reload_reg_reaches_end_p (unsigned int regno, int reloadnum)
    5259                 :            : {
    5260                 :          0 :   int opnum = rld[reloadnum].opnum;
    5261                 :          0 :   enum reload_type type = rld[reloadnum].when_needed;
    5262                 :          0 :   int i;
    5263                 :            : 
    5264                 :            :   /* See if there is a reload with the same type for this operand, using
    5265                 :            :      the same register. This case is not handled by the code below.  */
    5266                 :          0 :   for (i = reloadnum + 1; i < n_reloads; i++)
    5267                 :            :     {
    5268                 :          0 :       rtx reg;
    5269                 :            : 
    5270                 :          0 :       if (rld[i].opnum != opnum || rld[i].when_needed != type)
    5271                 :          0 :         continue;
    5272                 :          0 :       reg = rld[i].reg_rtx;
    5273                 :          0 :       if (reg == NULL_RTX)
    5274                 :          0 :         continue;
    5275                 :          0 :       if (regno >= REGNO (reg) && regno < END_REGNO (reg))
    5276                 :            :         return 0;
    5277                 :            :     }
    5278                 :            :   
    5279                 :          0 :   switch (type)
    5280                 :            :     {
    5281                 :            :     case RELOAD_OTHER:
    5282                 :            :       /* Since a RELOAD_OTHER reload claims the reg for the entire insn,
    5283                 :            :          its value must reach the end.  */
    5284                 :            :       return 1;
    5285                 :            : 
    5286                 :            :       /* If this use is for part of the insn,
    5287                 :            :          its value reaches if no subsequent part uses the same register.
    5288                 :            :          Just like the above function, don't try to do this with lots
    5289                 :            :          of fallthroughs.  */
    5290                 :            : 
    5291                 :            :     case RELOAD_FOR_OTHER_ADDRESS:
    5292                 :            :       /* Here we check for everything else, since these don't conflict
    5293                 :            :          with anything else and everything comes later.  */
    5294                 :            : 
    5295                 :          0 :       for (i = 0; i < reload_n_operands; i++)
    5296                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno)
    5297                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno)
    5298                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno)
    5299                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno)
    5300                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno)
    5301                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno))
    5302                 :            :           return 0;
    5303                 :            : 
    5304                 :          0 :       return (! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)
    5305                 :          0 :               && ! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno)
    5306                 :          0 :               && ! TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno)
    5307                 :          0 :               && ! TEST_HARD_REG_BIT (reload_reg_used, regno));
    5308                 :            : 
    5309                 :            :     case RELOAD_FOR_INPUT_ADDRESS:
    5310                 :            :     case RELOAD_FOR_INPADDR_ADDRESS:
    5311                 :            :       /* Similar, except that we check only for this and subsequent inputs
    5312                 :            :          and the address of only subsequent inputs and we do not need
    5313                 :            :          to check for RELOAD_OTHER objects since they are known not to
    5314                 :            :          conflict.  */
    5315                 :            : 
    5316                 :          0 :       for (i = opnum; i < reload_n_operands; i++)
    5317                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno))
    5318                 :            :           return 0;
    5319                 :            : 
    5320                 :            :       /* Reload register of reload with type RELOAD_FOR_INPADDR_ADDRESS
    5321                 :            :          could be killed if the register is also used by reload with type
    5322                 :            :          RELOAD_FOR_INPUT_ADDRESS, so check it.  */
    5323                 :          0 :       if (type == RELOAD_FOR_INPADDR_ADDRESS
    5324                 :          0 :           && TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[opnum], regno))
    5325                 :            :         return 0;
    5326                 :            : 
    5327                 :          0 :       for (i = opnum + 1; i < reload_n_operands; i++)
    5328                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno)
    5329                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno))
    5330                 :            :           return 0;
    5331                 :            : 
    5332                 :          0 :       for (i = 0; i < reload_n_operands; i++)
    5333                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno)
    5334                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno)
    5335                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno))
    5336                 :            :           return 0;
    5337                 :            : 
    5338                 :          0 :       if (TEST_HARD_REG_BIT (reload_reg_used_in_op_addr_reload, regno))
    5339                 :            :         return 0;
    5340                 :            : 
    5341                 :          0 :       return (!TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)
    5342                 :          0 :               && !TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno)
    5343                 :          0 :               && !TEST_HARD_REG_BIT (reload_reg_used, regno));
    5344                 :            : 
    5345                 :          0 :     case RELOAD_FOR_INPUT:
    5346                 :            :       /* Similar to input address, except we start at the next operand for
    5347                 :            :          both input and input address and we do not check for
    5348                 :            :          RELOAD_FOR_OPERAND_ADDRESS and RELOAD_FOR_INSN since these
    5349                 :            :          would conflict.  */
    5350                 :            : 
    5351                 :          0 :       for (i = opnum + 1; i < reload_n_operands; i++)
    5352                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_input_addr[i], regno)
    5353                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_inpaddr_addr[i], regno)
    5354                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_input[i], regno))
    5355                 :            :           return 0;
    5356                 :            : 
    5357                 :            :       /* ... fall through ...  */
    5358                 :            : 
    5359                 :            :     case RELOAD_FOR_OPERAND_ADDRESS:
    5360                 :            :       /* Check outputs and their addresses.  */
    5361                 :            : 
    5362                 :          0 :       for (i = 0; i < reload_n_operands; i++)
    5363                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno)
    5364                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno)
    5365                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno))
    5366                 :            :           return 0;
    5367                 :            : 
    5368                 :          0 :       return (!TEST_HARD_REG_BIT (reload_reg_used, regno));
    5369                 :            : 
    5370                 :            :     case RELOAD_FOR_OPADDR_ADDR:
    5371                 :          0 :       for (i = 0; i < reload_n_operands; i++)
    5372                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno)
    5373                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno)
    5374                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_output[i], regno))
    5375                 :            :           return 0;
    5376                 :            : 
    5377                 :          0 :       return (!TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)
    5378                 :          0 :               && !TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno)
    5379                 :          0 :               && !TEST_HARD_REG_BIT (reload_reg_used, regno));
    5380                 :            : 
    5381                 :          0 :     case RELOAD_FOR_INSN:
    5382                 :            :       /* These conflict with other outputs with RELOAD_OTHER.  So
    5383                 :            :          we need only check for output addresses.  */
    5384                 :            : 
    5385                 :          0 :       opnum = reload_n_operands;
    5386                 :            : 
    5387                 :            :       /* fall through */
    5388                 :            : 
    5389                 :          0 :     case RELOAD_FOR_OUTPUT:
    5390                 :          0 :     case RELOAD_FOR_OUTPUT_ADDRESS:
    5391                 :          0 :     case RELOAD_FOR_OUTADDR_ADDRESS:
    5392                 :            :       /* We already know these can't conflict with a later output.  So the
    5393                 :            :          only thing to check are later output addresses.
    5394                 :            :          Note that multiple output operands are emitted in reverse order,
    5395                 :            :          so the conflicting ones are those with lower indices.  */
    5396                 :          0 :       for (i = 0; i < opnum; i++)
    5397                 :          0 :         if (TEST_HARD_REG_BIT (reload_reg_used_in_output_addr[i], regno)
    5398                 :          0 :             || TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[i], regno))
    5399                 :            :           return 0;
    5400                 :            : 
    5401                 :            :       /* Reload register of reload with type RELOAD_FOR_OUTADDR_ADDRESS
    5402                 :            :          could be killed if the register is also used by reload with type
    5403                 :            :          RELOAD_FOR_OUTPUT_ADDRESS, so check it.  */
    5404                 :          0 :       if (type == RELOAD_FOR_OUTADDR_ADDRESS
    5405                 :          0 :           && TEST_HARD_REG_BIT (reload_reg_used_in_outaddr_addr[opnum], regno))
    5406                 :          0 :         return 0;
    5407                 :            : 
    5408                 :            :       return 1;
    5409                 :            : 
    5410                 :          0 :     default:
    5411                 :          0 :       gcc_unreachable ();
    5412                 :            :     }
    5413                 :            : }
    5414                 :            : 
    5415                 :            : /* Like reload_reg_reaches_end_p, but check that the condition holds for
    5416                 :            :    every register in REG.  */
    5417                 :            : 
    5418                 :            : static bool
    5419                 :          0 : reload_reg_rtx_reaches_end_p (rtx reg, int reloadnum)
    5420                 :            : {
    5421                 :          0 :   unsigned int i;
    5422                 :            : 
    5423                 :          0 :   for (i = REGNO (reg); i < END_REGNO (reg); i++)
    5424                 :          0 :     if (!reload_reg_reaches_end_p (i, reloadnum))
    5425                 :            :       return false;
    5426                 :            :   return true;
    5427                 :            : }
    5428                 :            : 
    5429                 :            : 
    5430                 :            : /*  Returns whether R1 and R2 are uniquely chained: the value of one
    5431                 :            :     is used by the other, and that value is not used by any other
    5432                 :            :     reload for this insn.  This is used to partially undo the decision
    5433                 :            :     made in find_reloads when in the case of multiple
    5434                 :            :     RELOAD_FOR_OPERAND_ADDRESS reloads it converts all
    5435                 :            :     RELOAD_FOR_OPADDR_ADDR reloads into RELOAD_FOR_OPERAND_ADDRESS
    5436                 :            :     reloads.  This code tries to avoid the conflict created by that
    5437                 :            :     change.  It might be cleaner to explicitly keep track of which
    5438                 :            :     RELOAD_FOR_OPADDR_ADDR reload is associated with which
    5439                 :            :     RELOAD_FOR_OPERAND_ADDRESS reload, rather than to try to detect
    5440                 :            :     this after the fact. */
    5441                 :            : static bool
    5442                 :          0 : reloads_unique_chain_p (int r1, int r2)
    5443                 :            : {
    5444                 :          0 :   int i;
    5445                 :            : 
    5446                 :            :   /* We only check input reloads.  */
    5447                 :          0 :   if (! rld[r1].in || ! rld[r2].in)
    5448                 :            :     return false;
    5449                 :            : 
    5450                 :            :   /* Avoid anything with output reloads.  */
    5451                 :          0 :   if (rld[r1].out || rld[r2].out)
    5452                 :            :     return false;
    5453                 :            : 
    5454                 :            :   /* "chained" means one reload is a component of the other reload,
    5455                 :            :      not the same as the other reload.  */
    5456                 :          0 :   if (rld[r1].opnum != rld[r2].opnum
    5457                 :          0 :       || rtx_equal_p (rld[r1].in, rld[r2].in)
    5458                 :          0 :       || rld[r1].optional || rld[r2].optional
    5459                 :          0 :       || ! (reg_mentioned_p (rld[r1].in, rld[r2].in)
    5460                 :          0 :             || reg_mentioned_p (rld[r2].in, rld[r1].in)))
    5461                 :          0 :     return false;
    5462                 :            : 
    5463                 :            :   /* The following loop assumes that r1 is the reload that feeds r2.  */
    5464                 :          0 :   if (r1 > r2)
    5465                 :          0 :     std::swap (r1, r2);
    5466                 :            : 
    5467                 :          0 :   for (i = 0; i < n_reloads; i ++)
    5468                 :            :     /* Look for input reloads that aren't our two */
    5469                 :          0 :     if (i != r1 && i != r2 && rld[i].in)
    5470                 :            :       {
    5471                 :            :         /* If our reload is mentioned at all, it isn't a simple chain.  */
    5472                 :          0 :         if (reg_mentioned_p (rld[r1].in, rld[i].in))
    5473                 :            :           return false;
    5474                 :            :       }
    5475                 :            :   return true;
    5476                 :            : }
    5477                 :            : 
    5478                 :            : /* The recursive function change all occurrences of WHAT in *WHERE
    5479                 :            :    to REPL.  */
    5480                 :            : static void
    5481                 :          0 : substitute (rtx *where, const_rtx what, rtx repl)
    5482                 :            : {
    5483                 :          0 :   const char *fmt;
    5484                 :          0 :   int i;
    5485                 :          0 :   enum rtx_code code;
    5486                 :            : 
    5487                 :          0 :   if (*where == 0)
    5488                 :            :     return;
    5489                 :            : 
    5490                 :          0 :   if (*where == what || rtx_equal_p (*where, what))
    5491                 :            :     {
    5492                 :            :       /* Record the location of the changed rtx.  */
    5493                 :          0 :       substitute_stack.safe_push (where);
    5494                 :          0 :       *where = repl;
    5495                 :          0 :       return;
    5496                 :            :     }
    5497                 :            : 
    5498                 :          0 :   code = GET_CODE (*where);
    5499                 :          0 :   fmt = GET_RTX_FORMAT (code);
    5500                 :          0 :   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
    5501                 :            :     {
    5502                 :          0 :       if (fmt[i] == 'E')
    5503                 :            :         {
    5504                 :          0 :           int j;
    5505                 :            : 
    5506                 :          0 :           for (j = XVECLEN (*where, i) - 1; j >= 0; j--)
    5507                 :          0 :             substitute (&XVECEXP (*where, i, j), what, repl);
    5508                 :            :         }
    5509                 :          0 :       else if (fmt[i] == 'e')
    5510                 :          0 :         substitute (&XEXP (*where, i), what, repl);
    5511                 :            :     }
    5512                 :            : }
    5513                 :            : 
    5514                 :            : /* The function returns TRUE if chain of reload R1 and R2 (in any
    5515                 :            :    order) can be evaluated without usage of intermediate register for
    5516                 :            :    the reload containing another reload.  It is important to see
    5517                 :            :    gen_reload to understand what the function is trying to do.  As an
    5518                 :            :    example, let us have reload chain
    5519                 :            : 
    5520                 :            :       r2: const
    5521                 :            :       r1: <something> + const
    5522                 :            : 
    5523                 :            :    and reload R2 got reload reg HR.  The function returns true if
    5524                 :            :    there is a correct insn HR = HR + <something>.  Otherwise,
    5525                 :            :    gen_reload will use intermediate register (and this is the reload
    5526                 :            :    reg for R1) to reload <something>.
    5527                 :            : 
    5528                 :            :    We need this function to find a conflict for chain reloads.  In our
    5529                 :            :    example, if HR = HR + <something> is incorrect insn, then we cannot
    5530                 :            :    use HR as a reload register for R2.  If we do use it then we get a
    5531                 :            :    wrong code:
    5532                 :            : 
    5533                 :            :       HR = const
    5534                 :            :       HR = <something>
    5535                 :            :       HR = HR + HR
    5536                 :            : 
    5537                 :            : */
    5538                 :            : static bool
    5539                 :          0 : gen_reload_chain_without_interm_reg_p (int r1, int r2)
    5540                 :            : {
    5541                 :            :   /* Assume other cases in gen_reload are not possible for
    5542                 :            :      chain reloads or do need an intermediate hard registers.  */
    5543                 :          0 :   bool result = true;
    5544                 :          0 :   int regno, code;
    5545                 :          0 :   rtx out, in;
    5546                 :          0 :   rtx_insn *insn;
    5547                 :          0 :   rtx_insn *last = get_last_insn ();
    5548                 :            : 
    5549                 :            :   /* Make r2 a component of r1.  */
    5550                 :          0 :   if (reg_mentioned_p (rld[r1].in, rld[r2].in))
    5551                 :          0 :     std::swap (r1, r2);
    5552                 :            : 
    5553                 :          0 :   gcc_assert (reg_mentioned_p (rld[r2].in, rld[r1].in));
    5554                 :          0 :   regno = rld[r1].regno >= 0 ? rld[r1].regno : rld[r2].regno;
    5555                 :          0 :   gcc_assert (regno >= 0);
    5556                 :          0 :   out = gen_rtx_REG (rld[r1].mode, regno);
    5557                 :          0 :   in = rld[r1].in;
    5558                 :          0 :   substitute (&in, rld[r2].in, gen_rtx_REG (rld[r2].mode, regno));
    5559                 :            : 
    5560                 :            :   /* If IN is a paradoxical SUBREG, remove it and try to put the
    5561                 :            :      opposite SUBREG on OUT.  Likewise for a paradoxical SUBREG on OUT.  */
    5562                 :          0 :   strip_paradoxical_subreg (&in, &out);
    5563                 :            : 
    5564                 :          0 :   if (GET_CODE (in) == PLUS
    5565                 :          0 :       && (REG_P (XEXP (in, 0))
    5566                 :          0 :           || GET_CODE (XEXP (in, 0)) == SUBREG
    5567                 :          0 :           || MEM_P (XEXP (in, 0)))
    5568                 :          0 :       && (REG_P (XEXP (in, 1))
    5569                 :          0 :           || GET_CODE (XEXP (in, 1)) == SUBREG
    5570                 :          0 :           || CONSTANT_P (XEXP (in, 1))
    5571                 :          0 :           || MEM_P (XEXP (in, 1))))
    5572                 :            :     {
    5573                 :          0 :       insn = emit_insn (gen_rtx_SET (out, in));
    5574                 :          0 :       code = recog_memoized (insn);
    5575                 :          0 :       result = false;
    5576                 :            : 
    5577                 :          0 :       if (code >= 0)
    5578                 :            :         {
    5579                 :          0 :           extract_insn (insn);
    5580                 :            :           /* We want constrain operands to treat this insn strictly in
    5581                 :            :              its validity determination, i.e., the way it would after
    5582                 :            :              reload has completed.  */
    5583                 :          0 :           result = constrain_operands (1, get_enabled_alternatives (insn));
    5584                 :            :         }
    5585                 :            : 
    5586                 :          0 :       delete_insns_since (last);
    5587                 :            :     }
    5588                 :            : 
    5589                 :            :   /* Restore the original value at each changed address within R1.  */
    5590                 :          0 :   while (!substitute_stack.is_empty ())
    5591                 :            :     {
    5592                 :          0 :       rtx *where = substitute_stack.pop ();
    5593                 :          0 :       *where = rld[r2].in;
    5594                 :            :     }
    5595                 :            : 
    5596                 :          0 :   return result;
    5597                 :            : }
    5598                 :            : 
    5599                 :            : /* Return 1 if the reloads denoted by R1 and R2 cannot share a register.
    5600                 :            :    Return 0 otherwise.
    5601                 :            : 
    5602                 :            :    This function uses the same algorithm as reload_reg_free_p above.  */
    5603                 :            : 
    5604                 :            : static int
    5605                 :          0 : reloads_conflict (int r1, int r2)
    5606                 :            : {
    5607                 :          0 :   enum reload_type r1_type = rld[r1].when_needed;
    5608                 :          0 :   enum reload_type r2_type = rld[r2].when_needed;
    5609                 :          0 :   int r1_opnum = rld[r1].opnum;
    5610                 :          0 :   int r2_opnum = rld[r2].opnum;
    5611                 :            : 
    5612                 :            :   /* RELOAD_OTHER conflicts with everything.  */
    5613                 :          0 :   if (r2_type == RELOAD_OTHER)
    5614                 :            :     return 1;
    5615                 :            : 
    5616                 :            :   /* Otherwise, check conflicts differently for each type.  */
    5617                 :            : 
    5618                 :          0 :   switch (r1_type)
    5619                 :            :     {
    5620                 :          0 :     case RELOAD_FOR_INPUT:
    5621                 :          0 :       return (r2_type == RELOAD_FOR_INSN
    5622                 :          0 :               || r2_type == RELOAD_FOR_OPERAND_ADDRESS
    5623                 :          0 :               || r2_type == RELOAD_FOR_OPADDR_ADDR
    5624                 :          0 :               || r2_type == RELOAD_FOR_INPUT
    5625                 :          0 :               || ((r2_type == RELOAD_FOR_INPUT_ADDRESS
    5626                 :          0 :                    || r2_type == RELOAD_FOR_INPADDR_ADDRESS)
    5627                 :          0 :                   && r2_opnum > r1_opnum));
    5628                 :            : 
    5629                 :          0 :     case RELOAD_FOR_INPUT_ADDRESS:
    5630                 :          0 :       return ((r2_type == RELOAD_FOR_INPUT_ADDRESS && r1_opnum == r2_opnum)
    5631                 :          0 :               || (r2_type == RELOAD_FOR_INPUT && r2_opnum < r1_opnum));
    5632                 :            : 
    5633                 :          0 :     case RELOAD_FOR_INPADDR_ADDRESS:
    5634                 :          0 :       return ((r2_type == RELOAD_FOR_INPADDR_ADDRESS && r1_opnum == r2_opnum)
    5635                 :          0 :               || (r2_type == RELOAD_FOR_INPUT && r2_opnum < r1_opnum));
    5636                 :            : 
    5637                 :          0 :     case RELOAD_FOR_OUTPUT_ADDRESS:
    5638                 :          0 :       return ((r2_type == RELOAD_FOR_OUTPUT_ADDRESS && r2_opnum == r1_opnum)
    5639                 :          0 :               || (r2_type == RELOAD_FOR_OUTPUT && r2_opnum <= r1_opnum));
    5640                 :            : 
    5641                 :          0 :     case RELOAD_FOR_OUTADDR_ADDRESS:
    5642                 :          0 :       return ((r2_type == RELOAD_FOR_OUTADDR_ADDRESS && r2_opnum == r1_opnum)
    5643                 :          0 :               || (r2_type == RELOAD_FOR_OUTPUT && r2_opnum <= r1_opnum));
    5644                 :            : 
    5645                 :          0 :     case RELOAD_FOR_OPERAND_ADDRESS:
    5646                 :          0 :       return (r2_type == RELOAD_FOR_INPUT || r2_type == RELOAD_FOR_INSN
    5647                 :          0 :               || (r2_type == RELOAD_FOR_OPERAND_ADDRESS
    5648                 :          0 :                   && (!reloads_unique_chain_p (r1, r2)
    5649                 :          0 :                       || !gen_reload_chain_without_interm_reg_p (r1, r2))));
    5650                 :            : 
    5651                 :          0 :     case RELOAD_FOR_OPADDR_ADDR:
    5652                 :          0 :       return (r2_type == RELOAD_FOR_INPUT
    5653                 :          0 :               || r2_type == RELOAD_FOR_OPADDR_ADDR);
    5654                 :            : 
    5655                 :          0 :     case RELOAD_FOR_OUTPUT:
    5656                 :          0 :       return (r2_type == RELOAD_FOR_INSN || r2_type == RELOAD_FOR_OUTPUT
    5657                 :          0 :               || ((r2_type == RELOAD_FOR_OUTPUT_ADDRESS
    5658                 :          0 :                    || r2_type == RELOAD_FOR_OUTADDR_ADDRESS)
    5659                 :          0 :                   && r2_opnum >= r1_opnum));
    5660                 :            : 
    5661                 :          0 :     case RELOAD_FOR_INSN:
    5662                 :          0 :       return (r2_type == RELOAD_FOR_INPUT || r2_type == RELOAD_FOR_OUTPUT
    5663                 :          0 :               || r2_type == RELOAD_FOR_INSN
    5664                 :          0 :               || r2_type == RELOAD_FOR_OPERAND_ADDRESS);
    5665                 :            : 
    5666                 :          0 :     case RELOAD_FOR_OTHER_ADDRESS:
    5667                 :          0 :       return r2_type == RELOAD_FOR_OTHER_ADDRESS;
    5668                 :            : 
    5669                 :            :     case RELOAD_OTHER:
    5670                 :            :       return 1;
    5671                 :            : 
    5672                 :          0 :     default:
    5673                 :          0 :       gcc_unreachable ();
    5674                 :            :     }
    5675                 :            : }
    5676                 :            : 
    5677                 :            : /* Indexed by reload number, 1 if incoming value
    5678                 :            :    inherited from previous insns.  */
    5679                 :            : static char reload_inherited[MAX_RELOADS];
    5680                 :            : 
    5681                 :            : /* For an inherited reload, this is the insn the reload was inherited from,
    5682                 :            :    if we know it.  Otherwise, this is 0.  */
    5683                 :            : static rtx_insn *reload_inheritance_insn[MAX_RELOADS];
    5684                 :            : 
    5685                 :            : /* If nonzero, this is a place to get the value of the reload,
    5686                 :            :    rather than using reload_in.  */
    5687                 :            : static rtx reload_override_in[MAX_RELOADS];
    5688                 :            : 
    5689                 :            : /* For each reload, the hard register number of the register used,
    5690                 :            :    or -1 if we did not need a register for this reload.  */
    5691                 :            : static int reload_spill_index[MAX_RELOADS];
    5692                 :            : 
    5693                 :            : /* Index X is the value of rld[X].reg_rtx, adjusted for the input mode.  */
    5694                 :            : static rtx reload_reg_rtx_for_input[MAX_RELOADS];
    5695                 :            : 
    5696                 :            : /* Index X is the value of rld[X].reg_rtx, adjusted for the output mode.  */
    5697                 :            : static rtx reload_reg_rtx_for_output[MAX_RELOADS];
    5698                 :            : 
    5699                 :            : /* Subroutine of free_for_value_p, used to check a single register.
    5700                 :            :    START_REGNO is the starting regno of the full reload register
    5701                 :            :    (possibly comprising multiple hard registers) that we are considering.  */
    5702                 :            : 
    5703                 :            : static int
    5704                 :          0 : reload_reg_free_for_value_p (int start_regno, int regno, int opnum,
    5705                 :            :                              enum reload_type type, rtx value, rtx out,
    5706                 :            :                              int reloadnum, int ignore_address_reloads)
    5707                 :            : {
    5708                 :          0 :   int time1;
    5709                 :            :   /* Set if we see an input reload that must not share its reload register
    5710                 :            :      with any new earlyclobber, but might otherwise share the reload
    5711                 :            :      register with an output or input-output reload.  */
    5712                 :          0 :   int check_earlyclobber = 0;
    5713                 :          0 :   int i;
    5714                 :          0 :   int copy = 0;
    5715                 :            : 
    5716                 :          0 :   if (TEST_HARD_REG_BIT (reload_reg_unavailable, regno))
    5717                 :            :     return 0;
    5718                 :            : 
    5719                 :          0 :   if (out == const0_rtx)
    5720                 :            :     {
    5721                 :          0 :       copy = 1;
    5722                 :          0 :       out = NULL_RTX;
    5723                 :            :     }
    5724                 :            : 
    5725                 :            :   /* We use some pseudo 'time' value to check if the lifetimes of the
    5726                 :            :      new register use would overlap with the one of a previous reload
    5727                 :            :      that is not read-only or uses a different value.
    5728                 :            :      The 'time' used doesn't have to be linear in any shape or form, just
    5729                 :            :      monotonic.
    5730                 :            :      Some reload types use different 'buckets' for each operand.
    5731                 :            :      So there are MAX_RECOG_OPERANDS different time values for each
    5732                 :            :      such reload type.
    5733                 :            :      We compute TIME1 as the time when the register for the prospective
    5734                 :            :      new reload ceases to be live, and TIME2 for each existing
    5735                 :            :      reload as the time when that the reload register of that reload
    5736                 :            :      becomes live.
    5737                 :            :      Where there is little to be gained by exact lifetime calculations,
    5738                 :            :      we just make conservative assumptions, i.e. a longer lifetime;
    5739                 :            :      this is done in the 'default:' cases.  */
    5740                 :          0 :   switch (type)
    5741                 :            :     {
    5742                 :          0 :     case RELOAD_FOR_OTHER_ADDRESS:
    5743                 :            :       /* RELOAD_FOR_OTHER_ADDRESS conflicts with RELOAD_OTHER reloads.  */
    5744                 :          0 :       time1 = copy ? 0 : 1;
    5745                 :          0 :       break;
    5746                 :          0 :     case RELOAD_OTHER:
    5747                 :          0 :       time1 = copy ? 1 : MAX_RECOG_OPERANDS * 5 + 5;
    5748                 :            :       break;
    5749                 :            :       /* For each input, we may have a sequence of RELOAD_FOR_INPADDR_ADDRESS,
    5750                 :            :          RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT.  By adding 0 / 1 / 2 ,
    5751                 :            :          respectively, to the time values for these, we get distinct time
    5752                 :            :          values.  To get distinct time values for each operand, we have to
    5753                 :            :          multiply opnum by at least three.  We round that up to four because
    5754                 :            :          multiply by four is often cheaper.  */
    5755                 :          0 :     case RELOAD_FOR_INPADDR_ADDRESS:
    5756                 :          0 :       time1 = opnum * 4 + 2;
    5757                 :          0 :       break;
    5758                 :          0 :     case RELOAD_FOR_INPUT_ADDRESS:
    5759                 :          0 :       time1 = opnum * 4 + 3;
    5760                 :          0 :       break;
    5761                 :          0 :     case RELOAD_FOR_INPUT:
    5762                 :            :       /* All RELOAD_FOR_INPUT reloads remain live till the instruction
    5763                 :            :          executes (inclusive).  */
    5764                 :          0 :       time1 = copy ? opnum * 4 + 4 : MAX_RECOG_OPERANDS * 4 + 3;
    5765                 :            :       break;
    5766                 :            :     case RELOAD_FOR_OPADDR_ADDR:
    5767                 :            :       /* opnum * 4 + 4
    5768                 :            :          <= (MAX_RECOG_OPERANDS - 1) * 4 + 4 == MAX_RECOG_OPERANDS * 4 */
    5769                 :            :       time1 = MAX_RECOG_OPERANDS * 4 + 1;
    5770                 :            :       break;
    5771                 :          0 :     case RELOAD_FOR_OPERAND_ADDRESS:
    5772                 :            :       /* RELOAD_FOR_OPERAND_ADDRESS reloads are live even while the insn
    5773                 :            :          is executed.  */
    5774                 :          0 :       time1 = copy ? MAX_RECOG_OPERANDS * 4 + 2 : MAX_RECOG_OPERANDS * 4 + 3;
    5775                 :            :       break;
    5776                 :          0 :     case RELOAD_FOR_OUTADDR_ADDRESS:
    5777                 :          0 :       time1 = MAX_RECOG_OPERANDS * 4 + 4 + opnum;
    5778                 :          0 :       break;
    5779                 :          0 :     case RELOAD_FOR_OUTPUT_ADDRESS:
    5780                 :          0 :       time1 = MAX_RECOG_OPERANDS * 4 + 5 + opnum;
    5781                 :          0 :       break;
    5782                 :          0 :     default:
    5783                 :          0 :       time1 = MAX_RECOG_OPERANDS * 5 + 5;
    5784                 :            :     }
    5785                 :            : 
    5786                 :          0 :   for (i = 0; i < n_reloads; i++)
    5787                 :            :     {
    5788                 :          0 :       rtx reg = rld[i].reg_rtx;
    5789                 :          0 :       if (reg && REG_P (reg)
    5790                 :          0 :           && (unsigned) regno - true_regnum (reg) < REG_NREGS (reg)
    5791                 :          0 :           && i != reloadnum)
    5792                 :            :         {
    5793                 :          0 :           rtx other_input = rld[i].in;
    5794                 :            : 
    5795                 :            :           /* If the other reload loads the same input value, that
    5796                 :            :              will not cause a conflict only if it's loading it into
    5797                 :            :              the same register.  */
    5798                 :          0 :           if (true_regnum (reg) != start_regno)
    5799                 :            :             other_input = NULL_RTX;
    5800                 :          0 :           if (! other_input || ! rtx_equal_p (other_input, value)
    5801                 :          0 :               || rld[i].out || out)
    5802                 :            :             {
    5803                 :          0 :               int time2;
    5804                 :          0 :               switch (rld[i].when_needed)
    5805                 :            :                 {
    5806                 :            :                 case RELOAD_FOR_OTHER_ADDRESS:
    5807                 :            :                   time2 = 0;
    5808                 :            :                   break;
    5809                 :          0 :                 case RELOAD_FOR_INPADDR_ADDRESS:
    5810                 :            :                   /* find_reloads makes sure that a
    5811                 :            :                      RELOAD_FOR_{INP,OP,OUT}ADDR_ADDRESS reload is only used
    5812                 :            :                      by at most one - the first -
    5813                 :            :                      RELOAD_FOR_{INPUT,OPERAND,OUTPUT}_ADDRESS .  If the
    5814                 :            :                      address reload is inherited, the address address reload
    5815                 :            :                      goes away, so we can ignore this conflict.  */
    5816                 :          0 :                   if (type == RELOAD_FOR_INPUT_ADDRESS && reloadnum == i + 1
    5817                 :          0 :                       && ignore_address_reloads
    5818                 :            :                       /* Unless the RELOAD_FOR_INPUT is an auto_inc expression.
    5819                 :            :                          Then the address address is still needed to store
    5820                 :            :                          back the new address.  */
    5821                 :          0 :                       && ! rld[reloadnum].out)
    5822                 :          0 :                     continue;
    5823                 :            :                   /* Likewise, if a RELOAD_FOR_INPUT can inherit a value, its
    5824                 :            :                      RELOAD_FOR_INPUT_ADDRESS / RELOAD_FOR_INPADDR_ADDRESS
    5825                 :            :                      reloads go away.  */
    5826                 :          0 :                   if (type == RELOAD_FOR_INPUT && opnum == rld[i].opnum
    5827                 :          0 :                       && ignore_address_reloads
    5828                 :            :                       /* Unless we are reloading an auto_inc expression.  */
    5829                 :          0 :                       && ! rld[reloadnum].out)
    5830                 :          0 :                     continue;
    5831                 :          0 :                   time2 = rld[i].opnum * 4 + 2;
    5832                 :          0 :                   break;
    5833                 :          0 :                 case RELOAD_FOR_INPUT_ADDRESS:
    5834                 :          0 :                   if (type == RELOAD_FOR_INPUT && opnum == rld[i].opnum
    5835                 :          0 :                       && ignore_address_reloads
    5836                 :          0 :                       && ! rld[reloadnum].out)
    5837                 :          0 :                     continue;
    5838                 :          0 :                   time2 = rld[i].opnum * 4 + 3;
    5839                 :          0 :                   break;
    5840                 :          0 :                 case RELOAD_FOR_INPUT:
    5841                 :          0 :                   time2 = rld[i].opnum * 4 + 4;
    5842                 :          0 :                   check_earlyclobber = 1;
    5843                 :          0 :                   break;
    5844                 :            :                   /* rld[i].opnum * 4 + 4 <= (MAX_RECOG_OPERAND - 1) * 4 + 4
    5845                 :            :                      == MAX_RECOG_OPERAND * 4  */
    5846                 :          0 :                 case RELOAD_FOR_OPADDR_ADDR:
    5847                 :          0 :                   if (type == RELOAD_FOR_OPERAND_ADDRESS && reloadnum == i + 1
    5848                 :          0 :                       && ignore_address_reloads
    5849                 :          0 :                       && ! rld[reloadnum].out)
    5850                 :          0 :                     continue;
    5851                 :            :                   time2 = MAX_RECOG_OPERANDS * 4 + 1;
    5852                 :            :                   break;
    5853                 :          0 :                 case RELOAD_FOR_OPERAND_ADDRESS:
    5854                 :          0 :                   time2 = MAX_RECOG_OPERANDS * 4 + 2;
    5855                 :          0 :                   check_earlyclobber = 1;
    5856                 :          0 :                   break;
    5857                 :          0 :                 case RELOAD_FOR_INSN:
    5858                 :          0 :                   time2 = MAX_RECOG_OPERANDS * 4 + 3;
    5859                 :          0 :                   break;
    5860                 :          0 :                 case RELOAD_FOR_OUTPUT:
    5861                 :            :                   /* All RELOAD_FOR_OUTPUT reloads become live just after the
    5862                 :            :                      instruction is executed.  */
    5863                 :          0 :                   time2 = MAX_RECOG_OPERANDS * 4 + 4;
    5864                 :          0 :                   break;
    5865                 :            :                   /* The first RELOAD_FOR_OUTADDR_ADDRESS reload conflicts with
    5866                 :            :                      the RELOAD_FOR_OUTPUT reloads, so assign it the same time
    5867                 :            :                      value.  */
    5868                 :          0 :                 case RELOAD_FOR_OUTADDR_ADDRESS:
    5869                 :          0 :                   if (type == RELOAD_FOR_OUTPUT_ADDRESS && reloadnum == i + 1
    5870                 :          0 :                       && ignore_address_reloads
    5871                 :          0 :                       && ! rld[reloadnum].out)
    5872                 :          0 :                     continue;
    5873                 :          0 :                   time2 = MAX_RECOG_OPERANDS * 4 + 4 + rld[i].opnum;
    5874                 :          0 :                   break;
    5875                 :          0 :                 case RELOAD_FOR_OUTPUT_ADDRESS:
    5876                 :          0 :                   time2 = MAX_RECOG_OPERANDS * 4 + 5 + rld[i].opnum;
    5877                 :          0 :                   break;
    5878                 :          0 :                 case RELOAD_OTHER:
    5879                 :            :                   /* If there is no conflict in the input part, handle this
    5880                 :            :                      like an output reload.  */
    5881                 :          0 :                   if (! rld[i].in || rtx_equal_p (other_input, value))
    5882                 :            :                     {
    5883                 :          0 :                       time2 = MAX_RECOG_OPERANDS * 4 + 4;
    5884                 :            :                       /* Earlyclobbered outputs must conflict with inputs.  */
    5885                 :          0 :                       if (earlyclobber_operand_p (rld[i].out))
    5886                 :          0 :                         time2 = MAX_RECOG_OPERANDS * 4 + 3;
    5887                 :            : 
    5888                 :            :                       break;
    5889                 :            :                     }
    5890                 :          0 :                   time2 = 1;
    5891                 :            :                   /* RELOAD_OTHER might be live beyond instruction execution,
    5892                 :            :                      but this is not obvious when we set time2 = 1.  So check
    5893                 :            :                      here if there might be a problem with the new reload
    5894                 :            :                      clobbering the register used by the RELOAD_OTHER.  */
    5895                 :          0 :                   if (out)
    5896                 :            :                     return 0;
    5897                 :            :                   break;
    5898                 :            :                 default:
    5899                 :            :                   return 0;
    5900                 :            :                 }
    5901                 :          0 :               if ((time1 >= time2
    5902                 :          0 :                    && (! rld[i].in || rld[i].out
    5903                 :          0 :                        || ! rtx_equal_p (other_input, value)))
    5904                 :          0 :                   || (out && rld[reloadnum].out_reg
    5905                 :          0 :                       && time2 >= MAX_RECOG_OPERANDS * 4 + 3))
    5906                 :          0 :                 return 0;
    5907                 :            :             }
    5908                 :            :         }
    5909                 :            :     }
    5910                 :            : 
    5911                 :            :   /* Earlyclobbered outputs must conflict with inputs.  */
    5912                 :          0 :   if (check_earlyclobber && out && earlyclobber_operand_p (out))
    5913                 :          0 :     return 0;
    5914                 :            : 
    5915                 :            :   return 1;
    5916                 :            : }
    5917                 :            : 
    5918                 :            : /* Return 1 if the value in reload reg REGNO, as used by a reload
    5919                 :            :    needed for the part of the insn specified by OPNUM and TYPE,
    5920                 :            :    may be used to load VALUE into it.
    5921                 :            : 
    5922                 :            :    MODE is the mode in which the register is used, this is needed to
    5923                 :            :    determine how many hard regs to test.
    5924                 :            : 
    5925                 :            :    Other read-only reloads with the same value do not conflict
    5926                 :            :    unless OUT is nonzero and these other reloads have to live while
    5927                 :            :    output reloads live.
    5928                 :            :    If OUT is CONST0_RTX, this is a special case: it means that the
    5929                 :            :    test should not be for using register REGNO as reload register, but
    5930                 :            :    for copying from register REGNO into the reload register.
    5931                 :            : 
    5932                 :            :    RELOADNUM is the number of the reload we want to load this value for;
    5933                 :            :    a reload does not conflict with itself.
    5934                 :            : 
    5935                 :            :    When IGNORE_ADDRESS_RELOADS is set, we cannot have conflicts with
    5936                 :            :    reloads that load an address for the very reload we are considering.
    5937                 :            : 
    5938                 :            :    The caller has to make sure that there is no conflict with the return
    5939                 :            :    register.  */
    5940                 :            : 
    5941                 :            : static int
    5942                 :          0 : free_for_value_p (int regno, machine_mode mode, int opnum,
    5943                 :            :                   enum reload_type type, rtx value, rtx out, int reloadnum,
    5944                 :            :                   int ignore_address_reloads)
    5945                 :            : {
    5946                 :          0 :   int nregs = hard_regno_nregs (regno, mode);
    5947                 :          0 :   while (nregs-- > 0)
    5948                 :          0 :     if (! reload_reg_free_for_value_p (regno, regno + nregs, opnum, type,
    5949                 :            :                                        value, out, reloadnum,
    5950                 :            :                                        ignore_address_reloads))
    5951                 :            :       return 0;
    5952                 :            :   return 1;
    5953                 :            : }
    5954                 :            : 
    5955                 :            : /* Return nonzero if the rtx X is invariant over the current function.  */
    5956                 :            : /* ??? Actually, the places where we use this expect exactly what is
    5957                 :            :    tested here, and not everything that is function invariant.  In
    5958                 :            :    particular, the frame pointer and arg pointer are special cased;
    5959                 :            :    pic_offset_table_rtx is not, and we must not spill these things to
    5960                 :            :    memory.  */
    5961                 :            : 
    5962                 :            : int
    5963                 :    7254870 : function_invariant_p (const_rtx x)
    5964                 :            : {
    5965                 :    7254870 :   if (CONSTANT_P (x))
    5966                 :            :     return 1;
    5967                 :    4852810 :   if (x == frame_pointer_rtx || x == arg_pointer_rtx)
    5968                 :            :     return 1;
    5969                 :    4845710 :   if (GET_CODE (x) == PLUS
    5970                 :    2196610 :       && (XEXP (x, 0) == frame_pointer_rtx || XEXP (x, 0) == arg_pointer_rtx)
    5971                 :    1910400 :       && GET_CODE (XEXP (x, 1)) == CONST_INT)
    5972                 :    1910400 :     return 1;
    5973                 :            :   return 0;
    5974                 :            : }
    5975                 :            : 
    5976                 :            : /* Determine whether the reload reg X overlaps any rtx'es used for
    5977                 :            :    overriding inheritance.  Return nonzero if so.  */
    5978                 :            : 
    5979                 :            : static int
    5980                 :          0 : conflicts_with_override (rtx x)
    5981                 :            : {
    5982                 :          0 :   int i;
    5983                 :          0 :   for (i = 0; i < n_reloads; i++)
    5984                 :          0 :     if (reload_override_in[i]
    5985                 :          0 :         && reg_overlap_mentioned_p (x, reload_override_in[i]))
    5986                 :            :       return 1;
    5987                 :            :   return 0;
    5988                 :            : }
    5989                 :            : 
    5990                 :            : /* Give an error message saying we failed to find a reload for INSN,
    5991                 :            :    and clear out reload R.  */
    5992                 :            : static void
    5993                 :          0 : failed_reload (rtx_insn *insn, int r)
    5994                 :            : {
    5995                 :          0 :   if (asm_noperands (PATTERN (insn)) < 0)
    5996                 :            :     /* It's the compiler's fault.  */
    5997                 :          0 :     fatal_insn ("could not find a spill register", insn);
    5998                 :            : 
    5999                 :            :   /* It's the user's fault; the operand's mode and constraint
    6000                 :            :      don't match.  Disable this reload so we don't crash in final.  */
    6001                 :          0 :   error_for_asm (insn,
    6002                 :            :                  "%<asm%> operand constraint incompatible with operand size");
    6003                 :          0 :   rld[r].in = 0;
    6004                 :          0 :   rld[r].out = 0;
    6005                 :          0 :   rld[r].reg_rtx = 0;
    6006                 :          0 :   rld[r].optional = 1;
    6007                 :          0 :   rld[r].secondary_p = 1;
    6008                 :          0 : }
    6009                 :            : 
    6010                 :            : /* I is the index in SPILL_REG_RTX of the reload register we are to allocate
    6011                 :            :    for reload R.  If it's valid, get an rtx for it.  Return nonzero if
    6012                 :            :    successful.  */
    6013                 :            : static int
    6014                 :          0 : set_reload_reg (int i, int r)
    6015                 :            : {
    6016                 :          0 :   int regno;
    6017                 :          0 :   rtx reg = spill_reg_rtx[i];
    6018                 :            : 
    6019                 :          0 :   if (reg == 0 || GET_MODE (reg) != rld[r].mode)
    6020                 :          0 :     spill_reg_rtx[i] = reg
    6021                 :          0 :       = gen_rtx_REG (rld[r].mode, spill_regs[i]);
    6022                 :            : 
    6023                 :          0 :   regno = true_regnum (reg);
    6024                 :            : 
    6025                 :            :   /* Detect when the reload reg can't hold the reload mode.
    6026                 :            :      This used to be one `if', but Sequent compiler can't handle that.  */
    6027                 :          0 :   if (targetm.hard_regno_mode_ok (regno, rld[r].mode))
    6028                 :            :     {
    6029                 :          0 :       machine_mode test_mode = VOIDmode;
    6030                 :          0 :       if (rld[r].in)
    6031                 :          0 :         test_mode = GET_MODE (rld[r].in);
    6032                 :            :       /* If rld[r].in has VOIDmode, it means we will load it
    6033                 :            :          in whatever mode the reload reg has: to wit, rld[r].mode.
    6034                 :            :          We have already tested that for validity.  */
    6035                 :            :       /* Aside from that, we need to test that the expressions
    6036                 :            :          to reload from or into have modes which are valid for this
    6037                 :            :          reload register.  Otherwise the reload insns would be invalid.  */
    6038                 :          0 :       if (! (rld[r].in != 0 && test_mode != VOIDmode
    6039                 :          0 :              && !targetm.hard_regno_mode_ok (regno, test_mode)))
    6040                 :          0 :         if (! (rld[r].out != 0
    6041                 :          0 :                && !targetm.hard_regno_mode_ok (regno, GET_MODE (rld[r].out))))
    6042                 :            :           {
    6043                 :            :             /* The reg is OK.  */
    6044                 :          0 :             last_spill_reg = i;
    6045                 :            : 
    6046                 :            :             /* Mark as in use for this insn the reload regs we use
    6047                 :            :                for this.  */
    6048                 :          0 :             mark_reload_reg_in_use (spill_regs[i], rld[r].opnum,
    6049                 :            :                                     rld[r].when_needed, rld[r].mode);
    6050                 :            : 
    6051                 :          0 :             rld[r].reg_rtx = reg;
    6052                 :          0 :             reload_spill_index[r] = spill_regs[i];
    6053                 :          0 :             return 1;
    6054                 :            :           }
    6055                 :            :     }
    6056                 :            :   return 0;
    6057                 :            : }
    6058                 :            : 
    6059                 :            : /* Find a spill register to use as a reload register for reload R.
    6060                 :            :    LAST_RELOAD is nonzero if this is the last reload for the insn being
    6061                 :            :    processed.
    6062                 :            : 
    6063                 :            :    Set rld[R].reg_rtx to the register allocated.
    6064                 :            : 
    6065                 :            :    We return 1 if successful, or 0 if we couldn't find a spill reg and
    6066                 :            :    we didn't change anything.  */
    6067                 :            : 
    6068                 :            : static int
    6069                 :          0 : allocate_reload_reg (class insn_chain *chain ATTRIBUTE_UNUSED, int r,
    6070                 :            :                      int last_reload)
    6071                 :            : {
    6072                 :          0 :   int i, pass, count;
    6073                 :            : 
    6074                 :            :   /* If we put this reload ahead, thinking it is a group,
    6075                 :            :      then insist on finding a group.  Otherwise we can grab a
    6076                 :            :      reg that some other reload needs.
    6077                 :            :      (That can happen when we have a 68000 DATA_OR_FP_REG
    6078                 :            :      which is a group of data regs or one fp reg.)
    6079                 :            :      We need not be so restrictive if there are no more reloads
    6080                 :            :      for this insn.
    6081                 :            : 
    6082                 :            :      ??? Really it would be nicer to have smarter handling
    6083                 :            :      for that kind of reg class, where a problem like this is normal.
    6084                 :            :      Perhaps those classes should be avoided for reloading
    6085                 :            :      by use of more alternatives.  */
    6086                 :            : 
    6087                 :          0 :   int force_group = rld[r].nregs > 1 && ! last_reload;
    6088                 :            : 
    6089                 :            :   /* If we want a single register and haven't yet found one,
    6090                 :            :      take any reg in the right class and not in use.
    6091                 :            :      If we want a consecutive group, here is where we look for it.
    6092                 :            : 
    6093                 :            :      We use three passes so we can first look for reload regs to
    6094                 :            :      reuse, which are already in use for other reloads in this insn,
    6095                 :            :      and only then use additional registers which are not "bad", then
    6096                 :            :      finally any register.
    6097                 :            : 
    6098                 :            :      I think that maximizing reuse is needed to make sure we don't
    6099                 :            :      run out of reload regs.  Suppose we have three reloads, and
    6100                 :            :      reloads A and B can share regs.  These need two regs.
    6101                 :            :      Suppose A and B are given different regs.
    6102                 :            :      That leaves none for C.  */
    6103                 :          0 :   for (pass = 0; pass < 3; pass++)
    6104                 :            :     {
    6105                 :            :       /* I is the index in spill_regs.
    6106                 :            :          We advance it round-robin between insns to use all spill regs
    6107                 :            :          equally, so that inherited reloads have a chance
    6108                 :            :          of leapfrogging each other.  */
    6109                 :            : 
    6110                 :          0 :       i = last_spill_reg;
    6111                 :            : 
    6112                 :          0 :       for (count = 0; count < n_spills; count++)
    6113                 :            :         {
    6114                 :          0 :           int rclass = (int) rld[r].rclass;
    6115                 :          0 :           int regnum;
    6116                 :            : 
    6117                 :          0 :           i++;
    6118                 :          0 :           if (i >= n_spills)
    6119                 :          0 :             i -= n_spills;
    6120                 :          0 :           regnum = spill_regs[i];
    6121                 :            : 
    6122                 :          0 :           if ((reload_reg_free_p (regnum, rld[r].opnum,
    6123                 :            :                                   rld[r].when_needed)
    6124                 :          0 :                || (rld[r].in
    6125                 :            :                    /* We check reload_reg_used to make sure we
    6126                 :            :                       don't clobber the return register.  */
    6127                 :          0 :                    && ! TEST_HARD_REG_BIT (reload_reg_used, regnum)
    6128                 :          0 :                    && free_for_value_p (regnum, rld[r].mode, rld[r].opnum,
    6129                 :            :                                         rld[r].when_needed, rld[r].in,
    6130                 :            :                                         rld[r].out, r, 1)))
    6131                 :          0 :               && TEST_HARD_REG_BIT (reg_class_contents[rclass], regnum)
    6132                 :          0 :               && targetm.hard_regno_mode_ok (regnum, rld[r].mode)
    6133                 :            :               /* Look first for regs to share, then for unshared.  But
    6134                 :            :                  don't share regs used for inherited reloads; they are
    6135                 :            :                  the ones we want to preserve.  */
    6136                 :          0 :               && (pass
    6137                 :          0 :                   || (TEST_HARD_REG_BIT (reload_reg_used_at_all,
    6138                 :            :                                          regnum)
    6139                 :          0 :                       && ! TEST_HARD_REG_BIT (reload_reg_used_for_inherit,
    6140                 :            :                                               regnum))))
    6141                 :            :             {
    6142                 :          0 :               int nr = hard_regno_nregs (regnum, rld[r].mode);
    6143                 :            : 
    6144                 :            :               /* During the second pass we want to avoid reload registers
    6145                 :            :                  which are "bad" for this reload.  */
    6146                 :          0 :               if (pass == 1
    6147                 :          0 :                   && ira_bad_reload_regno (regnum, rld[r].in, rld[r].out))
    6148                 :          0 :                 continue;
    6149                 :            : 
    6150                 :            :               /* Avoid the problem where spilling a GENERAL_OR_FP_REG
    6151                 :            :                  (on 68000) got us two FP regs.  If NR is 1,
    6152                 :            :                  we would reject both of them.  */
    6153                 :          0 :               if (force_group)
    6154                 :          0 :                 nr = rld[r].nregs;
    6155                 :            :               /* If we need only one reg, we have already won.  */
    6156                 :          0 :               if (nr == 1)
    6157                 :            :                 {
    6158                 :            :                   /* But reject a single reg if we demand a group.  */
    6159                 :          0 :                   if (force_group)
    6160                 :          0 :                     continue;
    6161                 :            :                   break;
    6162                 :            :                 }
    6163                 :            :               /* Otherwise check that as many consecutive regs as we need
    6164                 :            :                  are available here.  */
    6165                 :          0 :               while (nr > 1)
    6166                 :            :                 {
    6167                 :          0 :                   int regno = regnum + nr - 1;
    6168                 :          0 :                   if (!(TEST_HARD_REG_BIT (reg_class_contents[rclass], regno)
    6169                 :          0 :                         && spill_reg_order[regno] >= 0
    6170                 :          0 :                         && reload_reg_free_p (regno, rld[r].opnum,
    6171                 :            :                                               rld[r].when_needed)))
    6172                 :            :                     break;
    6173                 :          0 :                   nr--;
    6174                 :            :                 }
    6175                 :          0 :               if (nr == 1)
    6176                 :            :                 break;
    6177                 :            :             }
    6178                 :            :         }
    6179                 :            : 
    6180                 :            :       /* If we found something on the current pass, omit later passes.  */
    6181                 :          0 :       if (count < n_spills)
    6182                 :            :         break;
    6183                 :            :     }
    6184                 :            : 
    6185                 :            :   /* We should have found a spill register by now.  */
    6186                 :          0 :   if (count >= n_spills)
    6187                 :            :     return 0;
    6188                 :            : 
    6189                 :            :   /* I is the index in SPILL_REG_RTX of the reload register we are to
    6190                 :            :      allocate.  Get an rtx for it and find its register number.  */
    6191                 :            : 
    6192                 :          0 :   return set_reload_reg (i, r);
    6193                 :            : }
    6194                 :            : 
    6195                 :            : /* Initialize all the tables needed to allocate reload registers.
    6196                 :            :    CHAIN is the insn currently being processed; SAVE_RELOAD_REG_RTX
    6197                 :            :    is the array we use to restore the reg_rtx field for every reload.  */
    6198                 :            : 
    6199                 :            : static void
    6200                 :          0 : choose_reload_regs_init (class insn_chain *chain, rtx *save_reload_reg_rtx)
    6201                 :            : {
    6202                 :          0 :   int i;
    6203                 :            : 
    6204                 :          0 :   for (i = 0; i < n_reloads; i++)
    6205                 :          0 :     rld[i].reg_rtx = save_reload_reg_rtx[i];
    6206                 :            : 
    6207                 :          0 :   memset (reload_inherited, 0, MAX_RELOADS);
    6208                 :          0 :   memset (reload_inheritance_insn, 0, MAX_RELOADS * sizeof (rtx));
    6209                 :          0 :   memset (reload_override_in, 0, MAX_RELOADS * sizeof (rtx));
    6210                 :            : 
    6211                 :          0 :   CLEAR_HARD_REG_SET (reload_reg_used);
    6212                 :          0 :   CLEAR_HARD_REG_SET (reload_reg_used_at_all);
    6213                 :          0 :   CLEAR_HARD_REG_SET (reload_reg_used_in_op_addr);
    6214                 :          0 :   CLEAR_HARD_REG_SET (reload_reg_used_in_op_addr_reload);
    6215                 :          0 :   CLEAR_HARD_REG_SET (reload_reg_used_in_insn);
    6216                 :          0 :   CLEAR_HARD_REG_SET (reload_reg_used_in_other_addr);
    6217                 :            : 
    6218                 :          0 :   CLEAR_HARD_REG_SET (reg_used_in_insn);
    6219                 :            :   {
    6220                 :            :     HARD_REG_SET tmp;
    6221                 :          0 :     REG_SET_TO_HARD_REG_SET (tmp, &chain->live_throughout);
    6222                 :          0 :     reg_used_in_insn |= tmp;
    6223                 :          0 :     REG_SET_TO_HARD_REG_SET (tmp, &chain->dead_or_set);
    6224                 :          0 :     reg_used_in_insn |= tmp;
    6225                 :          0 :     compute_use_by_pseudos (&reg_used_in_insn, &chain->live_throughout);
    6226                 :          0 :     compute_use_by_pseudos (&reg_used_in_insn, &chain->dead_or_set);
    6227                 :            :   }
    6228                 :            : 
    6229                 :          0 :   for (i = 0; i < reload_n_operands; i++)
    6230                 :            :     {
    6231                 :          0 :       CLEAR_HARD_REG_SET (reload_reg_used_in_output[i]);
    6232                 :          0 :       CLEAR_HARD_REG_SET (reload_reg_used_in_input[i]);
    6233                 :          0 :       CLEAR_HARD_REG_SET (reload_reg_used_in_input_addr[i]);
    6234                 :          0 :       CLEAR_HARD_REG_SET (reload_reg_used_in_inpaddr_addr[i]);
    6235                 :          0 :       CLEAR_HARD_REG_SET (reload_reg_used_in_output_addr[i]);
    6236                 :          0 :       CLEAR_HARD_REG_SET (reload_reg_used_in_outaddr_addr[i]);
    6237                 :            :     }
    6238                 :            : 
    6239                 :          0 :   reload_reg_unavailable = ~chain->used_spill_regs;
    6240                 :            : 
    6241                 :          0 :   CLEAR_HARD_REG_SET (reload_reg_used_for_inherit);
    6242                 :            : 
    6243                 :          0 :   for (i = 0; i < n_reloads; i++)
    6244                 :            :     /* If we have already decided to use a certain register,
    6245                 :            :        don't use it in another way.  */
    6246                 :          0 :     if (rld[i].reg_rtx)
    6247                 :          0 :       mark_reload_reg_in_use (REGNO (rld[i].reg_rtx), rld[i].opnum,
    6248                 :            :                               rld[i].when_needed, rld[i].mode);
    6249                 :          0 : }
    6250                 :            : 
    6251                 :            : /* If X is not a subreg, return it unmodified.  If it is a subreg,
    6252                 :            :    look up whether we made a replacement for the SUBREG_REG.  Return
    6253                 :            :    either the replacement or the SUBREG_REG.  */
    6254                 :            : 
    6255                 :            : static rtx
    6256                 :          0 : replaced_subreg (rtx x)
    6257                 :            : {
    6258                 :          0 :   if (GET_CODE (x) == SUBREG)
    6259                 :          0 :     return find_replacement (&SUBREG_REG (x));
    6260                 :            :   return x;
    6261                 :            : }
    6262                 :            : 
    6263                 :            : /* Compute the offset to pass to subreg_regno_offset, for a pseudo of
    6264                 :            :    mode OUTERMODE that is available in a hard reg of mode INNERMODE.
    6265                 :            :    SUBREG is non-NULL if the pseudo is a subreg whose reg is a pseudo,
    6266                 :            :    otherwise it is NULL.  */
    6267                 :            : 
    6268                 :            : static poly_int64
    6269                 :          0 : compute_reload_subreg_offset (machine_mode outermode,
    6270                 :            :                               rtx subreg,
    6271                 :            :                               machine_mode innermode)
    6272                 :            : {
    6273                 :          0 :   poly_int64 outer_offset;
    6274                 :          0 :   machine_mode middlemode;
    6275                 :            : 
    6276                 :          0 :   if (!subreg)
    6277                 :          0 :     return subreg_lowpart_offset (outermode, innermode);
    6278                 :            : 
    6279                 :          0 :   outer_offset = SUBREG_BYTE (subreg);
    6280                 :          0 :   middlemode = GET_MODE (SUBREG_REG (subreg));
    6281                 :            : 
    6282                 :            :   /* If SUBREG is paradoxical then return the normal lowpart offset
    6283                 :            :      for OUTERMODE and INNERMODE.  Our caller has already checked
    6284                 :            :      that OUTERMODE fits in INNERMODE.  */
    6285                 :          0 :   if (paradoxical_subreg_p (outermode, middlemode))
    6286                 :          0 :     return subreg_lowpart_offset (outermode, innermode);
    6287                 :            : 
    6288                 :            :   /* SUBREG is normal, but may not be lowpart; return OUTER_OFFSET
    6289                 :            :      plus the normal lowpart offset for MIDDLEMODE and INNERMODE.  */
    6290                 :          0 :   return outer_offset + subreg_lowpart_offset (middlemode, innermode);
    6291                 :            : }
    6292                 :            : 
    6293                 :            : /* Assign hard reg targets for the pseudo-registers we must reload
    6294                 :            :    into hard regs for this insn.
    6295                 :            :    Also output the instructions to copy them in and out of the hard regs.
    6296                 :            : 
    6297                 :            :    For machines with register classes, we are responsible for
    6298                 :            :    finding a reload reg in the proper class.  */
    6299                 :            : 
    6300                 :            : static void
    6301                 :          0 : choose_reload_regs (class insn_chain *chain)
    6302                 :            : {
    6303                 :          0 :   rtx_insn *insn = chain->insn;
    6304                 :          0 :   int i, j;
    6305                 :          0 :   unsigned int max_group_size = 1;
    6306                 :          0 :   enum reg_class group_class = NO_REGS;
    6307                 :          0 :   int pass, win, inheritance;
    6308                 :            : 
    6309                 :          0 :   rtx save_reload_reg_rtx[MAX_RELOADS];
    6310                 :            : 
    6311                 :            :   /* In order to be certain of getting the registers we need,
    6312                 :            :      we must sort the reloads into order of increasing register class.
    6313                 :            :      Then our grabbing of reload registers will parallel the process
    6314                 :            :      that provided the reload registers.
    6315                 :            : 
    6316                 :            :      Also note whether any of the reloads wants a consecutive group of regs.
    6317                 :            :      If so, record the maximum size of the group desired and what
    6318                 :            :      register class contains all the groups needed by this insn.  */
    6319                 :            : 
    6320                 :          0 :   for (j = 0; j < n_reloads; j++)
    6321                 :            :     {
    6322                 :          0 :       reload_order[j] = j;
    6323                 :          0 :       if (rld[j].reg_rtx != NULL_RTX)
    6324                 :            :         {
    6325                 :          0 :           gcc_assert (REG_P (rld[j].reg_rtx)
    6326                 :            :                       && HARD_REGISTER_P (rld[j].reg_rtx));
    6327                 :          0 :           reload_spill_index[j] = REGNO (rld[j].reg_rtx);
    6328                 :            :         }
    6329                 :            :       else
    6330                 :          0 :         reload_spill_index[j] = -1;
    6331                 :            : 
    6332                 :          0 :       if (rld[j].nregs > 1)
    6333                 :            :         {
    6334                 :          0 :           max_group_size = MAX (rld[j].nregs, max_group_size);
    6335                 :          0 :           group_class
    6336                 :          0 :             = reg_class_superunion[(int) rld[j].rclass][(int) group_class];
    6337                 :            :         }
    6338                 :            : 
    6339                 :          0 :       save_reload_reg_rtx[j] = rld[j].reg_rtx;
    6340                 :            :     }
    6341                 :            : 
    6342                 :          0 :   if (n_reloads > 1)
    6343                 :          0 :     qsort (reload_order, n_reloads, sizeof (short), reload_reg_class_lower);
    6344                 :            : 
    6345                 :            :   /* If -O, try first with inheritance, then turning it off.
    6346                 :            :      If not -O, don't do inheritance.
    6347                 :            :      Using inheritance when not optimizing leads to paradoxes
    6348                 :            :      with fp on the 68k: fp numbers (not NaNs) fail to be equal to themselves
    6349                 :            :      because one side of the comparison might be inherited.  */
    6350                 :          0 :   win = 0;
    6351                 :          0 :   for (inheritance = optimize > 0; inheritance >= 0; inheritance--)
    6352                 :            :     {
    6353                 :          0 :       choose_reload_regs_init (chain, save_reload_reg_rtx);
    6354                 :            : 
    6355                 :            :       /* Process the reloads in order of preference just found.
    6356                 :            :          Beyond this point, subregs can be found in reload_reg_rtx.
    6357                 :            : 
    6358                 :            :          This used to look for an existing reloaded home for all of the
    6359                 :            :          reloads, and only then perform any new reloads.  But that could lose
    6360                 :            :          if the reloads were done out of reg-class order because a later
    6361                 :            :          reload with a looser constraint might have an old home in a register
    6362                 :            :          needed by an earlier reload with a tighter constraint.
    6363                 :            : 
    6364                 :            :          To solve this, we make two passes over the reloads, in the order
    6365                 :            :          described above.  In the first pass we try to inherit a reload
    6366                 :            :          from a previous insn.  If there is a later reload that needs a
    6367                 :            :          class that is a proper subset of the class being processed, we must
    6368                 :            :          also allocate a spill register during the first pass.
    6369                 :            : 
    6370                 :            :          Then make a second pass over the reloads to allocate any reloads
    6371                 :            :          that haven't been given registers yet.  */
    6372                 :            : 
    6373                 :          0 :       for (j = 0; j < n_reloads; j++)
    6374                 :            :         {
    6375                 :          0 :           int r = reload_order[j];
    6376                 :          0 :           rtx search_equiv = NULL_RTX;
    6377                 :            : 
    6378                 :            :           /* Ignore reloads that got marked inoperative.  */
    6379                 :          0 :           if (rld[r].out == 0 && rld[r].in == 0
    6380                 :          0 :               && ! rld[r].secondary_p)
    6381                 :          0 :             continue;
    6382                 :            : 
    6383                 :            :           /* If find_reloads chose to use reload_in or reload_out as a reload
    6384                 :            :              register, we don't need to chose one.  Otherwise, try even if it
    6385                 :            :              found one since we might save an insn if we find the value lying
    6386                 :            :              around.
    6387                 :            :              Try also when reload_in is a pseudo without a hard reg.  */
    6388                 :          0 :           if (rld[r].in != 0 && rld[r].reg_rtx != 0
    6389                 :          0 :               && (rtx_equal_p (rld[r].in, rld[r].reg_rtx)
    6390                 :          0 :                   || (rtx_equal_p (rld[r].out, rld[r].reg_rtx)
    6391                 :          0 :                       && !MEM_P (rld[r].in)
    6392                 :          0 :                       && true_regnum (rld[r].in) < FIRST_PSEUDO_REGISTER)))
    6393                 :          0 :             continue;
    6394                 :            : 
    6395                 :            : #if 0 /* No longer needed for correct operation.
    6396                 :            :          It might give better code, or might not; worth an experiment?  */
    6397                 :            :           /* If this is an optional reload, we can't inherit from earlier insns
    6398                 :            :              until we are sure that any non-optional reloads have been allocated.
    6399                 :            :              The following code takes advantage of the fact that optional reloads
    6400                 :            :              are at the end of reload_order.  */
    6401                 :            :           if (rld[r].optional != 0)
    6402                 :            :             for (i = 0; i < j; i++)
    6403                 :            :               if ((rld[reload_order[i]].out != 0
    6404                 :            :                    || rld[reload_order[i]].in != 0
    6405                 :            :                    || rld[reload_order[i]].secondary_p)
    6406                 :            :                   && ! rld[reload_order[i]].optional
    6407                 :            :                   && rld[reload_order[i]].reg_rtx == 0)
    6408                 :            :                 allocate_reload_reg (chain, reload_order[i], 0);
    6409                 :            : #endif
    6410                 :            : 
    6411                 :            :           /* First see if this pseudo is already available as reloaded
    6412                 :            :              for a previous insn.  We cannot try to inherit for reloads
    6413                 :            :              that are smaller than the maximum number of registers needed
    6414                 :            :              for groups unless the register we would allocate cannot be used
    6415                 :            :              for the groups.
    6416                 :            : 
    6417                 :            :              We could check here to see if this is a secondary reload for
    6418                 :            :              an object that is already in a register of the desired class.
    6419                 :            :              This would avoid the need for the secondary reload register.
    6420                 :            :              But this is complex because we can't easily determine what
    6421                 :            :              objects might want to be loaded via this reload.  So let a
    6422                 :            :              register be allocated here.  In `emit_reload_insns' we suppress
    6423                 :            :              one of the loads in the case described above.  */
    6424                 :            : 
    6425                 :          0 :           if (inheritance)
    6426                 :            :             {
    6427                 :          0 :               poly_int64 byte = 0;
    6428                 :          0 :               int regno = -1;
    6429                 :          0 :               machine_mode mode = VOIDmode;
    6430                 :          0 :               rtx subreg = NULL_RTX;
    6431                 :            : 
    6432                 :          0 :               if (rld[r].in == 0)
    6433                 :            :                 ;
    6434                 :          0 :               else if (REG_P (rld[r].in))
    6435                 :            :                 {
    6436                 :          0 :                   regno = REGNO (rld[r].in);
    6437                 :          0 :                   mode = GET_MODE (rld[r].in);
    6438                 :            :                 }
    6439                 :          0 :               else if (REG_P (rld[r].in_reg))
    6440                 :            :                 {
    6441                 :          0 :                   regno = REGNO (rld[r].in_reg);
    6442                 :          0 :                   mode = GET_MODE (rld[r].in_reg);
    6443                 :            :                 }
    6444                 :          0 :               else if (GET_CODE (rld[r].in_reg) == SUBREG
    6445                 :          0 :                        && REG_P (SUBREG_REG (rld[r].in_reg)))
    6446                 :            :                 {
    6447                 :          0 :                   regno = REGNO (SUBREG_REG (rld[r].in_reg));
    6448                 :          0 :                   if (regno < FIRST_PSEUDO_REGISTER)
    6449                 :          0 :                     regno = subreg_regno (rld[r].in_reg);
    6450                 :            :                   else
    6451                 :            :                     {
    6452                 :          0 :                       subreg = rld[r].in_reg;
    6453                 :          0 :                       byte = SUBREG_BYTE (subreg);
    6454                 :            :                     }
    6455                 :          0 :                   mode = GET_MODE (rld[r].in_reg);
    6456                 :            :                 }
    6457                 :            : #if AUTO_INC_DEC
    6458                 :            :               else if (GET_RTX_CLASS (GET_CODE (rld[r].in_reg)) == RTX_AUTOINC
    6459                 :            :                        && REG_P (XEXP (rld[r].in_reg, 0)))
    6460                 :            :                 {
    6461                 :            :                   regno = REGNO (XEXP (rld[r].in_reg, 0));
    6462                 :            :                   mode = GET_MODE (XEXP (rld[r].in_reg, 0));
    6463                 :            :                   rld[r].out = rld[r].in;
    6464                 :            :                 }
    6465                 :            : #endif
    6466                 :            : #if 0
    6467                 :            :               /* This won't work, since REGNO can be a pseudo reg number.
    6468                 :            :                  Also, it takes much more hair to keep track of all the things
    6469                 :            :                  that can invalidate an inherited reload of part of a pseudoreg.  */
    6470                 :            :               else if (GET_CODE (rld[r].in) == SUBREG
    6471                 :            :                        && REG_P (SUBREG_REG (rld[r].in)))
    6472                 :            :                 regno = subreg_regno (rld[r].in);
    6473                 :            : #endif
    6474                 :            : 
    6475                 :          0 :               if (regno >= 0
    6476                 :          0 :                   && reg_last_reload_reg[regno] != 0
    6477                 :          0 :                   && (known_ge
    6478                 :            :                       (GET_MODE_SIZE (GET_MODE (reg_last_reload_reg[regno])),
    6479                 :            :                        GET_MODE_SIZE (mode) + byte))
    6480                 :            :                   /* Verify that the register it's in can be used in
    6481                 :            :                      mode MODE.  */
    6482                 :          0 :                   && (REG_CAN_CHANGE_MODE_P
    6483                 :            :                       (REGNO (reg_last_reload_reg[regno]),
    6484                 :            :                        GET_MODE (reg_last_reload_reg[regno]),
    6485                 :            :                        mode)))
    6486                 :            :                 {
    6487                 :          0 :                   enum reg_class rclass = rld[r].rclass, last_class;
    6488                 :          0 :                   rtx last_reg = reg_last_reload_reg[regno];
    6489                 :            : 
    6490                 :          0 :                   i = REGNO (last_reg);
    6491                 :          0 :                   byte = compute_reload_subreg_offset (mode,
    6492                 :            :                                                        subreg,
    6493                 :          0 :                                                        GET_MODE (last_reg));
    6494                 :          0 :                   i += subreg_regno_offset (i, GET_MODE (last_reg), byte, mode);
    6495                 :          0 :                   last_class = REGNO_REG_CLASS (i);
    6496                 :            : 
    6497                 :          0 :                   if (reg_reloaded_contents[i] == regno
    6498                 :          0 :                       && TEST_HARD_REG_BIT (reg_reloaded_valid, i)
    6499                 :          0 :                       && targetm.hard_regno_mode_ok (i, rld[r].mode)
    6500                 :          0 :                       && (TEST_HARD_REG_BIT (reg_class_contents[(int) rclass], i)
    6501                 :            :                           /* Even if we can't use this register as a reload
    6502                 :            :                              register, we might use it for reload_override_in,
    6503                 :            :                              if copying it to the desired class is cheap
    6504                 :            :                              enough.  */
    6505                 :          0 :                           || ((register_move_cost (mode, last_class, rclass)
    6506                 :          0 :                                < memory_move_cost (mode, rclass, true))
    6507                 :          0 :                               && (secondary_reload_class (1, rclass, mode,
    6508                 :            :                                                           last_reg)
    6509                 :            :                                   == NO_REGS)
    6510                 :          0 :                               && !(targetm.secondary_memory_needed
    6511                 :          0 :                                    (mode, last_class, rclass))))
    6512                 :          0 :                       && (rld[r].nregs == max_group_size
    6513                 :          0 :                           || ! TEST_HARD_REG_BIT (reg_class_contents[(int) group_class],
    6514                 :            :                                                   i))
    6515                 :          0 :                       && free_for_value_p (i, rld[r].mode, rld[r].opnum,
    6516                 :            :                                            rld[r].when_needed, rld[r].in,
    6517                 :            :                                            const0_rtx, r, 1))
    6518                 :            :                     {
    6519                 :            :                       /* If a group is needed, verify that all the subsequent
    6520                 :            :                          registers still have their values intact.  */
    6521                 :          0 :                       int nr = hard_regno_nregs (i, rld[r].mode);
    6522                 :          0 :                       int k;
    6523                 :            : 
    6524                 :          0 :                       for (k = 1; k < nr; k++)
    6525                 :          0 :                         if (reg_reloaded_contents[i + k] != regno
    6526                 :          0 :                             || ! TEST_HARD_REG_BIT (reg_reloaded_valid, i + k))
    6527                 :            :                           break;
    6528                 :            : 
    6529                 :          0 :                       if (k == nr)
    6530                 :            :                         {
    6531                 :          0 :                           int i1;
    6532                 :          0 :                           int bad_for_class;
    6533                 :            : 
    6534                 :          0 :                           last_reg = (GET_MODE (last_reg) == mode
    6535                 :          0 :                                       ? last_reg : gen_rtx_REG (mode, i));
    6536                 :            : 
    6537                 :          0 :                           bad_for_class = 0;
    6538                 :          0 :                           for (k = 0; k < nr; k++)
    6539                 :          0 :                             bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].rclass],
    6540                 :          0 :                                                                   i+k);
    6541                 :            : 
    6542                 :            :                           /* We found a register that contains the
    6543                 :            :                              value we need.  If this register is the
    6544                 :            :                              same as an `earlyclobber' operand of the
    6545                 :            :                              current insn, just mark it as a place to
    6546                 :            :                              reload from since we can't use it as the
    6547                 :            :                              reload register itself.  */
    6548                 :            : 
    6549                 :          0 :                           for (i1 = 0; i1 < n_earlyclobbers; i1++)
    6550                 :          0 :                             if (reg_overlap_mentioned_for_reload_p
    6551                 :          0 :                                 (reg_last_reload_reg[regno],
    6552                 :            :                                  reload_earlyclobbers[i1]))
    6553                 :            :                               break;
    6554                 :            : 
    6555                 :          0 :                           if (i1 != n_earlyclobbers
    6556                 :          0 :                               || ! (free_for_value_p (i, rld[r].mode,
    6557                 :            :                                                       rld[r].opnum,
    6558                 :            :                                                       rld[r].when_needed, rld[r].in,
    6559                 :            :                                                       rld[r].out, r, 1))
    6560                 :            :                               /* Don't use it if we'd clobber a pseudo reg.  */
    6561                 :          0 :                               || (TEST_HARD_REG_BIT (reg_used_in_insn, i)
    6562                 :          0 :                                   && rld[r].out
    6563                 :          0 :                                   && ! TEST_HARD_REG_BIT (reg_reloaded_dead, i))
    6564                 :            :                               /* Don't clobber the frame pointer.  */
    6565                 :          0 :                               || (i == HARD_FRAME_POINTER_REGNUM
    6566                 :          0 :                                   && frame_pointer_needed
    6567                 :          0 :                                   && rld[r].out)
    6568                 :            :                               /* Don't really use the inherited spill reg
    6569                 :            :                                  if we need it wider than we've got it.  */
    6570                 :          0 :                               || paradoxical_subreg_p (rld[r].mode, mode)
    6571                 :          0 :                               || bad_for_class
    6572                 :            : 
    6573                 :            :                               /* If find_reloads chose reload_out as reload
    6574                 :            :                                  register, stay with it - that leaves the
    6575                 :            :                                  inherited register for subsequent reloads.  */
    6576                 :          0 :                               || (rld[r].out && rld[r].reg_rtx
    6577                 :          0 :                                   && rtx_equal_p (rld[r].out, rld[r].reg_rtx)))
    6578                 :            :                             {
    6579                 :          0 :                               if (! rld[r].optional)
    6580                 :            :                                 {
    6581                 :          0 :                                   reload_override_in[r] = last_reg;
    6582                 :          0 :                                   reload_inheritance_insn[r]
    6583                 :          0 :                                     = reg_reloaded_insn[i];
    6584                 :            :                                 }
    6585                 :            :                             }
    6586                 :            :                           else
    6587                 :            :                             {
    6588                 :          0 :                               int k;
    6589                 :            :                               /* We can use this as a reload reg.  */
    6590                 :            :                               /* Mark the register as in use for this part of
    6591                 :            :                                  the insn.  */
    6592                 :          0 :                               mark_reload_reg_in_use (i,
    6593                 :            :                                                       rld[r].opnum,
    6594                 :            :                                                       rld[r].when_needed,
    6595                 :            :                                                       rld[r].mode);
    6596                 :          0 :                               rld[r].reg_rtx = last_reg;
    6597                 :          0 :                               reload_inherited[r] = 1;
    6598                 :          0 :                               reload_inheritance_insn[r]
    6599                 :          0 :                                 = reg_reloaded_insn[i];
    6600                 :          0 :                               reload_spill_index[r] = i;
    6601                 :          0 :                               for (k = 0; k < nr; k++)
    6602                 :          0 :                                 SET_HARD_REG_BIT (reload_reg_used_for_inherit,
    6603                 :          0 :                                                   i + k);
    6604                 :            :                             }
    6605                 :            :                         }
    6606                 :            :                     }
    6607                 :            :                 }
    6608                 :            :             }
    6609                 :            : 
    6610                 :            :           /* Here's another way to see if the value is already lying around.  */
    6611                 :          0 :           if (inheritance
    6612                 :          0 :               && rld[r].in != 0
    6613                 :          0 :               && ! reload_inherited[r]
    6614                 :          0 :               && rld[r].out == 0
    6615                 :          0 :               && (CONSTANT_P (rld[r].in)
    6616                 :          0 :                   || GET_CODE (rld[r].in) == PLUS
    6617                 :          0 :                   || REG_P (rld[r].in)
    6618                 :          0 :                   || MEM_P (rld[r].in))
    6619                 :          0 :               && (rld[r].nregs == max_group_size
    6620                 :          0 :                   || ! reg_classes_intersect_p (rld[r].rclass, group_class)))
    6621                 :          0 :             search_equiv = rld[r].in;
    6622                 :            : 
    6623                 :          0 :           if (search_equiv)
    6624                 :            :             {
    6625                 :          0 :               rtx equiv
    6626                 :          0 :                 = find_equiv_reg (search_equiv, insn, rld[r].rclass,
    6627                 :            :                                   -1, NULL, 0, rld[r].mode);
    6628                 :          0 :               int regno = 0;
    6629                 :            : 
    6630                 :          0 :               if (equiv != 0)
    6631                 :            :                 {
    6632                 :          0 :                   if (REG_P (equiv))
    6633                 :          0 :                     regno = REGNO (equiv);
    6634                 :            :                   else
    6635                 :            :                     {
    6636                 :            :                       /* This must be a SUBREG of a hard register.
    6637                 :            :                          Make a new REG since this might be used in an
    6638                 :            :                          address and not all machines support SUBREGs
    6639                 :            :                          there.  */
    6640                 :          0 :                       gcc_assert (GET_CODE (equiv) == SUBREG);
    6641                 :          0 :                       regno = subreg_regno (equiv);
    6642                 :          0 :                       equiv = gen_rtx_REG (rld[r].mode, regno);
    6643                 :            :                       /* If we choose EQUIV as the reload register, but the
    6644                 :            :                          loop below decides to cancel the inheritance, we'll
    6645                 :            :                          end up reloading EQUIV in rld[r].mode, not the mode
    6646                 :            :                          it had originally.  That isn't safe when EQUIV isn't
    6647                 :            :                          available as a spill register since its value might
    6648                 :            :                          still be live at this point.  */
    6649                 :          0 :                       for (i = regno; i < regno + (int) rld[r].nregs; i++)
    6650                 :          0 :                         if (TEST_HARD_REG_BIT (reload_reg_unavailable, i))
    6651                 :          0 :                           equiv = 0;
    6652                 :            :                     }
    6653                 :            :                 }
    6654                 :            : 
    6655                 :            :               /* If we found a spill reg, reject it unless it is free
    6656                 :            :                  and of the desired class.  */
    6657                 :          0 :               if (equiv != 0)
    6658                 :            :                 {
    6659                 :          0 :                   int regs_used = 0;
    6660                 :          0 :                   int bad_for_class = 0;
    6661                 :          0 :                   int max_regno = regno + rld[r].nregs;
    6662                 :            : 
    6663                 :          0 :                   for (i = regno; i < max_regno; i++)
    6664                 :            :                     {
    6665                 :          0 :                       regs_used |= TEST_HARD_REG_BIT (reload_reg_used_at_all,
    6666                 :            :                                                       i);
    6667                 :          0 :                       bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].rclass],
    6668                 :            :                                                            i);
    6669                 :            :                     }
    6670                 :            : 
    6671                 :          0 :                   if ((regs_used
    6672                 :          0 :                        && ! free_for_value_p (regno, rld[r].mode,
    6673                 :            :                                               rld[r].opnum, rld[r].when_needed,
    6674                 :            :                                               rld[r].in, rld[r].out, r, 1))
    6675                 :          0 :                       || bad_for_class)
    6676                 :            :                     equiv = 0;
    6677                 :            :                 }
    6678                 :            : 
    6679                 :          0 :               if (equiv != 0
    6680                 :          0 :                   && !targetm.hard_regno_mode_ok (regno, rld[r].mode))
    6681                 :            :                 equiv = 0;
    6682                 :            : 
    6683                 :            :               /* We found a register that contains the value we need.
    6684                 :            :                  If this register is the same as an `earlyclobber' operand
    6685                 :            :                  of the current insn, just mark it as a place to reload from
    6686                 :            :                  since we can't use it as the reload register itself.  */
    6687                 :            : 
    6688                 :          0 :               if (equiv != 0)
    6689                 :          0 :                 for (i = 0; i < n_earlyclobbers; i++)
    6690                 :          0 :                   if (reg_overlap_mentioned_for_reload_p (equiv,
    6691                 :            :                                                           reload_earlyclobbers[i]))
    6692                 :            :                     {
    6693                 :          0 :                       if (! rld[r].optional)
    6694                 :          0 :                         reload_override_in[r] = equiv;
    6695                 :            :                       equiv = 0;
    6696                 :            :                       break;
    6697                 :            :                     }
    6698                 :            : 
    6699                 :            :               /* If the equiv register we have found is explicitly clobbered
    6700                 :            :                  in the current insn, it depends on the reload type if we
    6701                 :            :                  can use it, use it for reload_override_in, or not at all.
    6702                 :            :                  In particular, we then can't use EQUIV for a
    6703                 :            :                  RELOAD_FOR_OUTPUT_ADDRESS reload.  */
    6704                 :            : 
    6705                 :          0 :               if (equiv != 0)
    6706                 :            :                 {
    6707                 :          0 :                   if (regno_clobbered_p (regno, insn, rld[r].mode, 2))
    6708                 :          0 :                     switch (rld[r].when_needed)
    6709                 :            :                       {
    6710                 :            :                       case RELOAD_FOR_OTHER_ADDRESS:
    6711                 :            :                       case RELOAD_FOR_INPADDR_ADDRESS:
    6712                 :            :                       case RELOAD_FOR_INPUT_ADDRESS:
    6713                 :            :                       case RELOAD_FOR_OPADDR_ADDR:
    6714                 :            :                         break;
    6715                 :          0 :                       case RELOAD_OTHER:
    6716                 :          0 :                       case RELOAD_FOR_INPUT:
    6717                 :          0 :                       case RELOAD_FOR_OPERAND_ADDRESS:
    6718                 :          0 :                         if (! rld[r].optional)
    6719                 :          0 :                           reload_override_in[r] = equiv;
    6720                 :            :                         /* Fall through.  */
    6721                 :            :                       default:
    6722                 :            :                         equiv = 0;
    6723                 :            :                         break;
    6724                 :            :                       }
    6725                 :          0 :                   else if (regno_clobbered_p (regno, insn, rld[r].mode, 1))
    6726                 :          0 :                     switch (rld[r].when_needed)
    6727                 :            :                       {
    6728                 :            :                       case RELOAD_FOR_OTHER_ADDRESS:
    6729                 :            :                       case RELOAD_FOR_INPADDR_ADDRESS:
    6730                 :            :                       case RELOAD_FOR_INPUT_ADDRESS:
    6731                 :            :                       case RELOAD_FOR_OPADDR_ADDR:
    6732                 :            :                       case RELOAD_FOR_OPERAND_ADDRESS:
    6733                 :            :                       case RELOAD_FOR_INPUT:
    6734                 :            :                         break;
    6735                 :          0 :                       case RELOAD_OTHER:
    6736                 :          0 :                         if (! rld[r].optional)
    6737                 :          0 :                           reload_override_in[r] = equiv;
    6738                 :            :                         /* Fall through.  */
    6739                 :            :                       default:
    6740                 :            :                         equiv = 0;
    6741                 :            :                         break;
    6742                 :            :                       }
    6743                 :            :                 }
    6744                 :            : 
    6745                 :            :               /* If we found an equivalent reg, say no code need be generated
    6746                 :            :                  to load it, and use it as our reload reg.  */
    6747                 :          0 :               if (equiv != 0
    6748                 :          0 :                   && (regno != HARD_FRAME_POINTER_REGNUM
    6749                 :          0 :                       || !frame_pointer_needed))
    6750                 :            :                 {
    6751                 :          0 :                   int nr = hard_regno_nregs (regno, rld[r].mode);
    6752                 :          0 :                   int k;
    6753                 :          0 :                   rld[r].reg_rtx = equiv;
    6754                 :          0 :                   reload_spill_index[r] = regno;
    6755                 :          0 :                   reload_inherited[r] = 1;
    6756                 :            : 
    6757                 :            :                   /* If reg_reloaded_valid is not set for this register,
    6758                 :            :                      there might be a stale spill_reg_store lying around.
    6759                 :            :                      We must clear it, since otherwise emit_reload_insns
    6760                 :            :                      might delete the store.  */
    6761                 :          0 :                   if (! TEST_HARD_REG_BIT (reg_reloaded_valid, regno))
    6762                 :          0 :                     spill_reg_store[regno] = NULL;
    6763                 :            :                   /* If any of the hard registers in EQUIV are spill
    6764                 :            :                      registers, mark them as in use for this insn.  */
    6765                 :          0 :                   for (k = 0; k < nr; k++)
    6766                 :            :                     {
    6767                 :          0 :                       i = spill_reg_order[regno + k];
    6768                 :          0 :                       if (i >= 0)
    6769                 :            :                         {
    6770                 :          0 :                           mark_reload_reg_in_use (regno, rld[r].opnum,
    6771                 :            :                                                   rld[r].when_needed,
    6772                 :            :                                                   rld[r].mode);
    6773                 :          0 :                           SET_HARD_REG_BIT (reload_reg_used_for_inherit,
    6774                 :            :                                             regno + k);
    6775                 :            :                         }
    6776                 :            :                     }
    6777                 :            :                 }
    6778                 :            :             }
    6779                 :            : 
    6780                 :            :           /* If we found a register to use already, or if this is an optional
    6781                 :            :              reload, we are done.  */
    6782                 :          0 :           if (rld[r].reg_rtx != 0 || rld[r].optional != 0)
    6783                 :          0 :             continue;
    6784                 :            : 
    6785                 :            : #if 0
    6786                 :            :           /* No longer needed for correct operation.  Might or might
    6787                 :            :              not give better code on the average.  Want to experiment?  */
    6788                 :            : 
    6789                 :            :           /* See if there is a later reload that has a class different from our
    6790                 :            :              class that intersects our class or that requires less register
    6791                 :            :              than our reload.  If so, we must allocate a register to this
    6792                 :            :              reload now, since that reload might inherit a previous reload
    6793                 :            :              and take the only available register in our class.  Don't do this
    6794                 :            :              for optional reloads since they will force all previous reloads
    6795                 :            :              to be allocated.  Also don't do this for reloads that have been
    6796                 :            :              turned off.  */
    6797                 :            : 
    6798                 :            :           for (i = j + 1; i < n_reloads; i++)
    6799                 :            :             {
    6800                 :            :               int s = reload_order[i];
    6801                 :            : 
    6802                 :            :               if ((rld[s].in == 0 && rld[s].out == 0
    6803                 :            :                    && ! rld[s].secondary_p)
    6804                 :            :                   || rld[s].optional)
    6805                 :            :                 continue;
    6806                 :            : 
    6807                 :            :               if ((rld[s].rclass != rld[r].rclass
    6808                 :            :                    && reg_classes_intersect_p (rld[r].rclass,
    6809                 :            :                                                rld[s].rclass))
    6810                 :            :                   || rld[s].nregs < rld[r].nregs)
    6811                 :            :                 break;
    6812                 :            :             }
    6813                 :            : 
    6814                 :            :           if (i == n_reloads)
    6815                 :            :             continue;
    6816                 :            : 
    6817                 :            :           allocate_reload_reg (chain, r, j == n_reloads - 1);
    6818                 :            : #endif
    6819                 :            :         }
    6820                 :            : 
    6821                 :            :       /* Now allocate reload registers for anything non-optional that
    6822                 :            :          didn't get one yet.  */
    6823                 :          0 :       for (j = 0; j < n_reloads; j++)
    6824                 :            :         {
    6825                 :          0 :           int r = reload_order[j];
    6826                 :            : 
    6827                 :            :           /* Ignore reloads that got marked inoperative.  */
    6828                 :          0 :           if (rld[r].out == 0 && rld[r].in == 0 && ! rld[r].secondary_p)
    6829                 :          0 :             continue;
    6830                 :            : 
    6831                 :            :           /* Skip reloads that already have a register allocated or are
    6832                 :            :              optional.  */
    6833                 :          0 :           if (rld[r].reg_rtx != 0 || rld[r].optional)
    6834                 :          0 :             continue;
    6835                 :            : 
    6836                 :          0 :           if (! allocate_reload_reg (chain, r, j == n_reloads - 1))
    6837                 :            :             break;
    6838                 :            :         }
    6839                 :            : 
    6840                 :            :       /* If that loop got all the way, we have won.  */
    6841                 :          0 :       if (j == n_reloads)
    6842                 :            :         {
    6843                 :            :           win = 1;
    6844                 :            :           break;
    6845                 :            :         }
    6846                 :            : 
    6847                 :            :       /* Loop around and try without any inheritance.  */
    6848                 :            :     }
    6849                 :            : 
    6850                 :          0 :   if (! win)
    6851                 :            :     {
    6852                 :            :       /* First undo everything done by the failed attempt
    6853                 :            :          to allocate with inheritance.  */
    6854                 :          0 :       choose_reload_regs_init (chain, save_reload_reg_rtx);
    6855                 :            : 
    6856                 :            :       /* Some sanity tests to verify that the reloads found in the first
    6857                 :            :          pass are identical to the ones we have now.  */
    6858                 :          0 :       gcc_assert (chain->n_reloads == n_reloads);
    6859                 :            : 
    6860                 :          0 :       for (i = 0; i < n_reloads; i++)
    6861                 :            :         {
    6862                 :          0 :           if (chain->rld[i].regno < 0 || chain->rld[i].reg_rtx != 0)
    6863                 :          0 :             continue;
    6864                 :          0 :           gcc_assert (chain->rld[i].when_needed == rld[i].when_needed);
    6865                 :          0 :           for (j = 0; j < n_spills; j++)
    6866                 :          0 :             if (spill_regs[j] == chain->rld[i].regno)
    6867                 :          0 :               if (! set_reload_reg (j, i))
    6868                 :          0 :                 failed_reload (chain->insn, i);
    6869                 :            :         }
    6870                 :            :     }
    6871                 :            : 
    6872                 :            :   /* If we thought we could inherit a reload, because it seemed that
    6873                 :            :      nothing else wanted the same reload register earlier in the insn,
    6874                 :            :      verify that assumption, now that all reloads have been assigned.
    6875                 :            :      Likewise for reloads where reload_override_in has been set.  */
    6876                 :            : 
    6877                 :            :   /* If doing expensive optimizations, do one preliminary pass that doesn't
    6878                 :            :      cancel any inheritance, but removes reloads that have been needed only
    6879                 :            :      for reloads that we know can be inherited.  */
    6880                 :          0 :   for (pass = flag_expensive_optimizations; pass >= 0; pass--)
    6881                 :            :     {
    6882                 :          0 :       for (j = 0; j < n_reloads; j++)
    6883                 :            :         {
    6884                 :          0 :           int r = reload_order[j];
    6885                 :          0 :           rtx check_reg;
    6886                 :          0 :           rtx tem;
    6887                 :          0 :           if (reload_inherited[r] && rld[r].reg_rtx)
    6888                 :            :             check_reg = rld[r].reg_rtx;
    6889                 :          0 :           else if (reload_override_in[r]
    6890                 :          0 :                    && (REG_P (reload_override_in[r])
    6891                 :          0 :                        || GET_CODE (reload_override_in[r]) == SUBREG))
    6892                 :            :             check_reg = reload_override_in[r];
    6893                 :            :           else
    6894                 :          0 :             continue;
    6895                 :          0 :           if (! free_for_value_p (true_regnum (check_reg), rld[r].mode,
    6896                 :            :                                   rld[r].opnum, rld[r].when_needed, rld[r].in,
    6897                 :            :                                   (reload_inherited[r]
    6898                 :            :                                    ? rld[r].out : const0_rtx),
    6899                 :            :                                   r, 1))
    6900                 :            :             {
    6901                 :          0 :               if (pass)
    6902                 :          0 :                 continue;
    6903                 :          0 :               reload_inherited[r] = 0;
    6904                 :          0 :               reload_override_in[r] = 0;
    6905                 :            :             }
    6906                 :            :           /* If we can inherit a RELOAD_FOR_INPUT, or can use a
    6907                 :            :              reload_override_in, then we do not need its related
    6908                 :            :              RELOAD_FOR_INPUT_ADDRESS / RELOAD_FOR_INPADDR_ADDRESS reloads;
    6909                 :            :              likewise for other reload types.
    6910                 :            :              We handle this by removing a reload when its only replacement
    6911                 :            :              is mentioned in reload_in of the reload we are going to inherit.
    6912                 :            :              A special case are auto_inc expressions; even if the input is
    6913                 :            :              inherited, we still need the address for the output.  We can
    6914                 :            :              recognize them because they have RELOAD_OUT set to RELOAD_IN.
    6915                 :            :              If we succeeded removing some reload and we are doing a preliminary
    6916                 :            :              pass just to remove such reloads, make another pass, since the
    6917                 :            :              removal of one reload might allow us to inherit another one.  */
    6918                 :          0 :           else if (rld[r].in
    6919                 :          0 :                    && rld[r].out != rld[r].in
    6920                 :          0 :                    && remove_address_replacements (rld[r].in))
    6921                 :            :             {
    6922                 :          0 :               if (pass)
    6923                 :          0 :                 pass = 2;
    6924                 :            :             }
    6925                 :            :           /* If we needed a memory location for the reload, we also have to
    6926                 :            :              remove its related reloads.  */
    6927                 :          0 :           else if (rld[r].in
    6928                 :          0 :                    && rld[r].out != rld[r].in
    6929                 :          0 :                    && (tem = replaced_subreg (rld[r].in), REG_P (tem))             
    6930                 :          0 :                    && REGNO (tem) < FIRST_PSEUDO_REGISTER
    6931                 :          0 :                    && (targetm.secondary_memory_needed
    6932                 :          0 :                        (rld[r].inmode, REGNO_REG_CLASS (REGNO (tem)),
    6933                 :          0 :                         rld[r].rclass))
    6934                 :          0 :                    && remove_address_replacements
    6935                 :          0 :                       (get_secondary_mem (tem, rld[r].inmode, rld[r].opnum,
    6936                 :            :                                           rld[r].when_needed)))
    6937                 :            :             {
    6938                 :          0 :               if (pass)
    6939                 :          0 :                 pass = 2;
    6940                 :            :             }
    6941                 :            :         }
    6942                 :            :     }
    6943                 :            : 
    6944                 :            :   /* Now that reload_override_in is known valid,
    6945                 :            :      actually override reload_in.  */
    6946                 :          0 :   for (j = 0; j < n_reloads; j++)
    6947                 :          0 :     if (reload_override_in[j])
    6948                 :          0 :       rld[j].in = reload_override_in[j];
    6949                 :            : 
    6950                 :            :   /* If this reload won't be done because it has been canceled or is
    6951                 :            :      optional and not inherited, clear reload_reg_rtx so other
    6952                 :            :      routines (such as subst_reloads) don't get confused.  */
    6953                 :          0 :   for (j = 0; j < n_reloads; j++)
    6954                 :          0 :     if (rld[j].reg_rtx != 0
    6955                 :          0 :         && ((rld[j].optional && ! reload_inherited[j])
    6956                 :          0 :             || (rld[j].in == 0 && rld[j].out == 0
    6957                 :          0 :                 && ! rld[j].secondary_p)))
    6958                 :            :       {
    6959                 :          0 :         int regno = true_regnum (rld[j].reg_rtx);
    6960                 :            : 
    6961                 :          0 :         if (spill_reg_order[regno] >= 0)
    6962                 :          0 :           clear_reload_reg_in_use (regno, rld[j].opnum,
    6963                 :            :                                    rld[j].when_needed, rld[j].mode);
    6964                 :          0 :         rld[j].reg_rtx = 0;
    6965                 :          0 :         reload_spill_index[j] = -1;
    6966                 :            :       }
    6967                 :            : 
    6968                 :            :   /* Record which pseudos and which spill regs have output reloads.  */
    6969                 :          0 :   for (j = 0; j < n_reloads; j++)
    6970                 :            :     {
    6971                 :          0 :       int r = reload_order[j];
    6972                 :            : 
    6973                 :          0 :       i = reload_spill_index[r];
    6974                 :            : 
    6975                 :            :       /* I is nonneg if this reload uses a register.
    6976                 :            :          If rld[r].reg_rtx is 0, this is an optional reload
    6977                 :            :          that we opted to ignore.  */
    6978                 :          0 :       if (rld[r].out_reg != 0 && REG_P (rld[r].out_reg)
    6979                 :          0 :           && rld[r].reg_rtx != 0)
    6980                 :            :         {
    6981                 :          0 :           int nregno = REGNO (rld[r].out_reg);
    6982                 :          0 :           int nr = 1;
    6983                 :            : 
    6984                 :          0 :           if (nregno < FIRST_PSEUDO_REGISTER)
    6985                 :          0 :             nr = hard_regno_nregs (nregno, rld[r].mode);
    6986                 :            : 
    6987                 :          0 :           while (--nr >= 0)
    6988                 :          0 :             SET_REGNO_REG_SET (&reg_has_output_reload,
    6989                 :            :                                nregno + nr);
    6990                 :            : 
    6991                 :          0 :           if (i >= 0)
    6992                 :          0 :             add_to_hard_reg_set (&reg_is_output_reload, rld[r].mode, i);
    6993                 :            : 
    6994                 :          0 :           gcc_assert (rld[r].when_needed == RELOAD_OTHER
    6995                 :            :                       || rld[r].when_needed == RELOAD_FOR_OUTPUT
    6996                 :            :                       || rld[r].when_needed == RELOAD_FOR_INSN);
    6997                 :            :         }
    6998                 :            :     }
    6999                 :          0 : }
    7000                 :            : 
    7001                 :            : /* Deallocate the reload register for reload R.  This is called from
    7002                 :            :    remove_address_replacements.  */
    7003                 :            : 
    7004                 :            : void
    7005                 :          0 : deallocate_reload_reg (int r)
    7006                 :            : {
    7007                 :          0 :   int regno;
    7008                 :            : 
    7009                 :          0 :   if (! rld[r].reg_rtx)
    7010                 :            :     return;
    7011                 :          0 :   regno = true_regnum (rld[r].reg_rtx);
    7012                 :          0 :   rld[r].reg_rtx = 0;
    7013                 :          0 :   if (spill_reg_order[regno] >= 0)
    7014                 :          0 :     clear_reload_reg_in_use (regno, rld[r].opnum, rld[r].when_needed,
    7015                 :            :                              rld[r].mode);
    7016                 :          0 :   reload_spill_index[r] = -1;
    7017                 :            : }
    7018                 :            : 
    7019                 :            : /* These arrays are filled by emit_reload_insns and its subroutines.  */
    7020                 :            : static rtx_insn *input_reload_insns[MAX_RECOG_OPERANDS];
    7021                 :            : static rtx_insn *other_input_address_reload_insns = 0;
    7022                 :            : static rtx_insn *other_input_reload_insns = 0;
    7023                 :            : static rtx_insn *input_address_reload_insns[MAX_RECOG_OPERANDS];
    7024                 :            : static rtx_insn *inpaddr_address_reload_insns[MAX_RECOG_OPERANDS];
    7025                 :            : static rtx_insn *output_reload_insns[MAX_RECOG_OPERANDS];
    7026                 :            : static rtx_insn *output_address_reload_insns[MAX_RECOG_OPERANDS];
    7027                 :            : static rtx_insn *outaddr_address_reload_insns[MAX_RECOG_OPERANDS];
    7028                 :            : static rtx_insn *operand_reload_insns = 0;
    7029                 :            : static rtx_insn *other_operand_reload_insns = 0;
    7030                 :            : static rtx_insn *other_output_reload_insns[MAX_RECOG_OPERANDS];
    7031                 :            : 
    7032                 :            : /* Values to be put in spill_reg_store are put here first.  Instructions
    7033                 :            :    must only be placed here if the associated reload register reaches
    7034                 :            :    the end of the instruction's reload sequence.  */
    7035                 :            : static rtx_insn *new_spill_reg_store[FIRST_PSEUDO_REGISTER];
    7036                 :            : static HARD_REG_SET reg_reloaded_died;
    7037                 :            : 
    7038                 :            : /* Check if *RELOAD_REG is suitable as an intermediate or scratch register
    7039                 :            :    of class NEW_CLASS with mode NEW_MODE.  Or alternatively, if alt_reload_reg
    7040                 :            :    is nonzero, if that is suitable.  On success, change *RELOAD_REG to the
    7041                 :            :    adjusted register, and return true.  Otherwise, return false.  */
    7042                 :            : static bool
    7043                 :          0 : reload_adjust_reg_for_temp (rtx *reload_reg, rtx alt_reload_reg,
    7044                 :            :                             enum reg_class new_class,
    7045                 :            :                             machine_mode new_mode)
    7046                 :            : 
    7047                 :            : {
    7048                 :          0 :   rtx reg;
    7049                 :            : 
    7050                 :          0 :   for (reg = *reload_reg; reg; reg = alt_reload_reg, alt_reload_reg = 0)
    7051                 :            :     {
    7052                 :          0 :       unsigned regno = REGNO (reg);
    7053                 :            : 
    7054                 :          0 :       if (!TEST_HARD_REG_BIT (reg_class_contents[(int) new_class], regno))
    7055                 :          0 :         continue;
    7056                 :          0 :       if (GET_MODE (reg) != new_mode)
    7057                 :            :         {
    7058                 :          0 :           if (!targetm.hard_regno_mode_ok (regno, new_mode))
    7059                 :          0 :             continue;
    7060                 :          0 :           if (hard_regno_nregs (regno, new_mode) > REG_NREGS (reg))
    7061                 :          0 :             continue;
    7062                 :          0 :           reg = reload_adjust_reg_for_mode (reg, new_mode);
    7063                 :            :         }
    7064                 :          0 :       *reload_reg = reg;
    7065                 :          0 :       return true;
    7066                 :            :     }
    7067                 :            :   return false;
    7068                 :            : }
    7069                 :            : 
    7070                 :            : /* Check if *RELOAD_REG is suitable as a scratch register for the reload
    7071                 :            :    pattern with insn_code ICODE, or alternatively, if alt_reload_reg is
    7072                 :            :    nonzero, if that is suitable.  On success, change *RELOAD_REG to the
    7073                 :            :    adjusted register, and return true.  Otherwise, return false.  */
    7074                 :            : static bool
    7075                 :          0 : reload_adjust_reg_for_icode (rtx *reload_reg, rtx alt_reload_reg,
    7076                 :            :                              enum insn_code icode)
    7077                 :            : 
    7078                 :            : {
    7079                 :          0 :   enum reg_class new_class = scratch_reload_class (icode);
    7080                 :          0 :   machine_mode new_mode = insn_data[(int) icode].operand[2].mode;
    7081                 :            : 
    7082                 :          0 :   return reload_adjust_reg_for_temp (reload_reg, alt_reload_reg,
    7083                 :          0 :                                      new_class, new_mode);
    7084                 :            : }
    7085                 :            : 
    7086                 :            : /* Generate insns to perform reload RL, which is for the insn in CHAIN and
    7087                 :            :    has the number J.  OLD contains the value to be used as input.  */
    7088                 :            : 
    7089                 :            : static void
    7090                 :          0 : emit_input_reload_insns (class insn_chain *chain, struct reload *rl,
    7091                 :            :                          rtx old, int j)
    7092                 :            : {
    7093                 :          0 :   rtx_insn *insn = chain->insn;
    7094                 :          0 :   rtx reloadreg;
    7095                 :          0 :   rtx oldequiv_reg = 0;
    7096                 :          0 :   rtx oldequiv = 0;
    7097                 :          0 :   int special = 0;
    7098                 :          0 :   machine_mode mode;
    7099                 :          0 :   rtx_insn **where;
    7100                 :            : 
    7101                 :            :   /* delete_output_reload is only invoked properly if old contains
    7102                 :            :      the original pseudo register.  Since this is replaced with a
    7103                 :            :      hard reg when RELOAD_OVERRIDE_IN is set, see if we can
    7104                 :            :      find the pseudo in RELOAD_IN_REG.  This is also used to
    7105                 :            :      determine whether a secondary reload is needed.  */
    7106                 :          0 :   if (reload_override_in[j]
    7107                 :          0 :       && (REG_P (rl->in_reg)
    7108                 :          0 :           || (GET_CODE (rl->in_reg) == SUBREG
    7109                 :          0 :               && REG_P (SUBREG_REG (rl->in_reg)))))
    7110                 :            :     {
    7111                 :          0 :       oldequiv = old;
    7112                 :          0 :       old = rl->in_reg;
    7113                 :            :     }
    7114                 :          0 :   if (oldequiv == 0)
    7115                 :            :     oldequiv = old;
    7116                 :          0 :   else if (REG_P (oldequiv))
    7117                 :            :     oldequiv_reg = oldequiv;
    7118                 :          0 :   else if (GET_CODE (oldequiv) == SUBREG)
    7119                 :          0 :     oldequiv_reg = SUBREG_REG (oldequiv);
    7120                 :            : 
    7121                 :          0 :   reloadreg = reload_reg_rtx_for_input[j];
    7122                 :          0 :   mode = GET_MODE (reloadreg);
    7123                 :            : 
    7124                 :            :   /* If we are reloading from a register that was recently stored in
    7125                 :            :      with an output-reload, see if we can prove there was
    7126                 :            :      actually no need to store the old value in it.  */
    7127                 :            : 
    7128                 :          0 :   if (optimize && REG_P (oldequiv)
    7129                 :          0 :       && REGNO (oldequiv) < FIRST_PSEUDO_REGISTER
    7130                 :          0 :       && spill_reg_store[REGNO (oldequiv)]
    7131                 :          0 :       && REG_P (old)
    7132                 :          0 :       && (dead_or_set_p (insn, spill_reg_stored_to[REGNO (oldequiv)])
    7133                 :          0 :           || rtx_equal_p (spill_reg_stored_to[REGNO (oldequiv)],
    7134                 :          0 :                           rl->out_reg)))
    7135                 :          0 :     delete_output_reload (insn, j, REGNO (oldequiv), reloadreg);
    7136                 :            : 
    7137                 :            :   /* Encapsulate OLDEQUIV into the reload mode, then load RELOADREG from
    7138                 :            :      OLDEQUIV.  */
    7139                 :            : 
    7140                 :          0 :   while (GET_CODE (oldequiv) == SUBREG && GET_MODE (oldequiv) != mode)
    7141                 :          0 :     oldequiv = SUBREG_REG (oldequiv);
    7142                 :          0 :   if (GET_MODE (oldequiv) != VOIDmode
    7143                 :          0 :       && mode != GET_MODE (oldequiv))
    7144                 :          0 :     oldequiv = gen_lowpart_SUBREG (mode, oldequiv);
    7145                 :            : 
    7146                 :            :   /* Switch to the right place to emit the reload insns.  */
    7147                 :          0 :   switch (rl->when_needed)
    7148                 :            :     {
    7149                 :            :     case RELOAD_OTHER:
    7150                 :            :       where = &other_input_reload_insns;
    7151                 :            :       break;
    7152                 :          0 :     case RELOAD_FOR_INPUT:
    7153                 :          0 :       where = &input_reload_insns[rl->opnum];
    7154                 :          0 :       break;
    7155                 :          0 :     case RELOAD_FOR_INPUT_ADDRESS:
    7156                 :          0 :       where = &input_address_reload_insns[rl->opnum];
    7157                 :          0 :       break;
    7158                 :          0 :     case RELOAD_FOR_INPADDR_ADDRESS:
    7159                 :          0 :       where = &inpaddr_address_reload_insns[rl->opnum];
    7160                 :          0 :       break;
    7161                 :          0 :     case RELOAD_FOR_OUTPUT_ADDRESS:
    7162                 :          0 :       where = &output_address_reload_insns[rl->opnum];
    7163                 :          0 :       break;
    7164                 :          0 :     case RELOAD_FOR_OUTADDR_ADDRESS:
    7165                 :          0 :       where = &outaddr_address_reload_insns[rl->opnum];
    7166                 :          0 :       break;
    7167                 :          0 :     case RELOAD_FOR_OPERAND_ADDRESS:
    7168                 :          0 :       where = &operand_reload_insns;
    7169                 :          0 :       break;
    7170                 :          0 :     case RELOAD_FOR_OPADDR_ADDR:
    7171                 :          0 :       where = &other_operand_reload_insns;
    7172                 :          0 :       break;
    7173                 :          0 :     case RELOAD_FOR_OTHER_ADDRESS:
    7174                 :          0 :       where = &other_input_address_reload_insns;
    7175                 :          0 :       break;
    7176                 :          0 :     default:
    7177                 :          0 :       gcc_unreachable ();
    7178                 :            :     }
    7179                 :            : 
    7180                 :          0 :   push_to_sequence (*where);
    7181                 :            : 
    7182                 :            :   /* Auto-increment addresses must be reloaded in a special way.  */
    7183                 :          0 :   if (rl->out && ! rl->out_reg)
    7184                 :            :     {
    7185                 :            :       /* We are not going to bother supporting the case where a
    7186                 :            :          incremented register can't be copied directly from
    7187                 :            :          OLDEQUIV since this seems highly unlikely.  */
    7188                 :          0 :       gcc_assert (rl->secondary_in_reload < 0);
    7189                 :            : 
    7190                 :          0 :       if (reload_inherited[j])
    7191                 :          0 :         oldequiv = reloadreg;
    7192                 :            : 
    7193                 :          0 :       old = XEXP (rl->in_reg, 0);
    7194                 :            : 
    7195                 :            :       /* Prevent normal processing of this reload.  */
    7196                 :          0 :       special = 1;
    7197                 :            :       /* Output a special code sequence for this case.  */
    7198                 :          0 :       inc_for_reload (reloadreg, oldequiv, rl->out, rl->inc);
    7199                 :            :     }
    7200                 :            : 
    7201                 :            :   /* If we are reloading a pseudo-register that was set by the previous
    7202                 :            :      insn, see if we can get rid of that pseudo-register entirely
    7203                 :            :      by redirecting the previous insn into our reload register.  */
    7204                 :            : 
    7205                 :          0 :   else if (optimize && REG_P (old)
    7206                 :          0 :            && REGNO (old) >= FIRST_PSEUDO_REGISTER
    7207                 :          0 :            && dead_or_set_p (insn, old)
    7208                 :            :            /* This is unsafe if some other reload
    7209                 :            :               uses the same reg first.  */
    7210                 :          0 :            && ! conflicts_with_override (reloadreg)
    7211                 :          0 :            && free_for_value_p (REGNO (reloadreg), rl->mode, rl->opnum,
    7212                 :            :                                 rl->when_needed, old, rl->out, j, 0))
    7213                 :            :     {
    7214                 :          0 :       rtx_insn *temp = PREV_INSN (insn);
    7215                 :          0 :       while (temp && (NOTE_P (temp) || DEBUG_INSN_P (temp)))
    7216                 :          0 :         temp = PREV_INSN (temp);
    7217                 :          0 :       if (temp
    7218                 :          0 :           && NONJUMP_INSN_P (temp)
    7219                 :          0 :           && GET_CODE (PATTERN (temp)) == SET
    7220                 :          0 :           && SET_DEST (PATTERN (temp)) == old
    7221                 :            :           /* Make sure we can access insn_operand_constraint.  */
    7222                 :          0 :           && asm_noperands (PATTERN (temp)) < 0
    7223                 :            :           /* This is unsafe if operand occurs more than once in current
    7224                 :            :              insn.  Perhaps some occurrences aren't reloaded.  */
    7225                 :          0 :           && count_occurrences (PATTERN (insn), old, 0) == 1)
    7226                 :            :         {
    7227                 :          0 :           rtx old = SET_DEST (PATTERN (temp));
    7228                 :            :           /* Store into the reload register instead of the pseudo.  */
    7229                 :          0 :           SET_DEST (PATTERN (temp)) = reloadreg;
    7230                 :            : 
    7231                 :            :           /* Verify that resulting insn is valid. 
    7232                 :            : 
    7233                 :            :              Note that we have replaced the destination of TEMP with
    7234                 :            :              RELOADREG.  If TEMP references RELOADREG within an
    7235                 :            :              autoincrement addressing mode, then the resulting insn
    7236                 :            :              is ill-formed and we must reject this optimization.  */
    7237                 :          0 :           extract_insn (temp);
    7238                 :          0 :           if (constrain_operands (1, get_enabled_alternatives (temp))
    7239                 :          0 :               && (!AUTO_INC_DEC || ! find_reg_note (temp, REG_INC, reloadreg)))
    7240                 :            :             {
    7241                 :            :               /* If the previous insn is an output reload, the source is
    7242                 :            :                  a reload register, and its spill_reg_store entry will
    7243                 :            :                  contain the previous destination.  This is now
    7244                 :            :                  invalid.  */
    7245                 :          0 :               if (REG_P (SET_SRC (PATTERN (temp)))
    7246                 :          0 :                   && REGNO (SET_SRC (PATTERN (temp))) < FIRST_PSEUDO_REGISTER)
    7247                 :            :                 {
    7248                 :          0 :                   spill_reg_store[REGNO (SET_SRC (PATTERN (temp)))] = 0;
    7249                 :          0 :                   spill_reg_stored_to[REGNO (SET_SRC (PATTERN (temp)))] = 0;
    7250                 :            :                 }
    7251                 :            : 
    7252                 :            :               /* If these are the only uses of the pseudo reg,
    7253                 :            :                  pretend for GDB it lives in the reload reg we used.  */
    7254                 :          0 :               if (REG_N_DEATHS (REGNO (old)) == 1
    7255                 :          0 :                   && REG_N_SETS (REGNO (old)) == 1)
    7256                 :            :                 {
    7257                 :          0 :                   reg_renumber[REGNO (old)] = REGNO (reloadreg);
    7258                 :          0 :                   if (ira_conflicts_p)
    7259                 :            :                     /* Inform IRA about the change.  */
    7260                 :          0 :                     ira_mark_allocation_change (REGNO (old));
    7261                 :          0 :                   alter_reg (REGNO (old), -1, false);
    7262                 :            :                 }
    7263                 :          0 :               special = 1;
    7264                 :            : 
    7265                 :            :               /* Adjust any debug insns between temp and insn.  */
    7266                 :          0 :               while ((temp = NEXT_INSN (temp)) != insn)
    7267                 :          0 :                 if (DEBUG_BIND_INSN_P (temp))
    7268                 :          0 :                   INSN_VAR_LOCATION_LOC (temp)
    7269                 :          0 :                     = simplify_replace_rtx (INSN_VAR_LOCATION_LOC (temp),
    7270                 :            :                                             old, reloadreg);
    7271                 :            :                 else
    7272                 :          0 :                   gcc_assert (DEBUG_INSN_P (temp) || NOTE_P (temp));
    7273                 :            :             }
    7274                 :            :           else
    7275                 :            :             {
    7276                 :          0 :               SET_DEST (PATTERN (temp)) = old;
    7277                 :            :             }
    7278                 :            :         }
    7279                 :            :     }
    7280                 :            : 
    7281                 :            :   /* We can't do that, so output an insn to load RELOADREG.  */
    7282                 :            : 
    7283                 :            :   /* If we have a secondary reload, pick up the secondary register
    7284                 :            :      and icode, if any.  If OLDEQUIV and OLD are different or
    7285                 :            :      if this is an in-out reload, recompute whether or not we
    7286                 :            :      still need a secondary register and what the icode should
    7287                 :            :      be.  If we still need a secondary register and the class or
    7288                 :            :      icode is different, go back to reloading from OLD if using
    7289                 :            :      OLDEQUIV means that we got the wrong type of register.  We
    7290                 :            :      cannot have different class or icode due to an in-out reload
    7291                 :            :      because we don't make such reloads when both the input and
    7292                 :            :      output need secondary reload registers.  */
    7293                 :            : 
    7294                 :          0 :   if (! special && rl->secondary_in_reload >= 0)
    7295                 :            :     {
    7296                 :          0 :       rtx second_reload_reg = 0;
    7297                 :          0 :       rtx third_reload_reg = 0;
    7298                 :          0 :       int secondary_reload = rl->secondary_in_reload;
    7299                 :          0 :       rtx real_oldequiv = oldequiv;
    7300                 :          0 :       rtx real_old = old;
    7301                 :          0 :       rtx tmp;
    7302                 :          0 :       enum insn_code icode;
    7303                 :          0 :       enum insn_code tertiary_icode = CODE_FOR_nothing;
    7304                 :            : 
    7305                 :            :       /* If OLDEQUIV is a pseudo with a MEM, get the real MEM
    7306                 :            :          and similarly for OLD.
    7307                 :            :          See comments in get_secondary_reload in reload.c.  */
    7308                 :            :       /* If it is a pseudo that cannot be replaced with its
    7309                 :            :          equivalent MEM, we must fall back to reload_in, which
    7310                 :            :          will have all the necessary substitutions registered.
    7311                 :            :          Likewise for a pseudo that can't be replaced with its
    7312                 :            :          equivalent constant.
    7313                 :            : 
    7314                 :            :          Take extra care for subregs of such pseudos.  Note that
    7315                 :            :          we cannot use reg_equiv_mem in this case because it is
    7316                 :            :          not in the right mode.  */
    7317                 :            : 
    7318                 :          0 :       tmp = oldequiv;
    7319                 :          0 :       if (GET_CODE (tmp) == SUBREG)
    7320                 :          0 :         tmp = SUBREG_REG (tmp);
    7321                 :          0 :       if (REG_P (tmp)
    7322                 :          0 :           && REGNO (tmp) >= FIRST_PSEUDO_REGISTER
    7323                 :          0 :           && (reg_equiv_memory_loc (REGNO (tmp)) != 0
    7324                 :          0 :               || reg_equiv_constant (REGNO (tmp)) != 0))
    7325                 :            :         {
    7326                 :          0 :           if (! reg_equiv_mem (REGNO (tmp))
    7327                 :          0 :               || num_not_at_initial_offset
    7328                 :          0 :               || GET_CODE (oldequiv) == SUBREG)
    7329                 :          0 :             real_oldequiv = rl->in;
    7330                 :            :           else
    7331                 :          0 :             real_oldequiv = reg_equiv_mem (REGNO (tmp));
    7332                 :            :         }
    7333                 :            : 
    7334                 :          0 :       tmp = old;
    7335                 :          0 :       if (GET_CODE (tmp) == SUBREG)
    7336                 :          0 :         tmp = SUBREG_REG (tmp);
    7337                 :          0 :       if (REG_P (tmp)
    7338                 :          0 :           && REGNO (tmp) >= FIRST_PSEUDO_REGISTER
    7339                 :          0 :           && (reg_equiv_memory_loc (REGNO (tmp)) != 0
    7340                 :          0 :               || reg_equiv_constant (REGNO (tmp)) != 0))
    7341                 :            :         {
    7342                 :          0 :           if (! reg_equiv_mem (REGNO (tmp))
    7343                 :          0 :               || num_not_at_initial_offset
    7344                 :          0 :               || GET_CODE (old) == SUBREG)
    7345                 :          0 :             real_old = rl->in;
    7346                 :            :           else
    7347                 :          0 :             real_old = reg_equiv_mem (REGNO (tmp));
    7348                 :            :         }
    7349                 :            : 
    7350                 :          0 :       second_reload_reg = rld[secondary_reload].reg_rtx;
    7351                 :          0 :       if (rld[secondary_reload].secondary_in_reload >= 0)
    7352                 :            :         {
    7353                 :          0 :           int tertiary_reload = rld[secondary_reload].secondary_in_reload;
    7354                 :            : 
    7355                 :          0 :           third_reload_reg = rld[tertiary_reload].reg_rtx;
    7356                 :          0 :           tertiary_icode = rld[secondary_reload].secondary_in_icode;
    7357                 :            :           /* We'd have to add more code for quartary reloads.  */
    7358                 :          0 :           gcc_assert (rld[tertiary_reload].secondary_in_reload < 0);
    7359                 :            :         }
    7360                 :          0 :       icode = rl->secondary_in_icode;
    7361                 :            : 
    7362                 :          0 :       if ((old != oldequiv && ! rtx_equal_p (old, oldequiv))
    7363                 :          0 :           || (rl->in != 0 && rl->out != 0))
    7364                 :            :         {
    7365                 :          0 :           secondary_reload_info sri, sri2;
    7366                 :          0 :           enum reg_class new_class, new_t_class;
    7367                 :            : 
    7368                 :          0 :           sri.icode = CODE_FOR_nothing;
    7369                 :          0 :           sri.prev_sri = NULL;
    7370                 :          0 :           new_class
    7371                 :          0 :             = (enum reg_class) targetm.secondary_reload (1, real_oldequiv,
    7372                 :          0 :                                                          rl->rclass, mode,
    7373                 :            :                                                          &sri);
    7374                 :            : 
    7375                 :          0 :           if (new_class == NO_REGS && sri.icode == CODE_FOR_nothing)
    7376                 :          0 :             second_reload_reg = 0;
    7377                 :          0 :           else if (new_class == NO_REGS)
    7378                 :            :             {
    7379                 :          0 :               if (reload_adjust_reg_for_icode (&second_reload_reg,
    7380                 :            :                                                third_reload_reg,
    7381                 :          0 :                                                (enum insn_code) sri.icode))
    7382                 :            :                 {
    7383                 :          0 :                   icode = (enum insn_code) sri.icode;
    7384                 :          0 :                   third_reload_reg = 0;
    7385                 :            :                 }
    7386                 :            :               else
    7387                 :            :                 {
    7388                 :            :                   oldequiv = old;
    7389                 :            :                   real_oldequiv = real_old;
    7390                 :            :                 }
    7391                 :            :             }
    7392                 :          0 :           else if (sri.icode != CODE_FOR_nothing)
    7393                 :            :             /* We currently lack a way to express this in reloads.  */
    7394                 :          0 :             gcc_unreachable ();
    7395                 :            :           else
    7396                 :            :             {
    7397                 :          0 :               sri2.icode = CODE_FOR_nothing;
    7398                 :          0 :               sri2.prev_sri = &sri;
    7399                 :          0 :               new_t_class
    7400                 :          0 :                 = (enum reg_class) targetm.secondary_reload (1, real_oldequiv,
    7401                 :            :                                                              new_class, mode,
    7402                 :            :                                                              &sri);
    7403                 :          0 :               if (new_t_class == NO_REGS && sri2.icode == CODE_FOR_nothing)
    7404                 :            :                 {
    7405                 :          0 :                   if (reload_adjust_reg_for_temp (&second_reload_reg,
    7406                 :            :                                                   third_reload_reg,
    7407                 :            :                                                   new_class, mode))
    7408                 :            :                     {
    7409                 :          0 :                       third_reload_reg = 0;
    7410                 :          0 :                       tertiary_icode = (enum insn_code) sri2.icode;
    7411                 :            :                     }
    7412                 :            :                   else
    7413                 :            :                     {
    7414                 :            :                       oldequiv = old;
    7415                 :            :                       real_oldequiv = real_old;
    7416                 :            :                     }
    7417                 :            :                 }
    7418                 :          0 :               else if (new_t_class == NO_REGS && sri2.icode != CODE_FOR_nothing)
    7419                 :            :                 {
    7420                 :            :                   rtx intermediate = second_reload_reg;
    7421                 :            : 
    7422                 :            :                   if (reload_adjust_reg_for_temp (&intermediate, NULL,
    7423                 :            :                                                   new_class, mode)
    7424                 :            :                       && reload_adjust_reg_for_icode (&third_reload_reg, NULL,
    7425                 :            :                                                       ((enum insn_code)
    7426                 :            :                                                        sri2.icode)))
    7427                 :            :                     {
    7428                 :            :                       second_reload_reg = intermediate;
    7429                 :            :                       tertiary_icode = (enum insn_code) sri2.icode;
    7430                 :            :                     }
    7431                 :            :                   else
    7432                 :            :                     {
    7433                 :            :                       oldequiv = old;
    7434                 :            :                       real_oldequiv = real_old;
    7435                 :            :                     }
    7436                 :            :                 }
    7437                 :          0 :               else if (new_t_class != NO_REGS && sri2.icode == CODE_FOR_nothing)
    7438                 :            :                 {
    7439                 :          0 :                   rtx intermediate = second_reload_reg;
    7440                 :            : 
    7441                 :          0 :                   if (reload_adjust_reg_for_temp (&intermediate, NULL,
    7442                 :            :                                                   new_class, mode)
    7443                 :          0 :                       && reload_adjust_reg_for_temp (&third_reload_reg, NULL,
    7444                 :            :                                                       new_t_class, mode))
    7445                 :            :                     {
    7446                 :          0 :                       second_reload_reg = intermediate;
    7447                 :          0 :                       tertiary_icode = (enum insn_code) sri2.icode;
    7448                 :            :                     }
    7449                 :            :                   else
    7450                 :            :                     {
    7451                 :            :                       oldequiv = old;
    7452                 :            :                       real_oldequiv = real_old;
    7453                 :          0 :                     }
    7454                 :            :                 }
    7455                 :            :               else
    7456                 :            :                 {
    7457                 :            :                   /* This could be handled more intelligently too.  */
    7458                 :            :                   oldequiv = old;
    7459                 :            :                   real_oldequiv = real_old;
    7460                 :            :                 }
    7461                 :            :             }
    7462                 :            :         }
    7463                 :            : 
    7464                 :            :       /* If we still need a secondary reload register, check
    7465                 :            :          to see if it is being used as a scratch or intermediate
    7466                 :            :          register and generate code appropriately.  If we need
    7467                 :            :          a scratch register, use REAL_OLDEQUIV since the form of
    7468                 :            :          the insn may depend on the actual address if it is
    7469                 :            :          a MEM.  */
    7470                 :            : 
    7471                 :          0 :       if (second_reload_reg)
    7472                 :            :         {
    7473                 :          0 :           if (icode != CODE_FOR_nothing)
    7474                 :            :             {
    7475                 :            :               /* We'd have to add extra code to handle this case.  */
    7476                 :          0 :               gcc_assert (!third_reload_reg);
    7477                 :            : 
    7478                 :          0 :               emit_insn (GEN_FCN (icode) (reloadreg, real_oldequiv,
    7479                 :            :                                           second_reload_reg));
    7480                 :          0 :               special = 1;
    7481                 :            :             }
    7482                 :            :           else
    7483                 :            :             {
    7484                 :            :               /* See if we need a scratch register to load the
    7485                 :            :                  intermediate register (a tertiary reload).  */
    7486                 :          0 :               if (tertiary_icode != CODE_FOR_nothing)
    7487                 :            :                 {
    7488                 :          0 :                   emit_insn ((GEN_FCN (tertiary_icode)
    7489                 :          0 :                               (second_reload_reg, real_oldequiv,
    7490                 :            :                                third_reload_reg)));
    7491                 :            :                 }
    7492                 :          0 :               else if (third_reload_reg)
    7493                 :            :                 {
    7494                 :          0 :                   gen_reload (third_reload_reg, real_oldequiv,
    7495                 :            :                               rl->opnum,
    7496                 :            :                               rl->when_needed);
    7497                 :          0 :                   gen_reload (second_reload_reg, third_reload_reg,
    7498                 :            :                               rl->opnum,
    7499                 :            :                               rl->when_needed);
    7500                 :            :                 }
    7501                 :            :               else
    7502                 :          0 :                 gen_reload (second_reload_reg, real_oldequiv,
    7503                 :            :                             rl->opnum,
    7504                 :            :                             rl->when_needed);
    7505                 :            : 
    7506                 :          0 :               oldequiv = second_reload_reg;
    7507                 :            :             }
    7508                 :            :         }
    7509                 :            :     }
    7510                 :            : 
    7511                 :          0 :   if (! special && ! rtx_equal_p (reloadreg, oldequiv))
    7512                 :            :     {
    7513                 :          0 :       rtx real_oldequiv = oldequiv;
    7514                 :            : 
    7515                 :          0 :       if ((REG_P (oldequiv)
    7516                 :          0 :            && REGNO (oldequiv) >= FIRST_PSEUDO_REGISTER
    7517                 :          0 :            && (reg_equiv_memory_loc (REGNO (oldequiv)) != 0
    7518                 :          0 :                || reg_equiv_constant (REGNO (oldequiv)) != 0))
    7519                 :          0 :           || (GET_CODE (oldequiv) == SUBREG
    7520                 :          0 :               && REG_P (SUBREG_REG (oldequiv))
    7521                 :          0 :               && (REGNO (SUBREG_REG (oldequiv))
    7522                 :            :                   >= FIRST_PSEUDO_REGISTER)
    7523                 :          0 :               && ((reg_equiv_memory_loc (REGNO (SUBREG_REG (oldequiv))) != 0)
    7524                 :          0 :                   || (reg_equiv_constant (REGNO (SUBREG_REG (oldequiv))) != 0)))
    7525                 :          0 :           || (CONSTANT_P (oldequiv)
    7526                 :          0 :               && (targetm.preferred_reload_class (oldequiv,
    7527                 :          0 :                                                   REGNO_REG_CLASS (REGNO (reloadreg)))
    7528                 :            :                   == NO_REGS)))
    7529                 :          0 :         real_oldequiv = rl->in;
    7530                 :          0 :       gen_reload (reloadreg, real_oldequiv, rl->opnum,
    7531                 :            :                   rl->when_needed);
    7532                 :            :     }
    7533                 :            : 
    7534                 :          0 :   if (cfun->can_throw_non_call_exceptions)
    7535                 :          0 :     copy_reg_eh_region_note_forward (insn, get_insns (), NULL);
    7536                 :            : 
    7537                 :            :   /* End this sequence.  */
    7538                 :          0 :   *where = get_insns ();
    7539                 :          0 :   end_sequence ();
    7540                 :            : 
    7541                 :            :   /* Update reload_override_in so that delete_address_reloads_1
    7542                 :            :      can see the actual register usage.  */
    7543                 :          0 :   if (oldequiv_reg)
    7544                 :          0 :     reload_override_in[j] = oldequiv;
    7545                 :          0 : }
    7546                 :            : 
    7547                 :            : /* Generate insns to for the output reload RL, which is for the insn described
    7548                 :            :    by CHAIN and has the number J.  */
    7549                 :            : static void
    7550                 :          0 : emit_output_reload_insns (class insn_chain *chain, struct reload *rl,
    7551                 :            :                           int j)
    7552                 :            : {
    7553                 :          0 :   rtx reloadreg;
    7554                 :          0 :   rtx_insn *insn = chain->insn;
    7555                 :          0 :   int special = 0;
    7556                 :          0 :   rtx old = rl->out;
    7557                 :          0 :   machine_mode mode;
    7558                 :          0 :   rtx_insn *p;
    7559                 :          0 :   rtx rl_reg_rtx;
    7560                 :            : 
    7561                 :          0 :   if (rl->when_needed == RELOAD_OTHER)
    7562                 :          0 :     start_sequence ();
    7563                 :            :   else
    7564                 :          0 :     push_to_sequence (output_reload_insns[rl->opnum]);
    7565                 :            : 
    7566                 :          0 :   rl_reg_rtx = reload_reg_rtx_for_output[j];
    7567                 :          0 :   mode = GET_MODE (rl_reg_rtx);
    7568                 :            : 
    7569                 :          0 :   reloadreg = rl_reg_rtx;
    7570                 :            : 
    7571                 :            :   /* If we need two reload regs, set RELOADREG to the intermediate
    7572                 :            :      one, since it will be stored into OLD.  We might need a secondary
    7573                 :            :      register only for an input reload, so check again here.  */
    7574                 :            : 
    7575                 :          0 :   if (rl->secondary_out_reload >= 0)
    7576                 :            :     {
    7577                 :          0 :       rtx real_old = old;
    7578                 :          0 :       int secondary_reload = rl->secondary_out_reload;
    7579                 :          0 :       int tertiary_reload = rld[secondary_reload].secondary_out_reload;
    7580