LCOV - code coverage report
Current view: top level - objdir/gcc - insn-flags.h (source / functions) Hit Total Coverage
Test: gcc.info Lines: 0 40 0.0 %
Date: 2020-03-28 11:57:23 Functions: 0 0 -
Legend: Lines: hit not hit | Branches: + taken - not taken # not executed Branches: 0 0 -

           Branch data     Line data    Source code
       1                 :            : /* Generated automatically by the program `genflags'
       2                 :            :    from the machine description file `md'.  */
       3                 :            : 
       4                 :            : #ifndef GCC_INSN_FLAGS_H
       5                 :            : #define GCC_INSN_FLAGS_H
       6                 :            : 
       7                 :            : #define HAVE_x86_sahf_1 (TARGET_SAHF)
       8                 :            : #define HAVE_insvhi_1 1
       9                 :            : #define HAVE_insvsi_1 1
      10                 :            : #define HAVE_insvdi_1 (TARGET_64BIT)
      11                 :            : #define HAVE_zero_extendqidi2 (TARGET_64BIT)
      12                 :            : #define HAVE_zero_extendhidi2 (TARGET_64BIT)
      13                 :            : #define HAVE_zero_extendqisi2_and (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun))
      14                 :            : #define HAVE_zero_extendhisi2_and (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun))
      15                 :            : #define HAVE_zero_extendqihi2_and (TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun))
      16                 :            : #define HAVE_extendsidi2_1 (!TARGET_64BIT)
      17                 :            : #define HAVE_extendqidi2 (TARGET_64BIT)
      18                 :            : #define HAVE_extendhidi2 (TARGET_64BIT)
      19                 :            : #define HAVE_extendhisi2 1
      20                 :            : #define HAVE_extendqisi2 1
      21                 :            : #define HAVE_extendqihi2 1
      22                 :            : #define HAVE_truncdfsf2 (TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH))
      23                 :            : #define HAVE_truncxfsf2 (TARGET_80387)
      24                 :            : #define HAVE_truncxfdf2 (TARGET_80387)
      25                 :            : #define HAVE_fixuns_truncsfdi2 (TARGET_64BIT && TARGET_AVX512F && TARGET_SSE_MATH)
      26                 :            : #define HAVE_fixuns_truncdfdi2 (TARGET_64BIT && TARGET_AVX512F && TARGET_SSE_MATH)
      27                 :            : #define HAVE_fixuns_truncsfsi2_avx512f (TARGET_AVX512F && TARGET_SSE_MATH)
      28                 :            : #define HAVE_fixuns_truncdfsi2_avx512f (TARGET_AVX512F && TARGET_SSE_MATH)
      29                 :            : #define HAVE_fix_truncsfsi_sse (SSE_FLOAT_MODE_P (SFmode) \
      30                 :            :    && (!TARGET_FISTTP || TARGET_SSE_MATH))
      31                 :            : #define HAVE_fix_truncsfdi_sse ((SSE_FLOAT_MODE_P (SFmode) \
      32                 :            :    && (!TARGET_FISTTP || TARGET_SSE_MATH)) && (TARGET_64BIT))
      33                 :            : #define HAVE_fix_truncdfsi_sse (SSE_FLOAT_MODE_P (DFmode) \
      34                 :            :    && (!TARGET_FISTTP || TARGET_SSE_MATH))
      35                 :            : #define HAVE_fix_truncdfdi_sse ((SSE_FLOAT_MODE_P (DFmode) \
      36                 :            :    && (!TARGET_FISTTP || TARGET_SSE_MATH)) && (TARGET_64BIT))
      37                 :            : #define HAVE_fix_trunchi_i387_fisttp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \
      38                 :            :    && TARGET_FISTTP \
      39                 :            :    && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \
      40                 :            :          && (TARGET_64BIT || HImode != DImode)) \
      41                 :            :         && TARGET_SSE_MATH))
      42                 :            : #define HAVE_fix_truncsi_i387_fisttp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \
      43                 :            :    && TARGET_FISTTP \
      44                 :            :    && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \
      45                 :            :          && (TARGET_64BIT || SImode != DImode)) \
      46                 :            :         && TARGET_SSE_MATH))
      47                 :            : #define HAVE_fix_truncdi_i387_fisttp (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \
      48                 :            :    && TARGET_FISTTP \
      49                 :            :    && !((SSE_FLOAT_MODE_P (GET_MODE (operands[1])) \
      50                 :            :          && (TARGET_64BIT || DImode != DImode)) \
      51                 :            :         && TARGET_SSE_MATH))
      52                 :            : #define HAVE_fix_truncdi_i387 (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \
      53                 :            :    && !TARGET_FISTTP \
      54                 :            :    && !(TARGET_64BIT && SSE_FLOAT_MODE_P (GET_MODE (operands[1]))))
      55                 :            : #define HAVE_fix_trunchi_i387 (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \
      56                 :            :    && !TARGET_FISTTP \
      57                 :            :    && !SSE_FLOAT_MODE_P (GET_MODE (operands[1])))
      58                 :            : #define HAVE_fix_truncsi_i387 (X87_FLOAT_MODE_P (GET_MODE (operands[1])) \
      59                 :            :    && !TARGET_FISTTP \
      60                 :            :    && !SSE_FLOAT_MODE_P (GET_MODE (operands[1])))
      61                 :            : #define HAVE_x86_fnstcw_1 (TARGET_80387)
      62                 :            : #define HAVE_floathisf2 (TARGET_80387 \
      63                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
      64                 :            :        || TARGET_MIX_SSE_I387))
      65                 :            : #define HAVE_floathidf2 (TARGET_80387 \
      66                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
      67                 :            :        || TARGET_MIX_SSE_I387))
      68                 :            : #define HAVE_floathixf2 (TARGET_80387 \
      69                 :            :    && (!(SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH) \
      70                 :            :        || TARGET_MIX_SSE_I387))
      71                 :            : #define HAVE_floatsixf2 (TARGET_80387)
      72                 :            : #define HAVE_floatdixf2 (TARGET_80387)
      73                 :            : #define HAVE_floatdisf2_i387_with_xmm (!TARGET_64BIT && TARGET_INTER_UNIT_MOVES_TO_VEC \
      74                 :            :    && TARGET_80387 && X87_ENABLE_FLOAT (SFmode, DImode) \
      75                 :            :    && TARGET_SSE2 && optimize_function_for_speed_p (cfun))
      76                 :            : #define HAVE_floatdidf2_i387_with_xmm (!TARGET_64BIT && TARGET_INTER_UNIT_MOVES_TO_VEC \
      77                 :            :    && TARGET_80387 && X87_ENABLE_FLOAT (DFmode, DImode) \
      78                 :            :    && TARGET_SSE2 && optimize_function_for_speed_p (cfun))
      79                 :            : #define HAVE_floatdixf2_i387_with_xmm (!TARGET_64BIT && TARGET_INTER_UNIT_MOVES_TO_VEC \
      80                 :            :    && TARGET_80387 && X87_ENABLE_FLOAT (XFmode, DImode) \
      81                 :            :    && TARGET_SSE2 && optimize_function_for_speed_p (cfun))
      82                 :            : #define HAVE_floatunssisf2_i387_with_xmm (!TARGET_64BIT \
      83                 :            :    && TARGET_80387 && X87_ENABLE_FLOAT (SFmode, DImode) \
      84                 :            :    && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC)
      85                 :            : #define HAVE_floatunssidf2_i387_with_xmm (!TARGET_64BIT \
      86                 :            :    && TARGET_80387 && X87_ENABLE_FLOAT (DFmode, DImode) \
      87                 :            :    && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC)
      88                 :            : #define HAVE_floatunssixf2_i387_with_xmm (!TARGET_64BIT \
      89                 :            :    && TARGET_80387 && X87_ENABLE_FLOAT (XFmode, DImode) \
      90                 :            :    && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC)
      91                 :            : #define HAVE_addsi_1_zext (TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands))
      92                 :            : #define HAVE_addqi_ext_1 (/* FIXME: without this LRA can't reload this pattern, see PR82524.  */ \
      93                 :            :    rtx_equal_p (operands[0], operands[1]))
      94                 :            : #define HAVE_addvqi4_1 (ix86_binary_operator_ok (PLUS, QImode, operands) \
      95                 :            :    && CONST_INT_P (operands[2]) \
      96                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]))
      97                 :            : #define HAVE_addvhi4_1 (ix86_binary_operator_ok (PLUS, HImode, operands) \
      98                 :            :    && CONST_INT_P (operands[2]) \
      99                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]))
     100                 :            : #define HAVE_addvsi4_1 (ix86_binary_operator_ok (PLUS, SImode, operands) \
     101                 :            :    && CONST_INT_P (operands[2]) \
     102                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]))
     103                 :            : #define HAVE_addvdi4_1 ((ix86_binary_operator_ok (PLUS, DImode, operands) \
     104                 :            :    && CONST_INT_P (operands[2]) \
     105                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3])) && (TARGET_64BIT))
     106                 :            : #define HAVE_subvqi4_1 (ix86_binary_operator_ok (MINUS, QImode, operands) \
     107                 :            :    && CONST_INT_P (operands[2]) \
     108                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]))
     109                 :            : #define HAVE_subvhi4_1 (ix86_binary_operator_ok (MINUS, HImode, operands) \
     110                 :            :    && CONST_INT_P (operands[2]) \
     111                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]))
     112                 :            : #define HAVE_subvsi4_1 (ix86_binary_operator_ok (MINUS, SImode, operands) \
     113                 :            :    && CONST_INT_P (operands[2]) \
     114                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]))
     115                 :            : #define HAVE_subvdi4_1 ((ix86_binary_operator_ok (MINUS, DImode, operands) \
     116                 :            :    && CONST_INT_P (operands[2]) \
     117                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3])) && (TARGET_64BIT))
     118                 :            : #define HAVE_addqi3_carry (ix86_binary_operator_ok (PLUS, QImode, operands))
     119                 :            : #define HAVE_addhi3_carry (ix86_binary_operator_ok (PLUS, HImode, operands))
     120                 :            : #define HAVE_addsi3_carry (ix86_binary_operator_ok (PLUS, SImode, operands))
     121                 :            : #define HAVE_adddi3_carry ((ix86_binary_operator_ok (PLUS, DImode, operands)) && (TARGET_64BIT))
     122                 :            : #define HAVE_addcarrysi (ix86_binary_operator_ok (PLUS, SImode, operands))
     123                 :            : #define HAVE_addcarrydi ((ix86_binary_operator_ok (PLUS, DImode, operands)) && (TARGET_64BIT))
     124                 :            : #define HAVE_subqi3_carry (ix86_binary_operator_ok (MINUS, QImode, operands))
     125                 :            : #define HAVE_subhi3_carry (ix86_binary_operator_ok (MINUS, HImode, operands))
     126                 :            : #define HAVE_subsi3_carry (ix86_binary_operator_ok (MINUS, SImode, operands))
     127                 :            : #define HAVE_subdi3_carry ((ix86_binary_operator_ok (MINUS, DImode, operands)) && (TARGET_64BIT))
     128                 :            : #define HAVE_subsi3_carry_ccc (!TARGET_64BIT)
     129                 :            : #define HAVE_subdi3_carry_ccc (TARGET_64BIT)
     130                 :            : #define HAVE_subsi3_carry_ccgz (!TARGET_64BIT)
     131                 :            : #define HAVE_subdi3_carry_ccgz (TARGET_64BIT)
     132                 :            : #define HAVE_subborrowsi (ix86_binary_operator_ok (MINUS, SImode, operands))
     133                 :            : #define HAVE_subborrowdi ((ix86_binary_operator_ok (MINUS, DImode, operands)) && (TARGET_64BIT))
     134                 :            : #define HAVE_divmodsi4_1 1
     135                 :            : #define HAVE_divmoddi4_1 (TARGET_64BIT)
     136                 :            : #define HAVE_udivmodsi4_1 1
     137                 :            : #define HAVE_udivmoddi4_1 (TARGET_64BIT)
     138                 :            : #define HAVE_divmodsi4_zext_1 (TARGET_64BIT)
     139                 :            : #define HAVE_udivmodsi4_zext_1 (TARGET_64BIT)
     140                 :            : #define HAVE_divmodsi4_zext_2 (TARGET_64BIT)
     141                 :            : #define HAVE_udivmodsi4_zext_2 (TARGET_64BIT)
     142                 :            : #define HAVE_divmodhiqi3 (TARGET_QIMODE_MATH)
     143                 :            : #define HAVE_udivmodhiqi3 (TARGET_QIMODE_MATH)
     144                 :            : #define HAVE_andqi_ext_1 (/* FIXME: without this LRA can't reload this pattern, see PR82524.  */ \
     145                 :            :    rtx_equal_p (operands[0], operands[1]))
     146                 :            : #define HAVE_copysignsf3_const ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
     147                 :            :    || (TARGET_SSE && (SFmode == TFmode)))
     148                 :            : #define HAVE_copysigndf3_const ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
     149                 :            :    || (TARGET_SSE && (DFmode == TFmode)))
     150                 :            : #define HAVE_copysigntf3_const ((SSE_FLOAT_MODE_P (TFmode) && TARGET_SSE_MATH) \
     151                 :            :    || (TARGET_SSE && (TFmode == TFmode)))
     152                 :            : #define HAVE_copysignsf3_var ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
     153                 :            :    || (TARGET_SSE && (SFmode == TFmode)))
     154                 :            : #define HAVE_copysigndf3_var ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
     155                 :            :    || (TARGET_SSE && (DFmode == TFmode)))
     156                 :            : #define HAVE_copysigntf3_var ((SSE_FLOAT_MODE_P (TFmode) && TARGET_SSE_MATH) \
     157                 :            :    || (TARGET_SSE && (TFmode == TFmode)))
     158                 :            : #define HAVE_xorsignsf3_1 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)
     159                 :            : #define HAVE_xorsigndf3_1 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)
     160                 :            : #define HAVE_x86_64_shld (TARGET_64BIT)
     161                 :            : #define HAVE_x86_shld 1
     162                 :            : #define HAVE_x86_64_shrd (TARGET_64BIT)
     163                 :            : #define HAVE_x86_shrd 1
     164                 :            : #define HAVE_ashrsi3_cvt (INTVAL (operands[2]) == GET_MODE_BITSIZE (SImode)-1 \
     165                 :            :    && (TARGET_USE_CLTD || optimize_function_for_size_p (cfun)) \
     166                 :            :    && ix86_binary_operator_ok (ASHIFTRT, SImode, operands))
     167                 :            : #define HAVE_ashrdi3_cvt ((INTVAL (operands[2]) == GET_MODE_BITSIZE (DImode)-1 \
     168                 :            :    && (TARGET_USE_CLTD || optimize_function_for_size_p (cfun)) \
     169                 :            :    && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)) && (TARGET_64BIT))
     170                 :            : #define HAVE_ix86_rotldi3_doubleword (!TARGET_64BIT)
     171                 :            : #define HAVE_ix86_rotlti3_doubleword (TARGET_64BIT)
     172                 :            : #define HAVE_ix86_rotrdi3_doubleword (!TARGET_64BIT)
     173                 :            : #define HAVE_ix86_rotrti3_doubleword (TARGET_64BIT)
     174                 :            : #define HAVE_setcc_sf_sse (SSE_FLOAT_MODE_P (SFmode))
     175                 :            : #define HAVE_setcc_df_sse (SSE_FLOAT_MODE_P (DFmode))
     176                 :            : #define HAVE_jump 1
     177                 :            : #define HAVE_blockage 1
     178                 :            : #define HAVE_prologue_use 1
     179                 :            : #define HAVE_simple_return_internal (reload_completed)
     180                 :            : #define HAVE_interrupt_return (reload_completed)
     181                 :            : #define HAVE_simple_return_internal_long (reload_completed)
     182                 :            : #define HAVE_simple_return_pop_internal (reload_completed)
     183                 :            : #define HAVE_nop 1
     184                 :            : #define HAVE_nops (reload_completed)
     185                 :            : #define HAVE_pad 1
     186                 :            : #define HAVE_set_got_rex64 (TARGET_64BIT)
     187                 :            : #define HAVE_set_rip_rex64 (TARGET_64BIT)
     188                 :            : #define HAVE_set_got_offset_rex64 (TARGET_LP64)
     189                 :            : #define HAVE_eh_return_internal 1
     190                 :            : #define HAVE_split_stack_return 1
     191                 :            : #define HAVE_ffssi2_no_cmove (!TARGET_CMOVE)
     192                 :            : #define HAVE_ctzsi2 1
     193                 :            : #define HAVE_ctzdi2 (TARGET_64BIT)
     194                 :            : #define HAVE_bsr_rex64 (TARGET_64BIT)
     195                 :            : #define HAVE_bsr 1
     196                 :            : #define HAVE_clzsi2_lzcnt (TARGET_LZCNT)
     197                 :            : #define HAVE_clzdi2_lzcnt ((TARGET_LZCNT) && (TARGET_64BIT))
     198                 :            : #define HAVE_tzcnt_si (TARGET_BMI)
     199                 :            : #define HAVE_lzcnt_si (TARGET_LZCNT)
     200                 :            : #define HAVE_tzcnt_di ((((TARGET_64BIT) && (TARGET_BMI)) && (TARGET_64BIT)) && (TARGET_BMI))
     201                 :            : #define HAVE_lzcnt_di ((((TARGET_64BIT) && (TARGET_LZCNT)) && (TARGET_64BIT)) && (TARGET_LZCNT))
     202                 :            : #define HAVE_tzcnt_hi (TARGET_BMI)
     203                 :            : #define HAVE_lzcnt_hi (TARGET_LZCNT)
     204                 :            : #define HAVE_bmi_bextr_si (TARGET_BMI)
     205                 :            : #define HAVE_bmi_bextr_di ((TARGET_BMI) && (TARGET_64BIT))
     206                 :            : #define HAVE_bmi2_pdep_si3 (TARGET_BMI2)
     207                 :            : #define HAVE_bmi2_pdep_di3 ((TARGET_BMI2) && (TARGET_64BIT))
     208                 :            : #define HAVE_bmi2_pext_si3 (TARGET_BMI2)
     209                 :            : #define HAVE_bmi2_pext_di3 ((TARGET_BMI2) && (TARGET_64BIT))
     210                 :            : #define HAVE_popcountsi2 (TARGET_POPCNT)
     211                 :            : #define HAVE_popcountdi2 ((TARGET_POPCNT) && (TARGET_64BIT))
     212                 :            : #define HAVE_popcounthi2 (TARGET_POPCNT)
     213                 :            : #define HAVE_bswaphi_lowpart 1
     214                 :            : #define HAVE_paritydi2_cmp (! TARGET_POPCNT)
     215                 :            : #define HAVE_paritysi2_cmp (! TARGET_POPCNT)
     216                 :            : #define HAVE_truncxfsf2_i387_noop_unspec (TARGET_USE_FANCY_MATH_387)
     217                 :            : #define HAVE_truncxfdf2_i387_noop_unspec (TARGET_USE_FANCY_MATH_387)
     218                 :            : #define HAVE_sqrtxf2 (TARGET_USE_FANCY_MATH_387)
     219                 :            : #define HAVE_x86_fnstsw_1 (TARGET_80387)
     220                 :            : #define HAVE_fpremxf4_i387 (TARGET_USE_FANCY_MATH_387 \
     221                 :            :    && flag_finite_math_only)
     222                 :            : #define HAVE_fprem1xf4_i387 (TARGET_USE_FANCY_MATH_387 \
     223                 :            :    && flag_finite_math_only)
     224                 :            : #define HAVE_sinxf2 (TARGET_USE_FANCY_MATH_387 \
     225                 :            :    && flag_unsafe_math_optimizations)
     226                 :            : #define HAVE_cosxf2 (TARGET_USE_FANCY_MATH_387 \
     227                 :            :    && flag_unsafe_math_optimizations)
     228                 :            : #define HAVE_sincosxf3 (TARGET_USE_FANCY_MATH_387 \
     229                 :            :    && flag_unsafe_math_optimizations)
     230                 :            : #define HAVE_fptanxf4_i387 (TARGET_USE_FANCY_MATH_387 \
     231                 :            :    && flag_unsafe_math_optimizations)
     232                 :            : #define HAVE_atan2xf3 (TARGET_USE_FANCY_MATH_387 \
     233                 :            :    && flag_unsafe_math_optimizations)
     234                 :            : #define HAVE_fyl2xxf3_i387 (TARGET_USE_FANCY_MATH_387 \
     235                 :            :    && flag_unsafe_math_optimizations)
     236                 :            : #define HAVE_fyl2xp1xf3_i387 (TARGET_USE_FANCY_MATH_387 \
     237                 :            :    && flag_unsafe_math_optimizations)
     238                 :            : #define HAVE_fxtractxf3_i387 (TARGET_USE_FANCY_MATH_387 \
     239                 :            :    && flag_unsafe_math_optimizations)
     240                 :            : #define HAVE_fscalexf4_i387 (TARGET_USE_FANCY_MATH_387 \
     241                 :            :    && flag_unsafe_math_optimizations)
     242                 :            : #define HAVE_sse4_1_roundsf2 (TARGET_SSE4_1)
     243                 :            : #define HAVE_sse4_1_rounddf2 (TARGET_SSE4_1)
     244                 :            : #define HAVE_rintxf2 (TARGET_USE_FANCY_MATH_387)
     245                 :            : #define HAVE_lrintxfdi2 (TARGET_USE_FANCY_MATH_387)
     246                 :            : #define HAVE_lrintxfhi2 (TARGET_USE_FANCY_MATH_387)
     247                 :            : #define HAVE_lrintxfsi2 (TARGET_USE_FANCY_MATH_387)
     248                 :            : #define HAVE_frndintxf2_roundeven (TARGET_USE_FANCY_MATH_387 \
     249                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math) \
     250                 :            :    && ix86_pre_reload_split ())
     251                 :            : #define HAVE_frndintxf2_floor (TARGET_USE_FANCY_MATH_387 \
     252                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math) \
     253                 :            :    && ix86_pre_reload_split ())
     254                 :            : #define HAVE_frndintxf2_ceil (TARGET_USE_FANCY_MATH_387 \
     255                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math) \
     256                 :            :    && ix86_pre_reload_split ())
     257                 :            : #define HAVE_frndintxf2_trunc (TARGET_USE_FANCY_MATH_387 \
     258                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math) \
     259                 :            :    && ix86_pre_reload_split ())
     260                 :            : #define HAVE_frndintxf2_roundeven_i387 (TARGET_USE_FANCY_MATH_387 \
     261                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math))
     262                 :            : #define HAVE_frndintxf2_floor_i387 (TARGET_USE_FANCY_MATH_387 \
     263                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math))
     264                 :            : #define HAVE_frndintxf2_ceil_i387 (TARGET_USE_FANCY_MATH_387 \
     265                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math))
     266                 :            : #define HAVE_frndintxf2_trunc_i387 (TARGET_USE_FANCY_MATH_387 \
     267                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math))
     268                 :            : #define HAVE_fistdi2_floor (TARGET_USE_FANCY_MATH_387 \
     269                 :            :    && flag_unsafe_math_optimizations)
     270                 :            : #define HAVE_fistdi2_ceil (TARGET_USE_FANCY_MATH_387 \
     271                 :            :    && flag_unsafe_math_optimizations)
     272                 :            : #define HAVE_fisthi2_floor (TARGET_USE_FANCY_MATH_387 \
     273                 :            :    && flag_unsafe_math_optimizations)
     274                 :            : #define HAVE_fisthi2_ceil (TARGET_USE_FANCY_MATH_387 \
     275                 :            :    && flag_unsafe_math_optimizations)
     276                 :            : #define HAVE_fistsi2_floor (TARGET_USE_FANCY_MATH_387 \
     277                 :            :    && flag_unsafe_math_optimizations)
     278                 :            : #define HAVE_fistsi2_ceil (TARGET_USE_FANCY_MATH_387 \
     279                 :            :    && flag_unsafe_math_optimizations)
     280                 :            : #define HAVE_fxamsf2_i387 (TARGET_USE_FANCY_MATH_387)
     281                 :            : #define HAVE_fxamdf2_i387 (TARGET_USE_FANCY_MATH_387)
     282                 :            : #define HAVE_fxamxf2_i387 (TARGET_USE_FANCY_MATH_387)
     283                 :            : #define HAVE_movmsk_df (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)
     284                 :            : #define HAVE_cld 1
     285                 :            : #define HAVE_smaxsf3 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)
     286                 :            : #define HAVE_sminsf3 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)
     287                 :            : #define HAVE_smaxdf3 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)
     288                 :            : #define HAVE_smindf3 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)
     289                 :            : #define HAVE_pro_epilogue_adjust_stack_add_si (Pmode == SImode)
     290                 :            : #define HAVE_pro_epilogue_adjust_stack_add_di (Pmode == DImode)
     291                 :            : #define HAVE_pro_epilogue_adjust_stack_sub_si (Pmode == SImode)
     292                 :            : #define HAVE_pro_epilogue_adjust_stack_sub_di (Pmode == DImode)
     293                 :            : #define HAVE_allocate_stack_worker_probe_si ((ix86_target_stack_probe ()) && (Pmode == SImode))
     294                 :            : #define HAVE_allocate_stack_worker_probe_di ((ix86_target_stack_probe ()) && (Pmode == DImode))
     295                 :            : #define HAVE_probe_stack_1_si (word_mode == SImode)
     296                 :            : #define HAVE_probe_stack_1_di (word_mode == DImode)
     297                 :            : #define HAVE_adjust_stack_and_probe_si (Pmode == SImode)
     298                 :            : #define HAVE_adjust_stack_and_probe_di (Pmode == DImode)
     299                 :            : #define HAVE_probe_stack_range_si (Pmode == SImode)
     300                 :            : #define HAVE_probe_stack_range_di (Pmode == DImode)
     301                 :            : #define HAVE_trap 1
     302                 :            : #define HAVE_ud2 1
     303                 :            : #define HAVE_stack_protect_set_1_si (ptr_mode == SImode)
     304                 :            : #define HAVE_stack_protect_set_1_di (ptr_mode == DImode)
     305                 :            : #define HAVE_stack_protect_test_1_si (ptr_mode == SImode)
     306                 :            : #define HAVE_stack_protect_test_1_di (ptr_mode == DImode)
     307                 :            : #define HAVE_sse4_2_crc32qi (TARGET_SSE4_2 || TARGET_CRC32)
     308                 :            : #define HAVE_sse4_2_crc32hi (TARGET_SSE4_2 || TARGET_CRC32)
     309                 :            : #define HAVE_sse4_2_crc32si (TARGET_SSE4_2 || TARGET_CRC32)
     310                 :            : #define HAVE_sse4_2_crc32di (TARGET_64BIT && (TARGET_SSE4_2 || TARGET_CRC32))
     311                 :            : #define HAVE_rdpmc (!TARGET_64BIT)
     312                 :            : #define HAVE_rdpmc_rex64 (TARGET_64BIT)
     313                 :            : #define HAVE_rdtsc (!TARGET_64BIT)
     314                 :            : #define HAVE_rdtsc_rex64 (TARGET_64BIT)
     315                 :            : #define HAVE_rdtscp (!TARGET_64BIT)
     316                 :            : #define HAVE_rdtscp_rex64 (TARGET_64BIT)
     317                 :            : #define HAVE_fxsave (TARGET_FXSR)
     318                 :            : #define HAVE_fxsave64 (TARGET_64BIT && TARGET_FXSR)
     319                 :            : #define HAVE_fxrstor (TARGET_FXSR)
     320                 :            : #define HAVE_fxrstor64 (TARGET_64BIT && TARGET_FXSR)
     321                 :            : #define HAVE_xsave (!TARGET_64BIT && TARGET_XSAVE)
     322                 :            : #define HAVE_xsaveopt ((!TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVEOPT))
     323                 :            : #define HAVE_xsavec ((!TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVEC))
     324                 :            : #define HAVE_xsaves ((!TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVES))
     325                 :            : #define HAVE_xsave_rex64 (TARGET_64BIT && TARGET_XSAVE)
     326                 :            : #define HAVE_xsaveopt_rex64 ((TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVEOPT))
     327                 :            : #define HAVE_xsavec_rex64 ((TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVEC))
     328                 :            : #define HAVE_xsaves_rex64 ((TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVES))
     329                 :            : #define HAVE_xsave64 (TARGET_64BIT && TARGET_XSAVE)
     330                 :            : #define HAVE_xsaveopt64 ((TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVEOPT))
     331                 :            : #define HAVE_xsavec64 ((TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVEC))
     332                 :            : #define HAVE_xsaves64 ((TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVES))
     333                 :            : #define HAVE_xrstor (!TARGET_64BIT && TARGET_XSAVE)
     334                 :            : #define HAVE_xrstors ((!TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVES))
     335                 :            : #define HAVE_xrstor_rex64 (TARGET_64BIT && TARGET_XSAVE)
     336                 :            : #define HAVE_xrstors_rex64 ((TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVES))
     337                 :            : #define HAVE_xrstor64 (TARGET_64BIT && TARGET_XSAVE)
     338                 :            : #define HAVE_xrstors64 ((TARGET_64BIT && TARGET_XSAVE) && (TARGET_XSAVES))
     339                 :            : #define HAVE_xsetbv (!TARGET_64BIT && TARGET_XSAVE)
     340                 :            : #define HAVE_xsetbv_rex64 (TARGET_64BIT && TARGET_XSAVE)
     341                 :            : #define HAVE_xgetbv (!TARGET_64BIT && TARGET_XSAVE)
     342                 :            : #define HAVE_xgetbv_rex64 (TARGET_64BIT && TARGET_XSAVE)
     343                 :            : #define HAVE_fnstenv (TARGET_80387)
     344                 :            : #define HAVE_fldenv (TARGET_80387)
     345                 :            : #define HAVE_fnstsw (TARGET_80387)
     346                 :            : #define HAVE_fnclex (TARGET_80387)
     347                 :            : #define HAVE_lwp_slwpcbsi_1 ((TARGET_LWP) && (Pmode == SImode))
     348                 :            : #define HAVE_lwp_slwpcbdi_1 ((TARGET_LWP) && (Pmode == DImode))
     349                 :            : #define HAVE_rdfsbasesi (TARGET_64BIT && TARGET_FSGSBASE)
     350                 :            : #define HAVE_rdgsbasesi (TARGET_64BIT && TARGET_FSGSBASE)
     351                 :            : #define HAVE_rdfsbasedi ((TARGET_64BIT && TARGET_FSGSBASE) && (TARGET_64BIT))
     352                 :            : #define HAVE_rdgsbasedi ((TARGET_64BIT && TARGET_FSGSBASE) && (TARGET_64BIT))
     353                 :            : #define HAVE_wrfsbasesi (TARGET_64BIT && TARGET_FSGSBASE)
     354                 :            : #define HAVE_wrgsbasesi (TARGET_64BIT && TARGET_FSGSBASE)
     355                 :            : #define HAVE_wrfsbasedi ((TARGET_64BIT && TARGET_FSGSBASE) && (TARGET_64BIT))
     356                 :            : #define HAVE_wrgsbasedi ((TARGET_64BIT && TARGET_FSGSBASE) && (TARGET_64BIT))
     357                 :            : #define HAVE_ptwritesi (TARGET_PTWRITE)
     358                 :            : #define HAVE_ptwritedi ((TARGET_PTWRITE) && (TARGET_64BIT))
     359                 :            : #define HAVE_rdrandhi_1 (TARGET_RDRND)
     360                 :            : #define HAVE_rdrandsi_1 (TARGET_RDRND)
     361                 :            : #define HAVE_rdranddi_1 ((TARGET_RDRND) && (TARGET_64BIT))
     362                 :            : #define HAVE_rdseedhi_1 (TARGET_RDSEED)
     363                 :            : #define HAVE_rdseedsi_1 (TARGET_RDSEED)
     364                 :            : #define HAVE_rdseeddi_1 ((TARGET_RDSEED) && (TARGET_64BIT))
     365                 :            : #define HAVE_rdsspsi (TARGET_SHSTK || (flag_cf_protection & CF_RETURN))
     366                 :            : #define HAVE_rdsspdi (TARGET_SHSTK || (flag_cf_protection & CF_RETURN))
     367                 :            : #define HAVE_incsspsi (TARGET_SHSTK || (flag_cf_protection & CF_RETURN))
     368                 :            : #define HAVE_incsspdi (TARGET_SHSTK || (flag_cf_protection & CF_RETURN))
     369                 :            : #define HAVE_saveprevssp (TARGET_SHSTK)
     370                 :            : #define HAVE_wrsssi (TARGET_SHSTK)
     371                 :            : #define HAVE_wrssdi (TARGET_SHSTK)
     372                 :            : #define HAVE_wrusssi (TARGET_SHSTK)
     373                 :            : #define HAVE_wrussdi (TARGET_SHSTK)
     374                 :            : #define HAVE_setssbsy (TARGET_SHSTK)
     375                 :            : #define HAVE_nop_endbr ((flag_cf_protection & CF_BRANCH))
     376                 :            : #define HAVE_xbegin_1 (TARGET_RTM)
     377                 :            : #define HAVE_xend (TARGET_RTM)
     378                 :            : #define HAVE_xabort (TARGET_RTM)
     379                 :            : #define HAVE_xtest_1 (TARGET_RTM)
     380                 :            : #define HAVE_clwb (TARGET_CLWB)
     381                 :            : #define HAVE_clflushopt (TARGET_CLFLUSHOPT)
     382                 :            : #define HAVE_mwaitx (TARGET_MWAITX)
     383                 :            : #define HAVE_monitorx_si ((TARGET_MWAITX) && (Pmode == SImode))
     384                 :            : #define HAVE_monitorx_di ((TARGET_MWAITX) && (Pmode == DImode))
     385                 :            : #define HAVE_clzero_si ((TARGET_CLZERO) && (Pmode == SImode))
     386                 :            : #define HAVE_clzero_di ((TARGET_CLZERO) && (Pmode == DImode))
     387                 :            : #define HAVE_rdpid (!TARGET_64BIT && TARGET_RDPID)
     388                 :            : #define HAVE_rdpid_rex64 (TARGET_64BIT && TARGET_RDPID)
     389                 :            : #define HAVE_wbinvd 1
     390                 :            : #define HAVE_wbnoinvd (TARGET_WBNOINVD)
     391                 :            : #define HAVE_movdirisi (TARGET_MOVDIRI)
     392                 :            : #define HAVE_movdiridi ((TARGET_MOVDIRI) && (TARGET_64BIT))
     393                 :            : #define HAVE_movdir64b_si ((TARGET_MOVDIR64B) && (Pmode == SImode))
     394                 :            : #define HAVE_movdir64b_di ((TARGET_MOVDIR64B) && (Pmode == DImode))
     395                 :            : #define HAVE_enqcmd_si ((TARGET_ENQCMD) && (Pmode == SImode))
     396                 :            : #define HAVE_enqcmds_si ((TARGET_ENQCMD) && (Pmode == SImode))
     397                 :            : #define HAVE_enqcmd_di ((TARGET_ENQCMD) && (Pmode == DImode))
     398                 :            : #define HAVE_enqcmds_di ((TARGET_ENQCMD) && (Pmode == DImode))
     399                 :            : #define HAVE_umwait (!TARGET_64BIT && TARGET_WAITPKG)
     400                 :            : #define HAVE_umwait_rex64 (TARGET_64BIT && TARGET_WAITPKG)
     401                 :            : #define HAVE_umonitor_si ((TARGET_WAITPKG) && (Pmode == SImode))
     402                 :            : #define HAVE_umonitor_di ((TARGET_WAITPKG) && (Pmode == DImode))
     403                 :            : #define HAVE_tpause (!TARGET_64BIT && TARGET_WAITPKG)
     404                 :            : #define HAVE_tpause_rex64 (TARGET_64BIT && TARGET_WAITPKG)
     405                 :            : #define HAVE_cldemote (TARGET_CLDEMOTE)
     406                 :            : #define HAVE_speculation_barrier 1
     407                 :            : #define HAVE_sse_movntq ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
     408                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
     409                 :            : #define HAVE_mmx_ieee_maxv2sf3 (TARGET_3DNOW)
     410                 :            : #define HAVE_mmx_ieee_minv2sf3 (TARGET_3DNOW)
     411                 :            : #define HAVE_mmx_rcpv2sf2 (TARGET_3DNOW)
     412                 :            : #define HAVE_mmx_rcpit1v2sf3 (TARGET_3DNOW)
     413                 :            : #define HAVE_mmx_rcpit2v2sf3 (TARGET_3DNOW)
     414                 :            : #define HAVE_mmx_rsqrtv2sf2 (TARGET_3DNOW)
     415                 :            : #define HAVE_mmx_rsqit1v2sf3 (TARGET_3DNOW)
     416                 :            : #define HAVE_mmx_haddv2sf3 (TARGET_3DNOW)
     417                 :            : #define HAVE_mmx_hsubv2sf3 (TARGET_3DNOW_A)
     418                 :            : #define HAVE_mmx_addsubv2sf3 (TARGET_3DNOW_A)
     419                 :            : #define HAVE_mmx_gtv2sf3 (TARGET_3DNOW)
     420                 :            : #define HAVE_mmx_gev2sf3 (TARGET_3DNOW)
     421                 :            : #define HAVE_mmx_pf2id (TARGET_3DNOW)
     422                 :            : #define HAVE_mmx_pf2iw (TARGET_3DNOW_A)
     423                 :            : #define HAVE_mmx_pi2fw (TARGET_3DNOW_A)
     424                 :            : #define HAVE_mmx_floatv2si2 (TARGET_3DNOW)
     425                 :            : #define HAVE_mmx_pswapdv2sf2 (TARGET_3DNOW_A)
     426                 :            : #define HAVE_mmx_ashrv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     427                 :            : #define HAVE_mmx_ashrv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     428                 :            : #define HAVE_mmx_ashlv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     429                 :            : #define HAVE_mmx_lshrv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     430                 :            : #define HAVE_mmx_ashlv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     431                 :            : #define HAVE_mmx_lshrv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     432                 :            : #define HAVE_mmx_ashlv1di3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     433                 :            : #define HAVE_mmx_lshrv1di3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     434                 :            : #define HAVE_mmx_gtv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     435                 :            : #define HAVE_mmx_gtv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     436                 :            : #define HAVE_mmx_gtv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     437                 :            : #define HAVE_mmx_andnotv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     438                 :            : #define HAVE_mmx_andnotv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     439                 :            : #define HAVE_mmx_andnotv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
     440                 :            : #define HAVE_mmx_packsswb (TARGET_MMX || TARGET_MMX_WITH_SSE)
     441                 :            : #define HAVE_mmx_packuswb (TARGET_MMX || TARGET_MMX_WITH_SSE)
     442                 :            : #define HAVE_mmx_packssdw (TARGET_MMX || TARGET_MMX_WITH_SSE)
     443                 :            : #define HAVE_mmx_punpckhbw (TARGET_MMX || TARGET_MMX_WITH_SSE)
     444                 :            : #define HAVE_mmx_punpcklbw (TARGET_MMX || TARGET_MMX_WITH_SSE)
     445                 :            : #define HAVE_mmx_punpckhwd (TARGET_MMX || TARGET_MMX_WITH_SSE)
     446                 :            : #define HAVE_mmx_punpcklwd (TARGET_MMX || TARGET_MMX_WITH_SSE)
     447                 :            : #define HAVE_mmx_punpckhdq (TARGET_MMX || TARGET_MMX_WITH_SSE)
     448                 :            : #define HAVE_mmx_punpckldq (TARGET_MMX || TARGET_MMX_WITH_SSE)
     449                 :            : #define HAVE_mmx_pshufw_1 ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
     450                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
     451                 :            : #define HAVE_mmx_pswapdv2si2 (TARGET_3DNOW_A)
     452                 :            : #define HAVE_mmx_psadbw ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
     453                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
     454                 :            : #define HAVE_mmx_pmovmskb ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
     455                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
     456                 :            : #define HAVE_movv64qi_internal ((TARGET_SSE \
     457                 :            :    && (register_operand (operands[0], V64QImode) \
     458                 :            :        || register_operand (operands[1], V64QImode))) && (TARGET_AVX512F))
     459                 :            : #define HAVE_movv32qi_internal ((TARGET_SSE \
     460                 :            :    && (register_operand (operands[0], V32QImode) \
     461                 :            :        || register_operand (operands[1], V32QImode))) && (TARGET_AVX))
     462                 :            : #define HAVE_movv16qi_internal (TARGET_SSE \
     463                 :            :    && (register_operand (operands[0], V16QImode) \
     464                 :            :        || register_operand (operands[1], V16QImode)))
     465                 :            : #define HAVE_movv32hi_internal ((TARGET_SSE \
     466                 :            :    && (register_operand (operands[0], V32HImode) \
     467                 :            :        || register_operand (operands[1], V32HImode))) && (TARGET_AVX512F))
     468                 :            : #define HAVE_movv16hi_internal ((TARGET_SSE \
     469                 :            :    && (register_operand (operands[0], V16HImode) \
     470                 :            :        || register_operand (operands[1], V16HImode))) && (TARGET_AVX))
     471                 :            : #define HAVE_movv8hi_internal (TARGET_SSE \
     472                 :            :    && (register_operand (operands[0], V8HImode) \
     473                 :            :        || register_operand (operands[1], V8HImode)))
     474                 :            : #define HAVE_movv16si_internal ((TARGET_SSE \
     475                 :            :    && (register_operand (operands[0], V16SImode) \
     476                 :            :        || register_operand (operands[1], V16SImode))) && (TARGET_AVX512F))
     477                 :            : #define HAVE_movv8si_internal ((TARGET_SSE \
     478                 :            :    && (register_operand (operands[0], V8SImode) \
     479                 :            :        || register_operand (operands[1], V8SImode))) && (TARGET_AVX))
     480                 :            : #define HAVE_movv4si_internal (TARGET_SSE \
     481                 :            :    && (register_operand (operands[0], V4SImode) \
     482                 :            :        || register_operand (operands[1], V4SImode)))
     483                 :            : #define HAVE_movv8di_internal ((TARGET_SSE \
     484                 :            :    && (register_operand (operands[0], V8DImode) \
     485                 :            :        || register_operand (operands[1], V8DImode))) && (TARGET_AVX512F))
     486                 :            : #define HAVE_movv4di_internal ((TARGET_SSE \
     487                 :            :    && (register_operand (operands[0], V4DImode) \
     488                 :            :        || register_operand (operands[1], V4DImode))) && (TARGET_AVX))
     489                 :            : #define HAVE_movv2di_internal (TARGET_SSE \
     490                 :            :    && (register_operand (operands[0], V2DImode) \
     491                 :            :        || register_operand (operands[1], V2DImode)))
     492                 :            : #define HAVE_movv4ti_internal ((TARGET_SSE \
     493                 :            :    && (register_operand (operands[0], V4TImode) \
     494                 :            :        || register_operand (operands[1], V4TImode))) && (TARGET_AVX512F))
     495                 :            : #define HAVE_movv2ti_internal ((TARGET_SSE \
     496                 :            :    && (register_operand (operands[0], V2TImode) \
     497                 :            :        || register_operand (operands[1], V2TImode))) && (TARGET_AVX))
     498                 :            : #define HAVE_movv1ti_internal (TARGET_SSE \
     499                 :            :    && (register_operand (operands[0], V1TImode) \
     500                 :            :        || register_operand (operands[1], V1TImode)))
     501                 :            : #define HAVE_movv16sf_internal ((TARGET_SSE \
     502                 :            :    && (register_operand (operands[0], V16SFmode) \
     503                 :            :        || register_operand (operands[1], V16SFmode))) && (TARGET_AVX512F))
     504                 :            : #define HAVE_movv8sf_internal ((TARGET_SSE \
     505                 :            :    && (register_operand (operands[0], V8SFmode) \
     506                 :            :        || register_operand (operands[1], V8SFmode))) && (TARGET_AVX))
     507                 :            : #define HAVE_movv4sf_internal (TARGET_SSE \
     508                 :            :    && (register_operand (operands[0], V4SFmode) \
     509                 :            :        || register_operand (operands[1], V4SFmode)))
     510                 :            : #define HAVE_movv8df_internal ((TARGET_SSE \
     511                 :            :    && (register_operand (operands[0], V8DFmode) \
     512                 :            :        || register_operand (operands[1], V8DFmode))) && (TARGET_AVX512F))
     513                 :            : #define HAVE_movv4df_internal ((TARGET_SSE \
     514                 :            :    && (register_operand (operands[0], V4DFmode) \
     515                 :            :        || register_operand (operands[1], V4DFmode))) && (TARGET_AVX))
     516                 :            : #define HAVE_movv2df_internal (TARGET_SSE \
     517                 :            :    && (register_operand (operands[0], V2DFmode) \
     518                 :            :        || register_operand (operands[1], V2DFmode)))
     519                 :            : #define HAVE_avx512f_loadv16si_mask (TARGET_AVX512F)
     520                 :            : #define HAVE_avx512vl_loadv8si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     521                 :            : #define HAVE_avx512vl_loadv4si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     522                 :            : #define HAVE_avx512f_loadv8di_mask (TARGET_AVX512F)
     523                 :            : #define HAVE_avx512vl_loadv4di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     524                 :            : #define HAVE_avx512vl_loadv2di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     525                 :            : #define HAVE_avx512f_loadv16sf_mask (TARGET_AVX512F)
     526                 :            : #define HAVE_avx512vl_loadv8sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     527                 :            : #define HAVE_avx512vl_loadv4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     528                 :            : #define HAVE_avx512f_loadv8df_mask (TARGET_AVX512F)
     529                 :            : #define HAVE_avx512vl_loadv4df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     530                 :            : #define HAVE_avx512vl_loadv2df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     531                 :            : #define HAVE_avx512bw_loadv64qi_mask (TARGET_AVX512BW)
     532                 :            : #define HAVE_avx512vl_loadv16qi_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     533                 :            : #define HAVE_avx512vl_loadv32qi_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     534                 :            : #define HAVE_avx512bw_loadv32hi_mask (TARGET_AVX512BW)
     535                 :            : #define HAVE_avx512vl_loadv16hi_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     536                 :            : #define HAVE_avx512vl_loadv8hi_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     537                 :            : #define HAVE_avx512f_movsf_mask (TARGET_AVX512F)
     538                 :            : #define HAVE_avx512f_movdf_mask ((TARGET_AVX512F) && (TARGET_SSE2))
     539                 :            : #define HAVE_avx512f_storesf_mask (TARGET_AVX512F)
     540                 :            : #define HAVE_avx512f_storedf_mask (TARGET_AVX512F)
     541                 :            : #define HAVE_avx512f_blendmv16si (TARGET_AVX512F)
     542                 :            : #define HAVE_avx512vl_blendmv8si ((TARGET_AVX512F) && (TARGET_AVX512VL))
     543                 :            : #define HAVE_avx512vl_blendmv4si ((TARGET_AVX512F) && (TARGET_AVX512VL))
     544                 :            : #define HAVE_avx512f_blendmv8di (TARGET_AVX512F)
     545                 :            : #define HAVE_avx512vl_blendmv4di ((TARGET_AVX512F) && (TARGET_AVX512VL))
     546                 :            : #define HAVE_avx512vl_blendmv2di ((TARGET_AVX512F) && (TARGET_AVX512VL))
     547                 :            : #define HAVE_avx512f_blendmv16sf (TARGET_AVX512F)
     548                 :            : #define HAVE_avx512vl_blendmv8sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
     549                 :            : #define HAVE_avx512vl_blendmv4sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
     550                 :            : #define HAVE_avx512f_blendmv8df (TARGET_AVX512F)
     551                 :            : #define HAVE_avx512vl_blendmv4df ((TARGET_AVX512F) && (TARGET_AVX512VL))
     552                 :            : #define HAVE_avx512vl_blendmv2df ((TARGET_AVX512F) && (TARGET_AVX512VL))
     553                 :            : #define HAVE_avx512bw_blendmv64qi (TARGET_AVX512BW)
     554                 :            : #define HAVE_avx512vl_blendmv16qi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     555                 :            : #define HAVE_avx512vl_blendmv32qi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     556                 :            : #define HAVE_avx512bw_blendmv32hi (TARGET_AVX512BW)
     557                 :            : #define HAVE_avx512vl_blendmv16hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     558                 :            : #define HAVE_avx512vl_blendmv8hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     559                 :            : #define HAVE_avx512f_storev16si_mask (TARGET_AVX512F)
     560                 :            : #define HAVE_avx512vl_storev8si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     561                 :            : #define HAVE_avx512vl_storev4si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     562                 :            : #define HAVE_avx512f_storev8di_mask (TARGET_AVX512F)
     563                 :            : #define HAVE_avx512vl_storev4di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     564                 :            : #define HAVE_avx512vl_storev2di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     565                 :            : #define HAVE_avx512f_storev16sf_mask (TARGET_AVX512F)
     566                 :            : #define HAVE_avx512vl_storev8sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     567                 :            : #define HAVE_avx512vl_storev4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     568                 :            : #define HAVE_avx512f_storev8df_mask (TARGET_AVX512F)
     569                 :            : #define HAVE_avx512vl_storev4df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     570                 :            : #define HAVE_avx512vl_storev2df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
     571                 :            : #define HAVE_avx512bw_storev64qi_mask (TARGET_AVX512BW)
     572                 :            : #define HAVE_avx512vl_storev16qi_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     573                 :            : #define HAVE_avx512vl_storev32qi_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     574                 :            : #define HAVE_avx512bw_storev32hi_mask (TARGET_AVX512BW)
     575                 :            : #define HAVE_avx512vl_storev16hi_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     576                 :            : #define HAVE_avx512vl_storev8hi_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     577                 :            : #define HAVE_sse2_movq128 (TARGET_SSE2)
     578                 :            : #define HAVE_movdi_to_sse (!TARGET_64BIT && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC)
     579                 :            : #define HAVE_avx_lddqu256 ((TARGET_SSE3) && (TARGET_AVX))
     580                 :            : #define HAVE_sse3_lddqu (TARGET_SSE3)
     581                 :            : #define HAVE_sse2_movntisi (TARGET_SSE2)
     582                 :            : #define HAVE_sse2_movntidi ((TARGET_SSE2) && (TARGET_64BIT))
     583                 :            : #define HAVE_avx512f_movntv16sf ((TARGET_SSE) && (TARGET_AVX512F))
     584                 :            : #define HAVE_avx_movntv8sf ((TARGET_SSE) && (TARGET_AVX))
     585                 :            : #define HAVE_sse_movntv4sf (TARGET_SSE)
     586                 :            : #define HAVE_avx512f_movntv8df ((TARGET_SSE) && (TARGET_AVX512F))
     587                 :            : #define HAVE_avx_movntv4df ((TARGET_SSE) && (TARGET_AVX))
     588                 :            : #define HAVE_sse2_movntv2df ((TARGET_SSE) && (TARGET_SSE2))
     589                 :            : #define HAVE_avx512f_movntv8di ((TARGET_SSE2) && (TARGET_AVX512F))
     590                 :            : #define HAVE_avx_movntv4di ((TARGET_SSE2) && (TARGET_AVX))
     591                 :            : #define HAVE_sse2_movntv2di (TARGET_SSE2)
     592                 :            : #define HAVE_kandqi (TARGET_AVX512F)
     593                 :            : #define HAVE_kiorqi (TARGET_AVX512F)
     594                 :            : #define HAVE_kxorqi (TARGET_AVX512F)
     595                 :            : #define HAVE_kandhi (TARGET_AVX512F)
     596                 :            : #define HAVE_kiorhi (TARGET_AVX512F)
     597                 :            : #define HAVE_kxorhi (TARGET_AVX512F)
     598                 :            : #define HAVE_kandsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     599                 :            : #define HAVE_kiorsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     600                 :            : #define HAVE_kxorsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     601                 :            : #define HAVE_kanddi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     602                 :            : #define HAVE_kiordi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     603                 :            : #define HAVE_kxordi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     604                 :            : #define HAVE_kandnqi (TARGET_AVX512F)
     605                 :            : #define HAVE_kandnhi (TARGET_AVX512F)
     606                 :            : #define HAVE_kandnsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     607                 :            : #define HAVE_kandndi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     608                 :            : #define HAVE_kxnorqi (TARGET_AVX512F)
     609                 :            : #define HAVE_kxnorhi (TARGET_AVX512F)
     610                 :            : #define HAVE_kxnorsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     611                 :            : #define HAVE_kxnordi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     612                 :            : #define HAVE_knotqi (TARGET_AVX512F)
     613                 :            : #define HAVE_knothi (TARGET_AVX512F)
     614                 :            : #define HAVE_knotsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     615                 :            : #define HAVE_knotdi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     616                 :            : #define HAVE_kaddqi ((TARGET_AVX512F) && (TARGET_AVX512DQ))
     617                 :            : #define HAVE_kaddhi ((TARGET_AVX512F) && (TARGET_AVX512DQ))
     618                 :            : #define HAVE_kaddsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     619                 :            : #define HAVE_kadddi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     620                 :            : #define HAVE_kashiftqi ((TARGET_AVX512F) && (TARGET_AVX512DQ))
     621                 :            : #define HAVE_klshiftrtqi ((TARGET_AVX512F) && (TARGET_AVX512DQ))
     622                 :            : #define HAVE_kashifthi (TARGET_AVX512F)
     623                 :            : #define HAVE_klshiftrthi (TARGET_AVX512F)
     624                 :            : #define HAVE_kashiftsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     625                 :            : #define HAVE_klshiftrtsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     626                 :            : #define HAVE_kashiftdi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     627                 :            : #define HAVE_klshiftrtdi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     628                 :            : #define HAVE_ktestqi ((TARGET_AVX512F) && (TARGET_AVX512DQ))
     629                 :            : #define HAVE_ktesthi ((TARGET_AVX512F) && (TARGET_AVX512DQ))
     630                 :            : #define HAVE_ktestsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     631                 :            : #define HAVE_ktestdi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     632                 :            : #define HAVE_kortestqi ((TARGET_AVX512F) && (TARGET_AVX512DQ))
     633                 :            : #define HAVE_kortesthi (TARGET_AVX512F)
     634                 :            : #define HAVE_kortestsi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     635                 :            : #define HAVE_kortestdi ((TARGET_AVX512F) && (TARGET_AVX512BW))
     636                 :            : #define HAVE_kunpckhi (TARGET_AVX512F)
     637                 :            : #define HAVE_kunpcksi (TARGET_AVX512BW)
     638                 :            : #define HAVE_kunpckdi (TARGET_AVX512BW)
     639                 :            : #define HAVE_sse_vmaddv4sf3 (TARGET_SSE)
     640                 :            : #define HAVE_sse_vmaddv4sf3_round ((TARGET_AVX512F) && (TARGET_SSE))
     641                 :            : #define HAVE_sse_vmaddv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE))
     642                 :            : #define HAVE_sse_vmaddv4sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE)))
     643                 :            : #define HAVE_sse_vmsubv4sf3 (TARGET_SSE)
     644                 :            : #define HAVE_sse_vmsubv4sf3_round ((TARGET_AVX512F) && (TARGET_SSE))
     645                 :            : #define HAVE_sse_vmsubv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE))
     646                 :            : #define HAVE_sse_vmsubv4sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE)))
     647                 :            : #define HAVE_sse2_vmaddv2df3 ((TARGET_SSE) && (TARGET_SSE2))
     648                 :            : #define HAVE_sse2_vmaddv2df3_round ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     649                 :            : #define HAVE_sse2_vmaddv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     650                 :            : #define HAVE_sse2_vmaddv2df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2))))
     651                 :            : #define HAVE_sse2_vmsubv2df3 ((TARGET_SSE) && (TARGET_SSE2))
     652                 :            : #define HAVE_sse2_vmsubv2df3_round ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     653                 :            : #define HAVE_sse2_vmsubv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     654                 :            : #define HAVE_sse2_vmsubv2df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2))))
     655                 :            : #define HAVE_sse_vmmulv4sf3 (TARGET_SSE)
     656                 :            : #define HAVE_sse_vmmulv4sf3_round ((TARGET_AVX512F) && (TARGET_SSE))
     657                 :            : #define HAVE_sse_vmmulv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE))
     658                 :            : #define HAVE_sse_vmmulv4sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE)))
     659                 :            : #define HAVE_sse_vmdivv4sf3 (TARGET_SSE)
     660                 :            : #define HAVE_sse_vmdivv4sf3_round ((TARGET_AVX512F) && (TARGET_SSE))
     661                 :            : #define HAVE_sse_vmdivv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE))
     662                 :            : #define HAVE_sse_vmdivv4sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE)))
     663                 :            : #define HAVE_sse2_vmmulv2df3 ((TARGET_SSE) && (TARGET_SSE2))
     664                 :            : #define HAVE_sse2_vmmulv2df3_round ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     665                 :            : #define HAVE_sse2_vmmulv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     666                 :            : #define HAVE_sse2_vmmulv2df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2))))
     667                 :            : #define HAVE_sse2_vmdivv2df3 ((TARGET_SSE) && (TARGET_SSE2))
     668                 :            : #define HAVE_sse2_vmdivv2df3_round ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     669                 :            : #define HAVE_sse2_vmdivv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     670                 :            : #define HAVE_sse2_vmdivv2df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2))))
     671                 :            : #define HAVE_avx512f_divv16sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
     672                 :            : #define HAVE_avx512f_divv16sf3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V16SFmode == V16SFmode \
     673                 :            :                                                               || V16SFmode == V8DFmode \
     674                 :            :                                                               || V16SFmode == V8DImode \
     675                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F)))
     676                 :            : #define HAVE_avx512f_divv16sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
     677                 :            : #define HAVE_avx512f_divv16sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
     678                 :            :                                                               || V16SFmode == V8DFmode \
     679                 :            :                                                               || V16SFmode == V8DImode \
     680                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F))))
     681                 :            : #define HAVE_avx_divv8sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
     682                 :            : #define HAVE_avx_divv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
     683                 :            : #define HAVE_sse_divv4sf3 (TARGET_SSE && 1 && 1)
     684                 :            : #define HAVE_sse_divv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1))
     685                 :            : #define HAVE_avx512f_divv8df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
     686                 :            : #define HAVE_avx512f_divv8df3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V8DFmode == V16SFmode \
     687                 :            :                                                               || V8DFmode == V8DFmode \
     688                 :            :                                                               || V8DFmode == V8DImode \
     689                 :            :                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F)))
     690                 :            : #define HAVE_avx512f_divv8df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
     691                 :            : #define HAVE_avx512f_divv8df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
     692                 :            :                                                               || V8DFmode == V8DFmode \
     693                 :            :                                                               || V8DFmode == V8DImode \
     694                 :            :                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F))))
     695                 :            : #define HAVE_avx_divv4df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
     696                 :            : #define HAVE_avx_divv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
     697                 :            : #define HAVE_sse2_divv2df3 ((TARGET_SSE && 1 && 1) && (TARGET_SSE2))
     698                 :            : #define HAVE_sse2_divv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_SSE2)))
     699                 :            : #define HAVE_avx_rcpv8sf2 ((TARGET_SSE) && (TARGET_AVX))
     700                 :            : #define HAVE_sse_rcpv4sf2 (TARGET_SSE)
     701                 :            : #define HAVE_sse_vmrcpv4sf2 (TARGET_SSE)
     702                 :            : #define HAVE_rcp14v16sf_mask (TARGET_AVX512F)
     703                 :            : #define HAVE_rcp14v8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     704                 :            : #define HAVE_rcp14v4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     705                 :            : #define HAVE_rcp14v8df_mask (TARGET_AVX512F)
     706                 :            : #define HAVE_rcp14v4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     707                 :            : #define HAVE_rcp14v2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     708                 :            : #define HAVE_srcp14v4sf (TARGET_AVX512F)
     709                 :            : #define HAVE_srcp14v2df ((TARGET_AVX512F) && (TARGET_SSE2))
     710                 :            : #define HAVE_srcp14v4sf_mask (TARGET_AVX512F)
     711                 :            : #define HAVE_srcp14v2df_mask ((TARGET_AVX512F) && (TARGET_SSE2))
     712                 :            : #define HAVE_avx512f_sqrtv16sf2 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
     713                 :            : #define HAVE_avx512f_sqrtv16sf2_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V16SFmode == V16SFmode \
     714                 :            :                                                               || V16SFmode == V8DFmode \
     715                 :            :                                                               || V16SFmode == V8DImode \
     716                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F)))
     717                 :            : #define HAVE_avx512f_sqrtv16sf2_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
     718                 :            : #define HAVE_avx512f_sqrtv16sf2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
     719                 :            :                                                               || V16SFmode == V8DFmode \
     720                 :            :                                                               || V16SFmode == V8DImode \
     721                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F))))
     722                 :            : #define HAVE_avx_sqrtv8sf2 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
     723                 :            : #define HAVE_avx_sqrtv8sf2_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
     724                 :            : #define HAVE_sse_sqrtv4sf2 (TARGET_SSE && 1 && 1)
     725                 :            : #define HAVE_sse_sqrtv4sf2_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1))
     726                 :            : #define HAVE_avx512f_sqrtv8df2 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
     727                 :            : #define HAVE_avx512f_sqrtv8df2_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V8DFmode == V16SFmode \
     728                 :            :                                                               || V8DFmode == V8DFmode \
     729                 :            :                                                               || V8DFmode == V8DImode \
     730                 :            :                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F)))
     731                 :            : #define HAVE_avx512f_sqrtv8df2_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
     732                 :            : #define HAVE_avx512f_sqrtv8df2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
     733                 :            :                                                               || V8DFmode == V8DFmode \
     734                 :            :                                                               || V8DFmode == V8DImode \
     735                 :            :                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F))))
     736                 :            : #define HAVE_avx_sqrtv4df2 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
     737                 :            : #define HAVE_avx_sqrtv4df2_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
     738                 :            : #define HAVE_sse2_sqrtv2df2 ((TARGET_SSE && 1 && 1) && (TARGET_SSE2))
     739                 :            : #define HAVE_sse2_sqrtv2df2_mask ((TARGET_AVX512F) && ((TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_SSE2)))
     740                 :            : #define HAVE_sse_vmsqrtv4sf2 (TARGET_SSE)
     741                 :            : #define HAVE_sse_vmsqrtv4sf2_round ((TARGET_AVX512F) && (TARGET_SSE))
     742                 :            : #define HAVE_sse_vmsqrtv4sf2_mask ((TARGET_AVX512F) && (TARGET_SSE))
     743                 :            : #define HAVE_sse_vmsqrtv4sf2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE)))
     744                 :            : #define HAVE_sse2_vmsqrtv2df2 ((TARGET_SSE) && (TARGET_SSE2))
     745                 :            : #define HAVE_sse2_vmsqrtv2df2_round ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     746                 :            : #define HAVE_sse2_vmsqrtv2df2_mask ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     747                 :            : #define HAVE_sse2_vmsqrtv2df2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2))))
     748                 :            : #define HAVE_avx_rsqrtv8sf2 ((TARGET_SSE) && (TARGET_AVX))
     749                 :            : #define HAVE_sse_rsqrtv4sf2 (TARGET_SSE)
     750                 :            : #define HAVE_rsqrt14v16sf_mask (TARGET_AVX512F)
     751                 :            : #define HAVE_rsqrt14v8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     752                 :            : #define HAVE_rsqrt14v4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     753                 :            : #define HAVE_rsqrt14v8df_mask (TARGET_AVX512F)
     754                 :            : #define HAVE_rsqrt14v4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     755                 :            : #define HAVE_rsqrt14v2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     756                 :            : #define HAVE_rsqrt14v4sf (TARGET_AVX512F)
     757                 :            : #define HAVE_rsqrt14v2df ((TARGET_AVX512F) && (TARGET_SSE2))
     758                 :            : #define HAVE_rsqrt14_v4sf_mask (TARGET_AVX512F)
     759                 :            : #define HAVE_rsqrt14_v2df_mask ((TARGET_AVX512F) && (TARGET_SSE2))
     760                 :            : #define HAVE_sse_vmrsqrtv4sf2 (TARGET_SSE)
     761                 :            : #define HAVE_ieee_maxv16sf3 ((TARGET_SSE \
     762                 :            :    && 1 && 1) && (TARGET_AVX512F))
     763                 :            : #define HAVE_ieee_maxv16sf3_round ((TARGET_AVX512F) && ((TARGET_SSE \
     764                 :            :    && 1 && (V16SFmode == V16SFmode \
     765                 :            :                                                                               || V16SFmode == V8DFmode \
     766                 :            :                                                                               || V16SFmode == V8DImode \
     767                 :            :                                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F)))
     768                 :            : #define HAVE_ieee_maxv16sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE \
     769                 :            :    && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
     770                 :            : #define HAVE_ieee_maxv16sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE \
     771                 :            :    && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
     772                 :            :                                                                               || V16SFmode == V8DFmode \
     773                 :            :                                                                               || V16SFmode == V8DImode \
     774                 :            :                                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F))))
     775                 :            : #define HAVE_ieee_minv16sf3 ((TARGET_SSE \
     776                 :            :    && 1 && 1) && (TARGET_AVX512F))
     777                 :            : #define HAVE_ieee_minv16sf3_round ((TARGET_AVX512F) && ((TARGET_SSE \
     778                 :            :    && 1 && (V16SFmode == V16SFmode \
     779                 :            :                                                                               || V16SFmode == V8DFmode \
     780                 :            :                                                                               || V16SFmode == V8DImode \
     781                 :            :                                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F)))
     782                 :            : #define HAVE_ieee_minv16sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE \
     783                 :            :    && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
     784                 :            : #define HAVE_ieee_minv16sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE \
     785                 :            :    && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
     786                 :            :                                                                               || V16SFmode == V8DFmode \
     787                 :            :                                                                               || V16SFmode == V8DImode \
     788                 :            :                                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F))))
     789                 :            : #define HAVE_ieee_maxv8sf3 ((TARGET_SSE \
     790                 :            :    && 1 && 1) && (TARGET_AVX))
     791                 :            : #define HAVE_ieee_maxv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE \
     792                 :            :    && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
     793                 :            : #define HAVE_ieee_minv8sf3 ((TARGET_SSE \
     794                 :            :    && 1 && 1) && (TARGET_AVX))
     795                 :            : #define HAVE_ieee_minv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE \
     796                 :            :    && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
     797                 :            : #define HAVE_ieee_maxv4sf3 (TARGET_SSE \
     798                 :            :    && 1 && 1)
     799                 :            : #define HAVE_ieee_maxv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE \
     800                 :            :    && (16 == 64 || TARGET_AVX512VL) && 1))
     801                 :            : #define HAVE_ieee_minv4sf3 (TARGET_SSE \
     802                 :            :    && 1 && 1)
     803                 :            : #define HAVE_ieee_minv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE \
     804                 :            :    && (16 == 64 || TARGET_AVX512VL) && 1))
     805                 :            : #define HAVE_ieee_maxv8df3 ((TARGET_SSE \
     806                 :            :    && 1 && 1) && (TARGET_AVX512F))
     807                 :            : #define HAVE_ieee_maxv8df3_round ((TARGET_AVX512F) && ((TARGET_SSE \
     808                 :            :    && 1 && (V8DFmode == V16SFmode \
     809                 :            :                                                                               || V8DFmode == V8DFmode \
     810                 :            :                                                                               || V8DFmode == V8DImode \
     811                 :            :                                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F)))
     812                 :            : #define HAVE_ieee_maxv8df3_mask ((TARGET_AVX512F) && ((TARGET_SSE \
     813                 :            :    && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
     814                 :            : #define HAVE_ieee_maxv8df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE \
     815                 :            :    && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
     816                 :            :                                                                               || V8DFmode == V8DFmode \
     817                 :            :                                                                               || V8DFmode == V8DImode \
     818                 :            :                                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F))))
     819                 :            : #define HAVE_ieee_minv8df3 ((TARGET_SSE \
     820                 :            :    && 1 && 1) && (TARGET_AVX512F))
     821                 :            : #define HAVE_ieee_minv8df3_round ((TARGET_AVX512F) && ((TARGET_SSE \
     822                 :            :    && 1 && (V8DFmode == V16SFmode \
     823                 :            :                                                                               || V8DFmode == V8DFmode \
     824                 :            :                                                                               || V8DFmode == V8DImode \
     825                 :            :                                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F)))
     826                 :            : #define HAVE_ieee_minv8df3_mask ((TARGET_AVX512F) && ((TARGET_SSE \
     827                 :            :    && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
     828                 :            : #define HAVE_ieee_minv8df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE \
     829                 :            :    && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
     830                 :            :                                                                               || V8DFmode == V8DFmode \
     831                 :            :                                                                               || V8DFmode == V8DImode \
     832                 :            :                                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F))))
     833                 :            : #define HAVE_ieee_maxv4df3 ((TARGET_SSE \
     834                 :            :    && 1 && 1) && (TARGET_AVX))
     835                 :            : #define HAVE_ieee_maxv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE \
     836                 :            :    && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
     837                 :            : #define HAVE_ieee_minv4df3 ((TARGET_SSE \
     838                 :            :    && 1 && 1) && (TARGET_AVX))
     839                 :            : #define HAVE_ieee_minv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE \
     840                 :            :    && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
     841                 :            : #define HAVE_ieee_maxv2df3 ((TARGET_SSE \
     842                 :            :    && 1 && 1) && (TARGET_SSE2))
     843                 :            : #define HAVE_ieee_maxv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE \
     844                 :            :    && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_SSE2)))
     845                 :            : #define HAVE_ieee_minv2df3 ((TARGET_SSE \
     846                 :            :    && 1 && 1) && (TARGET_SSE2))
     847                 :            : #define HAVE_ieee_minv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE \
     848                 :            :    && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_SSE2)))
     849                 :            : #define HAVE_sse_vmsmaxv4sf3 (TARGET_SSE)
     850                 :            : #define HAVE_sse_vmsmaxv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE))
     851                 :            : #define HAVE_sse_vmsmaxv4sf3_round ((TARGET_AVX512F) && (TARGET_SSE))
     852                 :            : #define HAVE_sse_vmsmaxv4sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE)))
     853                 :            : #define HAVE_sse_vmsminv4sf3 (TARGET_SSE)
     854                 :            : #define HAVE_sse_vmsminv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE))
     855                 :            : #define HAVE_sse_vmsminv4sf3_round ((TARGET_AVX512F) && (TARGET_SSE))
     856                 :            : #define HAVE_sse_vmsminv4sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE)))
     857                 :            : #define HAVE_sse2_vmsmaxv2df3 ((TARGET_SSE) && (TARGET_SSE2))
     858                 :            : #define HAVE_sse2_vmsmaxv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     859                 :            : #define HAVE_sse2_vmsmaxv2df3_round ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     860                 :            : #define HAVE_sse2_vmsmaxv2df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2))))
     861                 :            : #define HAVE_sse2_vmsminv2df3 ((TARGET_SSE) && (TARGET_SSE2))
     862                 :            : #define HAVE_sse2_vmsminv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     863                 :            : #define HAVE_sse2_vmsminv2df3_round ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2)))
     864                 :            : #define HAVE_sse2_vmsminv2df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_SSE2))))
     865                 :            : #define HAVE_avx_addsubv4df3 (TARGET_AVX)
     866                 :            : #define HAVE_sse3_addsubv2df3 (TARGET_SSE3)
     867                 :            : #define HAVE_avx_addsubv8sf3 (TARGET_AVX)
     868                 :            : #define HAVE_sse3_addsubv4sf3 (TARGET_SSE3)
     869                 :            : #define HAVE_avx_haddv4df3 (TARGET_AVX)
     870                 :            : #define HAVE_avx_hsubv4df3 (TARGET_AVX)
     871                 :            : #define HAVE_sse3_hsubv2df3 (TARGET_SSE3)
     872                 :            : #define HAVE_avx_haddv8sf3 (TARGET_AVX)
     873                 :            : #define HAVE_avx_hsubv8sf3 (TARGET_AVX)
     874                 :            : #define HAVE_sse3_haddv4sf3 (TARGET_SSE3)
     875                 :            : #define HAVE_sse3_hsubv4sf3 (TARGET_SSE3)
     876                 :            : #define HAVE_reducepv16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
     877                 :            : #define HAVE_reducepv8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
     878                 :            : #define HAVE_reducepv4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
     879                 :            : #define HAVE_reducepv8df_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
     880                 :            : #define HAVE_reducepv4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
     881                 :            : #define HAVE_reducepv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
     882                 :            : #define HAVE_reducesv4sf (TARGET_AVX512DQ)
     883                 :            : #define HAVE_reducesv4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
     884                 :            : #define HAVE_reducesv2df ((TARGET_AVX512DQ) && (TARGET_SSE2))
     885                 :            : #define HAVE_reducesv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_SSE2)))
     886                 :            : #define HAVE_avx_cmpv8sf3 (TARGET_AVX)
     887                 :            : #define HAVE_avx_cmpv4sf3 (TARGET_AVX)
     888                 :            : #define HAVE_avx_cmpv4df3 (TARGET_AVX)
     889                 :            : #define HAVE_avx_cmpv2df3 ((TARGET_AVX) && (TARGET_SSE2))
     890                 :            : #define HAVE_avx_vmcmpv4sf3 (TARGET_AVX)
     891                 :            : #define HAVE_avx_vmcmpv2df3 ((TARGET_AVX) && (TARGET_SSE2))
     892                 :            : #define HAVE_avx_maskcmpv8sf3 ((TARGET_SSE) && (TARGET_AVX))
     893                 :            : #define HAVE_sse_maskcmpv4sf3 (TARGET_SSE)
     894                 :            : #define HAVE_avx_maskcmpv4df3 ((TARGET_SSE) && (TARGET_AVX))
     895                 :            : #define HAVE_sse2_maskcmpv2df3 ((TARGET_SSE) && (TARGET_SSE2))
     896                 :            : #define HAVE_sse_vmmaskcmpv4sf3 (TARGET_SSE)
     897                 :            : #define HAVE_sse2_vmmaskcmpv2df3 ((TARGET_SSE) && (TARGET_SSE2))
     898                 :            : #define HAVE_avx512f_cmpv16si3 (TARGET_AVX512F && 1)
     899                 :            : #define HAVE_avx512f_cmpv16si3_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V16SImode == V16SFmode \
     900                 :            :                                                                               || V16SImode == V8DFmode \
     901                 :            :                                                                               || V16SImode == V8DImode \
     902                 :            :                                                                               || V16SImode == V16SImode)))
     903                 :            : #define HAVE_avx512f_cmpv16si3_mask ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
     904                 :            : #define HAVE_avx512f_cmpv16si3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512F && (V16SImode == V16SFmode \
     905                 :            :                                                                               || V16SImode == V8DFmode \
     906                 :            :                                                                               || V16SImode == V8DImode \
     907                 :            :                                                                               || V16SImode == V16SImode))))
     908                 :            : #define HAVE_avx512vl_cmpv8si3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
     909                 :            : #define HAVE_avx512vl_cmpv8si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
     910                 :            : #define HAVE_avx512vl_cmpv4si3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
     911                 :            : #define HAVE_avx512vl_cmpv4si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
     912                 :            : #define HAVE_avx512f_cmpv8di3 (TARGET_AVX512F && 1)
     913                 :            : #define HAVE_avx512f_cmpv8di3_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V8DImode == V16SFmode \
     914                 :            :                                                                               || V8DImode == V8DFmode \
     915                 :            :                                                                               || V8DImode == V8DImode \
     916                 :            :                                                                               || V8DImode == V16SImode)))
     917                 :            : #define HAVE_avx512f_cmpv8di3_mask ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
     918                 :            : #define HAVE_avx512f_cmpv8di3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512F && (V8DImode == V16SFmode \
     919                 :            :                                                                               || V8DImode == V8DFmode \
     920                 :            :                                                                               || V8DImode == V8DImode \
     921                 :            :                                                                               || V8DImode == V16SImode))))
     922                 :            : #define HAVE_avx512vl_cmpv4di3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
     923                 :            : #define HAVE_avx512vl_cmpv4di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
     924                 :            : #define HAVE_avx512vl_cmpv2di3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
     925                 :            : #define HAVE_avx512vl_cmpv2di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
     926                 :            : #define HAVE_avx512f_cmpv16sf3 (TARGET_AVX512F && 1)
     927                 :            : #define HAVE_avx512f_cmpv16sf3_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V16SFmode == V16SFmode \
     928                 :            :                                                                               || V16SFmode == V8DFmode \
     929                 :            :                                                                               || V16SFmode == V8DImode \
     930                 :            :                                                                               || V16SFmode == V16SImode)))
     931                 :            : #define HAVE_avx512f_cmpv16sf3_mask ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
     932                 :            : #define HAVE_avx512f_cmpv16sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512F && (V16SFmode == V16SFmode \
     933                 :            :                                                                               || V16SFmode == V8DFmode \
     934                 :            :                                                                               || V16SFmode == V8DImode \
     935                 :            :                                                                               || V16SFmode == V16SImode))))
     936                 :            : #define HAVE_avx512vl_cmpv8sf3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
     937                 :            : #define HAVE_avx512vl_cmpv8sf3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
     938                 :            : #define HAVE_avx512vl_cmpv4sf3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
     939                 :            : #define HAVE_avx512vl_cmpv4sf3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
     940                 :            : #define HAVE_avx512f_cmpv8df3 (TARGET_AVX512F && 1)
     941                 :            : #define HAVE_avx512f_cmpv8df3_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V8DFmode == V16SFmode \
     942                 :            :                                                                               || V8DFmode == V8DFmode \
     943                 :            :                                                                               || V8DFmode == V8DImode \
     944                 :            :                                                                               || V8DFmode == V16SImode)))
     945                 :            : #define HAVE_avx512f_cmpv8df3_mask ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
     946                 :            : #define HAVE_avx512f_cmpv8df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512F && (V8DFmode == V16SFmode \
     947                 :            :                                                                               || V8DFmode == V8DFmode \
     948                 :            :                                                                               || V8DFmode == V8DImode \
     949                 :            :                                                                               || V8DFmode == V16SImode))))
     950                 :            : #define HAVE_avx512vl_cmpv4df3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
     951                 :            : #define HAVE_avx512vl_cmpv4df3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
     952                 :            : #define HAVE_avx512vl_cmpv2df3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
     953                 :            : #define HAVE_avx512vl_cmpv2df3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
     954                 :            : #define HAVE_avx512bw_cmpv64qi3 (TARGET_AVX512BW)
     955                 :            : #define HAVE_avx512bw_cmpv64qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
     956                 :            : #define HAVE_avx512vl_cmpv16qi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     957                 :            : #define HAVE_avx512vl_cmpv16qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
     958                 :            : #define HAVE_avx512vl_cmpv32qi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     959                 :            : #define HAVE_avx512vl_cmpv32qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
     960                 :            : #define HAVE_avx512bw_cmpv32hi3 (TARGET_AVX512BW)
     961                 :            : #define HAVE_avx512bw_cmpv32hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
     962                 :            : #define HAVE_avx512vl_cmpv16hi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     963                 :            : #define HAVE_avx512vl_cmpv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
     964                 :            : #define HAVE_avx512vl_cmpv8hi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     965                 :            : #define HAVE_avx512vl_cmpv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
     966                 :            : #define HAVE_avx512bw_ucmpv64qi3 (TARGET_AVX512BW)
     967                 :            : #define HAVE_avx512bw_ucmpv64qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
     968                 :            : #define HAVE_avx512vl_ucmpv16qi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     969                 :            : #define HAVE_avx512vl_ucmpv16qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
     970                 :            : #define HAVE_avx512vl_ucmpv32qi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     971                 :            : #define HAVE_avx512vl_ucmpv32qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
     972                 :            : #define HAVE_avx512bw_ucmpv32hi3 (TARGET_AVX512BW)
     973                 :            : #define HAVE_avx512bw_ucmpv32hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
     974                 :            : #define HAVE_avx512vl_ucmpv16hi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     975                 :            : #define HAVE_avx512vl_ucmpv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
     976                 :            : #define HAVE_avx512vl_ucmpv8hi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
     977                 :            : #define HAVE_avx512vl_ucmpv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
     978                 :            : #define HAVE_avx512f_ucmpv16si3 (TARGET_AVX512F)
     979                 :            : #define HAVE_avx512f_ucmpv16si3_mask (TARGET_AVX512F)
     980                 :            : #define HAVE_avx512vl_ucmpv8si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
     981                 :            : #define HAVE_avx512vl_ucmpv8si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     982                 :            : #define HAVE_avx512vl_ucmpv4si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
     983                 :            : #define HAVE_avx512vl_ucmpv4si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     984                 :            : #define HAVE_avx512f_ucmpv8di3 (TARGET_AVX512F)
     985                 :            : #define HAVE_avx512f_ucmpv8di3_mask (TARGET_AVX512F)
     986                 :            : #define HAVE_avx512vl_ucmpv4di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
     987                 :            : #define HAVE_avx512vl_ucmpv4di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     988                 :            : #define HAVE_avx512vl_ucmpv2di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
     989                 :            : #define HAVE_avx512vl_ucmpv2di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
     990                 :            : #define HAVE_avx512f_vmcmpv4sf3 (TARGET_AVX512F)
     991                 :            : #define HAVE_avx512f_vmcmpv4sf3_round (TARGET_AVX512F)
     992                 :            : #define HAVE_avx512f_vmcmpv2df3 ((TARGET_AVX512F) && (TARGET_SSE2))
     993                 :            : #define HAVE_avx512f_vmcmpv2df3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
     994                 :            : #define HAVE_avx512f_vmcmpv4sf3_mask (TARGET_AVX512F)
     995                 :            : #define HAVE_avx512f_vmcmpv4sf3_mask_round (TARGET_AVX512F)
     996                 :            : #define HAVE_avx512f_vmcmpv2df3_mask ((TARGET_AVX512F) && (TARGET_SSE2))
     997                 :            : #define HAVE_avx512f_vmcmpv2df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
     998                 :            : #define HAVE_avx512f_maskcmpv16sf3 (TARGET_AVX512F)
     999                 :            : #define HAVE_avx512f_maskcmpv8sf3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1000                 :            : #define HAVE_avx512f_maskcmpv4sf3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1001                 :            : #define HAVE_avx512f_maskcmpv8df3 (TARGET_AVX512F)
    1002                 :            : #define HAVE_avx512f_maskcmpv4df3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1003                 :            : #define HAVE_avx512f_maskcmpv2df3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1004                 :            : #define HAVE_sse_comi (SSE_FLOAT_MODE_P (SFmode))
    1005                 :            : #define HAVE_sse_comi_round ((TARGET_AVX512F) && (SSE_FLOAT_MODE_P (SFmode)))
    1006                 :            : #define HAVE_sse_ucomi (SSE_FLOAT_MODE_P (SFmode))
    1007                 :            : #define HAVE_sse_ucomi_round ((TARGET_AVX512F) && (SSE_FLOAT_MODE_P (SFmode)))
    1008                 :            : #define HAVE_sse2_comi (SSE_FLOAT_MODE_P (DFmode))
    1009                 :            : #define HAVE_sse2_comi_round ((TARGET_AVX512F) && (SSE_FLOAT_MODE_P (DFmode)))
    1010                 :            : #define HAVE_sse2_ucomi (SSE_FLOAT_MODE_P (DFmode))
    1011                 :            : #define HAVE_sse2_ucomi_round ((TARGET_AVX512F) && (SSE_FLOAT_MODE_P (DFmode)))
    1012                 :            : #define HAVE_avx_andnotv8sf3 ((TARGET_SSE && 1) && (TARGET_AVX))
    1013                 :            : #define HAVE_avx_andnotv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_AVX)))
    1014                 :            : #define HAVE_sse_andnotv4sf3 (TARGET_SSE && 1)
    1015                 :            : #define HAVE_sse_andnotv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE && TARGET_AVX512VL))
    1016                 :            : #define HAVE_avx_andnotv4df3 ((TARGET_SSE && 1) && (TARGET_AVX))
    1017                 :            : #define HAVE_avx_andnotv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_AVX)))
    1018                 :            : #define HAVE_sse2_andnotv2df3 ((TARGET_SSE && 1) && (TARGET_SSE2))
    1019                 :            : #define HAVE_sse2_andnotv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_SSE2)))
    1020                 :            : #define HAVE_avx512f_andnotv16sf3 (TARGET_AVX512F)
    1021                 :            : #define HAVE_avx512f_andnotv16sf3_mask (TARGET_AVX512F)
    1022                 :            : #define HAVE_avx512f_andnotv8df3 (TARGET_AVX512F)
    1023                 :            : #define HAVE_avx512f_andnotv8df3_mask (TARGET_AVX512F)
    1024                 :            : #define HAVE_fma_fmadd_v16sf_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1025                 :            : #define HAVE_fma_fmadd_v16sf_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    1026                 :            :                                                               || V16SFmode == V8DFmode \
    1027                 :            :                                                               || V16SFmode == V8DImode \
    1028                 :            :                                                               || V16SFmode == V16SImode)))
    1029                 :            : #define HAVE_fma_fmadd_v8sf_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1030                 :            : #define HAVE_fma_fmadd_v4sf_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1031                 :            : #define HAVE_fma_fmadd_v8df_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1032                 :            : #define HAVE_fma_fmadd_v8df_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    1033                 :            :                                                               || V8DFmode == V8DFmode \
    1034                 :            :                                                               || V8DFmode == V8DImode \
    1035                 :            :                                                               || V8DFmode == V16SImode)))
    1036                 :            : #define HAVE_fma_fmadd_v4df_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1037                 :            : #define HAVE_fma_fmadd_v2df_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1038                 :            : #define HAVE_avx512f_fmadd_v16sf_mask (TARGET_AVX512F && 1)
    1039                 :            : #define HAVE_avx512f_fmadd_v16sf_mask_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V16SFmode == V16SFmode \
    1040                 :            :                                                               || V16SFmode == V8DFmode \
    1041                 :            :                                                               || V16SFmode == V8DImode \
    1042                 :            :                                                               || V16SFmode == V16SImode)))
    1043                 :            : #define HAVE_avx512vl_fmadd_v8sf_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1044                 :            : #define HAVE_avx512vl_fmadd_v4sf_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1045                 :            : #define HAVE_avx512f_fmadd_v8df_mask (TARGET_AVX512F && 1)
    1046                 :            : #define HAVE_avx512f_fmadd_v8df_mask_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V8DFmode == V16SFmode \
    1047                 :            :                                                               || V8DFmode == V8DFmode \
    1048                 :            :                                                               || V8DFmode == V8DImode \
    1049                 :            :                                                               || V8DFmode == V16SImode)))
    1050                 :            : #define HAVE_avx512vl_fmadd_v4df_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1051                 :            : #define HAVE_avx512vl_fmadd_v2df_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1052                 :            : #define HAVE_avx512f_fmadd_v16sf_mask3 (TARGET_AVX512F)
    1053                 :            : #define HAVE_avx512f_fmadd_v16sf_mask3_round (TARGET_AVX512F)
    1054                 :            : #define HAVE_avx512vl_fmadd_v8sf_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1055                 :            : #define HAVE_avx512vl_fmadd_v8sf_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1056                 :            : #define HAVE_avx512vl_fmadd_v4sf_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1057                 :            : #define HAVE_avx512vl_fmadd_v4sf_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1058                 :            : #define HAVE_avx512f_fmadd_v8df_mask3 (TARGET_AVX512F)
    1059                 :            : #define HAVE_avx512f_fmadd_v8df_mask3_round (TARGET_AVX512F)
    1060                 :            : #define HAVE_avx512vl_fmadd_v4df_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1061                 :            : #define HAVE_avx512vl_fmadd_v4df_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1062                 :            : #define HAVE_avx512vl_fmadd_v2df_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1063                 :            : #define HAVE_avx512vl_fmadd_v2df_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1064                 :            : #define HAVE_fma_fmsub_v16sf_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1065                 :            : #define HAVE_fma_fmsub_v16sf_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    1066                 :            :                                                               || V16SFmode == V8DFmode \
    1067                 :            :                                                               || V16SFmode == V8DImode \
    1068                 :            :                                                               || V16SFmode == V16SImode)))
    1069                 :            : #define HAVE_fma_fmsub_v8sf_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1070                 :            : #define HAVE_fma_fmsub_v4sf_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1071                 :            : #define HAVE_fma_fmsub_v8df_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1072                 :            : #define HAVE_fma_fmsub_v8df_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    1073                 :            :                                                               || V8DFmode == V8DFmode \
    1074                 :            :                                                               || V8DFmode == V8DImode \
    1075                 :            :                                                               || V8DFmode == V16SImode)))
    1076                 :            : #define HAVE_fma_fmsub_v4df_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1077                 :            : #define HAVE_fma_fmsub_v2df_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1078                 :            : #define HAVE_avx512f_fmsub_v16sf_mask (TARGET_AVX512F)
    1079                 :            : #define HAVE_avx512f_fmsub_v16sf_mask_round (TARGET_AVX512F)
    1080                 :            : #define HAVE_avx512vl_fmsub_v8sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1081                 :            : #define HAVE_avx512vl_fmsub_v8sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1082                 :            : #define HAVE_avx512vl_fmsub_v4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1083                 :            : #define HAVE_avx512vl_fmsub_v4sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1084                 :            : #define HAVE_avx512f_fmsub_v8df_mask (TARGET_AVX512F)
    1085                 :            : #define HAVE_avx512f_fmsub_v8df_mask_round (TARGET_AVX512F)
    1086                 :            : #define HAVE_avx512vl_fmsub_v4df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1087                 :            : #define HAVE_avx512vl_fmsub_v4df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1088                 :            : #define HAVE_avx512vl_fmsub_v2df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1089                 :            : #define HAVE_avx512vl_fmsub_v2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1090                 :            : #define HAVE_avx512f_fmsub_v16sf_mask3 (TARGET_AVX512F && 1)
    1091                 :            : #define HAVE_avx512f_fmsub_v16sf_mask3_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V16SFmode == V16SFmode \
    1092                 :            :                                                               || V16SFmode == V8DFmode \
    1093                 :            :                                                               || V16SFmode == V8DImode \
    1094                 :            :                                                               || V16SFmode == V16SImode)))
    1095                 :            : #define HAVE_avx512vl_fmsub_v8sf_mask3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1096                 :            : #define HAVE_avx512vl_fmsub_v4sf_mask3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1097                 :            : #define HAVE_avx512f_fmsub_v8df_mask3 (TARGET_AVX512F && 1)
    1098                 :            : #define HAVE_avx512f_fmsub_v8df_mask3_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V8DFmode == V16SFmode \
    1099                 :            :                                                               || V8DFmode == V8DFmode \
    1100                 :            :                                                               || V8DFmode == V8DImode \
    1101                 :            :                                                               || V8DFmode == V16SImode)))
    1102                 :            : #define HAVE_avx512vl_fmsub_v4df_mask3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1103                 :            : #define HAVE_avx512vl_fmsub_v2df_mask3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1104                 :            : #define HAVE_fma_fnmadd_v16sf_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1105                 :            : #define HAVE_fma_fnmadd_v16sf_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    1106                 :            :                                                               || V16SFmode == V8DFmode \
    1107                 :            :                                                               || V16SFmode == V8DImode \
    1108                 :            :                                                               || V16SFmode == V16SImode)))
    1109                 :            : #define HAVE_fma_fnmadd_v8sf_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1110                 :            : #define HAVE_fma_fnmadd_v4sf_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1111                 :            : #define HAVE_fma_fnmadd_v8df_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1112                 :            : #define HAVE_fma_fnmadd_v8df_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    1113                 :            :                                                               || V8DFmode == V8DFmode \
    1114                 :            :                                                               || V8DFmode == V8DImode \
    1115                 :            :                                                               || V8DFmode == V16SImode)))
    1116                 :            : #define HAVE_fma_fnmadd_v4df_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1117                 :            : #define HAVE_fma_fnmadd_v2df_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1118                 :            : #define HAVE_avx512f_fnmadd_v16sf_mask (TARGET_AVX512F && 1)
    1119                 :            : #define HAVE_avx512f_fnmadd_v16sf_mask_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V16SFmode == V16SFmode \
    1120                 :            :                                                               || V16SFmode == V8DFmode \
    1121                 :            :                                                               || V16SFmode == V8DImode \
    1122                 :            :                                                               || V16SFmode == V16SImode)))
    1123                 :            : #define HAVE_avx512vl_fnmadd_v8sf_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1124                 :            : #define HAVE_avx512vl_fnmadd_v4sf_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1125                 :            : #define HAVE_avx512f_fnmadd_v8df_mask (TARGET_AVX512F && 1)
    1126                 :            : #define HAVE_avx512f_fnmadd_v8df_mask_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V8DFmode == V16SFmode \
    1127                 :            :                                                               || V8DFmode == V8DFmode \
    1128                 :            :                                                               || V8DFmode == V8DImode \
    1129                 :            :                                                               || V8DFmode == V16SImode)))
    1130                 :            : #define HAVE_avx512vl_fnmadd_v4df_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1131                 :            : #define HAVE_avx512vl_fnmadd_v2df_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1132                 :            : #define HAVE_avx512f_fnmadd_v16sf_mask3 (TARGET_AVX512F && 1)
    1133                 :            : #define HAVE_avx512f_fnmadd_v16sf_mask3_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V16SFmode == V16SFmode \
    1134                 :            :                                                               || V16SFmode == V8DFmode \
    1135                 :            :                                                               || V16SFmode == V8DImode \
    1136                 :            :                                                               || V16SFmode == V16SImode)))
    1137                 :            : #define HAVE_avx512vl_fnmadd_v8sf_mask3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1138                 :            : #define HAVE_avx512vl_fnmadd_v4sf_mask3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1139                 :            : #define HAVE_avx512f_fnmadd_v8df_mask3 (TARGET_AVX512F && 1)
    1140                 :            : #define HAVE_avx512f_fnmadd_v8df_mask3_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V8DFmode == V16SFmode \
    1141                 :            :                                                               || V8DFmode == V8DFmode \
    1142                 :            :                                                               || V8DFmode == V8DImode \
    1143                 :            :                                                               || V8DFmode == V16SImode)))
    1144                 :            : #define HAVE_avx512vl_fnmadd_v4df_mask3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1145                 :            : #define HAVE_avx512vl_fnmadd_v2df_mask3 ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1146                 :            : #define HAVE_fma_fnmsub_v16sf_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1147                 :            : #define HAVE_fma_fnmsub_v16sf_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    1148                 :            :                                                               || V16SFmode == V8DFmode \
    1149                 :            :                                                               || V16SFmode == V8DImode \
    1150                 :            :                                                               || V16SFmode == V16SImode)))
    1151                 :            : #define HAVE_fma_fnmsub_v8sf_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1152                 :            : #define HAVE_fma_fnmsub_v4sf_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1153                 :            : #define HAVE_fma_fnmsub_v8df_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1154                 :            : #define HAVE_fma_fnmsub_v8df_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    1155                 :            :                                                               || V8DFmode == V8DFmode \
    1156                 :            :                                                               || V8DFmode == V8DImode \
    1157                 :            :                                                               || V8DFmode == V16SImode)))
    1158                 :            : #define HAVE_fma_fnmsub_v4df_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1159                 :            : #define HAVE_fma_fnmsub_v2df_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1160                 :            : #define HAVE_avx512f_fnmsub_v16sf_mask (TARGET_AVX512F && 1)
    1161                 :            : #define HAVE_avx512f_fnmsub_v16sf_mask_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V16SFmode == V16SFmode \
    1162                 :            :                                                               || V16SFmode == V8DFmode \
    1163                 :            :                                                               || V16SFmode == V8DImode \
    1164                 :            :                                                               || V16SFmode == V16SImode)))
    1165                 :            : #define HAVE_avx512vl_fnmsub_v8sf_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1166                 :            : #define HAVE_avx512vl_fnmsub_v4sf_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1167                 :            : #define HAVE_avx512f_fnmsub_v8df_mask (TARGET_AVX512F && 1)
    1168                 :            : #define HAVE_avx512f_fnmsub_v8df_mask_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V8DFmode == V16SFmode \
    1169                 :            :                                                               || V8DFmode == V8DFmode \
    1170                 :            :                                                               || V8DFmode == V8DImode \
    1171                 :            :                                                               || V8DFmode == V16SImode)))
    1172                 :            : #define HAVE_avx512vl_fnmsub_v4df_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1173                 :            : #define HAVE_avx512vl_fnmsub_v2df_mask ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    1174                 :            : #define HAVE_avx512f_fnmsub_v16sf_mask3 (TARGET_AVX512F)
    1175                 :            : #define HAVE_avx512f_fnmsub_v16sf_mask3_round (TARGET_AVX512F)
    1176                 :            : #define HAVE_avx512vl_fnmsub_v8sf_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1177                 :            : #define HAVE_avx512vl_fnmsub_v8sf_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1178                 :            : #define HAVE_avx512vl_fnmsub_v4sf_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1179                 :            : #define HAVE_avx512vl_fnmsub_v4sf_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1180                 :            : #define HAVE_avx512f_fnmsub_v8df_mask3 (TARGET_AVX512F)
    1181                 :            : #define HAVE_avx512f_fnmsub_v8df_mask3_round (TARGET_AVX512F)
    1182                 :            : #define HAVE_avx512vl_fnmsub_v4df_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1183                 :            : #define HAVE_avx512vl_fnmsub_v4df_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1184                 :            : #define HAVE_avx512vl_fnmsub_v2df_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1185                 :            : #define HAVE_avx512vl_fnmsub_v2df_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1186                 :            : #define HAVE_fma_fmaddsub_v16sf_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1187                 :            : #define HAVE_fma_fmaddsub_v16sf_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    1188                 :            :                                                               || V16SFmode == V8DFmode \
    1189                 :            :                                                               || V16SFmode == V8DImode \
    1190                 :            :                                                               || V16SFmode == V16SImode)))
    1191                 :            : #define HAVE_fma_fmaddsub_v8sf_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1192                 :            : #define HAVE_fma_fmaddsub_v4sf_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1193                 :            : #define HAVE_fma_fmaddsub_v8df_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1194                 :            : #define HAVE_fma_fmaddsub_v8df_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    1195                 :            :                                                               || V8DFmode == V8DFmode \
    1196                 :            :                                                               || V8DFmode == V8DImode \
    1197                 :            :                                                               || V8DFmode == V16SImode)))
    1198                 :            : #define HAVE_fma_fmaddsub_v4df_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1199                 :            : #define HAVE_fma_fmaddsub_v2df_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1200                 :            : #define HAVE_avx512f_fmaddsub_v16sf_mask (TARGET_AVX512F)
    1201                 :            : #define HAVE_avx512f_fmaddsub_v16sf_mask_round (TARGET_AVX512F)
    1202                 :            : #define HAVE_avx512vl_fmaddsub_v8sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1203                 :            : #define HAVE_avx512vl_fmaddsub_v8sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1204                 :            : #define HAVE_avx512vl_fmaddsub_v4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1205                 :            : #define HAVE_avx512vl_fmaddsub_v4sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1206                 :            : #define HAVE_avx512f_fmaddsub_v8df_mask (TARGET_AVX512F)
    1207                 :            : #define HAVE_avx512f_fmaddsub_v8df_mask_round (TARGET_AVX512F)
    1208                 :            : #define HAVE_avx512vl_fmaddsub_v4df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1209                 :            : #define HAVE_avx512vl_fmaddsub_v4df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1210                 :            : #define HAVE_avx512vl_fmaddsub_v2df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1211                 :            : #define HAVE_avx512vl_fmaddsub_v2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1212                 :            : #define HAVE_avx512f_fmaddsub_v16sf_mask3 (TARGET_AVX512F)
    1213                 :            : #define HAVE_avx512f_fmaddsub_v16sf_mask3_round (TARGET_AVX512F)
    1214                 :            : #define HAVE_avx512vl_fmaddsub_v8sf_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1215                 :            : #define HAVE_avx512vl_fmaddsub_v8sf_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1216                 :            : #define HAVE_avx512vl_fmaddsub_v4sf_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1217                 :            : #define HAVE_avx512vl_fmaddsub_v4sf_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1218                 :            : #define HAVE_avx512f_fmaddsub_v8df_mask3 (TARGET_AVX512F)
    1219                 :            : #define HAVE_avx512f_fmaddsub_v8df_mask3_round (TARGET_AVX512F)
    1220                 :            : #define HAVE_avx512vl_fmaddsub_v4df_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1221                 :            : #define HAVE_avx512vl_fmaddsub_v4df_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1222                 :            : #define HAVE_avx512vl_fmaddsub_v2df_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1223                 :            : #define HAVE_avx512vl_fmaddsub_v2df_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1224                 :            : #define HAVE_fma_fmsubadd_v16sf_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1225                 :            : #define HAVE_fma_fmsubadd_v16sf_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    1226                 :            :                                                               || V16SFmode == V8DFmode \
    1227                 :            :                                                               || V16SFmode == V8DImode \
    1228                 :            :                                                               || V16SFmode == V16SImode)))
    1229                 :            : #define HAVE_fma_fmsubadd_v8sf_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1230                 :            : #define HAVE_fma_fmsubadd_v4sf_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1231                 :            : #define HAVE_fma_fmsubadd_v8df_maskz_1 (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && 1)
    1232                 :            : #define HAVE_fma_fmsubadd_v8df_maskz_1_round ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    1233                 :            :                                                               || V8DFmode == V8DFmode \
    1234                 :            :                                                               || V8DFmode == V8DImode \
    1235                 :            :                                                               || V8DFmode == V16SImode)))
    1236                 :            : #define HAVE_fma_fmsubadd_v4df_maskz_1 ((TARGET_AVX512F && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1237                 :            : #define HAVE_fma_fmsubadd_v2df_maskz_1 ((TARGET_AVX512F && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512VL))
    1238                 :            : #define HAVE_avx512f_fmsubadd_v16sf_mask (TARGET_AVX512F)
    1239                 :            : #define HAVE_avx512f_fmsubadd_v16sf_mask_round (TARGET_AVX512F)
    1240                 :            : #define HAVE_avx512vl_fmsubadd_v8sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1241                 :            : #define HAVE_avx512vl_fmsubadd_v8sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1242                 :            : #define HAVE_avx512vl_fmsubadd_v4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1243                 :            : #define HAVE_avx512vl_fmsubadd_v4sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1244                 :            : #define HAVE_avx512f_fmsubadd_v8df_mask (TARGET_AVX512F)
    1245                 :            : #define HAVE_avx512f_fmsubadd_v8df_mask_round (TARGET_AVX512F)
    1246                 :            : #define HAVE_avx512vl_fmsubadd_v4df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1247                 :            : #define HAVE_avx512vl_fmsubadd_v4df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1248                 :            : #define HAVE_avx512vl_fmsubadd_v2df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1249                 :            : #define HAVE_avx512vl_fmsubadd_v2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1250                 :            : #define HAVE_avx512f_fmsubadd_v16sf_mask3 (TARGET_AVX512F)
    1251                 :            : #define HAVE_avx512f_fmsubadd_v16sf_mask3_round (TARGET_AVX512F)
    1252                 :            : #define HAVE_avx512vl_fmsubadd_v8sf_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1253                 :            : #define HAVE_avx512vl_fmsubadd_v8sf_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1254                 :            : #define HAVE_avx512vl_fmsubadd_v4sf_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1255                 :            : #define HAVE_avx512vl_fmsubadd_v4sf_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1256                 :            : #define HAVE_avx512f_fmsubadd_v8df_mask3 (TARGET_AVX512F)
    1257                 :            : #define HAVE_avx512f_fmsubadd_v8df_mask3_round (TARGET_AVX512F)
    1258                 :            : #define HAVE_avx512vl_fmsubadd_v4df_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1259                 :            : #define HAVE_avx512vl_fmsubadd_v4df_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1260                 :            : #define HAVE_avx512vl_fmsubadd_v2df_mask3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1261                 :            : #define HAVE_avx512vl_fmsubadd_v2df_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1262                 :            : #define HAVE_avx512f_vmfmadd_v4sf_mask (TARGET_AVX512F)
    1263                 :            : #define HAVE_avx512f_vmfmadd_v4sf_mask_round (TARGET_AVX512F)
    1264                 :            : #define HAVE_avx512f_vmfmadd_v2df_mask ((TARGET_AVX512F) && (TARGET_SSE2))
    1265                 :            : #define HAVE_avx512f_vmfmadd_v2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1266                 :            : #define HAVE_avx512f_vmfmadd_v4sf_mask3 (TARGET_AVX512F)
    1267                 :            : #define HAVE_avx512f_vmfmadd_v4sf_mask3_round (TARGET_AVX512F)
    1268                 :            : #define HAVE_avx512f_vmfmadd_v2df_mask3 ((TARGET_AVX512F) && (TARGET_SSE2))
    1269                 :            : #define HAVE_avx512f_vmfmadd_v2df_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1270                 :            : #define HAVE_avx512f_vmfmadd_v4sf_maskz_1 (TARGET_AVX512F)
    1271                 :            : #define HAVE_avx512f_vmfmadd_v4sf_maskz_1_round (TARGET_AVX512F)
    1272                 :            : #define HAVE_avx512f_vmfmadd_v2df_maskz_1 ((TARGET_AVX512F) && (TARGET_SSE2))
    1273                 :            : #define HAVE_avx512f_vmfmadd_v2df_maskz_1_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1274                 :            : #define HAVE_avx512f_vmfmsub_v4sf_mask3 (TARGET_AVX512F)
    1275                 :            : #define HAVE_avx512f_vmfmsub_v4sf_mask3_round (TARGET_AVX512F)
    1276                 :            : #define HAVE_avx512f_vmfmsub_v2df_mask3 ((TARGET_AVX512F) && (TARGET_SSE2))
    1277                 :            : #define HAVE_avx512f_vmfmsub_v2df_mask3_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1278                 :            : #define HAVE_sse_cvtpi2ps ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE)
    1279                 :            : #define HAVE_sse_cvtps2pi ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE)
    1280                 :            : #define HAVE_sse_cvttps2pi ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE)
    1281                 :            : #define HAVE_sse_cvtsi2ss (TARGET_SSE)
    1282                 :            : #define HAVE_sse_cvtsi2ss_round ((TARGET_AVX512F) && (TARGET_SSE))
    1283                 :            : #define HAVE_sse_cvtsi2ssq ((TARGET_SSE) && (TARGET_64BIT))
    1284                 :            : #define HAVE_sse_cvtsi2ssq_round ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_64BIT)))
    1285                 :            : #define HAVE_sse_cvtss2si (TARGET_SSE)
    1286                 :            : #define HAVE_sse_cvtss2si_round ((TARGET_AVX512F) && (TARGET_SSE))
    1287                 :            : #define HAVE_sse_cvtss2siq ((TARGET_SSE) && (TARGET_64BIT))
    1288                 :            : #define HAVE_sse_cvtss2siq_round ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_64BIT)))
    1289                 :            : #define HAVE_sse_cvtss2si_2 (TARGET_SSE)
    1290                 :            : #define HAVE_sse_cvtss2siq_2 ((TARGET_SSE) && (TARGET_64BIT))
    1291                 :            : #define HAVE_sse_cvttss2si (TARGET_SSE)
    1292                 :            : #define HAVE_sse_cvttss2si_round ((TARGET_AVX512F) && (TARGET_SSE))
    1293                 :            : #define HAVE_sse_cvttss2siq ((TARGET_SSE) && (TARGET_64BIT))
    1294                 :            : #define HAVE_sse_cvttss2siq_round ((TARGET_AVX512F) && ((TARGET_SSE) && (TARGET_64BIT)))
    1295                 :            : #define HAVE_cvtusi2ss32 (TARGET_AVX512F && 1)
    1296                 :            : #define HAVE_cvtusi2ss32_round ((TARGET_AVX512F) && (TARGET_AVX512F && (V4SFmode == V4SFmode)))
    1297                 :            : #define HAVE_cvtusi2sd32 ((TARGET_AVX512F && 1) && (TARGET_SSE2))
    1298                 :            : #define HAVE_cvtusi2ss64 (TARGET_AVX512F && TARGET_64BIT)
    1299                 :            : #define HAVE_cvtusi2ss64_round ((TARGET_AVX512F) && (TARGET_AVX512F && TARGET_64BIT))
    1300                 :            : #define HAVE_cvtusi2sd64 ((TARGET_AVX512F && TARGET_64BIT) && (TARGET_SSE2))
    1301                 :            : #define HAVE_cvtusi2sd64_round ((TARGET_AVX512F) && ((TARGET_AVX512F && TARGET_64BIT) && (TARGET_SSE2)))
    1302                 :            : #define HAVE_floatv16siv16sf2 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512F))
    1303                 :            : #define HAVE_floatv16siv16sf2_round ((TARGET_AVX512F) && ((TARGET_SSE2 && 1 && (V16SFmode == V16SFmode \
    1304                 :            :                                                               || V16SFmode == V8DFmode \
    1305                 :            :                                                               || V16SFmode == V8DImode \
    1306                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F)))
    1307                 :            : #define HAVE_floatv16siv16sf2_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    1308                 :            : #define HAVE_floatv16siv16sf2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    1309                 :            :                                                               || V16SFmode == V8DFmode \
    1310                 :            :                                                               || V16SFmode == V8DImode \
    1311                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F))))
    1312                 :            : #define HAVE_floatv8siv8sf2 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX))
    1313                 :            : #define HAVE_floatv8siv8sf2_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    1314                 :            : #define HAVE_floatv4siv4sf2 (TARGET_SSE2 && 1 && 1)
    1315                 :            : #define HAVE_floatv4siv4sf2_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && 1))
    1316                 :            : #define HAVE_ufloatv16siv16sf2 (TARGET_AVX512F)
    1317                 :            : #define HAVE_ufloatv16siv16sf2_round (TARGET_AVX512F)
    1318                 :            : #define HAVE_ufloatv16siv16sf2_mask (TARGET_AVX512F)
    1319                 :            : #define HAVE_ufloatv16siv16sf2_mask_round (TARGET_AVX512F)
    1320                 :            : #define HAVE_ufloatv8siv8sf2 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1321                 :            : #define HAVE_ufloatv8siv8sf2_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1322                 :            : #define HAVE_ufloatv8siv8sf2_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1323                 :            : #define HAVE_ufloatv8siv8sf2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1324                 :            : #define HAVE_ufloatv4siv4sf2 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1325                 :            : #define HAVE_ufloatv4siv4sf2_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1326                 :            : #define HAVE_ufloatv4siv4sf2_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1327                 :            : #define HAVE_ufloatv4siv4sf2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1328                 :            : #define HAVE_avx_fix_notruncv8sfv8si ((TARGET_SSE2 && 1) && (TARGET_AVX))
    1329                 :            : #define HAVE_avx_fix_notruncv8sfv8si_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX)))
    1330                 :            : #define HAVE_sse2_fix_notruncv4sfv4si (TARGET_SSE2 && 1)
    1331                 :            : #define HAVE_sse2_fix_notruncv4sfv4si_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL)))
    1332                 :            : #define HAVE_avx512f_fix_notruncv16sfv16si (TARGET_AVX512F)
    1333                 :            : #define HAVE_avx512f_fix_notruncv16sfv16si_round (TARGET_AVX512F)
    1334                 :            : #define HAVE_avx512f_fix_notruncv16sfv16si_mask (TARGET_AVX512F)
    1335                 :            : #define HAVE_avx512f_fix_notruncv16sfv16si_mask_round (TARGET_AVX512F)
    1336                 :            : #define HAVE_avx512f_ufix_notruncv16sfv16si_mask (TARGET_AVX512F)
    1337                 :            : #define HAVE_avx512f_ufix_notruncv16sfv16si_mask_round (TARGET_AVX512F)
    1338                 :            : #define HAVE_avx512vl_ufix_notruncv8sfv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1339                 :            : #define HAVE_avx512vl_ufix_notruncv8sfv8si_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1340                 :            : #define HAVE_avx512vl_ufix_notruncv4sfv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1341                 :            : #define HAVE_avx512vl_ufix_notruncv4sfv4si_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1342                 :            : #define HAVE_avx512dq_cvtps2qqv8di_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    1343                 :            : #define HAVE_avx512dq_cvtps2qqv8di_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DImode == V16SFmode \
    1344                 :            :                                                               || V8DImode == V8DFmode \
    1345                 :            :                                                               || V8DImode == V8DImode \
    1346                 :            :                                                               || V8DImode == V16SImode))))
    1347                 :            : #define HAVE_avx512dq_cvtps2qqv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1348                 :            : #define HAVE_avx512dq_cvtps2qqv2di_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && TARGET_AVX512VL))
    1349                 :            : #define HAVE_avx512dq_cvtps2uqqv8di_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    1350                 :            : #define HAVE_avx512dq_cvtps2uqqv8di_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DImode == V16SFmode \
    1351                 :            :                                                               || V8DImode == V8DFmode \
    1352                 :            :                                                               || V8DImode == V8DImode \
    1353                 :            :                                                               || V8DImode == V16SImode))))
    1354                 :            : #define HAVE_avx512dq_cvtps2uqqv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1355                 :            : #define HAVE_avx512dq_cvtps2uqqv2di_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && TARGET_AVX512VL))
    1356                 :            : #define HAVE_fix_truncv16sfv16si2 (TARGET_AVX512F)
    1357                 :            : #define HAVE_fix_truncv16sfv16si2_round (TARGET_AVX512F)
    1358                 :            : #define HAVE_fix_truncv16sfv16si2_mask (TARGET_AVX512F)
    1359                 :            : #define HAVE_fix_truncv16sfv16si2_mask_round (TARGET_AVX512F)
    1360                 :            : #define HAVE_ufix_truncv16sfv16si2 (TARGET_AVX512F)
    1361                 :            : #define HAVE_ufix_truncv16sfv16si2_round (TARGET_AVX512F)
    1362                 :            : #define HAVE_ufix_truncv16sfv16si2_mask (TARGET_AVX512F)
    1363                 :            : #define HAVE_ufix_truncv16sfv16si2_mask_round (TARGET_AVX512F)
    1364                 :            : #define HAVE_fix_truncv8sfv8si2 (TARGET_AVX && 1)
    1365                 :            : #define HAVE_fix_truncv8sfv8si2_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    1366                 :            : #define HAVE_fix_truncv4sfv4si2 (TARGET_SSE2 && 1)
    1367                 :            : #define HAVE_fix_truncv4sfv4si2_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    1368                 :            : #define HAVE_sse2_cvtpi2pd (TARGET_SSE2)
    1369                 :            : #define HAVE_sse2_cvtpd2pi (TARGET_SSE2)
    1370                 :            : #define HAVE_sse2_cvttpd2pi (TARGET_SSE2)
    1371                 :            : #define HAVE_sse2_cvtsi2sd (TARGET_SSE2)
    1372                 :            : #define HAVE_sse2_cvtsi2sdq (TARGET_SSE2 && TARGET_64BIT)
    1373                 :            : #define HAVE_sse2_cvtsi2sdq_round ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_64BIT))
    1374                 :            : #define HAVE_avx512f_vcvtss2usi (TARGET_AVX512F)
    1375                 :            : #define HAVE_avx512f_vcvtss2usi_round (TARGET_AVX512F)
    1376                 :            : #define HAVE_avx512f_vcvtss2usiq ((TARGET_AVX512F) && (TARGET_64BIT))
    1377                 :            : #define HAVE_avx512f_vcvtss2usiq_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_64BIT)))
    1378                 :            : #define HAVE_avx512f_vcvttss2usi (TARGET_AVX512F)
    1379                 :            : #define HAVE_avx512f_vcvttss2usi_round (TARGET_AVX512F)
    1380                 :            : #define HAVE_avx512f_vcvttss2usiq ((TARGET_AVX512F) && (TARGET_64BIT))
    1381                 :            : #define HAVE_avx512f_vcvttss2usiq_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_64BIT)))
    1382                 :            : #define HAVE_avx512f_vcvtsd2usi (TARGET_AVX512F)
    1383                 :            : #define HAVE_avx512f_vcvtsd2usi_round (TARGET_AVX512F)
    1384                 :            : #define HAVE_avx512f_vcvtsd2usiq ((TARGET_AVX512F) && (TARGET_64BIT))
    1385                 :            : #define HAVE_avx512f_vcvtsd2usiq_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_64BIT)))
    1386                 :            : #define HAVE_avx512f_vcvttsd2usi (TARGET_AVX512F)
    1387                 :            : #define HAVE_avx512f_vcvttsd2usi_round (TARGET_AVX512F)
    1388                 :            : #define HAVE_avx512f_vcvttsd2usiq ((TARGET_AVX512F) && (TARGET_64BIT))
    1389                 :            : #define HAVE_avx512f_vcvttsd2usiq_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_64BIT)))
    1390                 :            : #define HAVE_sse2_cvtsd2si (TARGET_SSE2)
    1391                 :            : #define HAVE_sse2_cvtsd2si_round ((TARGET_AVX512F) && (TARGET_SSE2))
    1392                 :            : #define HAVE_sse2_cvtsd2siq ((TARGET_SSE2) && (TARGET_64BIT))
    1393                 :            : #define HAVE_sse2_cvtsd2siq_round ((TARGET_AVX512F) && ((TARGET_SSE2) && (TARGET_64BIT)))
    1394                 :            : #define HAVE_sse2_cvtsd2si_2 (TARGET_SSE2)
    1395                 :            : #define HAVE_sse2_cvtsd2siq_2 ((TARGET_SSE2) && (TARGET_64BIT))
    1396                 :            : #define HAVE_sse2_cvttsd2si (TARGET_SSE2)
    1397                 :            : #define HAVE_sse2_cvttsd2si_round ((TARGET_AVX512F) && (TARGET_SSE2))
    1398                 :            : #define HAVE_sse2_cvttsd2siq ((TARGET_SSE2) && (TARGET_64BIT))
    1399                 :            : #define HAVE_sse2_cvttsd2siq_round ((TARGET_AVX512F) && ((TARGET_SSE2) && (TARGET_64BIT)))
    1400                 :            : #define HAVE_floatv8siv8df2 ((TARGET_AVX && 1) && (TARGET_AVX512F))
    1401                 :            : #define HAVE_floatv8siv8df2_mask ((TARGET_AVX512F) && ((TARGET_AVX && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    1402                 :            : #define HAVE_floatv4siv4df2 (TARGET_AVX && 1)
    1403                 :            : #define HAVE_floatv4siv4df2_mask ((TARGET_AVX512F) && (TARGET_AVX && (32 == 64 || TARGET_AVX512VL)))
    1404                 :            : #define HAVE_floatv8div8df2 (TARGET_AVX512DQ)
    1405                 :            : #define HAVE_floatv8div8df2_round ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    1406                 :            : #define HAVE_floatv8div8df2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    1407                 :            : #define HAVE_floatv8div8df2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ)))
    1408                 :            : #define HAVE_floatunsv8div8df2 (TARGET_AVX512DQ)
    1409                 :            : #define HAVE_floatunsv8div8df2_round ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    1410                 :            : #define HAVE_floatunsv8div8df2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    1411                 :            : #define HAVE_floatunsv8div8df2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ)))
    1412                 :            : #define HAVE_floatv4div4df2 ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    1413                 :            : #define HAVE_floatv4div4df2_round ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    1414                 :            : #define HAVE_floatv4div4df2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    1415                 :            : #define HAVE_floatv4div4df2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL))))
    1416                 :            : #define HAVE_floatunsv4div4df2 ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    1417                 :            : #define HAVE_floatunsv4div4df2_round ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    1418                 :            : #define HAVE_floatunsv4div4df2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    1419                 :            : #define HAVE_floatunsv4div4df2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL))))
    1420                 :            : #define HAVE_floatv2div2df2 ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    1421                 :            : #define HAVE_floatv2div2df2_round ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    1422                 :            : #define HAVE_floatv2div2df2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    1423                 :            : #define HAVE_floatv2div2df2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL))))
    1424                 :            : #define HAVE_floatunsv2div2df2 ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    1425                 :            : #define HAVE_floatunsv2div2df2_round ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    1426                 :            : #define HAVE_floatunsv2div2df2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    1427                 :            : #define HAVE_floatunsv2div2df2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL))))
    1428                 :            : #define HAVE_floatv8div8sf2 (TARGET_AVX512DQ && 1)
    1429                 :            : #define HAVE_floatv8div8sf2_round ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8SFmode == V8SFmode)))
    1430                 :            : #define HAVE_floatv8div8sf2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    1431                 :            : #define HAVE_floatv8div8sf2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8SFmode == V8SFmode))))
    1432                 :            : #define HAVE_floatunsv8div8sf2 (TARGET_AVX512DQ && 1)
    1433                 :            : #define HAVE_floatunsv8div8sf2_round ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8SFmode == V8SFmode)))
    1434                 :            : #define HAVE_floatunsv8div8sf2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    1435                 :            : #define HAVE_floatunsv8div8sf2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8SFmode == V8SFmode))))
    1436                 :            : #define HAVE_floatv4div4sf2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1437                 :            : #define HAVE_floatv4div4sf2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1438                 :            : #define HAVE_floatunsv4div4sf2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1439                 :            : #define HAVE_floatunsv4div4sf2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1440                 :            : #define HAVE_ufloatv8siv8df2 (TARGET_AVX512F)
    1441                 :            : #define HAVE_ufloatv8siv8df2_mask (TARGET_AVX512F)
    1442                 :            : #define HAVE_ufloatv4siv4df2 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1443                 :            : #define HAVE_ufloatv4siv4df2_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1444                 :            : #define HAVE_ufloatv2siv2df2 (TARGET_AVX512VL)
    1445                 :            : #define HAVE_ufloatv2siv2df2_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1446                 :            : #define HAVE_avx512f_cvtdq2pd512_2 (TARGET_AVX512F)
    1447                 :            : #define HAVE_avx_cvtdq2pd256_2 (TARGET_AVX)
    1448                 :            : #define HAVE_sse2_cvtdq2pd (TARGET_SSE2 && 1)
    1449                 :            : #define HAVE_sse2_cvtdq2pd_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    1450                 :            : #define HAVE_avx512f_cvtpd2dq512 (TARGET_AVX512F)
    1451                 :            : #define HAVE_avx512f_cvtpd2dq512_round (TARGET_AVX512F)
    1452                 :            : #define HAVE_avx512f_cvtpd2dq512_mask (TARGET_AVX512F)
    1453                 :            : #define HAVE_avx512f_cvtpd2dq512_mask_round (TARGET_AVX512F)
    1454                 :            : #define HAVE_avx_cvtpd2dq256 (TARGET_AVX && 1)
    1455                 :            : #define HAVE_avx_cvtpd2dq256_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    1456                 :            : #define HAVE_sse2_cvtpd2dq (TARGET_SSE2)
    1457                 :            : #define HAVE_sse2_cvtpd2dq_mask (TARGET_AVX512VL)
    1458                 :            : #define HAVE_ufix_notruncv8dfv8si2 (TARGET_AVX512F)
    1459                 :            : #define HAVE_ufix_notruncv8dfv8si2_round (TARGET_AVX512F)
    1460                 :            : #define HAVE_ufix_notruncv8dfv8si2_mask (TARGET_AVX512F)
    1461                 :            : #define HAVE_ufix_notruncv8dfv8si2_mask_round (TARGET_AVX512F)
    1462                 :            : #define HAVE_ufix_notruncv4dfv4si2 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1463                 :            : #define HAVE_ufix_notruncv4dfv4si2_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1464                 :            : #define HAVE_ufix_notruncv4dfv4si2_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1465                 :            : #define HAVE_ufix_notruncv4dfv4si2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1466                 :            : #define HAVE_ufix_notruncv2dfv2si2 (TARGET_AVX512VL)
    1467                 :            : #define HAVE_ufix_notruncv2dfv2si2_mask (TARGET_AVX512VL)
    1468                 :            : #define HAVE_fix_truncv8dfv8si2 (TARGET_AVX512F)
    1469                 :            : #define HAVE_fix_truncv8dfv8si2_round (TARGET_AVX512F)
    1470                 :            : #define HAVE_fix_truncv8dfv8si2_mask (TARGET_AVX512F)
    1471                 :            : #define HAVE_fix_truncv8dfv8si2_mask_round (TARGET_AVX512F)
    1472                 :            : #define HAVE_fixuns_truncv8dfv8si2 (TARGET_AVX512F)
    1473                 :            : #define HAVE_fixuns_truncv8dfv8si2_round (TARGET_AVX512F)
    1474                 :            : #define HAVE_fixuns_truncv8dfv8si2_mask (TARGET_AVX512F)
    1475                 :            : #define HAVE_fixuns_truncv8dfv8si2_mask_round (TARGET_AVX512F)
    1476                 :            : #define HAVE_ufix_truncv2dfv2si2 (TARGET_AVX512VL)
    1477                 :            : #define HAVE_ufix_truncv2dfv2si2_mask (TARGET_AVX512VL)
    1478                 :            : #define HAVE_fix_truncv4dfv4si2 (TARGET_AVX || (TARGET_AVX512VL && TARGET_AVX512F))
    1479                 :            : #define HAVE_fix_truncv4dfv4si2_mask ((TARGET_AVX512F) && (TARGET_AVX || (TARGET_AVX512VL && TARGET_AVX512F)))
    1480                 :            : #define HAVE_ufix_truncv4dfv4si2 (TARGET_AVX512VL && TARGET_AVX512F)
    1481                 :            : #define HAVE_ufix_truncv4dfv4si2_mask ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512F))
    1482                 :            : #define HAVE_fix_truncv8dfv8di2 (TARGET_AVX512DQ && 1)
    1483                 :            : #define HAVE_fix_truncv8dfv8di2_round ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DFmode == V16SFmode \
    1484                 :            :                                                                               || V8DFmode == V8DFmode \
    1485                 :            :                                                                               || V8DFmode == V8DImode \
    1486                 :            :                                                                               || V8DFmode == V16SImode)))
    1487                 :            : #define HAVE_fix_truncv8dfv8di2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    1488                 :            : #define HAVE_fix_truncv8dfv8di2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DFmode == V16SFmode \
    1489                 :            :                                                                               || V8DFmode == V8DFmode \
    1490                 :            :                                                                               || V8DFmode == V8DImode \
    1491                 :            :                                                                               || V8DFmode == V16SImode))))
    1492                 :            : #define HAVE_fixuns_truncv8dfv8di2 (TARGET_AVX512DQ && 1)
    1493                 :            : #define HAVE_fixuns_truncv8dfv8di2_round ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DFmode == V16SFmode \
    1494                 :            :                                                                               || V8DFmode == V8DFmode \
    1495                 :            :                                                                               || V8DFmode == V8DImode \
    1496                 :            :                                                                               || V8DFmode == V16SImode)))
    1497                 :            : #define HAVE_fixuns_truncv8dfv8di2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    1498                 :            : #define HAVE_fixuns_truncv8dfv8di2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DFmode == V16SFmode \
    1499                 :            :                                                                               || V8DFmode == V8DFmode \
    1500                 :            :                                                                               || V8DFmode == V8DImode \
    1501                 :            :                                                                               || V8DFmode == V16SImode))))
    1502                 :            : #define HAVE_fix_truncv4dfv4di2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1503                 :            : #define HAVE_fix_truncv4dfv4di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1504                 :            : #define HAVE_fixuns_truncv4dfv4di2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1505                 :            : #define HAVE_fixuns_truncv4dfv4di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1506                 :            : #define HAVE_fix_truncv2dfv2di2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1507                 :            : #define HAVE_fix_truncv2dfv2di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1508                 :            : #define HAVE_fixuns_truncv2dfv2di2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1509                 :            : #define HAVE_fixuns_truncv2dfv2di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1510                 :            : #define HAVE_fix_notruncv8dfv8di2 (TARGET_AVX512DQ && 1)
    1511                 :            : #define HAVE_fix_notruncv8dfv8di2_round ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DFmode == V16SFmode \
    1512                 :            :                                                               || V8DFmode == V8DFmode \
    1513                 :            :                                                               || V8DFmode == V8DImode \
    1514                 :            :                                                               || V8DFmode == V16SImode)))
    1515                 :            : #define HAVE_fix_notruncv8dfv8di2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    1516                 :            : #define HAVE_fix_notruncv8dfv8di2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DFmode == V16SFmode \
    1517                 :            :                                                               || V8DFmode == V8DFmode \
    1518                 :            :                                                               || V8DFmode == V8DImode \
    1519                 :            :                                                               || V8DFmode == V16SImode))))
    1520                 :            : #define HAVE_fix_notruncv4dfv4di2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1521                 :            : #define HAVE_fix_notruncv4dfv4di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1522                 :            : #define HAVE_fix_notruncv2dfv2di2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1523                 :            : #define HAVE_fix_notruncv2dfv2di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1524                 :            : #define HAVE_ufix_notruncv8dfv8di2 (TARGET_AVX512DQ && 1)
    1525                 :            : #define HAVE_ufix_notruncv8dfv8di2_round ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DFmode == V16SFmode \
    1526                 :            :                                                               || V8DFmode == V8DFmode \
    1527                 :            :                                                               || V8DFmode == V8DImode \
    1528                 :            :                                                               || V8DFmode == V16SImode)))
    1529                 :            : #define HAVE_ufix_notruncv8dfv8di2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    1530                 :            : #define HAVE_ufix_notruncv8dfv8di2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DFmode == V16SFmode \
    1531                 :            :                                                               || V8DFmode == V8DFmode \
    1532                 :            :                                                               || V8DFmode == V8DImode \
    1533                 :            :                                                               || V8DFmode == V16SImode))))
    1534                 :            : #define HAVE_ufix_notruncv4dfv4di2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1535                 :            : #define HAVE_ufix_notruncv4dfv4di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1536                 :            : #define HAVE_ufix_notruncv2dfv2di2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1537                 :            : #define HAVE_ufix_notruncv2dfv2di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1538                 :            : #define HAVE_fix_truncv8sfv8di2 (TARGET_AVX512DQ && 1)
    1539                 :            : #define HAVE_fix_truncv8sfv8di2_round ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8SFmode == V8SFmode)))
    1540                 :            : #define HAVE_fix_truncv8sfv8di2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    1541                 :            : #define HAVE_fix_truncv8sfv8di2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8SFmode == V8SFmode))))
    1542                 :            : #define HAVE_fixuns_truncv8sfv8di2 (TARGET_AVX512DQ && 1)
    1543                 :            : #define HAVE_fixuns_truncv8sfv8di2_round ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8SFmode == V8SFmode)))
    1544                 :            : #define HAVE_fixuns_truncv8sfv8di2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    1545                 :            : #define HAVE_fixuns_truncv8sfv8di2_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8SFmode == V8SFmode))))
    1546                 :            : #define HAVE_fix_truncv4sfv4di2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1547                 :            : #define HAVE_fix_truncv4sfv4di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1548                 :            : #define HAVE_fixuns_truncv4sfv4di2 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    1549                 :            : #define HAVE_fixuns_truncv4sfv4di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    1550                 :            : #define HAVE_fix_truncv2sfv2di2 (TARGET_AVX512DQ && TARGET_AVX512VL)
    1551                 :            : #define HAVE_fix_truncv2sfv2di2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && TARGET_AVX512VL))
    1552                 :            : #define HAVE_fixuns_truncv2sfv2di2 (TARGET_AVX512DQ && TARGET_AVX512VL)
    1553                 :            : #define HAVE_fixuns_truncv2sfv2di2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && TARGET_AVX512VL))
    1554                 :            : #define HAVE_ufix_truncv8sfv8si2 (TARGET_AVX512VL)
    1555                 :            : #define HAVE_ufix_truncv8sfv8si2_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1556                 :            : #define HAVE_ufix_truncv4sfv4si2 (TARGET_AVX512VL)
    1557                 :            : #define HAVE_ufix_truncv4sfv4si2_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1558                 :            : #define HAVE_sse2_cvttpd2dq (TARGET_SSE2)
    1559                 :            : #define HAVE_sse2_cvttpd2dq_mask (TARGET_AVX512VL)
    1560                 :            : #define HAVE_sse2_cvtsd2ss (TARGET_SSE2)
    1561                 :            : #define HAVE_sse2_cvtsd2ss_round ((TARGET_AVX512F) && (TARGET_SSE2))
    1562                 :            : #define HAVE_sse2_cvtss2sd (TARGET_SSE2)
    1563                 :            : #define HAVE_sse2_cvtss2sd_round ((TARGET_AVX512F) && (TARGET_SSE2))
    1564                 :            : #define HAVE_avx512f_cvtpd2ps512_mask (TARGET_AVX512F)
    1565                 :            : #define HAVE_avx512f_cvtpd2ps512_mask_round (TARGET_AVX512F)
    1566                 :            : #define HAVE_avx_cvtpd2ps256 (TARGET_AVX && 1)
    1567                 :            : #define HAVE_avx_cvtpd2ps256_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    1568                 :            : #define HAVE_avx512f_cvtps2pd512 ((TARGET_AVX && 1 && 1) && (TARGET_AVX512F))
    1569                 :            : #define HAVE_avx512f_cvtps2pd512_round ((TARGET_AVX512F) && ((TARGET_AVX && 1 && (V8DFmode == V16SFmode \
    1570                 :            :                                                                               || V8DFmode == V8DFmode \
    1571                 :            :                                                                               || V8DFmode == V8DImode \
    1572                 :            :                                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F)))
    1573                 :            : #define HAVE_avx512f_cvtps2pd512_mask ((TARGET_AVX512F) && ((TARGET_AVX && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    1574                 :            : #define HAVE_avx512f_cvtps2pd512_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    1575                 :            :                                                                               || V8DFmode == V8DFmode \
    1576                 :            :                                                                               || V8DFmode == V8DImode \
    1577                 :            :                                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F))))
    1578                 :            : #define HAVE_avx_cvtps2pd256 (TARGET_AVX && 1 && 1)
    1579                 :            : #define HAVE_avx_cvtps2pd256_mask ((TARGET_AVX512F) && (TARGET_AVX && (32 == 64 || TARGET_AVX512VL) && 1))
    1580                 :            : #define HAVE_vec_unpacks_lo_v16sf (TARGET_AVX512F)
    1581                 :            : #define HAVE_avx512bw_cvtb2maskv64qi (TARGET_AVX512BW)
    1582                 :            : #define HAVE_avx512vl_cvtb2maskv16qi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    1583                 :            : #define HAVE_avx512vl_cvtb2maskv32qi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    1584                 :            : #define HAVE_avx512bw_cvtw2maskv32hi (TARGET_AVX512BW)
    1585                 :            : #define HAVE_avx512vl_cvtw2maskv16hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    1586                 :            : #define HAVE_avx512vl_cvtw2maskv8hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    1587                 :            : #define HAVE_avx512f_cvtd2maskv16si (TARGET_AVX512DQ)
    1588                 :            : #define HAVE_avx512vl_cvtd2maskv8si ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    1589                 :            : #define HAVE_avx512vl_cvtd2maskv4si ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    1590                 :            : #define HAVE_avx512f_cvtq2maskv8di (TARGET_AVX512DQ)
    1591                 :            : #define HAVE_avx512vl_cvtq2maskv4di ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    1592                 :            : #define HAVE_avx512vl_cvtq2maskv2di ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    1593                 :            : #define HAVE_sse2_cvtps2pd (TARGET_SSE2 && 1)
    1594                 :            : #define HAVE_sse2_cvtps2pd_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    1595                 :            : #define HAVE_sse_movhlps (TARGET_SSE && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    1596                 :            : #define HAVE_sse_movlhps (TARGET_SSE && ix86_binary_operator_ok (UNKNOWN, V4SFmode, operands))
    1597                 :            : #define HAVE_avx512f_unpckhps512_mask (TARGET_AVX512F)
    1598                 :            : #define HAVE_avx_unpckhps256 (TARGET_AVX && 1)
    1599                 :            : #define HAVE_avx_unpckhps256_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    1600                 :            : #define HAVE_vec_interleave_highv4sf (TARGET_SSE && 1)
    1601                 :            : #define HAVE_vec_interleave_highv4sf_mask ((TARGET_AVX512F) && (TARGET_SSE && TARGET_AVX512VL))
    1602                 :            : #define HAVE_avx512f_unpcklps512_mask (TARGET_AVX512F)
    1603                 :            : #define HAVE_avx_unpcklps256 (TARGET_AVX && 1)
    1604                 :            : #define HAVE_avx_unpcklps256_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    1605                 :            : #define HAVE_unpcklps128_mask (TARGET_AVX512VL)
    1606                 :            : #define HAVE_vec_interleave_lowv4sf (TARGET_SSE)
    1607                 :            : #define HAVE_avx_movshdup256 (TARGET_AVX && 1)
    1608                 :            : #define HAVE_avx_movshdup256_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    1609                 :            : #define HAVE_sse3_movshdup (TARGET_SSE3 && 1)
    1610                 :            : #define HAVE_sse3_movshdup_mask ((TARGET_AVX512F) && (TARGET_SSE3 && TARGET_AVX512VL))
    1611                 :            : #define HAVE_avx512f_movshdup512_mask (TARGET_AVX512F)
    1612                 :            : #define HAVE_avx_movsldup256 (TARGET_AVX && 1)
    1613                 :            : #define HAVE_avx_movsldup256_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    1614                 :            : #define HAVE_sse3_movsldup (TARGET_SSE3 && 1)
    1615                 :            : #define HAVE_sse3_movsldup_mask ((TARGET_AVX512F) && (TARGET_SSE3 && TARGET_AVX512VL))
    1616                 :            : #define HAVE_avx512f_movsldup512_mask (TARGET_AVX512F)
    1617                 :            : #define HAVE_avx_shufps256_1 (TARGET_AVX \
    1618                 :            :    && 1 \
    1619                 :            :    && (INTVAL (operands[3]) == (INTVAL (operands[7]) - 4) \
    1620                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[8]) - 4) \
    1621                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[9]) - 4) \
    1622                 :            :        && INTVAL (operands[6]) == (INTVAL (operands[10]) - 4)))
    1623                 :            : #define HAVE_avx_shufps256_1_mask ((TARGET_AVX512F) && (TARGET_AVX \
    1624                 :            :    && TARGET_AVX512VL \
    1625                 :            :    && (INTVAL (operands[3]) == (INTVAL (operands[7]) - 4) \
    1626                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[8]) - 4) \
    1627                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[9]) - 4) \
    1628                 :            :        && INTVAL (operands[6]) == (INTVAL (operands[10]) - 4))))
    1629                 :            : #define HAVE_sse_shufps_v4sf_mask (TARGET_AVX512VL)
    1630                 :            : #define HAVE_sse_shufps_v4si (TARGET_SSE)
    1631                 :            : #define HAVE_sse_shufps_v4sf (TARGET_SSE)
    1632                 :            : #define HAVE_sse_storehps (TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    1633                 :            : #define HAVE_sse_loadhps (TARGET_SSE)
    1634                 :            : #define HAVE_sse_storelps (TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    1635                 :            : #define HAVE_sse_loadlps (TARGET_SSE)
    1636                 :            : #define HAVE_sse_movss (TARGET_SSE)
    1637                 :            : #define HAVE_avx2_vec_dupv8sf ((TARGET_AVX2) && (TARGET_AVX))
    1638                 :            : #define HAVE_avx2_vec_dupv4sf (TARGET_AVX2)
    1639                 :            : #define HAVE_avx2_vec_dupv8sf_1 (TARGET_AVX2)
    1640                 :            : #define HAVE_avx512f_vec_dupv16sf_1 (TARGET_AVX512F)
    1641                 :            : #define HAVE_avx512f_vec_dupv8df_1 (TARGET_AVX512F)
    1642                 :            : #define HAVE_vec_setv4si_0 (TARGET_SSE)
    1643                 :            : #define HAVE_vec_setv4sf_0 (TARGET_SSE)
    1644                 :            : #define HAVE_vec_setv8si_0 (TARGET_AVX)
    1645                 :            : #define HAVE_vec_setv8sf_0 (TARGET_AVX)
    1646                 :            : #define HAVE_vec_setv16si_0 ((TARGET_AVX) && (TARGET_AVX512F))
    1647                 :            : #define HAVE_vec_setv16sf_0 ((TARGET_AVX) && (TARGET_AVX512F))
    1648                 :            : #define HAVE_sse4_1_insertps (TARGET_SSE4_1)
    1649                 :            : #define HAVE_vec_setv2df_0 (TARGET_SSE2)
    1650                 :            : #define HAVE_avx512dq_vextractf64x2_1_maskm (TARGET_AVX512DQ \
    1651                 :            :    && INTVAL (operands[2]) % 2 == 0 \
    1652                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]) - 1 \
    1653                 :            :    && rtx_equal_p (operands[4], operands[0]))
    1654                 :            : #define HAVE_avx512dq_vextracti64x2_1_maskm (TARGET_AVX512DQ \
    1655                 :            :    && INTVAL (operands[2]) % 2 == 0 \
    1656                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]) - 1 \
    1657                 :            :    && rtx_equal_p (operands[4], operands[0]))
    1658                 :            : #define HAVE_avx512f_vextractf32x4_1_maskm (TARGET_AVX512F \
    1659                 :            :    && INTVAL (operands[2]) % 4 == 0 \
    1660                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]) - 1 \
    1661                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    1662                 :            :    && INTVAL (operands[4]) == INTVAL (operands[5]) - 1 \
    1663                 :            :    && rtx_equal_p (operands[6], operands[0]))
    1664                 :            : #define HAVE_avx512f_vextracti32x4_1_maskm (TARGET_AVX512F \
    1665                 :            :    && INTVAL (operands[2]) % 4 == 0 \
    1666                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]) - 1 \
    1667                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    1668                 :            :    && INTVAL (operands[4]) == INTVAL (operands[5]) - 1 \
    1669                 :            :    && rtx_equal_p (operands[6], operands[0]))
    1670                 :            : #define HAVE_avx512dq_vextractf64x2_1_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ \
    1671                 :            :    && INTVAL (operands[2]) % 2 == 0 \
    1672                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]) - 1))
    1673                 :            : #define HAVE_avx512dq_vextracti64x2_1_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ \
    1674                 :            :    && INTVAL (operands[2]) % 2 == 0 \
    1675                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]) - 1))
    1676                 :            : #define HAVE_avx512f_vextractf32x4_1_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    1677                 :            :    && INTVAL (operands[2]) % 4 == 0 \
    1678                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]) - 1 \
    1679                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    1680                 :            :    && INTVAL (operands[4]) == INTVAL (operands[5]) - 1))
    1681                 :            : #define HAVE_avx512f_vextracti32x4_1_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    1682                 :            :    && INTVAL (operands[2]) % 4 == 0 \
    1683                 :            :    && INTVAL (operands[2]) == INTVAL (operands[3]) - 1 \
    1684                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    1685                 :            :    && INTVAL (operands[4]) == INTVAL (operands[5]) - 1))
    1686                 :            : #define HAVE_vec_extract_lo_v8df_maskm (TARGET_AVX512F \
    1687                 :            :    && rtx_equal_p (operands[2], operands[0]))
    1688                 :            : #define HAVE_vec_extract_lo_v8di_maskm (TARGET_AVX512F \
    1689                 :            :    && rtx_equal_p (operands[2], operands[0]))
    1690                 :            : #define HAVE_vec_extract_lo_v8df (TARGET_AVX512F \
    1691                 :            :    && (false || !(MEM_P (operands[0]) && MEM_P (operands[1]))))
    1692                 :            : #define HAVE_vec_extract_lo_v8df_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    1693                 :            :    && (true || !(MEM_P (operands[0]) && MEM_P (operands[1])))))
    1694                 :            : #define HAVE_vec_extract_lo_v8di (TARGET_AVX512F \
    1695                 :            :    && (false || !(MEM_P (operands[0]) && MEM_P (operands[1]))))
    1696                 :            : #define HAVE_vec_extract_lo_v8di_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    1697                 :            :    && (true || !(MEM_P (operands[0]) && MEM_P (operands[1])))))
    1698                 :            : #define HAVE_vec_extract_hi_v8df_maskm (TARGET_AVX512F \
    1699                 :            :    && rtx_equal_p (operands[2], operands[0]))
    1700                 :            : #define HAVE_vec_extract_hi_v8di_maskm (TARGET_AVX512F \
    1701                 :            :    && rtx_equal_p (operands[2], operands[0]))
    1702                 :            : #define HAVE_vec_extract_hi_v8df (TARGET_AVX512F)
    1703                 :            : #define HAVE_vec_extract_hi_v8df_mask (TARGET_AVX512F)
    1704                 :            : #define HAVE_vec_extract_hi_v8di (TARGET_AVX512F)
    1705                 :            : #define HAVE_vec_extract_hi_v8di_mask (TARGET_AVX512F)
    1706                 :            : #define HAVE_vec_extract_hi_v16sf_maskm (TARGET_AVX512DQ \
    1707                 :            :    && rtx_equal_p (operands[2], operands[0]))
    1708                 :            : #define HAVE_vec_extract_hi_v16si_maskm (TARGET_AVX512DQ \
    1709                 :            :    && rtx_equal_p (operands[2], operands[0]))
    1710                 :            : #define HAVE_vec_extract_hi_v16sf (TARGET_AVX512F && 1)
    1711                 :            : #define HAVE_vec_extract_hi_v16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512F && TARGET_AVX512DQ))
    1712                 :            : #define HAVE_vec_extract_hi_v16si (TARGET_AVX512F && 1)
    1713                 :            : #define HAVE_vec_extract_hi_v16si_mask ((TARGET_AVX512F) && (TARGET_AVX512F && TARGET_AVX512DQ))
    1714                 :            : #define HAVE_vec_extract_lo_v16sf (TARGET_AVX512F \
    1715                 :            :    && 1 \
    1716                 :            :    && (false || !(MEM_P (operands[0]) && MEM_P (operands[1]))))
    1717                 :            : #define HAVE_vec_extract_lo_v16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    1718                 :            :    && TARGET_AVX512DQ \
    1719                 :            :    && (true || !(MEM_P (operands[0]) && MEM_P (operands[1])))))
    1720                 :            : #define HAVE_vec_extract_lo_v16si (TARGET_AVX512F \
    1721                 :            :    && 1 \
    1722                 :            :    && (false || !(MEM_P (operands[0]) && MEM_P (operands[1]))))
    1723                 :            : #define HAVE_vec_extract_lo_v16si_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    1724                 :            :    && TARGET_AVX512DQ \
    1725                 :            :    && (true || !(MEM_P (operands[0]) && MEM_P (operands[1])))))
    1726                 :            : #define HAVE_vec_extract_lo_v4di (TARGET_AVX \
    1727                 :            :    && 1 && 1 \
    1728                 :            :    && (false || !(MEM_P (operands[0]) && MEM_P (operands[1]))))
    1729                 :            : #define HAVE_vec_extract_lo_v4di_mask ((TARGET_AVX512F) && (TARGET_AVX \
    1730                 :            :    && TARGET_AVX512VL && TARGET_AVX512DQ \
    1731                 :            :    && (true || !(MEM_P (operands[0]) && MEM_P (operands[1])))))
    1732                 :            : #define HAVE_vec_extract_lo_v4df (TARGET_AVX \
    1733                 :            :    && 1 && 1 \
    1734                 :            :    && (false || !(MEM_P (operands[0]) && MEM_P (operands[1]))))
    1735                 :            : #define HAVE_vec_extract_lo_v4df_mask ((TARGET_AVX512F) && (TARGET_AVX \
    1736                 :            :    && TARGET_AVX512VL && TARGET_AVX512DQ \
    1737                 :            :    && (true || !(MEM_P (operands[0]) && MEM_P (operands[1])))))
    1738                 :            : #define HAVE_vec_extract_hi_v4di (TARGET_AVX && 1 && 1)
    1739                 :            : #define HAVE_vec_extract_hi_v4di_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL && TARGET_AVX512DQ))
    1740                 :            : #define HAVE_vec_extract_hi_v4df (TARGET_AVX && 1 && 1)
    1741                 :            : #define HAVE_vec_extract_hi_v4df_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL && TARGET_AVX512DQ))
    1742                 :            : #define HAVE_vec_extract_lo_v8si (TARGET_AVX \
    1743                 :            :    && 1 \
    1744                 :            :    && (false || !(MEM_P (operands[0]) && MEM_P (operands[1]))))
    1745                 :            : #define HAVE_vec_extract_lo_v8si_mask ((TARGET_AVX512F) && (TARGET_AVX \
    1746                 :            :    && TARGET_AVX512VL \
    1747                 :            :    && (true || !(MEM_P (operands[0]) && MEM_P (operands[1])))))
    1748                 :            : #define HAVE_vec_extract_lo_v8sf (TARGET_AVX \
    1749                 :            :    && 1 \
    1750                 :            :    && (false || !(MEM_P (operands[0]) && MEM_P (operands[1]))))
    1751                 :            : #define HAVE_vec_extract_lo_v8sf_mask ((TARGET_AVX512F) && (TARGET_AVX \
    1752                 :            :    && TARGET_AVX512VL \
    1753                 :            :    && (true || !(MEM_P (operands[0]) && MEM_P (operands[1])))))
    1754                 :            : #define HAVE_vec_extract_lo_v8si_maskm (TARGET_AVX512VL && TARGET_AVX512F \
    1755                 :            :    && rtx_equal_p (operands[2], operands[0]))
    1756                 :            : #define HAVE_vec_extract_lo_v8sf_maskm (TARGET_AVX512VL && TARGET_AVX512F \
    1757                 :            :    && rtx_equal_p (operands[2], operands[0]))
    1758                 :            : #define HAVE_vec_extract_hi_v8si_maskm (TARGET_AVX512F && TARGET_AVX512VL \
    1759                 :            :    && rtx_equal_p (operands[2], operands[0]))
    1760                 :            : #define HAVE_vec_extract_hi_v8sf_maskm (TARGET_AVX512F && TARGET_AVX512VL \
    1761                 :            :    && rtx_equal_p (operands[2], operands[0]))
    1762                 :            : #define HAVE_vec_extract_hi_v8si_mask (TARGET_AVX512VL)
    1763                 :            : #define HAVE_vec_extract_hi_v8sf_mask (TARGET_AVX512VL)
    1764                 :            : #define HAVE_vec_extract_hi_v8si (TARGET_AVX)
    1765                 :            : #define HAVE_vec_extract_hi_v8sf (TARGET_AVX)
    1766                 :            : #define HAVE_vec_extract_lo_v32hi (TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    1767                 :            : #define HAVE_vec_extract_hi_v32hi (TARGET_AVX512F)
    1768                 :            : #define HAVE_vec_extract_lo_v16hi (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    1769                 :            : #define HAVE_vec_extract_hi_v16hi (TARGET_AVX)
    1770                 :            : #define HAVE_vec_extract_lo_v64qi (TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    1771                 :            : #define HAVE_vec_extract_hi_v64qi (TARGET_AVX512F)
    1772                 :            : #define HAVE_vec_extract_lo_v32qi (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    1773                 :            : #define HAVE_vec_extract_hi_v32qi (TARGET_AVX)
    1774                 :            : #define HAVE_avx512f_unpckhpd512_mask (TARGET_AVX512F)
    1775                 :            : #define HAVE_avx_unpckhpd256 (TARGET_AVX && 1)
    1776                 :            : #define HAVE_avx_unpckhpd256_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    1777                 :            : #define HAVE_avx512vl_unpckhpd128_mask (TARGET_AVX512VL)
    1778                 :            : #define HAVE_avx512vl_unpcklpd128_mask (TARGET_AVX512VL)
    1779                 :            : #define HAVE_avx512f_vmscalefv4sf (TARGET_AVX512F)
    1780                 :            : #define HAVE_avx512f_vmscalefv4sf_round (TARGET_AVX512F)
    1781                 :            : #define HAVE_avx512f_vmscalefv4sf_mask (TARGET_AVX512F)
    1782                 :            : #define HAVE_avx512f_vmscalefv4sf_mask_round (TARGET_AVX512F)
    1783                 :            : #define HAVE_avx512f_vmscalefv2df ((TARGET_AVX512F) && (TARGET_SSE2))
    1784                 :            : #define HAVE_avx512f_vmscalefv2df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1785                 :            : #define HAVE_avx512f_vmscalefv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1786                 :            : #define HAVE_avx512f_vmscalefv2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2))))
    1787                 :            : #define HAVE_avx512f_scalefv16sf (TARGET_AVX512F)
    1788                 :            : #define HAVE_avx512f_scalefv16sf_round (TARGET_AVX512F)
    1789                 :            : #define HAVE_avx512f_scalefv16sf_mask (TARGET_AVX512F)
    1790                 :            : #define HAVE_avx512f_scalefv16sf_mask_round (TARGET_AVX512F)
    1791                 :            : #define HAVE_avx512vl_scalefv8sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1792                 :            : #define HAVE_avx512vl_scalefv8sf_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1793                 :            : #define HAVE_avx512vl_scalefv8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1794                 :            : #define HAVE_avx512vl_scalefv8sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1795                 :            : #define HAVE_avx512vl_scalefv4sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1796                 :            : #define HAVE_avx512vl_scalefv4sf_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1797                 :            : #define HAVE_avx512vl_scalefv4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1798                 :            : #define HAVE_avx512vl_scalefv4sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1799                 :            : #define HAVE_avx512f_scalefv8df (TARGET_AVX512F)
    1800                 :            : #define HAVE_avx512f_scalefv8df_round (TARGET_AVX512F)
    1801                 :            : #define HAVE_avx512f_scalefv8df_mask (TARGET_AVX512F)
    1802                 :            : #define HAVE_avx512f_scalefv8df_mask_round (TARGET_AVX512F)
    1803                 :            : #define HAVE_avx512vl_scalefv4df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1804                 :            : #define HAVE_avx512vl_scalefv4df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1805                 :            : #define HAVE_avx512vl_scalefv4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1806                 :            : #define HAVE_avx512vl_scalefv4df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1807                 :            : #define HAVE_avx512vl_scalefv2df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1808                 :            : #define HAVE_avx512vl_scalefv2df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1809                 :            : #define HAVE_avx512vl_scalefv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1810                 :            : #define HAVE_avx512vl_scalefv2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1811                 :            : #define HAVE_avx512f_vternlogv16si (TARGET_AVX512F)
    1812                 :            : #define HAVE_avx512f_vternlogv16si_maskz_1 (TARGET_AVX512F)
    1813                 :            : #define HAVE_avx512vl_vternlogv8si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1814                 :            : #define HAVE_avx512vl_vternlogv8si_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1815                 :            : #define HAVE_avx512vl_vternlogv4si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1816                 :            : #define HAVE_avx512vl_vternlogv4si_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1817                 :            : #define HAVE_avx512f_vternlogv8di (TARGET_AVX512F)
    1818                 :            : #define HAVE_avx512f_vternlogv8di_maskz_1 (TARGET_AVX512F)
    1819                 :            : #define HAVE_avx512vl_vternlogv4di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1820                 :            : #define HAVE_avx512vl_vternlogv4di_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1821                 :            : #define HAVE_avx512vl_vternlogv2di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1822                 :            : #define HAVE_avx512vl_vternlogv2di_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1823                 :            : #define HAVE_avx512f_vternlogv16si_mask (TARGET_AVX512F)
    1824                 :            : #define HAVE_avx512vl_vternlogv8si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1825                 :            : #define HAVE_avx512vl_vternlogv4si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1826                 :            : #define HAVE_avx512f_vternlogv8di_mask (TARGET_AVX512F)
    1827                 :            : #define HAVE_avx512vl_vternlogv4di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1828                 :            : #define HAVE_avx512vl_vternlogv2di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1829                 :            : #define HAVE_avx512f_getexpv16sf (TARGET_AVX512F)
    1830                 :            : #define HAVE_avx512f_getexpv16sf_round (TARGET_AVX512F)
    1831                 :            : #define HAVE_avx512f_getexpv16sf_mask (TARGET_AVX512F)
    1832                 :            : #define HAVE_avx512f_getexpv16sf_mask_round (TARGET_AVX512F)
    1833                 :            : #define HAVE_avx512vl_getexpv8sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1834                 :            : #define HAVE_avx512vl_getexpv8sf_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1835                 :            : #define HAVE_avx512vl_getexpv8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1836                 :            : #define HAVE_avx512vl_getexpv8sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1837                 :            : #define HAVE_avx512vl_getexpv4sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1838                 :            : #define HAVE_avx512vl_getexpv4sf_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1839                 :            : #define HAVE_avx512vl_getexpv4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1840                 :            : #define HAVE_avx512vl_getexpv4sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1841                 :            : #define HAVE_avx512f_getexpv8df (TARGET_AVX512F)
    1842                 :            : #define HAVE_avx512f_getexpv8df_round (TARGET_AVX512F)
    1843                 :            : #define HAVE_avx512f_getexpv8df_mask (TARGET_AVX512F)
    1844                 :            : #define HAVE_avx512f_getexpv8df_mask_round (TARGET_AVX512F)
    1845                 :            : #define HAVE_avx512vl_getexpv4df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1846                 :            : #define HAVE_avx512vl_getexpv4df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1847                 :            : #define HAVE_avx512vl_getexpv4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1848                 :            : #define HAVE_avx512vl_getexpv4df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1849                 :            : #define HAVE_avx512vl_getexpv2df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1850                 :            : #define HAVE_avx512vl_getexpv2df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1851                 :            : #define HAVE_avx512vl_getexpv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1852                 :            : #define HAVE_avx512vl_getexpv2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1853                 :            : #define HAVE_avx512f_sgetexpv4sf (TARGET_AVX512F)
    1854                 :            : #define HAVE_avx512f_sgetexpv4sf_mask (TARGET_AVX512F)
    1855                 :            : #define HAVE_avx512f_sgetexpv4sf_round (TARGET_AVX512F)
    1856                 :            : #define HAVE_avx512f_sgetexpv4sf_mask_round (TARGET_AVX512F)
    1857                 :            : #define HAVE_avx512f_sgetexpv2df ((TARGET_AVX512F) && (TARGET_SSE2))
    1858                 :            : #define HAVE_avx512f_sgetexpv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1859                 :            : #define HAVE_avx512f_sgetexpv2df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1860                 :            : #define HAVE_avx512f_sgetexpv2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2))))
    1861                 :            : #define HAVE_avx512f_alignv16si_mask (TARGET_AVX512F)
    1862                 :            : #define HAVE_avx512vl_alignv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1863                 :            : #define HAVE_avx512vl_alignv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1864                 :            : #define HAVE_avx512f_alignv8di_mask (TARGET_AVX512F)
    1865                 :            : #define HAVE_avx512vl_alignv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1866                 :            : #define HAVE_avx512vl_alignv2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1867                 :            : #define HAVE_avx512f_fixupimmv16sf (TARGET_AVX512F)
    1868                 :            : #define HAVE_avx512f_fixupimmv16sf_round (TARGET_AVX512F)
    1869                 :            : #define HAVE_avx512f_fixupimmv16sf_maskz_1 (TARGET_AVX512F)
    1870                 :            : #define HAVE_avx512f_fixupimmv16sf_maskz_1_round (TARGET_AVX512F)
    1871                 :            : #define HAVE_avx512vl_fixupimmv8sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1872                 :            : #define HAVE_avx512vl_fixupimmv8sf_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1873                 :            : #define HAVE_avx512vl_fixupimmv8sf_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1874                 :            : #define HAVE_avx512vl_fixupimmv8sf_maskz_1_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1875                 :            : #define HAVE_avx512vl_fixupimmv4sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1876                 :            : #define HAVE_avx512vl_fixupimmv4sf_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1877                 :            : #define HAVE_avx512vl_fixupimmv4sf_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1878                 :            : #define HAVE_avx512vl_fixupimmv4sf_maskz_1_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1879                 :            : #define HAVE_avx512f_fixupimmv8df (TARGET_AVX512F)
    1880                 :            : #define HAVE_avx512f_fixupimmv8df_round (TARGET_AVX512F)
    1881                 :            : #define HAVE_avx512f_fixupimmv8df_maskz_1 (TARGET_AVX512F)
    1882                 :            : #define HAVE_avx512f_fixupimmv8df_maskz_1_round (TARGET_AVX512F)
    1883                 :            : #define HAVE_avx512vl_fixupimmv4df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1884                 :            : #define HAVE_avx512vl_fixupimmv4df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1885                 :            : #define HAVE_avx512vl_fixupimmv4df_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1886                 :            : #define HAVE_avx512vl_fixupimmv4df_maskz_1_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1887                 :            : #define HAVE_avx512vl_fixupimmv2df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1888                 :            : #define HAVE_avx512vl_fixupimmv2df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1889                 :            : #define HAVE_avx512vl_fixupimmv2df_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1890                 :            : #define HAVE_avx512vl_fixupimmv2df_maskz_1_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1891                 :            : #define HAVE_avx512f_fixupimmv16sf_mask (TARGET_AVX512F)
    1892                 :            : #define HAVE_avx512f_fixupimmv16sf_mask_round (TARGET_AVX512F)
    1893                 :            : #define HAVE_avx512vl_fixupimmv8sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1894                 :            : #define HAVE_avx512vl_fixupimmv8sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1895                 :            : #define HAVE_avx512vl_fixupimmv4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1896                 :            : #define HAVE_avx512vl_fixupimmv4sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1897                 :            : #define HAVE_avx512f_fixupimmv8df_mask (TARGET_AVX512F)
    1898                 :            : #define HAVE_avx512f_fixupimmv8df_mask_round (TARGET_AVX512F)
    1899                 :            : #define HAVE_avx512vl_fixupimmv4df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1900                 :            : #define HAVE_avx512vl_fixupimmv4df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1901                 :            : #define HAVE_avx512vl_fixupimmv2df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1902                 :            : #define HAVE_avx512vl_fixupimmv2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1903                 :            : #define HAVE_avx512f_sfixupimmv4sf (TARGET_AVX512F)
    1904                 :            : #define HAVE_avx512f_sfixupimmv4sf_round (TARGET_AVX512F)
    1905                 :            : #define HAVE_avx512f_sfixupimmv4sf_maskz_1 (TARGET_AVX512F)
    1906                 :            : #define HAVE_avx512f_sfixupimmv4sf_maskz_1_round (TARGET_AVX512F)
    1907                 :            : #define HAVE_avx512f_sfixupimmv2df ((TARGET_AVX512F) && (TARGET_SSE2))
    1908                 :            : #define HAVE_avx512f_sfixupimmv2df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1909                 :            : #define HAVE_avx512f_sfixupimmv2df_maskz_1 ((TARGET_AVX512F) && (TARGET_SSE2))
    1910                 :            : #define HAVE_avx512f_sfixupimmv2df_maskz_1_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1911                 :            : #define HAVE_avx512f_sfixupimmv4sf_mask (TARGET_AVX512F)
    1912                 :            : #define HAVE_avx512f_sfixupimmv4sf_mask_round (TARGET_AVX512F)
    1913                 :            : #define HAVE_avx512f_sfixupimmv2df_mask ((TARGET_AVX512F) && (TARGET_SSE2))
    1914                 :            : #define HAVE_avx512f_sfixupimmv2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1915                 :            : #define HAVE_avx512f_rndscalev16sf (TARGET_AVX512F)
    1916                 :            : #define HAVE_avx512f_rndscalev16sf_round (TARGET_AVX512F)
    1917                 :            : #define HAVE_avx512f_rndscalev16sf_mask (TARGET_AVX512F)
    1918                 :            : #define HAVE_avx512f_rndscalev16sf_mask_round (TARGET_AVX512F)
    1919                 :            : #define HAVE_avx512vl_rndscalev8sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1920                 :            : #define HAVE_avx512vl_rndscalev8sf_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1921                 :            : #define HAVE_avx512vl_rndscalev8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1922                 :            : #define HAVE_avx512vl_rndscalev8sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1923                 :            : #define HAVE_avx512vl_rndscalev4sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1924                 :            : #define HAVE_avx512vl_rndscalev4sf_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1925                 :            : #define HAVE_avx512vl_rndscalev4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1926                 :            : #define HAVE_avx512vl_rndscalev4sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1927                 :            : #define HAVE_avx512f_rndscalev8df (TARGET_AVX512F)
    1928                 :            : #define HAVE_avx512f_rndscalev8df_round (TARGET_AVX512F)
    1929                 :            : #define HAVE_avx512f_rndscalev8df_mask (TARGET_AVX512F)
    1930                 :            : #define HAVE_avx512f_rndscalev8df_mask_round (TARGET_AVX512F)
    1931                 :            : #define HAVE_avx512vl_rndscalev4df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1932                 :            : #define HAVE_avx512vl_rndscalev4df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1933                 :            : #define HAVE_avx512vl_rndscalev4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1934                 :            : #define HAVE_avx512vl_rndscalev4df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1935                 :            : #define HAVE_avx512vl_rndscalev2df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    1936                 :            : #define HAVE_avx512vl_rndscalev2df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1937                 :            : #define HAVE_avx512vl_rndscalev2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    1938                 :            : #define HAVE_avx512vl_rndscalev2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    1939                 :            : #define HAVE_avx512f_rndscalev4sf (TARGET_AVX512F)
    1940                 :            : #define HAVE_avx512f_rndscalev4sf_mask (TARGET_AVX512F)
    1941                 :            : #define HAVE_avx512f_rndscalev4sf_round (TARGET_AVX512F)
    1942                 :            : #define HAVE_avx512f_rndscalev4sf_mask_round (TARGET_AVX512F)
    1943                 :            : #define HAVE_avx512f_rndscalev2df ((TARGET_AVX512F) && (TARGET_SSE2))
    1944                 :            : #define HAVE_avx512f_rndscalev2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1945                 :            : #define HAVE_avx512f_rndscalev2df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    1946                 :            : #define HAVE_avx512f_rndscalev2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2))))
    1947                 :            : #define HAVE_avx512f_shufps512_1 (TARGET_AVX512F \
    1948                 :            :    && (INTVAL (operands[3]) == (INTVAL (operands[7]) - 4) \
    1949                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[8]) - 4) \
    1950                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[9]) - 4) \
    1951                 :            :        && INTVAL (operands[6]) == (INTVAL (operands[10]) - 4) \
    1952                 :            :        && INTVAL (operands[3]) == (INTVAL (operands[11]) - 8) \
    1953                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[12]) - 8) \
    1954                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[13]) - 8) \
    1955                 :            :        && INTVAL (operands[6]) == (INTVAL (operands[14]) - 8) \
    1956                 :            :        && INTVAL (operands[3]) == (INTVAL (operands[15]) - 12) \
    1957                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[16]) - 12) \
    1958                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[17]) - 12) \
    1959                 :            :        && INTVAL (operands[6]) == (INTVAL (operands[18]) - 12)))
    1960                 :            : #define HAVE_avx512f_shufps512_1_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    1961                 :            :    && (INTVAL (operands[3]) == (INTVAL (operands[7]) - 4) \
    1962                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[8]) - 4) \
    1963                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[9]) - 4) \
    1964                 :            :        && INTVAL (operands[6]) == (INTVAL (operands[10]) - 4) \
    1965                 :            :        && INTVAL (operands[3]) == (INTVAL (operands[11]) - 8) \
    1966                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[12]) - 8) \
    1967                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[13]) - 8) \
    1968                 :            :        && INTVAL (operands[6]) == (INTVAL (operands[14]) - 8) \
    1969                 :            :        && INTVAL (operands[3]) == (INTVAL (operands[15]) - 12) \
    1970                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[16]) - 12) \
    1971                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[17]) - 12) \
    1972                 :            :        && INTVAL (operands[6]) == (INTVAL (operands[18]) - 12))))
    1973                 :            : #define HAVE_avx512f_shufpd512_1 (TARGET_AVX512F)
    1974                 :            : #define HAVE_avx512f_shufpd512_1_mask (TARGET_AVX512F)
    1975                 :            : #define HAVE_avx_shufpd256_1 (TARGET_AVX && 1)
    1976                 :            : #define HAVE_avx_shufpd256_1_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    1977                 :            : #define HAVE_sse2_shufpd_v2df_mask (TARGET_AVX512VL)
    1978                 :            : #define HAVE_avx2_interleave_highv4di (TARGET_AVX2 && 1)
    1979                 :            : #define HAVE_avx2_interleave_highv4di_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    1980                 :            : #define HAVE_avx512f_interleave_highv8di_mask (TARGET_AVX512F)
    1981                 :            : #define HAVE_vec_interleave_highv2di (TARGET_SSE2 && 1)
    1982                 :            : #define HAVE_vec_interleave_highv2di_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    1983                 :            : #define HAVE_avx2_interleave_lowv4di (TARGET_AVX2 && 1)
    1984                 :            : #define HAVE_avx2_interleave_lowv4di_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    1985                 :            : #define HAVE_avx512f_interleave_lowv8di_mask (TARGET_AVX512F)
    1986                 :            : #define HAVE_vec_interleave_lowv2di (TARGET_SSE2 && 1)
    1987                 :            : #define HAVE_vec_interleave_lowv2di_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    1988                 :            : #define HAVE_sse2_shufpd_v2di (TARGET_SSE2)
    1989                 :            : #define HAVE_sse2_shufpd_v2df (TARGET_SSE2)
    1990                 :            : #define HAVE_sse2_storehpd (TARGET_SSE2 && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    1991                 :            : #define HAVE_sse2_storelpd (TARGET_SSE2 && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    1992                 :            : #define HAVE_sse2_loadhpd (TARGET_SSE2 && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    1993                 :            : #define HAVE_sse2_loadlpd (TARGET_SSE2 && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    1994                 :            : #define HAVE_sse2_movsd (TARGET_SSE2)
    1995                 :            : #define HAVE_vec_dupv2df (TARGET_SSE2 && 1)
    1996                 :            : #define HAVE_vec_dupv2df_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    1997                 :            : #define HAVE_vec_concatv2df (TARGET_SSE \
    1998                 :            :    && (!(MEM_P (operands[1]) && MEM_P (operands[2])) \
    1999                 :            :        || (TARGET_SSE3 && rtx_equal_p (operands[1], operands[2]))))
    2000                 :            : #define HAVE_vec_setv8df_0 ((TARGET_AVX) && (TARGET_AVX512F))
    2001                 :            : #define HAVE_vec_setv4df_0 (TARGET_AVX)
    2002                 :            : #define HAVE_avx512f_ss_truncatev16siv16qi2_mask (TARGET_AVX512F)
    2003                 :            : #define HAVE_avx512f_truncatev16siv16qi2_mask (TARGET_AVX512F)
    2004                 :            : #define HAVE_avx512f_us_truncatev16siv16qi2_mask (TARGET_AVX512F)
    2005                 :            : #define HAVE_avx512f_ss_truncatev16siv16hi2_mask (TARGET_AVX512F)
    2006                 :            : #define HAVE_avx512f_truncatev16siv16hi2_mask (TARGET_AVX512F)
    2007                 :            : #define HAVE_avx512f_us_truncatev16siv16hi2_mask (TARGET_AVX512F)
    2008                 :            : #define HAVE_avx512f_ss_truncatev8div8si2_mask (TARGET_AVX512F)
    2009                 :            : #define HAVE_avx512f_truncatev8div8si2_mask (TARGET_AVX512F)
    2010                 :            : #define HAVE_avx512f_us_truncatev8div8si2_mask (TARGET_AVX512F)
    2011                 :            : #define HAVE_avx512f_ss_truncatev8div8hi2_mask (TARGET_AVX512F)
    2012                 :            : #define HAVE_avx512f_truncatev8div8hi2_mask (TARGET_AVX512F)
    2013                 :            : #define HAVE_avx512f_us_truncatev8div8hi2_mask (TARGET_AVX512F)
    2014                 :            : #define HAVE_avx512bw_ss_truncatev32hiv32qi2 (TARGET_AVX512BW)
    2015                 :            : #define HAVE_avx512bw_truncatev32hiv32qi2 (TARGET_AVX512BW)
    2016                 :            : #define HAVE_avx512bw_us_truncatev32hiv32qi2 (TARGET_AVX512BW)
    2017                 :            : #define HAVE_avx512bw_ss_truncatev32hiv32qi2_mask (TARGET_AVX512BW)
    2018                 :            : #define HAVE_avx512bw_truncatev32hiv32qi2_mask (TARGET_AVX512BW)
    2019                 :            : #define HAVE_avx512bw_us_truncatev32hiv32qi2_mask (TARGET_AVX512BW)
    2020                 :            : #define HAVE_avx512vl_ss_truncatev4div4si2_mask (TARGET_AVX512VL)
    2021                 :            : #define HAVE_avx512vl_truncatev4div4si2_mask (TARGET_AVX512VL)
    2022                 :            : #define HAVE_avx512vl_us_truncatev4div4si2_mask (TARGET_AVX512VL)
    2023                 :            : #define HAVE_avx512vl_ss_truncatev8siv8hi2_mask (TARGET_AVX512VL)
    2024                 :            : #define HAVE_avx512vl_truncatev8siv8hi2_mask (TARGET_AVX512VL)
    2025                 :            : #define HAVE_avx512vl_us_truncatev8siv8hi2_mask (TARGET_AVX512VL)
    2026                 :            : #define HAVE_avx512vl_ss_truncatev16hiv16qi2_mask ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    2027                 :            : #define HAVE_avx512vl_truncatev16hiv16qi2_mask ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    2028                 :            : #define HAVE_avx512vl_us_truncatev16hiv16qi2_mask ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    2029                 :            : #define HAVE_avx512vl_ss_truncatev2div2qi2_mask (TARGET_AVX512VL)
    2030                 :            : #define HAVE_avx512vl_truncatev2div2qi2_mask (TARGET_AVX512VL)
    2031                 :            : #define HAVE_avx512vl_us_truncatev2div2qi2_mask (TARGET_AVX512VL)
    2032                 :            : #define HAVE_avx512vl_ss_truncatev2div2qi2_mask_store (TARGET_AVX512VL)
    2033                 :            : #define HAVE_avx512vl_truncatev2div2qi2_mask_store (TARGET_AVX512VL)
    2034                 :            : #define HAVE_avx512vl_us_truncatev2div2qi2_mask_store (TARGET_AVX512VL)
    2035                 :            : #define HAVE_avx512vl_ss_truncatev4siv4qi2_mask (TARGET_AVX512VL)
    2036                 :            : #define HAVE_avx512vl_truncatev4siv4qi2_mask (TARGET_AVX512VL)
    2037                 :            : #define HAVE_avx512vl_us_truncatev4siv4qi2_mask (TARGET_AVX512VL)
    2038                 :            : #define HAVE_avx512vl_ss_truncatev4div4qi2_mask (TARGET_AVX512VL)
    2039                 :            : #define HAVE_avx512vl_truncatev4div4qi2_mask (TARGET_AVX512VL)
    2040                 :            : #define HAVE_avx512vl_us_truncatev4div4qi2_mask (TARGET_AVX512VL)
    2041                 :            : #define HAVE_avx512vl_ss_truncatev4siv4qi2_mask_store (TARGET_AVX512VL)
    2042                 :            : #define HAVE_avx512vl_truncatev4siv4qi2_mask_store (TARGET_AVX512VL)
    2043                 :            : #define HAVE_avx512vl_us_truncatev4siv4qi2_mask_store (TARGET_AVX512VL)
    2044                 :            : #define HAVE_avx512vl_ss_truncatev4div4qi2_mask_store (TARGET_AVX512VL)
    2045                 :            : #define HAVE_avx512vl_truncatev4div4qi2_mask_store (TARGET_AVX512VL)
    2046                 :            : #define HAVE_avx512vl_us_truncatev4div4qi2_mask_store (TARGET_AVX512VL)
    2047                 :            : #define HAVE_avx512vl_ss_truncatev8hiv8qi2_mask ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    2048                 :            : #define HAVE_avx512vl_truncatev8hiv8qi2_mask ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    2049                 :            : #define HAVE_avx512vl_us_truncatev8hiv8qi2_mask ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    2050                 :            : #define HAVE_avx512vl_ss_truncatev8siv8qi2_mask (TARGET_AVX512VL)
    2051                 :            : #define HAVE_avx512vl_truncatev8siv8qi2_mask (TARGET_AVX512VL)
    2052                 :            : #define HAVE_avx512vl_us_truncatev8siv8qi2_mask (TARGET_AVX512VL)
    2053                 :            : #define HAVE_avx512vl_ss_truncatev8hiv8qi2_mask_store ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    2054                 :            : #define HAVE_avx512vl_truncatev8hiv8qi2_mask_store ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    2055                 :            : #define HAVE_avx512vl_us_truncatev8hiv8qi2_mask_store ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    2056                 :            : #define HAVE_avx512vl_ss_truncatev8siv8qi2_mask_store (TARGET_AVX512VL)
    2057                 :            : #define HAVE_avx512vl_truncatev8siv8qi2_mask_store (TARGET_AVX512VL)
    2058                 :            : #define HAVE_avx512vl_us_truncatev8siv8qi2_mask_store (TARGET_AVX512VL)
    2059                 :            : #define HAVE_avx512vl_ss_truncatev4siv4hi2_mask (TARGET_AVX512VL)
    2060                 :            : #define HAVE_avx512vl_truncatev4siv4hi2_mask (TARGET_AVX512VL)
    2061                 :            : #define HAVE_avx512vl_us_truncatev4siv4hi2_mask (TARGET_AVX512VL)
    2062                 :            : #define HAVE_avx512vl_ss_truncatev4div4hi2_mask (TARGET_AVX512VL)
    2063                 :            : #define HAVE_avx512vl_truncatev4div4hi2_mask (TARGET_AVX512VL)
    2064                 :            : #define HAVE_avx512vl_us_truncatev4div4hi2_mask (TARGET_AVX512VL)
    2065                 :            : #define HAVE_avx512vl_ss_truncatev4siv4hi2_mask_store (TARGET_AVX512VL)
    2066                 :            : #define HAVE_avx512vl_truncatev4siv4hi2_mask_store (TARGET_AVX512VL)
    2067                 :            : #define HAVE_avx512vl_us_truncatev4siv4hi2_mask_store (TARGET_AVX512VL)
    2068                 :            : #define HAVE_avx512vl_ss_truncatev4div4hi2_mask_store (TARGET_AVX512VL)
    2069                 :            : #define HAVE_avx512vl_truncatev4div4hi2_mask_store (TARGET_AVX512VL)
    2070                 :            : #define HAVE_avx512vl_us_truncatev4div4hi2_mask_store (TARGET_AVX512VL)
    2071                 :            : #define HAVE_avx512vl_ss_truncatev2div2hi2_mask (TARGET_AVX512VL)
    2072                 :            : #define HAVE_avx512vl_truncatev2div2hi2_mask (TARGET_AVX512VL)
    2073                 :            : #define HAVE_avx512vl_us_truncatev2div2hi2_mask (TARGET_AVX512VL)
    2074                 :            : #define HAVE_avx512vl_ss_truncatev2div2hi2_mask_store (TARGET_AVX512VL)
    2075                 :            : #define HAVE_avx512vl_truncatev2div2hi2_mask_store (TARGET_AVX512VL)
    2076                 :            : #define HAVE_avx512vl_us_truncatev2div2hi2_mask_store (TARGET_AVX512VL)
    2077                 :            : #define HAVE_avx512vl_ss_truncatev2div2si2_mask (TARGET_AVX512VL)
    2078                 :            : #define HAVE_avx512vl_truncatev2div2si2_mask (TARGET_AVX512VL)
    2079                 :            : #define HAVE_avx512vl_us_truncatev2div2si2_mask (TARGET_AVX512VL)
    2080                 :            : #define HAVE_avx512vl_ss_truncatev2div2si2_mask_store (TARGET_AVX512VL)
    2081                 :            : #define HAVE_avx512vl_truncatev2div2si2_mask_store (TARGET_AVX512VL)
    2082                 :            : #define HAVE_avx512vl_us_truncatev2div2si2_mask_store (TARGET_AVX512VL)
    2083                 :            : #define HAVE_avx512f_ss_truncatev8div16qi2_mask (TARGET_AVX512F)
    2084                 :            : #define HAVE_avx512f_truncatev8div16qi2_mask (TARGET_AVX512F)
    2085                 :            : #define HAVE_avx512f_us_truncatev8div16qi2_mask (TARGET_AVX512F)
    2086                 :            : #define HAVE_avx512f_ss_truncatev8div16qi2_mask_store (TARGET_AVX512F)
    2087                 :            : #define HAVE_avx512f_truncatev8div16qi2_mask_store (TARGET_AVX512F)
    2088                 :            : #define HAVE_avx512f_us_truncatev8div16qi2_mask_store (TARGET_AVX512F)
    2089                 :            : #define HAVE_avx512bw_pmaddwd512v32hi ((TARGET_AVX512BW && 1) && (TARGET_AVX512BW))
    2090                 :            : #define HAVE_avx512bw_pmaddwd512v32hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512BW)))
    2091                 :            : #define HAVE_avx512bw_pmaddwd512v16hi ((TARGET_AVX512BW && 1) && (TARGET_AVX2))
    2092                 :            : #define HAVE_avx512bw_pmaddwd512v16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX2)))
    2093                 :            : #define HAVE_avx512bw_pmaddwd512v8hi (TARGET_AVX512BW && 1)
    2094                 :            : #define HAVE_avx512bw_pmaddwd512v8hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW && (16 == 64 || TARGET_AVX512VL)))
    2095                 :            : #define HAVE_avx512dq_mulv8di3 ((TARGET_AVX512DQ && 1) && (TARGET_AVX512F))
    2096                 :            : #define HAVE_avx512dq_mulv8di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    2097                 :            : #define HAVE_avx512dq_mulv4di3 ((TARGET_AVX512DQ && 1) && (TARGET_AVX))
    2098                 :            : #define HAVE_avx512dq_mulv4di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX)))
    2099                 :            : #define HAVE_avx512dq_mulv2di3 (TARGET_AVX512DQ && 1)
    2100                 :            : #define HAVE_avx512dq_mulv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && (16 == 64 || TARGET_AVX512VL)))
    2101                 :            : #define HAVE_ashrv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512VL) && (TARGET_AVX512BW)))
    2102                 :            : #define HAVE_ashrv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512VL) && (TARGET_AVX512BW)))
    2103                 :            : #define HAVE_ashrv8si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2104                 :            : #define HAVE_ashrv4si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2105                 :            : #define HAVE_ashrv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2106                 :            : #define HAVE_ashrv16hi3 ((TARGET_SSE2) && (TARGET_AVX2))
    2107                 :            : #define HAVE_ashrv8hi3 (TARGET_SSE2)
    2108                 :            : #define HAVE_ashrv8si3 ((TARGET_SSE2) && (TARGET_AVX2))
    2109                 :            : #define HAVE_ashrv4si3 (TARGET_SSE2)
    2110                 :            : #define HAVE_ashrv32hi3 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2111                 :            : #define HAVE_ashrv32hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512BW)))
    2112                 :            : #define HAVE_ashrv4di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2113                 :            : #define HAVE_ashrv4di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2114                 :            : #define HAVE_ashrv16si3 (TARGET_AVX512F)
    2115                 :            : #define HAVE_ashrv16si3_mask (TARGET_AVX512F)
    2116                 :            : #define HAVE_ashrv8di3 (TARGET_AVX512F)
    2117                 :            : #define HAVE_ashrv8di3_mask (TARGET_AVX512F)
    2118                 :            : #define HAVE_ashlv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512VL) && (TARGET_AVX512BW)))
    2119                 :            : #define HAVE_lshrv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512VL) && (TARGET_AVX512BW)))
    2120                 :            : #define HAVE_ashlv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512VL) && (TARGET_AVX512BW)))
    2121                 :            : #define HAVE_lshrv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512VL) && (TARGET_AVX512BW)))
    2122                 :            : #define HAVE_ashlv8si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2123                 :            : #define HAVE_lshrv8si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2124                 :            : #define HAVE_ashlv4si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2125                 :            : #define HAVE_lshrv4si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2126                 :            : #define HAVE_ashlv4di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2127                 :            : #define HAVE_lshrv4di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2128                 :            : #define HAVE_ashlv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2129                 :            : #define HAVE_lshrv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2130                 :            : #define HAVE_ashlv16hi3 ((TARGET_SSE2) && (TARGET_AVX2))
    2131                 :            : #define HAVE_lshrv16hi3 ((TARGET_SSE2) && (TARGET_AVX2))
    2132                 :            : #define HAVE_ashlv8hi3 (TARGET_SSE2)
    2133                 :            : #define HAVE_lshrv8hi3 (TARGET_SSE2)
    2134                 :            : #define HAVE_ashlv8si3 ((TARGET_SSE2) && (TARGET_AVX2))
    2135                 :            : #define HAVE_lshrv8si3 ((TARGET_SSE2) && (TARGET_AVX2))
    2136                 :            : #define HAVE_ashlv4si3 (TARGET_SSE2)
    2137                 :            : #define HAVE_lshrv4si3 (TARGET_SSE2)
    2138                 :            : #define HAVE_ashlv4di3 ((TARGET_SSE2) && (TARGET_AVX2))
    2139                 :            : #define HAVE_lshrv4di3 ((TARGET_SSE2) && (TARGET_AVX2))
    2140                 :            : #define HAVE_ashlv2di3 (TARGET_SSE2)
    2141                 :            : #define HAVE_lshrv2di3 (TARGET_SSE2)
    2142                 :            : #define HAVE_ashlv32hi3 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2143                 :            : #define HAVE_ashlv32hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512BW)))
    2144                 :            : #define HAVE_lshrv32hi3 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2145                 :            : #define HAVE_lshrv32hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512BW)))
    2146                 :            : #define HAVE_ashlv16si3 (TARGET_AVX512F)
    2147                 :            : #define HAVE_ashlv16si3_mask (TARGET_AVX512F)
    2148                 :            : #define HAVE_lshrv16si3 (TARGET_AVX512F)
    2149                 :            : #define HAVE_lshrv16si3_mask (TARGET_AVX512F)
    2150                 :            : #define HAVE_ashlv8di3 (TARGET_AVX512F)
    2151                 :            : #define HAVE_ashlv8di3_mask (TARGET_AVX512F)
    2152                 :            : #define HAVE_lshrv8di3 (TARGET_AVX512F)
    2153                 :            : #define HAVE_lshrv8di3_mask (TARGET_AVX512F)
    2154                 :            : #define HAVE_avx512bw_ashlv4ti3 (TARGET_AVX512BW)
    2155                 :            : #define HAVE_avx512bw_lshrv4ti3 (TARGET_AVX512BW)
    2156                 :            : #define HAVE_avx512bw_ashlv2ti3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2157                 :            : #define HAVE_avx512bw_lshrv2ti3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2158                 :            : #define HAVE_avx512bw_ashlv1ti3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2159                 :            : #define HAVE_avx512bw_lshrv1ti3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2160                 :            : #define HAVE_avx2_ashlv2ti3 ((TARGET_SSE2) && (TARGET_AVX2))
    2161                 :            : #define HAVE_avx2_lshrv2ti3 ((TARGET_SSE2) && (TARGET_AVX2))
    2162                 :            : #define HAVE_sse2_ashlv1ti3 (TARGET_SSE2)
    2163                 :            : #define HAVE_sse2_lshrv1ti3 (TARGET_SSE2)
    2164                 :            : #define HAVE_avx512f_rolvv16si (TARGET_AVX512F)
    2165                 :            : #define HAVE_avx512f_rolvv16si_mask (TARGET_AVX512F)
    2166                 :            : #define HAVE_avx512f_rorvv16si (TARGET_AVX512F)
    2167                 :            : #define HAVE_avx512f_rorvv16si_mask (TARGET_AVX512F)
    2168                 :            : #define HAVE_avx512vl_rolvv8si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2169                 :            : #define HAVE_avx512vl_rolvv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2170                 :            : #define HAVE_avx512vl_rorvv8si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2171                 :            : #define HAVE_avx512vl_rorvv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2172                 :            : #define HAVE_avx512vl_rolvv4si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2173                 :            : #define HAVE_avx512vl_rolvv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2174                 :            : #define HAVE_avx512vl_rorvv4si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2175                 :            : #define HAVE_avx512vl_rorvv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2176                 :            : #define HAVE_avx512f_rolvv8di (TARGET_AVX512F)
    2177                 :            : #define HAVE_avx512f_rolvv8di_mask (TARGET_AVX512F)
    2178                 :            : #define HAVE_avx512f_rorvv8di (TARGET_AVX512F)
    2179                 :            : #define HAVE_avx512f_rorvv8di_mask (TARGET_AVX512F)
    2180                 :            : #define HAVE_avx512vl_rolvv4di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2181                 :            : #define HAVE_avx512vl_rolvv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2182                 :            : #define HAVE_avx512vl_rorvv4di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2183                 :            : #define HAVE_avx512vl_rorvv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2184                 :            : #define HAVE_avx512vl_rolvv2di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2185                 :            : #define HAVE_avx512vl_rolvv2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2186                 :            : #define HAVE_avx512vl_rorvv2di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2187                 :            : #define HAVE_avx512vl_rorvv2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2188                 :            : #define HAVE_avx512f_rolv16si (TARGET_AVX512F)
    2189                 :            : #define HAVE_avx512f_rolv16si_mask (TARGET_AVX512F)
    2190                 :            : #define HAVE_avx512f_rorv16si (TARGET_AVX512F)
    2191                 :            : #define HAVE_avx512f_rorv16si_mask (TARGET_AVX512F)
    2192                 :            : #define HAVE_avx512vl_rolv8si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2193                 :            : #define HAVE_avx512vl_rolv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2194                 :            : #define HAVE_avx512vl_rorv8si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2195                 :            : #define HAVE_avx512vl_rorv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2196                 :            : #define HAVE_avx512vl_rolv4si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2197                 :            : #define HAVE_avx512vl_rolv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2198                 :            : #define HAVE_avx512vl_rorv4si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2199                 :            : #define HAVE_avx512vl_rorv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2200                 :            : #define HAVE_avx512f_rolv8di (TARGET_AVX512F)
    2201                 :            : #define HAVE_avx512f_rolv8di_mask (TARGET_AVX512F)
    2202                 :            : #define HAVE_avx512f_rorv8di (TARGET_AVX512F)
    2203                 :            : #define HAVE_avx512f_rorv8di_mask (TARGET_AVX512F)
    2204                 :            : #define HAVE_avx512vl_rolv4di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2205                 :            : #define HAVE_avx512vl_rolv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2206                 :            : #define HAVE_avx512vl_rorv4di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2207                 :            : #define HAVE_avx512vl_rorv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2208                 :            : #define HAVE_avx512vl_rolv2di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2209                 :            : #define HAVE_avx512vl_rolv2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2210                 :            : #define HAVE_avx512vl_rorv2di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2211                 :            : #define HAVE_avx512vl_rorv2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2212                 :            : #define HAVE_smaxv64qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2213                 :            : #define HAVE_sminv64qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2214                 :            : #define HAVE_umaxv64qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2215                 :            : #define HAVE_uminv64qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2216                 :            : #define HAVE_smaxv16qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2217                 :            : #define HAVE_sminv16qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2218                 :            : #define HAVE_umaxv16qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2219                 :            : #define HAVE_uminv16qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2220                 :            : #define HAVE_smaxv32qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2221                 :            : #define HAVE_sminv32qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2222                 :            : #define HAVE_umaxv32qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2223                 :            : #define HAVE_uminv32qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2224                 :            : #define HAVE_smaxv32hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2225                 :            : #define HAVE_sminv32hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2226                 :            : #define HAVE_umaxv32hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2227                 :            : #define HAVE_uminv32hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2228                 :            : #define HAVE_smaxv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2229                 :            : #define HAVE_sminv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2230                 :            : #define HAVE_umaxv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2231                 :            : #define HAVE_uminv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2232                 :            : #define HAVE_smaxv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2233                 :            : #define HAVE_sminv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2234                 :            : #define HAVE_umaxv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2235                 :            : #define HAVE_uminv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2236                 :            : #define HAVE_avx512bw_eqv64qi3_1 (TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    2237                 :            : #define HAVE_avx512bw_eqv64qi3_mask_1 ((TARGET_AVX512F) && (TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))))
    2238                 :            : #define HAVE_avx512vl_eqv16qi3_1 ((TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL))
    2239                 :            : #define HAVE_avx512vl_eqv16qi3_mask_1 ((TARGET_AVX512F) && ((TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL)))
    2240                 :            : #define HAVE_avx512vl_eqv32qi3_1 ((TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL))
    2241                 :            : #define HAVE_avx512vl_eqv32qi3_mask_1 ((TARGET_AVX512F) && ((TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL)))
    2242                 :            : #define HAVE_avx512bw_eqv32hi3_1 (TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    2243                 :            : #define HAVE_avx512bw_eqv32hi3_mask_1 ((TARGET_AVX512F) && (TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))))
    2244                 :            : #define HAVE_avx512vl_eqv16hi3_1 ((TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL))
    2245                 :            : #define HAVE_avx512vl_eqv16hi3_mask_1 ((TARGET_AVX512F) && ((TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL)))
    2246                 :            : #define HAVE_avx512vl_eqv8hi3_1 ((TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL))
    2247                 :            : #define HAVE_avx512vl_eqv8hi3_mask_1 ((TARGET_AVX512F) && ((TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL)))
    2248                 :            : #define HAVE_avx512f_eqv16si3_1 (TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    2249                 :            : #define HAVE_avx512f_eqv16si3_mask_1 ((TARGET_AVX512F) && (TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))))
    2250                 :            : #define HAVE_avx512vl_eqv8si3_1 ((TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL))
    2251                 :            : #define HAVE_avx512vl_eqv8si3_mask_1 ((TARGET_AVX512F) && ((TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL)))
    2252                 :            : #define HAVE_avx512vl_eqv4si3_1 ((TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL))
    2253                 :            : #define HAVE_avx512vl_eqv4si3_mask_1 ((TARGET_AVX512F) && ((TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL)))
    2254                 :            : #define HAVE_avx512f_eqv8di3_1 (TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    2255                 :            : #define HAVE_avx512f_eqv8di3_mask_1 ((TARGET_AVX512F) && (TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))))
    2256                 :            : #define HAVE_avx512vl_eqv4di3_1 ((TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL))
    2257                 :            : #define HAVE_avx512vl_eqv4di3_mask_1 ((TARGET_AVX512F) && ((TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL)))
    2258                 :            : #define HAVE_avx512vl_eqv2di3_1 ((TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL))
    2259                 :            : #define HAVE_avx512vl_eqv2di3_mask_1 ((TARGET_AVX512F) && ((TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512VL)))
    2260                 :            : #define HAVE_sse4_2_gtv2di3 (TARGET_SSE4_2)
    2261                 :            : #define HAVE_avx2_gtv32qi3 (TARGET_AVX2)
    2262                 :            : #define HAVE_avx2_gtv16hi3 (TARGET_AVX2)
    2263                 :            : #define HAVE_avx2_gtv8si3 (TARGET_AVX2)
    2264                 :            : #define HAVE_avx2_gtv4di3 (TARGET_AVX2)
    2265                 :            : #define HAVE_avx512f_gtv16si3 (TARGET_AVX512F)
    2266                 :            : #define HAVE_avx512f_gtv16si3_mask (TARGET_AVX512F)
    2267                 :            : #define HAVE_avx512vl_gtv8si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2268                 :            : #define HAVE_avx512vl_gtv8si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2269                 :            : #define HAVE_avx512vl_gtv4si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2270                 :            : #define HAVE_avx512vl_gtv4si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2271                 :            : #define HAVE_avx512f_gtv8di3 (TARGET_AVX512F)
    2272                 :            : #define HAVE_avx512f_gtv8di3_mask (TARGET_AVX512F)
    2273                 :            : #define HAVE_avx512vl_gtv4di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2274                 :            : #define HAVE_avx512vl_gtv4di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2275                 :            : #define HAVE_avx512vl_gtv2di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2276                 :            : #define HAVE_avx512vl_gtv2di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2277                 :            : #define HAVE_avx512bw_gtv64qi3 (TARGET_AVX512BW)
    2278                 :            : #define HAVE_avx512bw_gtv64qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2279                 :            : #define HAVE_avx512vl_gtv16qi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2280                 :            : #define HAVE_avx512vl_gtv16qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2281                 :            : #define HAVE_avx512vl_gtv32qi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2282                 :            : #define HAVE_avx512vl_gtv32qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2283                 :            : #define HAVE_avx512bw_gtv32hi3 (TARGET_AVX512BW)
    2284                 :            : #define HAVE_avx512bw_gtv32hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2285                 :            : #define HAVE_avx512vl_gtv16hi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2286                 :            : #define HAVE_avx512vl_gtv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2287                 :            : #define HAVE_avx512vl_gtv8hi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2288                 :            : #define HAVE_avx512vl_gtv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2289                 :            : #define HAVE_sse2_gtv16qi3 (TARGET_SSE2 && !TARGET_XOP)
    2290                 :            : #define HAVE_sse2_gtv8hi3 (TARGET_SSE2 && !TARGET_XOP)
    2291                 :            : #define HAVE_sse2_gtv4si3 (TARGET_SSE2 && !TARGET_XOP)
    2292                 :            : #define HAVE_one_cmplv16si2_mask (TARGET_AVX512F)
    2293                 :            : #define HAVE_one_cmplv8di2_mask (TARGET_AVX512F)
    2294                 :            : #define HAVE_one_cmplv64qi2_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512BW)))
    2295                 :            : #define HAVE_one_cmplv32qi2_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX)))
    2296                 :            : #define HAVE_one_cmplv16qi2_mask (TARGET_AVX512F)
    2297                 :            : #define HAVE_one_cmplv32hi2_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512BW)))
    2298                 :            : #define HAVE_one_cmplv16hi2_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX)))
    2299                 :            : #define HAVE_one_cmplv8hi2_mask (TARGET_AVX512F)
    2300                 :            : #define HAVE_one_cmplv8si2_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX)))
    2301                 :            : #define HAVE_one_cmplv4si2_mask (TARGET_AVX512F)
    2302                 :            : #define HAVE_one_cmplv4di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX)))
    2303                 :            : #define HAVE_one_cmplv2di2_mask (TARGET_AVX512F)
    2304                 :            : #define HAVE_andv16si3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) \
    2305                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512F)))
    2306                 :            : #define HAVE_iorv16si3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) \
    2307                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512F)))
    2308                 :            : #define HAVE_xorv16si3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) \
    2309                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512F)))
    2310                 :            : #define HAVE_andv8si3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) \
    2311                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX)))
    2312                 :            : #define HAVE_iorv8si3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) \
    2313                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX)))
    2314                 :            : #define HAVE_xorv8si3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) \
    2315                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX)))
    2316                 :            : #define HAVE_andv4si3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) \
    2317                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))))
    2318                 :            : #define HAVE_iorv4si3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) \
    2319                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))))
    2320                 :            : #define HAVE_xorv4si3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) \
    2321                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))))
    2322                 :            : #define HAVE_andv8di3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) \
    2323                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512F)))
    2324                 :            : #define HAVE_iorv8di3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) \
    2325                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512F)))
    2326                 :            : #define HAVE_xorv8di3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) \
    2327                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX512F)))
    2328                 :            : #define HAVE_andv4di3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) \
    2329                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX)))
    2330                 :            : #define HAVE_iorv4di3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) \
    2331                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX)))
    2332                 :            : #define HAVE_xorv4di3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) \
    2333                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))) && (TARGET_AVX)))
    2334                 :            : #define HAVE_andv2di3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) \
    2335                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))))
    2336                 :            : #define HAVE_iorv2di3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) \
    2337                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))))
    2338                 :            : #define HAVE_xorv2di3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) \
    2339                 :            :    && !(MEM_P (operands[1]) && MEM_P (operands[2]))))
    2340                 :            : #define HAVE_avx512bw_testmv64qi3 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2341                 :            : #define HAVE_avx512bw_testmv64qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512BW)))
    2342                 :            : #define HAVE_avx512vl_testmv32qi3 ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW))
    2343                 :            : #define HAVE_avx512vl_testmv32qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW)))
    2344                 :            : #define HAVE_avx512vl_testmv16qi3 ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW))
    2345                 :            : #define HAVE_avx512vl_testmv16qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW)))
    2346                 :            : #define HAVE_avx512bw_testmv32hi3 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2347                 :            : #define HAVE_avx512bw_testmv32hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512BW)))
    2348                 :            : #define HAVE_avx512vl_testmv16hi3 ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW))
    2349                 :            : #define HAVE_avx512vl_testmv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW)))
    2350                 :            : #define HAVE_avx512vl_testmv8hi3 ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW))
    2351                 :            : #define HAVE_avx512vl_testmv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW)))
    2352                 :            : #define HAVE_avx512f_testmv16si3 (TARGET_AVX512F)
    2353                 :            : #define HAVE_avx512f_testmv16si3_mask (TARGET_AVX512F)
    2354                 :            : #define HAVE_avx512vl_testmv8si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2355                 :            : #define HAVE_avx512vl_testmv8si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2356                 :            : #define HAVE_avx512vl_testmv4si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2357                 :            : #define HAVE_avx512vl_testmv4si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2358                 :            : #define HAVE_avx512f_testmv8di3 (TARGET_AVX512F)
    2359                 :            : #define HAVE_avx512f_testmv8di3_mask (TARGET_AVX512F)
    2360                 :            : #define HAVE_avx512vl_testmv4di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2361                 :            : #define HAVE_avx512vl_testmv4di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2362                 :            : #define HAVE_avx512vl_testmv2di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2363                 :            : #define HAVE_avx512vl_testmv2di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2364                 :            : #define HAVE_avx512bw_testnmv64qi3 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2365                 :            : #define HAVE_avx512bw_testnmv64qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512BW)))
    2366                 :            : #define HAVE_avx512vl_testnmv32qi3 ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW))
    2367                 :            : #define HAVE_avx512vl_testnmv32qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW)))
    2368                 :            : #define HAVE_avx512vl_testnmv16qi3 ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW))
    2369                 :            : #define HAVE_avx512vl_testnmv16qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW)))
    2370                 :            : #define HAVE_avx512bw_testnmv32hi3 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2371                 :            : #define HAVE_avx512bw_testnmv32hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512BW)))
    2372                 :            : #define HAVE_avx512vl_testnmv16hi3 ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW))
    2373                 :            : #define HAVE_avx512vl_testnmv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW)))
    2374                 :            : #define HAVE_avx512vl_testnmv8hi3 ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW))
    2375                 :            : #define HAVE_avx512vl_testnmv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL && TARGET_AVX512BW)))
    2376                 :            : #define HAVE_avx512f_testnmv16si3 (TARGET_AVX512F)
    2377                 :            : #define HAVE_avx512f_testnmv16si3_mask (TARGET_AVX512F)
    2378                 :            : #define HAVE_avx512vl_testnmv8si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2379                 :            : #define HAVE_avx512vl_testnmv8si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2380                 :            : #define HAVE_avx512vl_testnmv4si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2381                 :            : #define HAVE_avx512vl_testnmv4si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2382                 :            : #define HAVE_avx512f_testnmv8di3 (TARGET_AVX512F)
    2383                 :            : #define HAVE_avx512f_testnmv8di3_mask (TARGET_AVX512F)
    2384                 :            : #define HAVE_avx512vl_testnmv4di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2385                 :            : #define HAVE_avx512vl_testnmv4di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2386                 :            : #define HAVE_avx512vl_testnmv2di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2387                 :            : #define HAVE_avx512vl_testnmv2di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    2388                 :            : #define HAVE_avx512bw_packsswb ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    2389                 :            : #define HAVE_avx512bw_packsswb_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    2390                 :            : #define HAVE_avx2_packsswb ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    2391                 :            : #define HAVE_avx2_packsswb_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    2392                 :            : #define HAVE_sse2_packsswb (TARGET_SSE2 && 1 && 1)
    2393                 :            : #define HAVE_sse2_packsswb_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    2394                 :            : #define HAVE_avx512bw_packssdw ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    2395                 :            : #define HAVE_avx512bw_packssdw_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    2396                 :            : #define HAVE_avx2_packssdw ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    2397                 :            : #define HAVE_avx2_packssdw_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    2398                 :            : #define HAVE_sse2_packssdw (TARGET_SSE2 && 1 && 1)
    2399                 :            : #define HAVE_sse2_packssdw_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    2400                 :            : #define HAVE_avx512bw_packuswb ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    2401                 :            : #define HAVE_avx512bw_packuswb_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    2402                 :            : #define HAVE_avx2_packuswb ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    2403                 :            : #define HAVE_avx2_packuswb_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    2404                 :            : #define HAVE_sse2_packuswb (TARGET_SSE2 && 1 && 1)
    2405                 :            : #define HAVE_sse2_packuswb_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    2406                 :            : #define HAVE_avx512bw_interleave_highv64qi (TARGET_AVX512BW)
    2407                 :            : #define HAVE_avx512bw_interleave_highv64qi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2408                 :            : #define HAVE_avx2_interleave_highv32qi (TARGET_AVX2 && 1)
    2409                 :            : #define HAVE_avx2_interleave_highv32qi_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2410                 :            : #define HAVE_vec_interleave_highv16qi (TARGET_SSE2 && 1)
    2411                 :            : #define HAVE_vec_interleave_highv16qi_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    2412                 :            : #define HAVE_avx512bw_interleave_lowv64qi (TARGET_AVX512BW)
    2413                 :            : #define HAVE_avx512bw_interleave_lowv64qi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2414                 :            : #define HAVE_avx2_interleave_lowv32qi (TARGET_AVX2 && 1 && 1)
    2415                 :            : #define HAVE_avx2_interleave_lowv32qi_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL && TARGET_AVX512BW))
    2416                 :            : #define HAVE_vec_interleave_lowv16qi (TARGET_SSE2 && 1 && 1)
    2417                 :            : #define HAVE_vec_interleave_lowv16qi_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL && TARGET_AVX512BW))
    2418                 :            : #define HAVE_avx512bw_interleave_highv32hi (TARGET_AVX512BW)
    2419                 :            : #define HAVE_avx512bw_interleave_highv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2420                 :            : #define HAVE_avx2_interleave_highv16hi (TARGET_AVX2 && 1 && 1)
    2421                 :            : #define HAVE_avx2_interleave_highv16hi_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL && TARGET_AVX512BW))
    2422                 :            : #define HAVE_vec_interleave_highv8hi (TARGET_SSE2 && 1 && 1)
    2423                 :            : #define HAVE_vec_interleave_highv8hi_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL && TARGET_AVX512BW))
    2424                 :            : #define HAVE_avx512bw_interleave_lowv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2425                 :            : #define HAVE_avx2_interleave_lowv16hi (TARGET_AVX2 && 1 && 1)
    2426                 :            : #define HAVE_avx2_interleave_lowv16hi_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL && TARGET_AVX512BW))
    2427                 :            : #define HAVE_vec_interleave_lowv8hi (TARGET_SSE2 && 1 && 1)
    2428                 :            : #define HAVE_vec_interleave_lowv8hi_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL && TARGET_AVX512BW))
    2429                 :            : #define HAVE_avx2_interleave_highv8si (TARGET_AVX2 && 1)
    2430                 :            : #define HAVE_avx2_interleave_highv8si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2431                 :            : #define HAVE_avx512f_interleave_highv16si_mask (TARGET_AVX512F)
    2432                 :            : #define HAVE_vec_interleave_highv4si (TARGET_SSE2 && 1)
    2433                 :            : #define HAVE_vec_interleave_highv4si_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    2434                 :            : #define HAVE_avx2_interleave_lowv8si (TARGET_AVX2 && 1)
    2435                 :            : #define HAVE_avx2_interleave_lowv8si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2436                 :            : #define HAVE_avx512f_interleave_lowv16si_mask (TARGET_AVX512F)
    2437                 :            : #define HAVE_vec_interleave_lowv4si (TARGET_SSE2 && 1)
    2438                 :            : #define HAVE_vec_interleave_lowv4si_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    2439                 :            : #define HAVE_sse4_1_pinsrb ((TARGET_SSE2 \
    2440                 :            :    && ((unsigned) exact_log2 (INTVAL (operands[3])) \
    2441                 :            :        < GET_MODE_NUNITS (V16QImode))) && (TARGET_SSE4_1))
    2442                 :            : #define HAVE_sse2_pinsrw (TARGET_SSE2 \
    2443                 :            :    && ((unsigned) exact_log2 (INTVAL (operands[3])) \
    2444                 :            :        < GET_MODE_NUNITS (V8HImode)))
    2445                 :            : #define HAVE_sse4_1_pinsrd ((TARGET_SSE2 \
    2446                 :            :    && ((unsigned) exact_log2 (INTVAL (operands[3])) \
    2447                 :            :        < GET_MODE_NUNITS (V4SImode))) && (TARGET_SSE4_1))
    2448                 :            : #define HAVE_sse4_1_pinsrq ((TARGET_SSE2 \
    2449                 :            :    && ((unsigned) exact_log2 (INTVAL (operands[3])) \
    2450                 :            :        < GET_MODE_NUNITS (V2DImode))) && (TARGET_SSE4_1 && TARGET_64BIT))
    2451                 :            : #define HAVE_avx512dq_vinsertf64x2_1_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ)))
    2452                 :            : #define HAVE_avx512dq_vinserti64x2_1_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ)))
    2453                 :            : #define HAVE_avx512f_vinsertf32x4_1_mask (TARGET_AVX512F)
    2454                 :            : #define HAVE_avx512f_vinserti32x4_1_mask (TARGET_AVX512F)
    2455                 :            : #define HAVE_vec_set_lo_v16sf (TARGET_AVX512DQ)
    2456                 :            : #define HAVE_vec_set_lo_v16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    2457                 :            : #define HAVE_vec_set_lo_v16si (TARGET_AVX512DQ)
    2458                 :            : #define HAVE_vec_set_lo_v16si_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    2459                 :            : #define HAVE_vec_set_hi_v16sf (TARGET_AVX512DQ)
    2460                 :            : #define HAVE_vec_set_hi_v16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    2461                 :            : #define HAVE_vec_set_hi_v16si (TARGET_AVX512DQ)
    2462                 :            : #define HAVE_vec_set_hi_v16si_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    2463                 :            : #define HAVE_vec_set_lo_v8df (TARGET_AVX512F)
    2464                 :            : #define HAVE_vec_set_lo_v8df_mask (TARGET_AVX512F)
    2465                 :            : #define HAVE_vec_set_lo_v8di (TARGET_AVX512F)
    2466                 :            : #define HAVE_vec_set_lo_v8di_mask (TARGET_AVX512F)
    2467                 :            : #define HAVE_vec_set_hi_v8df (TARGET_AVX512F)
    2468                 :            : #define HAVE_vec_set_hi_v8df_mask (TARGET_AVX512F)
    2469                 :            : #define HAVE_vec_set_hi_v8di (TARGET_AVX512F)
    2470                 :            : #define HAVE_vec_set_hi_v8di_mask (TARGET_AVX512F)
    2471                 :            : #define HAVE_avx512dq_shuf_i64x2_1_mask ((TARGET_AVX512F) && (TARGET_AVX512VL \
    2472                 :            :    && (INTVAL (operands[3]) & 1) == 0 \
    2473                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2474                 :            :    && (INTVAL (operands[5]) & 1) == 0 \
    2475                 :            :    && INTVAL (operands[5]) == INTVAL (operands[6]) - 1))
    2476                 :            : #define HAVE_avx512dq_shuf_f64x2_1_mask ((TARGET_AVX512F) && (TARGET_AVX512VL \
    2477                 :            :    && (INTVAL (operands[3]) & 1) == 0 \
    2478                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2479                 :            :    && (INTVAL (operands[5]) & 1) == 0 \
    2480                 :            :    && INTVAL (operands[5]) == INTVAL (operands[6]) - 1))
    2481                 :            : #define HAVE_avx512f_shuf_f64x2_1 (TARGET_AVX512F \
    2482                 :            :    && (INTVAL (operands[3]) & 1) == 0 \
    2483                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2484                 :            :    && (INTVAL (operands[5]) & 1) == 0 \
    2485                 :            :    && INTVAL (operands[5]) == INTVAL (operands[6]) - 1 \
    2486                 :            :    && (INTVAL (operands[7]) & 1) == 0 \
    2487                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2488                 :            :    && (INTVAL (operands[9]) & 1) == 0 \
    2489                 :            :    && INTVAL (operands[9]) == INTVAL (operands[10]) - 1)
    2490                 :            : #define HAVE_avx512f_shuf_f64x2_1_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    2491                 :            :    && (INTVAL (operands[3]) & 1) == 0 \
    2492                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2493                 :            :    && (INTVAL (operands[5]) & 1) == 0 \
    2494                 :            :    && INTVAL (operands[5]) == INTVAL (operands[6]) - 1 \
    2495                 :            :    && (INTVAL (operands[7]) & 1) == 0 \
    2496                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2497                 :            :    && (INTVAL (operands[9]) & 1) == 0 \
    2498                 :            :    && INTVAL (operands[9]) == INTVAL (operands[10]) - 1))
    2499                 :            : #define HAVE_avx512f_shuf_i64x2_1 (TARGET_AVX512F \
    2500                 :            :    && (INTVAL (operands[3]) & 1) == 0 \
    2501                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2502                 :            :    && (INTVAL (operands[5]) & 1) == 0 \
    2503                 :            :    && INTVAL (operands[5]) == INTVAL (operands[6]) - 1 \
    2504                 :            :    && (INTVAL (operands[7]) & 1) == 0 \
    2505                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2506                 :            :    && (INTVAL (operands[9]) & 1) == 0 \
    2507                 :            :    && INTVAL (operands[9]) == INTVAL (operands[10]) - 1)
    2508                 :            : #define HAVE_avx512f_shuf_i64x2_1_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    2509                 :            :    && (INTVAL (operands[3]) & 1) == 0 \
    2510                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2511                 :            :    && (INTVAL (operands[5]) & 1) == 0 \
    2512                 :            :    && INTVAL (operands[5]) == INTVAL (operands[6]) - 1 \
    2513                 :            :    && (INTVAL (operands[7]) & 1) == 0 \
    2514                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2515                 :            :    && (INTVAL (operands[9]) & 1) == 0 \
    2516                 :            :    && INTVAL (operands[9]) == INTVAL (operands[10]) - 1))
    2517                 :            : #define HAVE_avx512vl_shuf_i32x4_1 (TARGET_AVX512VL \
    2518                 :            :    && (INTVAL (operands[3]) & 3) == 0 \
    2519                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2520                 :            :    && INTVAL (operands[3]) == INTVAL (operands[5]) - 2 \
    2521                 :            :    && INTVAL (operands[3]) == INTVAL (operands[6]) - 3 \
    2522                 :            :    && (INTVAL (operands[7]) & 3) == 0 \
    2523                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2524                 :            :    && INTVAL (operands[7]) == INTVAL (operands[9]) - 2 \
    2525                 :            :    && INTVAL (operands[7]) == INTVAL (operands[10]) - 3)
    2526                 :            : #define HAVE_avx512vl_shuf_i32x4_1_mask ((TARGET_AVX512F) && (TARGET_AVX512VL \
    2527                 :            :    && (INTVAL (operands[3]) & 3) == 0 \
    2528                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2529                 :            :    && INTVAL (operands[3]) == INTVAL (operands[5]) - 2 \
    2530                 :            :    && INTVAL (operands[3]) == INTVAL (operands[6]) - 3 \
    2531                 :            :    && (INTVAL (operands[7]) & 3) == 0 \
    2532                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2533                 :            :    && INTVAL (operands[7]) == INTVAL (operands[9]) - 2 \
    2534                 :            :    && INTVAL (operands[7]) == INTVAL (operands[10]) - 3))
    2535                 :            : #define HAVE_avx512vl_shuf_f32x4_1 (TARGET_AVX512VL \
    2536                 :            :    && (INTVAL (operands[3]) & 3) == 0 \
    2537                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2538                 :            :    && INTVAL (operands[3]) == INTVAL (operands[5]) - 2 \
    2539                 :            :    && INTVAL (operands[3]) == INTVAL (operands[6]) - 3 \
    2540                 :            :    && (INTVAL (operands[7]) & 3) == 0 \
    2541                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2542                 :            :    && INTVAL (operands[7]) == INTVAL (operands[9]) - 2 \
    2543                 :            :    && INTVAL (operands[7]) == INTVAL (operands[10]) - 3)
    2544                 :            : #define HAVE_avx512vl_shuf_f32x4_1_mask ((TARGET_AVX512F) && (TARGET_AVX512VL \
    2545                 :            :    && (INTVAL (operands[3]) & 3) == 0 \
    2546                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2547                 :            :    && INTVAL (operands[3]) == INTVAL (operands[5]) - 2 \
    2548                 :            :    && INTVAL (operands[3]) == INTVAL (operands[6]) - 3 \
    2549                 :            :    && (INTVAL (operands[7]) & 3) == 0 \
    2550                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2551                 :            :    && INTVAL (operands[7]) == INTVAL (operands[9]) - 2 \
    2552                 :            :    && INTVAL (operands[7]) == INTVAL (operands[10]) - 3))
    2553                 :            : #define HAVE_avx512f_shuf_f32x4_1 (TARGET_AVX512F \
    2554                 :            :    && (INTVAL (operands[3]) & 3) == 0 \
    2555                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2556                 :            :    && INTVAL (operands[3]) == INTVAL (operands[5]) - 2 \
    2557                 :            :    && INTVAL (operands[3]) == INTVAL (operands[6]) - 3 \
    2558                 :            :    && (INTVAL (operands[7]) & 3) == 0 \
    2559                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2560                 :            :    && INTVAL (operands[7]) == INTVAL (operands[9]) - 2 \
    2561                 :            :    && INTVAL (operands[7]) == INTVAL (operands[10]) - 3 \
    2562                 :            :    && (INTVAL (operands[11]) & 3) == 0 \
    2563                 :            :    && INTVAL (operands[11]) == INTVAL (operands[12]) - 1 \
    2564                 :            :    && INTVAL (operands[11]) == INTVAL (operands[13]) - 2 \
    2565                 :            :    && INTVAL (operands[11]) == INTVAL (operands[14]) - 3 \
    2566                 :            :    && (INTVAL (operands[15]) & 3) == 0 \
    2567                 :            :    && INTVAL (operands[15]) == INTVAL (operands[16]) - 1 \
    2568                 :            :    && INTVAL (operands[15]) == INTVAL (operands[17]) - 2 \
    2569                 :            :    && INTVAL (operands[15]) == INTVAL (operands[18]) - 3)
    2570                 :            : #define HAVE_avx512f_shuf_f32x4_1_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    2571                 :            :    && (INTVAL (operands[3]) & 3) == 0 \
    2572                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2573                 :            :    && INTVAL (operands[3]) == INTVAL (operands[5]) - 2 \
    2574                 :            :    && INTVAL (operands[3]) == INTVAL (operands[6]) - 3 \
    2575                 :            :    && (INTVAL (operands[7]) & 3) == 0 \
    2576                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2577                 :            :    && INTVAL (operands[7]) == INTVAL (operands[9]) - 2 \
    2578                 :            :    && INTVAL (operands[7]) == INTVAL (operands[10]) - 3 \
    2579                 :            :    && (INTVAL (operands[11]) & 3) == 0 \
    2580                 :            :    && INTVAL (operands[11]) == INTVAL (operands[12]) - 1 \
    2581                 :            :    && INTVAL (operands[11]) == INTVAL (operands[13]) - 2 \
    2582                 :            :    && INTVAL (operands[11]) == INTVAL (operands[14]) - 3 \
    2583                 :            :    && (INTVAL (operands[15]) & 3) == 0 \
    2584                 :            :    && INTVAL (operands[15]) == INTVAL (operands[16]) - 1 \
    2585                 :            :    && INTVAL (operands[15]) == INTVAL (operands[17]) - 2 \
    2586                 :            :    && INTVAL (operands[15]) == INTVAL (operands[18]) - 3))
    2587                 :            : #define HAVE_avx512f_shuf_i32x4_1 (TARGET_AVX512F \
    2588                 :            :    && (INTVAL (operands[3]) & 3) == 0 \
    2589                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2590                 :            :    && INTVAL (operands[3]) == INTVAL (operands[5]) - 2 \
    2591                 :            :    && INTVAL (operands[3]) == INTVAL (operands[6]) - 3 \
    2592                 :            :    && (INTVAL (operands[7]) & 3) == 0 \
    2593                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2594                 :            :    && INTVAL (operands[7]) == INTVAL (operands[9]) - 2 \
    2595                 :            :    && INTVAL (operands[7]) == INTVAL (operands[10]) - 3 \
    2596                 :            :    && (INTVAL (operands[11]) & 3) == 0 \
    2597                 :            :    && INTVAL (operands[11]) == INTVAL (operands[12]) - 1 \
    2598                 :            :    && INTVAL (operands[11]) == INTVAL (operands[13]) - 2 \
    2599                 :            :    && INTVAL (operands[11]) == INTVAL (operands[14]) - 3 \
    2600                 :            :    && (INTVAL (operands[15]) & 3) == 0 \
    2601                 :            :    && INTVAL (operands[15]) == INTVAL (operands[16]) - 1 \
    2602                 :            :    && INTVAL (operands[15]) == INTVAL (operands[17]) - 2 \
    2603                 :            :    && INTVAL (operands[15]) == INTVAL (operands[18]) - 3)
    2604                 :            : #define HAVE_avx512f_shuf_i32x4_1_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    2605                 :            :    && (INTVAL (operands[3]) & 3) == 0 \
    2606                 :            :    && INTVAL (operands[3]) == INTVAL (operands[4]) - 1 \
    2607                 :            :    && INTVAL (operands[3]) == INTVAL (operands[5]) - 2 \
    2608                 :            :    && INTVAL (operands[3]) == INTVAL (operands[6]) - 3 \
    2609                 :            :    && (INTVAL (operands[7]) & 3) == 0 \
    2610                 :            :    && INTVAL (operands[7]) == INTVAL (operands[8]) - 1 \
    2611                 :            :    && INTVAL (operands[7]) == INTVAL (operands[9]) - 2 \
    2612                 :            :    && INTVAL (operands[7]) == INTVAL (operands[10]) - 3 \
    2613                 :            :    && (INTVAL (operands[11]) & 3) == 0 \
    2614                 :            :    && INTVAL (operands[11]) == INTVAL (operands[12]) - 1 \
    2615                 :            :    && INTVAL (operands[11]) == INTVAL (operands[13]) - 2 \
    2616                 :            :    && INTVAL (operands[11]) == INTVAL (operands[14]) - 3 \
    2617                 :            :    && (INTVAL (operands[15]) & 3) == 0 \
    2618                 :            :    && INTVAL (operands[15]) == INTVAL (operands[16]) - 1 \
    2619                 :            :    && INTVAL (operands[15]) == INTVAL (operands[17]) - 2 \
    2620                 :            :    && INTVAL (operands[15]) == INTVAL (operands[18]) - 3))
    2621                 :            : #define HAVE_avx512f_pshufd_1 (TARGET_AVX512F \
    2622                 :            :    && INTVAL (operands[2]) + 4 == INTVAL (operands[6]) \
    2623                 :            :    && INTVAL (operands[3]) + 4 == INTVAL (operands[7]) \
    2624                 :            :    && INTVAL (operands[4]) + 4 == INTVAL (operands[8]) \
    2625                 :            :    && INTVAL (operands[5]) + 4 == INTVAL (operands[9]) \
    2626                 :            :    && INTVAL (operands[2]) + 8 == INTVAL (operands[10]) \
    2627                 :            :    && INTVAL (operands[3]) + 8 == INTVAL (operands[11]) \
    2628                 :            :    && INTVAL (operands[4]) + 8 == INTVAL (operands[12]) \
    2629                 :            :    && INTVAL (operands[5]) + 8 == INTVAL (operands[13]) \
    2630                 :            :    && INTVAL (operands[2]) + 12 == INTVAL (operands[14]) \
    2631                 :            :    && INTVAL (operands[3]) + 12 == INTVAL (operands[15]) \
    2632                 :            :    && INTVAL (operands[4]) + 12 == INTVAL (operands[16]) \
    2633                 :            :    && INTVAL (operands[5]) + 12 == INTVAL (operands[17]))
    2634                 :            : #define HAVE_avx512f_pshufd_1_mask ((TARGET_AVX512F) && (TARGET_AVX512F \
    2635                 :            :    && INTVAL (operands[2]) + 4 == INTVAL (operands[6]) \
    2636                 :            :    && INTVAL (operands[3]) + 4 == INTVAL (operands[7]) \
    2637                 :            :    && INTVAL (operands[4]) + 4 == INTVAL (operands[8]) \
    2638                 :            :    && INTVAL (operands[5]) + 4 == INTVAL (operands[9]) \
    2639                 :            :    && INTVAL (operands[2]) + 8 == INTVAL (operands[10]) \
    2640                 :            :    && INTVAL (operands[3]) + 8 == INTVAL (operands[11]) \
    2641                 :            :    && INTVAL (operands[4]) + 8 == INTVAL (operands[12]) \
    2642                 :            :    && INTVAL (operands[5]) + 8 == INTVAL (operands[13]) \
    2643                 :            :    && INTVAL (operands[2]) + 12 == INTVAL (operands[14]) \
    2644                 :            :    && INTVAL (operands[3]) + 12 == INTVAL (operands[15]) \
    2645                 :            :    && INTVAL (operands[4]) + 12 == INTVAL (operands[16]) \
    2646                 :            :    && INTVAL (operands[5]) + 12 == INTVAL (operands[17])))
    2647                 :            : #define HAVE_avx2_pshufd_1 (TARGET_AVX2 \
    2648                 :            :    && 1 \
    2649                 :            :    && INTVAL (operands[2]) + 4 == INTVAL (operands[6]) \
    2650                 :            :    && INTVAL (operands[3]) + 4 == INTVAL (operands[7]) \
    2651                 :            :    && INTVAL (operands[4]) + 4 == INTVAL (operands[8]) \
    2652                 :            :    && INTVAL (operands[5]) + 4 == INTVAL (operands[9]))
    2653                 :            : #define HAVE_avx2_pshufd_1_mask ((TARGET_AVX512F) && (TARGET_AVX2 \
    2654                 :            :    && TARGET_AVX512VL \
    2655                 :            :    && INTVAL (operands[2]) + 4 == INTVAL (operands[6]) \
    2656                 :            :    && INTVAL (operands[3]) + 4 == INTVAL (operands[7]) \
    2657                 :            :    && INTVAL (operands[4]) + 4 == INTVAL (operands[8]) \
    2658                 :            :    && INTVAL (operands[5]) + 4 == INTVAL (operands[9])))
    2659                 :            : #define HAVE_sse2_pshufd_1 (TARGET_SSE2 && 1)
    2660                 :            : #define HAVE_sse2_pshufd_1_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    2661                 :            : #define HAVE_avx512bw_pshuflwv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2662                 :            : #define HAVE_avx2_pshuflw_1 (TARGET_AVX2 \
    2663                 :            :    && 1 && 1 \
    2664                 :            :    && INTVAL (operands[2]) + 8 == INTVAL (operands[6]) \
    2665                 :            :    && INTVAL (operands[3]) + 8 == INTVAL (operands[7]) \
    2666                 :            :    && INTVAL (operands[4]) + 8 == INTVAL (operands[8]) \
    2667                 :            :    && INTVAL (operands[5]) + 8 == INTVAL (operands[9]))
    2668                 :            : #define HAVE_avx2_pshuflw_1_mask ((TARGET_AVX512F) && (TARGET_AVX2 \
    2669                 :            :    && TARGET_AVX512BW && TARGET_AVX512VL \
    2670                 :            :    && INTVAL (operands[2]) + 8 == INTVAL (operands[6]) \
    2671                 :            :    && INTVAL (operands[3]) + 8 == INTVAL (operands[7]) \
    2672                 :            :    && INTVAL (operands[4]) + 8 == INTVAL (operands[8]) \
    2673                 :            :    && INTVAL (operands[5]) + 8 == INTVAL (operands[9])))
    2674                 :            : #define HAVE_sse2_pshuflw_1 (TARGET_SSE2 && 1 && 1)
    2675                 :            : #define HAVE_sse2_pshuflw_1_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512BW && TARGET_AVX512VL))
    2676                 :            : #define HAVE_avx512bw_pshufhwv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2677                 :            : #define HAVE_avx2_pshufhw_1 (TARGET_AVX2 \
    2678                 :            :    && 1 && 1 \
    2679                 :            :    && INTVAL (operands[2]) + 8 == INTVAL (operands[6]) \
    2680                 :            :    && INTVAL (operands[3]) + 8 == INTVAL (operands[7]) \
    2681                 :            :    && INTVAL (operands[4]) + 8 == INTVAL (operands[8]) \
    2682                 :            :    && INTVAL (operands[5]) + 8 == INTVAL (operands[9]))
    2683                 :            : #define HAVE_avx2_pshufhw_1_mask ((TARGET_AVX512F) && (TARGET_AVX2 \
    2684                 :            :    && TARGET_AVX512BW && TARGET_AVX512VL \
    2685                 :            :    && INTVAL (operands[2]) + 8 == INTVAL (operands[6]) \
    2686                 :            :    && INTVAL (operands[3]) + 8 == INTVAL (operands[7]) \
    2687                 :            :    && INTVAL (operands[4]) + 8 == INTVAL (operands[8]) \
    2688                 :            :    && INTVAL (operands[5]) + 8 == INTVAL (operands[9])))
    2689                 :            : #define HAVE_sse2_pshufhw_1 (TARGET_SSE2 && 1 && 1)
    2690                 :            : #define HAVE_sse2_pshufhw_1_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512BW && TARGET_AVX512VL))
    2691                 :            : #define HAVE_sse2_loadld (TARGET_SSE)
    2692                 :            : #define HAVE_vec_concatv2di (TARGET_SSE)
    2693                 :            : #define HAVE_vec_setv8di_0 ((TARGET_AVX) && (TARGET_AVX512F))
    2694                 :            : #define HAVE_vec_setv4di_0 (TARGET_AVX)
    2695                 :            : #define HAVE_avx512f_psadbw ((TARGET_SSE2) && (TARGET_AVX512BW))
    2696                 :            : #define HAVE_avx2_psadbw ((TARGET_SSE2) && (TARGET_AVX2))
    2697                 :            : #define HAVE_sse2_psadbw (TARGET_SSE2)
    2698                 :            : #define HAVE_avx_movmskps256 ((TARGET_SSE) && (TARGET_AVX))
    2699                 :            : #define HAVE_sse_movmskps (TARGET_SSE)
    2700                 :            : #define HAVE_avx_movmskpd256 ((TARGET_SSE) && (TARGET_AVX))
    2701                 :            : #define HAVE_sse2_movmskpd ((TARGET_SSE) && (TARGET_SSE2))
    2702                 :            : #define HAVE_avx2_pmovmskb ((TARGET_SSE2) && (TARGET_AVX2))
    2703                 :            : #define HAVE_sse2_pmovmskb (TARGET_SSE2)
    2704                 :            : #define HAVE_sse_ldmxcsr (TARGET_SSE)
    2705                 :            : #define HAVE_sse_stmxcsr (TARGET_SSE)
    2706                 :            : #define HAVE_sse2_clflush (TARGET_SSE2)
    2707                 :            : #define HAVE_sse3_mwait (TARGET_SSE3)
    2708                 :            : #define HAVE_sse3_monitor_si ((TARGET_SSE3) && (Pmode == SImode))
    2709                 :            : #define HAVE_sse3_monitor_di ((TARGET_SSE3) && (Pmode == DImode))
    2710                 :            : #define HAVE_avx2_phaddwv16hi3 (TARGET_AVX2)
    2711                 :            : #define HAVE_avx2_phaddswv16hi3 (TARGET_AVX2)
    2712                 :            : #define HAVE_avx2_phsubwv16hi3 (TARGET_AVX2)
    2713                 :            : #define HAVE_avx2_phsubswv16hi3 (TARGET_AVX2)
    2714                 :            : #define HAVE_ssse3_phaddwv8hi3 (TARGET_SSSE3)
    2715                 :            : #define HAVE_ssse3_phaddswv8hi3 (TARGET_SSSE3)
    2716                 :            : #define HAVE_ssse3_phsubwv8hi3 (TARGET_SSSE3)
    2717                 :            : #define HAVE_ssse3_phsubswv8hi3 (TARGET_SSSE3)
    2718                 :            : #define HAVE_ssse3_phaddwv4hi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2719                 :            : #define HAVE_ssse3_phaddswv4hi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2720                 :            : #define HAVE_ssse3_phsubwv4hi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2721                 :            : #define HAVE_ssse3_phsubswv4hi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2722                 :            : #define HAVE_avx2_phadddv8si3 (TARGET_AVX2)
    2723                 :            : #define HAVE_avx2_phsubdv8si3 (TARGET_AVX2)
    2724                 :            : #define HAVE_ssse3_phadddv4si3 (TARGET_SSSE3)
    2725                 :            : #define HAVE_ssse3_phsubdv4si3 (TARGET_SSSE3)
    2726                 :            : #define HAVE_ssse3_phadddv2si3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2727                 :            : #define HAVE_ssse3_phsubdv2si3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2728                 :            : #define HAVE_avx2_pmaddubsw256 (TARGET_AVX2)
    2729                 :            : #define HAVE_avx512bw_pmaddubsw512v8hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2730                 :            : #define HAVE_avx512bw_pmaddubsw512v8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2731                 :            : #define HAVE_avx512bw_pmaddubsw512v16hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2732                 :            : #define HAVE_avx512bw_pmaddubsw512v16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    2733                 :            : #define HAVE_avx512bw_pmaddubsw512v32hi (TARGET_AVX512BW)
    2734                 :            : #define HAVE_avx512bw_pmaddubsw512v32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2735                 :            : #define HAVE_avx512bw_umulhrswv32hi3 (TARGET_AVX512BW)
    2736                 :            : #define HAVE_avx512bw_umulhrswv32hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2737                 :            : #define HAVE_ssse3_pmaddubsw128 (TARGET_SSSE3)
    2738                 :            : #define HAVE_ssse3_pmaddubsw ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2739                 :            : #define HAVE_avx512bw_pshufbv64qi3 ((TARGET_SSSE3 && 1 && 1) && (TARGET_AVX512BW))
    2740                 :            : #define HAVE_avx512bw_pshufbv64qi3_mask ((TARGET_AVX512F) && ((TARGET_SSSE3 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    2741                 :            : #define HAVE_avx2_pshufbv32qi3 ((TARGET_SSSE3 && 1 && 1) && (TARGET_AVX2))
    2742                 :            : #define HAVE_avx2_pshufbv32qi3_mask ((TARGET_AVX512F) && ((TARGET_SSSE3 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    2743                 :            : #define HAVE_ssse3_pshufbv16qi3 (TARGET_SSSE3 && 1 && 1)
    2744                 :            : #define HAVE_ssse3_pshufbv16qi3_mask ((TARGET_AVX512F) && (TARGET_SSSE3 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    2745                 :            : #define HAVE_ssse3_pshufbv8qi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2746                 :            : #define HAVE_avx2_psignv32qi3 ((TARGET_SSSE3) && (TARGET_AVX2))
    2747                 :            : #define HAVE_ssse3_psignv16qi3 (TARGET_SSSE3)
    2748                 :            : #define HAVE_avx2_psignv16hi3 ((TARGET_SSSE3) && (TARGET_AVX2))
    2749                 :            : #define HAVE_ssse3_psignv8hi3 (TARGET_SSSE3)
    2750                 :            : #define HAVE_avx2_psignv8si3 ((TARGET_SSSE3) && (TARGET_AVX2))
    2751                 :            : #define HAVE_ssse3_psignv4si3 (TARGET_SSSE3)
    2752                 :            : #define HAVE_ssse3_psignv8qi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2753                 :            : #define HAVE_ssse3_psignv4hi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2754                 :            : #define HAVE_ssse3_psignv2si3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2755                 :            : #define HAVE_avx512bw_palignrv64qi_mask ((TARGET_AVX512BW && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512BW))
    2756                 :            : #define HAVE_avx2_palignrv32qi_mask ((TARGET_AVX512BW && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX2))
    2757                 :            : #define HAVE_ssse3_palignrv16qi_mask (TARGET_AVX512BW && (16 == 64 || TARGET_AVX512VL))
    2758                 :            : #define HAVE_avx512bw_palignrv4ti ((TARGET_SSSE3) && (TARGET_AVX512BW))
    2759                 :            : #define HAVE_avx2_palignrv2ti ((TARGET_SSSE3) && (TARGET_AVX2))
    2760                 :            : #define HAVE_ssse3_palignrti (TARGET_SSSE3)
    2761                 :            : #define HAVE_ssse3_palignrdi ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2762                 :            : #define HAVE_absv16si2_mask (TARGET_AVX512F)
    2763                 :            : #define HAVE_absv8si2_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2764                 :            : #define HAVE_absv4si2_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2765                 :            : #define HAVE_absv8di2_mask (TARGET_AVX512F)
    2766                 :            : #define HAVE_absv4di2_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2767                 :            : #define HAVE_absv2di2_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    2768                 :            : #define HAVE_absv64qi2_mask (TARGET_AVX512BW)
    2769                 :            : #define HAVE_absv16qi2_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2770                 :            : #define HAVE_absv32qi2_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2771                 :            : #define HAVE_absv32hi2_mask (TARGET_AVX512BW)
    2772                 :            : #define HAVE_absv16hi2_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2773                 :            : #define HAVE_absv8hi2_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    2774                 :            : #define HAVE_ssse3_absv8qi2 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2775                 :            : #define HAVE_ssse3_absv4hi2 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2776                 :            : #define HAVE_ssse3_absv2si2 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3)
    2777                 :            : #define HAVE_absv8qi2 (TARGET_MMX_WITH_SSE && TARGET_SSSE3)
    2778                 :            : #define HAVE_absv4hi2 (TARGET_MMX_WITH_SSE && TARGET_SSSE3)
    2779                 :            : #define HAVE_absv2si2 (TARGET_MMX_WITH_SSE && TARGET_SSSE3)
    2780                 :            : #define HAVE_sse4a_movntsf (TARGET_SSE4A)
    2781                 :            : #define HAVE_sse4a_movntdf (TARGET_SSE4A)
    2782                 :            : #define HAVE_sse4a_vmmovntv4sf (TARGET_SSE4A)
    2783                 :            : #define HAVE_sse4a_vmmovntv2df ((TARGET_SSE4A) && (TARGET_SSE2))
    2784                 :            : #define HAVE_sse4a_extrqi (TARGET_SSE4A)
    2785                 :            : #define HAVE_sse4a_extrq (TARGET_SSE4A)
    2786                 :            : #define HAVE_sse4a_insertqi (TARGET_SSE4A)
    2787                 :            : #define HAVE_sse4a_insertq (TARGET_SSE4A)
    2788                 :            : #define HAVE_avx_blendps256 ((TARGET_SSE4_1) && (TARGET_AVX))
    2789                 :            : #define HAVE_sse4_1_blendps (TARGET_SSE4_1)
    2790                 :            : #define HAVE_avx_blendpd256 ((TARGET_SSE4_1) && (TARGET_AVX))
    2791                 :            : #define HAVE_sse4_1_blendpd ((TARGET_SSE4_1) && (TARGET_SSE2))
    2792                 :            : #define HAVE_avx_blendvps256 ((TARGET_SSE4_1) && (TARGET_AVX))
    2793                 :            : #define HAVE_sse4_1_blendvps (TARGET_SSE4_1)
    2794                 :            : #define HAVE_avx_blendvpd256 ((TARGET_SSE4_1) && (TARGET_AVX))
    2795                 :            : #define HAVE_sse4_1_blendvpd ((TARGET_SSE4_1) && (TARGET_SSE2))
    2796                 :            : #define HAVE_sse4_1_blendvss (TARGET_SSE4_1)
    2797                 :            : #define HAVE_sse4_1_blendvsd (TARGET_SSE4_1)
    2798                 :            : #define HAVE_avx_dpps256 ((TARGET_SSE4_1) && (TARGET_AVX))
    2799                 :            : #define HAVE_sse4_1_dpps (TARGET_SSE4_1)
    2800                 :            : #define HAVE_avx_dppd256 ((TARGET_SSE4_1) && (TARGET_AVX))
    2801                 :            : #define HAVE_sse4_1_dppd ((TARGET_SSE4_1) && (TARGET_SSE2))
    2802                 :            : #define HAVE_avx512f_movntdqa ((TARGET_SSE4_1) && (TARGET_AVX512F))
    2803                 :            : #define HAVE_avx2_movntdqa ((TARGET_SSE4_1) && (TARGET_AVX2))
    2804                 :            : #define HAVE_sse4_1_movntdqa (TARGET_SSE4_1)
    2805                 :            : #define HAVE_avx2_mpsadbw ((TARGET_SSE4_1) && (TARGET_AVX2))
    2806                 :            : #define HAVE_sse4_1_mpsadbw (TARGET_SSE4_1)
    2807                 :            : #define HAVE_avx512bw_packusdw ((TARGET_SSE4_1 && 1 && 1) && (TARGET_AVX512BW))
    2808                 :            : #define HAVE_avx512bw_packusdw_mask ((TARGET_AVX512F) && ((TARGET_SSE4_1 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    2809                 :            : #define HAVE_avx2_packusdw ((TARGET_SSE4_1 && 1 && 1) && (TARGET_AVX2))
    2810                 :            : #define HAVE_avx2_packusdw_mask ((TARGET_AVX512F) && ((TARGET_SSE4_1 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    2811                 :            : #define HAVE_sse4_1_packusdw (TARGET_SSE4_1 && 1 && 1)
    2812                 :            : #define HAVE_sse4_1_packusdw_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    2813                 :            : #define HAVE_avx2_pblendvb ((TARGET_SSE4_1) && (TARGET_AVX2))
    2814                 :            : #define HAVE_sse4_1_pblendvb (TARGET_SSE4_1)
    2815                 :            : #define HAVE_sse4_1_pblendw (TARGET_SSE4_1)
    2816                 :            : #define HAVE_avx2_pblenddv8si (TARGET_AVX2)
    2817                 :            : #define HAVE_avx2_pblenddv4si (TARGET_AVX2)
    2818                 :            : #define HAVE_sse4_1_phminposuw (TARGET_SSE4_1)
    2819                 :            : #define HAVE_avx2_sign_extendv16qiv16hi2 (TARGET_AVX2 && 1 && 1)
    2820                 :            : #define HAVE_avx2_sign_extendv16qiv16hi2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512BW && TARGET_AVX512VL))
    2821                 :            : #define HAVE_avx2_zero_extendv16qiv16hi2 (TARGET_AVX2 && 1 && 1)
    2822                 :            : #define HAVE_avx2_zero_extendv16qiv16hi2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512BW && TARGET_AVX512VL))
    2823                 :            : #define HAVE_avx512bw_sign_extendv32qiv32hi2 (TARGET_AVX512BW)
    2824                 :            : #define HAVE_avx512bw_sign_extendv32qiv32hi2_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2825                 :            : #define HAVE_avx512bw_zero_extendv32qiv32hi2 (TARGET_AVX512BW)
    2826                 :            : #define HAVE_avx512bw_zero_extendv32qiv32hi2_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    2827                 :            : #define HAVE_sse4_1_sign_extendv8qiv8hi2 (TARGET_SSE4_1 && 1 && 1)
    2828                 :            : #define HAVE_sse4_1_sign_extendv8qiv8hi2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512BW && TARGET_AVX512VL))
    2829                 :            : #define HAVE_sse4_1_zero_extendv8qiv8hi2 (TARGET_SSE4_1 && 1 && 1)
    2830                 :            : #define HAVE_sse4_1_zero_extendv8qiv8hi2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512BW && TARGET_AVX512VL))
    2831                 :            : #define HAVE_avx512f_sign_extendv16qiv16si2_mask (TARGET_AVX512F)
    2832                 :            : #define HAVE_avx512f_zero_extendv16qiv16si2_mask (TARGET_AVX512F)
    2833                 :            : #define HAVE_avx2_sign_extendv8qiv8si2 (TARGET_AVX2 && 1)
    2834                 :            : #define HAVE_avx2_sign_extendv8qiv8si2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2835                 :            : #define HAVE_avx2_zero_extendv8qiv8si2 (TARGET_AVX2 && 1)
    2836                 :            : #define HAVE_avx2_zero_extendv8qiv8si2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2837                 :            : #define HAVE_sse4_1_sign_extendv4qiv4si2 (TARGET_SSE4_1 && 1)
    2838                 :            : #define HAVE_sse4_1_sign_extendv4qiv4si2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    2839                 :            : #define HAVE_sse4_1_zero_extendv4qiv4si2 (TARGET_SSE4_1 && 1)
    2840                 :            : #define HAVE_sse4_1_zero_extendv4qiv4si2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    2841                 :            : #define HAVE_avx512f_sign_extendv16hiv16si2 (TARGET_AVX512F)
    2842                 :            : #define HAVE_avx512f_sign_extendv16hiv16si2_mask (TARGET_AVX512F)
    2843                 :            : #define HAVE_avx512f_zero_extendv16hiv16si2 (TARGET_AVX512F)
    2844                 :            : #define HAVE_avx512f_zero_extendv16hiv16si2_mask (TARGET_AVX512F)
    2845                 :            : #define HAVE_avx2_sign_extendv8hiv8si2 (TARGET_AVX2 && 1)
    2846                 :            : #define HAVE_avx2_sign_extendv8hiv8si2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2847                 :            : #define HAVE_avx2_zero_extendv8hiv8si2 (TARGET_AVX2 && 1)
    2848                 :            : #define HAVE_avx2_zero_extendv8hiv8si2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2849                 :            : #define HAVE_sse4_1_sign_extendv4hiv4si2 (TARGET_SSE4_1 && 1)
    2850                 :            : #define HAVE_sse4_1_sign_extendv4hiv4si2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    2851                 :            : #define HAVE_sse4_1_zero_extendv4hiv4si2 (TARGET_SSE4_1 && 1)
    2852                 :            : #define HAVE_sse4_1_zero_extendv4hiv4si2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    2853                 :            : #define HAVE_avx512f_sign_extendv8qiv8di2 (TARGET_AVX512F)
    2854                 :            : #define HAVE_avx512f_sign_extendv8qiv8di2_mask (TARGET_AVX512F)
    2855                 :            : #define HAVE_avx512f_zero_extendv8qiv8di2 (TARGET_AVX512F)
    2856                 :            : #define HAVE_avx512f_zero_extendv8qiv8di2_mask (TARGET_AVX512F)
    2857                 :            : #define HAVE_avx2_sign_extendv4qiv4di2 (TARGET_AVX2 && 1)
    2858                 :            : #define HAVE_avx2_sign_extendv4qiv4di2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2859                 :            : #define HAVE_avx2_zero_extendv4qiv4di2 (TARGET_AVX2 && 1)
    2860                 :            : #define HAVE_avx2_zero_extendv4qiv4di2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2861                 :            : #define HAVE_sse4_1_sign_extendv2qiv2di2 (TARGET_SSE4_1 && 1)
    2862                 :            : #define HAVE_sse4_1_sign_extendv2qiv2di2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    2863                 :            : #define HAVE_sse4_1_zero_extendv2qiv2di2 (TARGET_SSE4_1 && 1)
    2864                 :            : #define HAVE_sse4_1_zero_extendv2qiv2di2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    2865                 :            : #define HAVE_avx512f_sign_extendv8hiv8di2 (TARGET_AVX512F)
    2866                 :            : #define HAVE_avx512f_sign_extendv8hiv8di2_mask (TARGET_AVX512F)
    2867                 :            : #define HAVE_avx512f_zero_extendv8hiv8di2 (TARGET_AVX512F)
    2868                 :            : #define HAVE_avx512f_zero_extendv8hiv8di2_mask (TARGET_AVX512F)
    2869                 :            : #define HAVE_avx2_sign_extendv4hiv4di2 (TARGET_AVX2 && 1)
    2870                 :            : #define HAVE_avx2_sign_extendv4hiv4di2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2871                 :            : #define HAVE_avx2_zero_extendv4hiv4di2 (TARGET_AVX2 && 1)
    2872                 :            : #define HAVE_avx2_zero_extendv4hiv4di2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2873                 :            : #define HAVE_sse4_1_sign_extendv2hiv2di2 (TARGET_SSE4_1 && 1)
    2874                 :            : #define HAVE_sse4_1_sign_extendv2hiv2di2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    2875                 :            : #define HAVE_sse4_1_zero_extendv2hiv2di2 (TARGET_SSE4_1 && 1)
    2876                 :            : #define HAVE_sse4_1_zero_extendv2hiv2di2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    2877                 :            : #define HAVE_avx512f_sign_extendv8siv8di2 (TARGET_AVX512F)
    2878                 :            : #define HAVE_avx512f_sign_extendv8siv8di2_mask (TARGET_AVX512F)
    2879                 :            : #define HAVE_avx512f_zero_extendv8siv8di2 (TARGET_AVX512F)
    2880                 :            : #define HAVE_avx512f_zero_extendv8siv8di2_mask (TARGET_AVX512F)
    2881                 :            : #define HAVE_avx2_sign_extendv4siv4di2 (TARGET_AVX2 && 1)
    2882                 :            : #define HAVE_avx2_sign_extendv4siv4di2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2883                 :            : #define HAVE_avx2_zero_extendv4siv4di2 (TARGET_AVX2 && 1)
    2884                 :            : #define HAVE_avx2_zero_extendv4siv4di2_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    2885                 :            : #define HAVE_sse4_1_sign_extendv2siv2di2 (TARGET_SSE4_1 && 1)
    2886                 :            : #define HAVE_sse4_1_sign_extendv2siv2di2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    2887                 :            : #define HAVE_sse4_1_zero_extendv2siv2di2 (TARGET_SSE4_1 && 1)
    2888                 :            : #define HAVE_sse4_1_zero_extendv2siv2di2_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    2889                 :            : #define HAVE_avx_vtestps256 (TARGET_AVX)
    2890                 :            : #define HAVE_avx_vtestps (TARGET_AVX)
    2891                 :            : #define HAVE_avx_vtestpd256 (TARGET_AVX)
    2892                 :            : #define HAVE_avx_vtestpd ((TARGET_AVX) && (TARGET_SSE2))
    2893                 :            : #define HAVE_sse4_1_ptestv16qi (TARGET_SSE4_1)
    2894                 :            : #define HAVE_sse4_1_ptestv8hi (TARGET_SSE4_1)
    2895                 :            : #define HAVE_sse4_1_ptestv4si (TARGET_SSE4_1)
    2896                 :            : #define HAVE_sse4_1_ptestv2di (TARGET_SSE4_1)
    2897                 :            : #define HAVE_sse4_1_ptestv4sf (TARGET_SSE4_1)
    2898                 :            : #define HAVE_sse4_1_ptestv2df (TARGET_SSE4_1)
    2899                 :            : #define HAVE_avx_ptestv32qi ((TARGET_SSE4_1) && (TARGET_AVX))
    2900                 :            : #define HAVE_avx_ptestv16hi ((TARGET_SSE4_1) && (TARGET_AVX))
    2901                 :            : #define HAVE_avx_ptestv8si ((TARGET_SSE4_1) && (TARGET_AVX))
    2902                 :            : #define HAVE_avx_ptestv4di ((TARGET_SSE4_1) && (TARGET_AVX))
    2903                 :            : #define HAVE_avx_ptestv8sf ((TARGET_SSE4_1) && (TARGET_AVX))
    2904                 :            : #define HAVE_avx_ptestv4df ((TARGET_SSE4_1) && (TARGET_AVX))
    2905                 :            : #define HAVE_ptesttf2 (TARGET_SSE4_1)
    2906                 :            : #define HAVE_avx_roundps256 ((TARGET_SSE4_1) && (TARGET_AVX))
    2907                 :            : #define HAVE_sse4_1_roundps (TARGET_SSE4_1)
    2908                 :            : #define HAVE_avx_roundpd256 ((TARGET_SSE4_1) && (TARGET_AVX))
    2909                 :            : #define HAVE_sse4_1_roundpd ((TARGET_SSE4_1) && (TARGET_SSE2))
    2910                 :            : #define HAVE_sse4_1_roundss (TARGET_SSE4_1)
    2911                 :            : #define HAVE_sse4_1_roundsd ((TARGET_SSE4_1) && (TARGET_SSE2))
    2912                 :            : #define HAVE_sse4_2_pcmpestr (TARGET_SSE4_2 \
    2913                 :            :    && ix86_pre_reload_split ())
    2914                 :            : #define HAVE_sse4_2_pcmpestri (TARGET_SSE4_2)
    2915                 :            : #define HAVE_sse4_2_pcmpestrm (TARGET_SSE4_2)
    2916                 :            : #define HAVE_sse4_2_pcmpestr_cconly (TARGET_SSE4_2)
    2917                 :            : #define HAVE_sse4_2_pcmpistr (TARGET_SSE4_2 \
    2918                 :            :    && ix86_pre_reload_split ())
    2919                 :            : #define HAVE_sse4_2_pcmpistri (TARGET_SSE4_2)
    2920                 :            : #define HAVE_sse4_2_pcmpistrm (TARGET_SSE4_2)
    2921                 :            : #define HAVE_sse4_2_pcmpistr_cconly (TARGET_SSE4_2)
    2922                 :            : #define HAVE_avx512er_exp2v16sf (TARGET_AVX512ER)
    2923                 :            : #define HAVE_avx512er_exp2v16sf_round ((TARGET_AVX512F) && (TARGET_AVX512ER))
    2924                 :            : #define HAVE_avx512er_exp2v16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512ER))
    2925                 :            : #define HAVE_avx512er_exp2v16sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512ER)))
    2926                 :            : #define HAVE_avx512er_exp2v8df (TARGET_AVX512ER)
    2927                 :            : #define HAVE_avx512er_exp2v8df_round ((TARGET_AVX512F) && (TARGET_AVX512ER))
    2928                 :            : #define HAVE_avx512er_exp2v8df_mask ((TARGET_AVX512F) && (TARGET_AVX512ER))
    2929                 :            : #define HAVE_avx512er_exp2v8df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512ER)))
    2930                 :            : #define HAVE_avx512er_rcp28v16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512ER))
    2931                 :            : #define HAVE_avx512er_rcp28v16sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512ER)))
    2932                 :            : #define HAVE_avx512er_rcp28v8df_mask ((TARGET_AVX512F) && (TARGET_AVX512ER))
    2933                 :            : #define HAVE_avx512er_rcp28v8df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512ER)))
    2934                 :            : #define HAVE_avx512er_vmrcp28v4sf (TARGET_AVX512ER)
    2935                 :            : #define HAVE_avx512er_vmrcp28v4sf_round ((TARGET_AVX512F) && (TARGET_AVX512ER))
    2936                 :            : #define HAVE_avx512er_vmrcp28v2df ((TARGET_AVX512ER) && (TARGET_SSE2))
    2937                 :            : #define HAVE_avx512er_vmrcp28v2df_round ((TARGET_AVX512F) && ((TARGET_AVX512ER) && (TARGET_SSE2)))
    2938                 :            : #define HAVE_avx512er_rsqrt28v16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512ER))
    2939                 :            : #define HAVE_avx512er_rsqrt28v16sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512ER)))
    2940                 :            : #define HAVE_avx512er_rsqrt28v8df_mask ((TARGET_AVX512F) && (TARGET_AVX512ER))
    2941                 :            : #define HAVE_avx512er_rsqrt28v8df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512ER)))
    2942                 :            : #define HAVE_avx512er_vmrsqrt28v4sf (TARGET_AVX512ER)
    2943                 :            : #define HAVE_avx512er_vmrsqrt28v4sf_round ((TARGET_AVX512F) && (TARGET_AVX512ER))
    2944                 :            : #define HAVE_avx512er_vmrsqrt28v2df ((TARGET_AVX512ER) && (TARGET_SSE2))
    2945                 :            : #define HAVE_avx512er_vmrsqrt28v2df_round ((TARGET_AVX512F) && ((TARGET_AVX512ER) && (TARGET_SSE2)))
    2946                 :            : #define HAVE_xop_pmacsww (TARGET_XOP)
    2947                 :            : #define HAVE_xop_pmacssww (TARGET_XOP)
    2948                 :            : #define HAVE_xop_pmacsdd (TARGET_XOP)
    2949                 :            : #define HAVE_xop_pmacssdd (TARGET_XOP)
    2950                 :            : #define HAVE_xop_pmacsdql (TARGET_XOP)
    2951                 :            : #define HAVE_xop_pmacssdql (TARGET_XOP)
    2952                 :            : #define HAVE_xop_pmacsdqh (TARGET_XOP)
    2953                 :            : #define HAVE_xop_pmacssdqh (TARGET_XOP)
    2954                 :            : #define HAVE_xop_pmacswd (TARGET_XOP)
    2955                 :            : #define HAVE_xop_pmacsswd (TARGET_XOP)
    2956                 :            : #define HAVE_xop_pmadcswd (TARGET_XOP)
    2957                 :            : #define HAVE_xop_pmadcsswd (TARGET_XOP)
    2958                 :            : #define HAVE_xop_pcmov_v32qi256 (TARGET_XOP)
    2959                 :            : #define HAVE_xop_pcmov_v16qi (TARGET_XOP)
    2960                 :            : #define HAVE_xop_pcmov_v16hi256 (TARGET_XOP)
    2961                 :            : #define HAVE_xop_pcmov_v8hi (TARGET_XOP)
    2962                 :            : #define HAVE_xop_pcmov_v8si256 (TARGET_XOP)
    2963                 :            : #define HAVE_xop_pcmov_v4si (TARGET_XOP)
    2964                 :            : #define HAVE_xop_pcmov_v4di256 (TARGET_XOP)
    2965                 :            : #define HAVE_xop_pcmov_v2di (TARGET_XOP)
    2966                 :            : #define HAVE_xop_pcmov_v8sf256 (TARGET_XOP)
    2967                 :            : #define HAVE_xop_pcmov_v4sf (TARGET_XOP)
    2968                 :            : #define HAVE_xop_pcmov_v4df256 (TARGET_XOP)
    2969                 :            : #define HAVE_xop_pcmov_v2df (TARGET_XOP)
    2970                 :            : #define HAVE_xop_phaddbw (TARGET_XOP)
    2971                 :            : #define HAVE_xop_phaddubw (TARGET_XOP)
    2972                 :            : #define HAVE_xop_phaddbd (TARGET_XOP)
    2973                 :            : #define HAVE_xop_phaddubd (TARGET_XOP)
    2974                 :            : #define HAVE_xop_phaddbq (TARGET_XOP)
    2975                 :            : #define HAVE_xop_phaddubq (TARGET_XOP)
    2976                 :            : #define HAVE_xop_phaddwd (TARGET_XOP)
    2977                 :            : #define HAVE_xop_phadduwd (TARGET_XOP)
    2978                 :            : #define HAVE_xop_phaddwq (TARGET_XOP)
    2979                 :            : #define HAVE_xop_phadduwq (TARGET_XOP)
    2980                 :            : #define HAVE_xop_phadddq (TARGET_XOP)
    2981                 :            : #define HAVE_xop_phaddudq (TARGET_XOP)
    2982                 :            : #define HAVE_xop_phsubbw (TARGET_XOP)
    2983                 :            : #define HAVE_xop_phsubwd (TARGET_XOP)
    2984                 :            : #define HAVE_xop_phsubdq (TARGET_XOP)
    2985                 :            : #define HAVE_xop_pperm (TARGET_XOP && !(MEM_P (operands[2]) && MEM_P (operands[3])))
    2986                 :            : #define HAVE_xop_pperm_pack_v2di_v4si (TARGET_XOP && !(MEM_P (operands[2]) && MEM_P (operands[3])))
    2987                 :            : #define HAVE_xop_pperm_pack_v4si_v8hi (TARGET_XOP && !(MEM_P (operands[2]) && MEM_P (operands[3])))
    2988                 :            : #define HAVE_xop_pperm_pack_v8hi_v16qi (TARGET_XOP && !(MEM_P (operands[2]) && MEM_P (operands[3])))
    2989                 :            : #define HAVE_xop_rotlv16qi3 (TARGET_XOP)
    2990                 :            : #define HAVE_xop_rotlv8hi3 (TARGET_XOP)
    2991                 :            : #define HAVE_xop_rotlv4si3 (TARGET_XOP)
    2992                 :            : #define HAVE_xop_rotlv2di3 (TARGET_XOP)
    2993                 :            : #define HAVE_xop_rotrv16qi3 (TARGET_XOP)
    2994                 :            : #define HAVE_xop_rotrv8hi3 (TARGET_XOP)
    2995                 :            : #define HAVE_xop_rotrv4si3 (TARGET_XOP)
    2996                 :            : #define HAVE_xop_rotrv2di3 (TARGET_XOP)
    2997                 :            : #define HAVE_xop_vrotlv16qi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    2998                 :            : #define HAVE_xop_vrotlv8hi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    2999                 :            : #define HAVE_xop_vrotlv4si3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    3000                 :            : #define HAVE_xop_vrotlv2di3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    3001                 :            : #define HAVE_xop_shav16qi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    3002                 :            : #define HAVE_xop_shav8hi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    3003                 :            : #define HAVE_xop_shav4si3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    3004                 :            : #define HAVE_xop_shav2di3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    3005                 :            : #define HAVE_xop_shlv16qi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    3006                 :            : #define HAVE_xop_shlv8hi3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    3007                 :            : #define HAVE_xop_shlv4si3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    3008                 :            : #define HAVE_xop_shlv2di3 (TARGET_XOP && !(MEM_P (operands[1]) && MEM_P (operands[2])))
    3009                 :            : #define HAVE_xop_frczsf2 (TARGET_XOP)
    3010                 :            : #define HAVE_xop_frczdf2 (TARGET_XOP)
    3011                 :            : #define HAVE_xop_frczv4sf2 (TARGET_XOP)
    3012                 :            : #define HAVE_xop_frczv2df2 (TARGET_XOP)
    3013                 :            : #define HAVE_xop_frczv8sf2 (TARGET_XOP)
    3014                 :            : #define HAVE_xop_frczv4df2 (TARGET_XOP)
    3015                 :            : #define HAVE_xop_maskcmpv16qi3 (TARGET_XOP)
    3016                 :            : #define HAVE_xop_maskcmpv8hi3 (TARGET_XOP)
    3017                 :            : #define HAVE_xop_maskcmpv4si3 (TARGET_XOP)
    3018                 :            : #define HAVE_xop_maskcmpv2di3 (TARGET_XOP)
    3019                 :            : #define HAVE_xop_maskcmp_unsv16qi3 (TARGET_XOP)
    3020                 :            : #define HAVE_xop_maskcmp_unsv8hi3 (TARGET_XOP)
    3021                 :            : #define HAVE_xop_maskcmp_unsv4si3 (TARGET_XOP)
    3022                 :            : #define HAVE_xop_maskcmp_unsv2di3 (TARGET_XOP)
    3023                 :            : #define HAVE_xop_maskcmp_uns2v16qi3 (TARGET_XOP)
    3024                 :            : #define HAVE_xop_maskcmp_uns2v8hi3 (TARGET_XOP)
    3025                 :            : #define HAVE_xop_maskcmp_uns2v4si3 (TARGET_XOP)
    3026                 :            : #define HAVE_xop_maskcmp_uns2v2di3 (TARGET_XOP)
    3027                 :            : #define HAVE_xop_pcom_tfv16qi3 (TARGET_XOP)
    3028                 :            : #define HAVE_xop_pcom_tfv8hi3 (TARGET_XOP)
    3029                 :            : #define HAVE_xop_pcom_tfv4si3 (TARGET_XOP)
    3030                 :            : #define HAVE_xop_pcom_tfv2di3 (TARGET_XOP)
    3031                 :            : #define HAVE_xop_vpermil2v8sf3 ((TARGET_XOP) && (TARGET_AVX))
    3032                 :            : #define HAVE_xop_vpermil2v4sf3 (TARGET_XOP)
    3033                 :            : #define HAVE_xop_vpermil2v4df3 ((TARGET_XOP) && (TARGET_AVX))
    3034                 :            : #define HAVE_xop_vpermil2v2df3 ((TARGET_XOP) && (TARGET_SSE2))
    3035                 :            : #define HAVE_aesenc (TARGET_AES)
    3036                 :            : #define HAVE_aesenclast (TARGET_AES)
    3037                 :            : #define HAVE_aesdec (TARGET_AES)
    3038                 :            : #define HAVE_aesdeclast (TARGET_AES)
    3039                 :            : #define HAVE_aesimc (TARGET_AES)
    3040                 :            : #define HAVE_aeskeygenassist (TARGET_AES)
    3041                 :            : #define HAVE_pclmulqdq (TARGET_PCLMUL)
    3042                 :            : #define HAVE_avx2_pbroadcastv16si ((TARGET_AVX2) && (TARGET_AVX512F))
    3043                 :            : #define HAVE_avx2_pbroadcastv8di ((TARGET_AVX2) && (TARGET_AVX512F))
    3044                 :            : #define HAVE_avx2_pbroadcastv64qi ((TARGET_AVX2) && (TARGET_AVX512BW))
    3045                 :            : #define HAVE_avx2_pbroadcastv32qi ((TARGET_AVX2) && (TARGET_AVX))
    3046                 :            : #define HAVE_avx2_pbroadcastv16qi (TARGET_AVX2)
    3047                 :            : #define HAVE_avx2_pbroadcastv32hi ((TARGET_AVX2) && (TARGET_AVX512BW))
    3048                 :            : #define HAVE_avx2_pbroadcastv16hi ((TARGET_AVX2) && (TARGET_AVX))
    3049                 :            : #define HAVE_avx2_pbroadcastv8hi (TARGET_AVX2)
    3050                 :            : #define HAVE_avx2_pbroadcastv8si ((TARGET_AVX2) && (TARGET_AVX))
    3051                 :            : #define HAVE_avx2_pbroadcastv4si (TARGET_AVX2)
    3052                 :            : #define HAVE_avx2_pbroadcastv4di ((TARGET_AVX2) && (TARGET_AVX))
    3053                 :            : #define HAVE_avx2_pbroadcastv2di (TARGET_AVX2)
    3054                 :            : #define HAVE_avx2_pbroadcastv32qi_1 (TARGET_AVX2)
    3055                 :            : #define HAVE_avx2_pbroadcastv16hi_1 (TARGET_AVX2)
    3056                 :            : #define HAVE_avx2_pbroadcastv8si_1 (TARGET_AVX2)
    3057                 :            : #define HAVE_avx2_pbroadcastv4di_1 (TARGET_AVX2)
    3058                 :            : #define HAVE_avx2_permvarv8si (TARGET_AVX2 && 1)
    3059                 :            : #define HAVE_avx2_permvarv8si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)))
    3060                 :            : #define HAVE_avx2_permvarv8sf (TARGET_AVX2 && 1)
    3061                 :            : #define HAVE_avx2_permvarv8sf_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)))
    3062                 :            : #define HAVE_avx512f_permvarv16si ((TARGET_AVX2 && 1) && (TARGET_AVX512F))
    3063                 :            : #define HAVE_avx512f_permvarv16si_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3064                 :            : #define HAVE_avx512f_permvarv16sf ((TARGET_AVX2 && 1) && (TARGET_AVX512F))
    3065                 :            : #define HAVE_avx512f_permvarv16sf_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3066                 :            : #define HAVE_avx512f_permvarv8di ((TARGET_AVX2 && 1) && (TARGET_AVX512F))
    3067                 :            : #define HAVE_avx512f_permvarv8di_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3068                 :            : #define HAVE_avx512f_permvarv8df ((TARGET_AVX2 && 1) && (TARGET_AVX512F))
    3069                 :            : #define HAVE_avx512f_permvarv8df_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3070                 :            : #define HAVE_avx2_permvarv4di ((TARGET_AVX2 && 1) && (TARGET_AVX512VL))
    3071                 :            : #define HAVE_avx2_permvarv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512VL)))
    3072                 :            : #define HAVE_avx2_permvarv4df ((TARGET_AVX2 && 1) && (TARGET_AVX512VL))
    3073                 :            : #define HAVE_avx2_permvarv4df_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512VL)))
    3074                 :            : #define HAVE_avx512bw_permvarv64qi (TARGET_AVX512VBMI && 1)
    3075                 :            : #define HAVE_avx512bw_permvarv64qi_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI && (64 == 64 || TARGET_AVX512VL)))
    3076                 :            : #define HAVE_avx512vl_permvarv16qi ((TARGET_AVX512VBMI && 1) && (TARGET_AVX512VL))
    3077                 :            : #define HAVE_avx512vl_permvarv16qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI && (16 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512VL)))
    3078                 :            : #define HAVE_avx512vl_permvarv32qi ((TARGET_AVX512VBMI && 1) && (TARGET_AVX512VL))
    3079                 :            : #define HAVE_avx512vl_permvarv32qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512VL)))
    3080                 :            : #define HAVE_avx512vl_permvarv8hi ((TARGET_AVX512BW && 1) && (TARGET_AVX512VL))
    3081                 :            : #define HAVE_avx512vl_permvarv8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW && (16 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512VL)))
    3082                 :            : #define HAVE_avx512vl_permvarv16hi ((TARGET_AVX512BW && 1) && (TARGET_AVX512VL))
    3083                 :            : #define HAVE_avx512vl_permvarv16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512VL)))
    3084                 :            : #define HAVE_avx512bw_permvarv32hi (TARGET_AVX512BW && 1)
    3085                 :            : #define HAVE_avx512bw_permvarv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW && (64 == 64 || TARGET_AVX512VL)))
    3086                 :            : #define HAVE_avx2_permv4di_1 (TARGET_AVX2 && 1)
    3087                 :            : #define HAVE_avx2_permv4di_1_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)))
    3088                 :            : #define HAVE_avx2_permv4df_1 (TARGET_AVX2 && 1)
    3089                 :            : #define HAVE_avx2_permv4df_1_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)))
    3090                 :            : #define HAVE_avx512f_permv8df_1 (TARGET_AVX512F && 1 \
    3091                 :            :    && (INTVAL (operands[2]) == (INTVAL (operands[6]) - 4) \
    3092                 :            :        && INTVAL (operands[3]) == (INTVAL (operands[7]) - 4) \
    3093                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[8]) - 4) \
    3094                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[9]) - 4)))
    3095                 :            : #define HAVE_avx512f_permv8df_1_mask ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) \
    3096                 :            :    && (INTVAL (operands[2]) == (INTVAL (operands[6]) - 4) \
    3097                 :            :        && INTVAL (operands[3]) == (INTVAL (operands[7]) - 4) \
    3098                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[8]) - 4) \
    3099                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[9]) - 4))))
    3100                 :            : #define HAVE_avx512f_permv8di_1 (TARGET_AVX512F && 1 \
    3101                 :            :    && (INTVAL (operands[2]) == (INTVAL (operands[6]) - 4) \
    3102                 :            :        && INTVAL (operands[3]) == (INTVAL (operands[7]) - 4) \
    3103                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[8]) - 4) \
    3104                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[9]) - 4)))
    3105                 :            : #define HAVE_avx512f_permv8di_1_mask ((TARGET_AVX512F) && (TARGET_AVX512F && (64 == 64 || TARGET_AVX512VL) \
    3106                 :            :    && (INTVAL (operands[2]) == (INTVAL (operands[6]) - 4) \
    3107                 :            :        && INTVAL (operands[3]) == (INTVAL (operands[7]) - 4) \
    3108                 :            :        && INTVAL (operands[4]) == (INTVAL (operands[8]) - 4) \
    3109                 :            :        && INTVAL (operands[5]) == (INTVAL (operands[9]) - 4))))
    3110                 :            : #define HAVE_avx2_permv2ti (TARGET_AVX2)
    3111                 :            : #define HAVE_avx2_vec_dupv4df (TARGET_AVX2)
    3112                 :            : #define HAVE_avx512f_vec_dupv16si_1 (TARGET_AVX512F)
    3113                 :            : #define HAVE_avx512f_vec_dupv8di_1 (TARGET_AVX512F)
    3114                 :            : #define HAVE_avx512bw_vec_dupv32hi_1 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3115                 :            : #define HAVE_avx512bw_vec_dupv64qi_1 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3116                 :            : #define HAVE_avx512f_vec_dupv16si (TARGET_AVX512F)
    3117                 :            : #define HAVE_avx512f_vec_dupv16si_mask (TARGET_AVX512F)
    3118                 :            : #define HAVE_avx512vl_vec_dupv8si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3119                 :            : #define HAVE_avx512vl_vec_dupv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3120                 :            : #define HAVE_avx512vl_vec_dupv4si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3121                 :            : #define HAVE_avx512vl_vec_dupv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3122                 :            : #define HAVE_avx512f_vec_dupv8di (TARGET_AVX512F)
    3123                 :            : #define HAVE_avx512f_vec_dupv8di_mask (TARGET_AVX512F)
    3124                 :            : #define HAVE_avx512vl_vec_dupv4di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3125                 :            : #define HAVE_avx512vl_vec_dupv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3126                 :            : #define HAVE_avx512vl_vec_dupv2di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3127                 :            : #define HAVE_avx512vl_vec_dupv2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3128                 :            : #define HAVE_avx512f_vec_dupv16sf (TARGET_AVX512F)
    3129                 :            : #define HAVE_avx512f_vec_dupv16sf_mask (TARGET_AVX512F)
    3130                 :            : #define HAVE_avx512vl_vec_dupv8sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3131                 :            : #define HAVE_avx512vl_vec_dupv8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3132                 :            : #define HAVE_avx512vl_vec_dupv4sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3133                 :            : #define HAVE_avx512vl_vec_dupv4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3134                 :            : #define HAVE_avx512f_vec_dupv8df (TARGET_AVX512F)
    3135                 :            : #define HAVE_avx512f_vec_dupv8df_mask (TARGET_AVX512F)
    3136                 :            : #define HAVE_avx512vl_vec_dupv4df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3137                 :            : #define HAVE_avx512vl_vec_dupv4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3138                 :            : #define HAVE_avx512vl_vec_dupv2df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3139                 :            : #define HAVE_avx512vl_vec_dupv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3140                 :            : #define HAVE_avx512bw_vec_dupv64qi (TARGET_AVX512BW)
    3141                 :            : #define HAVE_avx512bw_vec_dupv64qi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3142                 :            : #define HAVE_avx512vl_vec_dupv16qi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    3143                 :            : #define HAVE_avx512vl_vec_dupv16qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3144                 :            : #define HAVE_avx512vl_vec_dupv32qi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    3145                 :            : #define HAVE_avx512vl_vec_dupv32qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3146                 :            : #define HAVE_avx512bw_vec_dupv32hi (TARGET_AVX512BW)
    3147                 :            : #define HAVE_avx512bw_vec_dupv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3148                 :            : #define HAVE_avx512vl_vec_dupv16hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    3149                 :            : #define HAVE_avx512vl_vec_dupv16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3150                 :            : #define HAVE_avx512vl_vec_dupv8hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    3151                 :            : #define HAVE_avx512vl_vec_dupv8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3152                 :            : #define HAVE_avx512f_broadcastv16sf_mask (TARGET_AVX512F)
    3153                 :            : #define HAVE_avx512f_broadcastv16si_mask (TARGET_AVX512F)
    3154                 :            : #define HAVE_avx512f_broadcastv8df_mask (TARGET_AVX512F)
    3155                 :            : #define HAVE_avx512f_broadcastv8di_mask (TARGET_AVX512F)
    3156                 :            : #define HAVE_avx512bw_vec_dup_gprv64qi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3157                 :            : #define HAVE_avx512vl_vec_dup_gprv16qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3158                 :            : #define HAVE_avx512vl_vec_dup_gprv32qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3159                 :            : #define HAVE_avx512bw_vec_dup_gprv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3160                 :            : #define HAVE_avx512vl_vec_dup_gprv16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3161                 :            : #define HAVE_avx512vl_vec_dup_gprv8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3162                 :            : #define HAVE_avx512f_vec_dup_gprv16si_mask (TARGET_AVX512F)
    3163                 :            : #define HAVE_avx512vl_vec_dup_gprv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3164                 :            : #define HAVE_avx512vl_vec_dup_gprv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3165                 :            : #define HAVE_avx512f_vec_dup_gprv8di_mask (TARGET_AVX512F)
    3166                 :            : #define HAVE_avx512vl_vec_dup_gprv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3167                 :            : #define HAVE_avx512vl_vec_dup_gprv2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3168                 :            : #define HAVE_avx512f_vec_dup_gprv16sf_mask (TARGET_AVX512F)
    3169                 :            : #define HAVE_avx512vl_vec_dup_gprv8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3170                 :            : #define HAVE_avx512vl_vec_dup_gprv4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3171                 :            : #define HAVE_avx512f_vec_dup_gprv8df_mask (TARGET_AVX512F)
    3172                 :            : #define HAVE_avx512vl_vec_dup_gprv4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3173                 :            : #define HAVE_avx512vl_vec_dup_gprv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3174                 :            : #define HAVE_vec_dupv4sf (TARGET_SSE)
    3175                 :            : #define HAVE_avx2_vbroadcasti128_v32qi (TARGET_AVX2)
    3176                 :            : #define HAVE_avx2_vbroadcasti128_v16hi (TARGET_AVX2)
    3177                 :            : #define HAVE_avx2_vbroadcasti128_v8si (TARGET_AVX2)
    3178                 :            : #define HAVE_avx2_vbroadcasti128_v4di (TARGET_AVX2)
    3179                 :            : #define HAVE_vec_dupv8si (TARGET_AVX)
    3180                 :            : #define HAVE_vec_dupv8sf (TARGET_AVX)
    3181                 :            : #define HAVE_vec_dupv4di (TARGET_AVX)
    3182                 :            : #define HAVE_vec_dupv4df (TARGET_AVX)
    3183                 :            : #define HAVE_avx_vbroadcastf128_v32qi (TARGET_AVX)
    3184                 :            : #define HAVE_avx_vbroadcastf128_v16hi (TARGET_AVX)
    3185                 :            : #define HAVE_avx_vbroadcastf128_v8si (TARGET_AVX)
    3186                 :            : #define HAVE_avx_vbroadcastf128_v4di (TARGET_AVX)
    3187                 :            : #define HAVE_avx_vbroadcastf128_v8sf (TARGET_AVX)
    3188                 :            : #define HAVE_avx_vbroadcastf128_v4df (TARGET_AVX)
    3189                 :            : #define HAVE_avx512dq_broadcastv16si_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3190                 :            : #define HAVE_avx512dq_broadcastv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    3191                 :            : #define HAVE_avx512dq_broadcastv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    3192                 :            : #define HAVE_avx512dq_broadcastv16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3193                 :            : #define HAVE_avx512dq_broadcastv8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    3194                 :            : #define HAVE_avx512vl_broadcastv8si_mask_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3195                 :            : #define HAVE_avx512vl_broadcastv8sf_mask_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3196                 :            : #define HAVE_avx512dq_broadcastv16sf_mask_1 ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3197                 :            : #define HAVE_avx512dq_broadcastv16si_mask_1 ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3198                 :            : #define HAVE_avx512dq_broadcastv8di_mask_1 ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3199                 :            : #define HAVE_avx512dq_broadcastv8df_mask_1 ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3200                 :            : #define HAVE_avx512dq_broadcastv4di_mask_1 ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    3201                 :            : #define HAVE_avx512dq_broadcastv4df_mask_1 ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    3202                 :            : #define HAVE_avx512cd_maskb_vec_dupv8di (TARGET_AVX512CD)
    3203                 :            : #define HAVE_avx512cd_maskb_vec_dupv4di ((TARGET_AVX512CD) && (TARGET_AVX512VL))
    3204                 :            : #define HAVE_avx512cd_maskb_vec_dupv2di ((TARGET_AVX512CD) && (TARGET_AVX512VL))
    3205                 :            : #define HAVE_avx512cd_maskw_vec_dupv16si (TARGET_AVX512CD)
    3206                 :            : #define HAVE_avx512cd_maskw_vec_dupv8si ((TARGET_AVX512CD) && (TARGET_AVX512VL))
    3207                 :            : #define HAVE_avx512cd_maskw_vec_dupv4si ((TARGET_AVX512CD) && (TARGET_AVX512VL))
    3208                 :            : #define HAVE_avx512f_vpermilvarv16sf3 ((TARGET_AVX && 1) && (TARGET_AVX512F))
    3209                 :            : #define HAVE_avx512f_vpermilvarv16sf3_mask ((TARGET_AVX512F) && ((TARGET_AVX && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3210                 :            : #define HAVE_avx_vpermilvarv8sf3 ((TARGET_AVX && 1) && (TARGET_AVX))
    3211                 :            : #define HAVE_avx_vpermilvarv8sf3_mask ((TARGET_AVX512F) && ((TARGET_AVX && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX)))
    3212                 :            : #define HAVE_avx_vpermilvarv4sf3 (TARGET_AVX && 1)
    3213                 :            : #define HAVE_avx_vpermilvarv4sf3_mask ((TARGET_AVX512F) && (TARGET_AVX && (16 == 64 || TARGET_AVX512VL)))
    3214                 :            : #define HAVE_avx512f_vpermilvarv8df3 ((TARGET_AVX && 1) && (TARGET_AVX512F))
    3215                 :            : #define HAVE_avx512f_vpermilvarv8df3_mask ((TARGET_AVX512F) && ((TARGET_AVX && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3216                 :            : #define HAVE_avx_vpermilvarv4df3 ((TARGET_AVX && 1) && (TARGET_AVX))
    3217                 :            : #define HAVE_avx_vpermilvarv4df3_mask ((TARGET_AVX512F) && ((TARGET_AVX && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX)))
    3218                 :            : #define HAVE_avx_vpermilvarv2df3 ((TARGET_AVX && 1) && (TARGET_SSE2))
    3219                 :            : #define HAVE_avx_vpermilvarv2df3_mask ((TARGET_AVX512F) && ((TARGET_AVX && (16 == 64 || TARGET_AVX512VL)) && (TARGET_SSE2)))
    3220                 :            : #define HAVE_avx512f_vpermt2varv16si3 (TARGET_AVX512F)
    3221                 :            : #define HAVE_avx512f_vpermt2varv16si3_maskz_1 (TARGET_AVX512F)
    3222                 :            : #define HAVE_avx512f_vpermt2varv16sf3 (TARGET_AVX512F)
    3223                 :            : #define HAVE_avx512f_vpermt2varv16sf3_maskz_1 (TARGET_AVX512F)
    3224                 :            : #define HAVE_avx512f_vpermt2varv8di3 (TARGET_AVX512F)
    3225                 :            : #define HAVE_avx512f_vpermt2varv8di3_maskz_1 (TARGET_AVX512F)
    3226                 :            : #define HAVE_avx512f_vpermt2varv8df3 (TARGET_AVX512F)
    3227                 :            : #define HAVE_avx512f_vpermt2varv8df3_maskz_1 (TARGET_AVX512F)
    3228                 :            : #define HAVE_avx512vl_vpermt2varv8si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3229                 :            : #define HAVE_avx512vl_vpermt2varv8si3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3230                 :            : #define HAVE_avx512vl_vpermt2varv8sf3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3231                 :            : #define HAVE_avx512vl_vpermt2varv8sf3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3232                 :            : #define HAVE_avx512vl_vpermt2varv4di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3233                 :            : #define HAVE_avx512vl_vpermt2varv4di3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3234                 :            : #define HAVE_avx512vl_vpermt2varv4df3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3235                 :            : #define HAVE_avx512vl_vpermt2varv4df3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3236                 :            : #define HAVE_avx512vl_vpermt2varv4si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3237                 :            : #define HAVE_avx512vl_vpermt2varv4si3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3238                 :            : #define HAVE_avx512vl_vpermt2varv4sf3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3239                 :            : #define HAVE_avx512vl_vpermt2varv4sf3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3240                 :            : #define HAVE_avx512vl_vpermt2varv2di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3241                 :            : #define HAVE_avx512vl_vpermt2varv2di3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3242                 :            : #define HAVE_avx512vl_vpermt2varv2df3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3243                 :            : #define HAVE_avx512vl_vpermt2varv2df3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3244                 :            : #define HAVE_avx512bw_vpermt2varv32hi3 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3245                 :            : #define HAVE_avx512bw_vpermt2varv32hi3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3246                 :            : #define HAVE_avx512vl_vpermt2varv16hi3 ((TARGET_AVX512F) && (TARGET_AVX512BW && TARGET_AVX512VL))
    3247                 :            : #define HAVE_avx512vl_vpermt2varv16hi3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512BW && TARGET_AVX512VL))
    3248                 :            : #define HAVE_avx512vl_vpermt2varv8hi3 ((TARGET_AVX512F) && (TARGET_AVX512BW && TARGET_AVX512VL))
    3249                 :            : #define HAVE_avx512vl_vpermt2varv8hi3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512BW && TARGET_AVX512VL))
    3250                 :            : #define HAVE_avx512bw_vpermt2varv64qi3 ((TARGET_AVX512F) && (TARGET_AVX512VBMI))
    3251                 :            : #define HAVE_avx512bw_vpermt2varv64qi3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VBMI))
    3252                 :            : #define HAVE_avx512vl_vpermt2varv32qi3 ((TARGET_AVX512F) && (TARGET_AVX512VBMI && TARGET_AVX512VL))
    3253                 :            : #define HAVE_avx512vl_vpermt2varv32qi3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VBMI && TARGET_AVX512VL))
    3254                 :            : #define HAVE_avx512vl_vpermt2varv16qi3 ((TARGET_AVX512F) && (TARGET_AVX512VBMI && TARGET_AVX512VL))
    3255                 :            : #define HAVE_avx512vl_vpermt2varv16qi3_maskz_1 ((TARGET_AVX512F) && (TARGET_AVX512VBMI && TARGET_AVX512VL))
    3256                 :            : #define HAVE_avx512f_vpermt2varv16si3_mask (TARGET_AVX512F)
    3257                 :            : #define HAVE_avx512f_vpermt2varv16sf3_mask (TARGET_AVX512F)
    3258                 :            : #define HAVE_avx512f_vpermt2varv8di3_mask (TARGET_AVX512F)
    3259                 :            : #define HAVE_avx512f_vpermt2varv8df3_mask (TARGET_AVX512F)
    3260                 :            : #define HAVE_avx512vl_vpermt2varv8si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3261                 :            : #define HAVE_avx512vl_vpermt2varv8sf3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3262                 :            : #define HAVE_avx512vl_vpermt2varv4di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3263                 :            : #define HAVE_avx512vl_vpermt2varv4df3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3264                 :            : #define HAVE_avx512vl_vpermt2varv4si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3265                 :            : #define HAVE_avx512vl_vpermt2varv4sf3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3266                 :            : #define HAVE_avx512vl_vpermt2varv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3267                 :            : #define HAVE_avx512vl_vpermt2varv2df3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3268                 :            : #define HAVE_avx512bw_vpermt2varv32hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3269                 :            : #define HAVE_avx512vl_vpermt2varv16hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW && TARGET_AVX512VL))
    3270                 :            : #define HAVE_avx512vl_vpermt2varv8hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW && TARGET_AVX512VL))
    3271                 :            : #define HAVE_avx512bw_vpermt2varv64qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI))
    3272                 :            : #define HAVE_avx512vl_vpermt2varv32qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI && TARGET_AVX512VL))
    3273                 :            : #define HAVE_avx512vl_vpermt2varv16qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI && TARGET_AVX512VL))
    3274                 :            : #define HAVE_vec_set_lo_v4di (TARGET_AVX && 1)
    3275                 :            : #define HAVE_vec_set_lo_v4di_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512DQ))
    3276                 :            : #define HAVE_vec_set_lo_v4df (TARGET_AVX && 1)
    3277                 :            : #define HAVE_vec_set_lo_v4df_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512DQ))
    3278                 :            : #define HAVE_vec_set_hi_v4di (TARGET_AVX && 1)
    3279                 :            : #define HAVE_vec_set_hi_v4di_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512DQ))
    3280                 :            : #define HAVE_vec_set_hi_v4df (TARGET_AVX && 1)
    3281                 :            : #define HAVE_vec_set_hi_v4df_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512DQ))
    3282                 :            : #define HAVE_vec_set_lo_v8si (TARGET_AVX)
    3283                 :            : #define HAVE_vec_set_lo_v8si_mask ((TARGET_AVX512F) && (TARGET_AVX))
    3284                 :            : #define HAVE_vec_set_lo_v8sf (TARGET_AVX)
    3285                 :            : #define HAVE_vec_set_lo_v8sf_mask ((TARGET_AVX512F) && (TARGET_AVX))
    3286                 :            : #define HAVE_vec_set_hi_v8si (TARGET_AVX)
    3287                 :            : #define HAVE_vec_set_hi_v8si_mask ((TARGET_AVX512F) && (TARGET_AVX))
    3288                 :            : #define HAVE_vec_set_hi_v8sf (TARGET_AVX)
    3289                 :            : #define HAVE_vec_set_hi_v8sf_mask ((TARGET_AVX512F) && (TARGET_AVX))
    3290                 :            : #define HAVE_vec_set_lo_v16hi (TARGET_AVX)
    3291                 :            : #define HAVE_vec_set_hi_v16hi (TARGET_AVX)
    3292                 :            : #define HAVE_vec_set_lo_v32qi (TARGET_AVX)
    3293                 :            : #define HAVE_vec_set_hi_v32qi (TARGET_AVX)
    3294                 :            : #define HAVE_avx_maskloadps (TARGET_AVX)
    3295                 :            : #define HAVE_avx_maskloadpd (TARGET_AVX)
    3296                 :            : #define HAVE_avx_maskloadps256 (TARGET_AVX)
    3297                 :            : #define HAVE_avx_maskloadpd256 (TARGET_AVX)
    3298                 :            : #define HAVE_avx2_maskloadd ((TARGET_AVX) && (TARGET_AVX2))
    3299                 :            : #define HAVE_avx2_maskloadq ((TARGET_AVX) && (TARGET_AVX2))
    3300                 :            : #define HAVE_avx2_maskloadd256 ((TARGET_AVX) && (TARGET_AVX2))
    3301                 :            : #define HAVE_avx2_maskloadq256 ((TARGET_AVX) && (TARGET_AVX2))
    3302                 :            : #define HAVE_avx_maskstoreps (TARGET_AVX)
    3303                 :            : #define HAVE_avx_maskstorepd (TARGET_AVX)
    3304                 :            : #define HAVE_avx_maskstoreps256 (TARGET_AVX)
    3305                 :            : #define HAVE_avx_maskstorepd256 (TARGET_AVX)
    3306                 :            : #define HAVE_avx2_maskstored ((TARGET_AVX) && (TARGET_AVX2))
    3307                 :            : #define HAVE_avx2_maskstoreq ((TARGET_AVX) && (TARGET_AVX2))
    3308                 :            : #define HAVE_avx2_maskstored256 ((TARGET_AVX) && (TARGET_AVX2))
    3309                 :            : #define HAVE_avx2_maskstoreq256 ((TARGET_AVX) && (TARGET_AVX2))
    3310                 :            : #define HAVE_avx_si256_si (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    3311                 :            : #define HAVE_avx_ps256_ps (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    3312                 :            : #define HAVE_avx_pd256_pd (TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    3313                 :            : #define HAVE_avx2_ashrvv4si (TARGET_AVX2 && 1)
    3314                 :            : #define HAVE_avx2_ashrvv4si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (16 == 64 || TARGET_AVX512VL)))
    3315                 :            : #define HAVE_avx2_ashrvv8si (TARGET_AVX2 && 1)
    3316                 :            : #define HAVE_avx2_ashrvv8si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)))
    3317                 :            : #define HAVE_avx512f_ashrvv16si ((TARGET_AVX2 && 1) && (TARGET_AVX512F))
    3318                 :            : #define HAVE_avx512f_ashrvv16si_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3319                 :            : #define HAVE_avx2_ashrvv2di ((TARGET_AVX2 && 1) && (TARGET_AVX512VL))
    3320                 :            : #define HAVE_avx2_ashrvv2di_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (16 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512VL)))
    3321                 :            : #define HAVE_avx2_ashrvv4di ((TARGET_AVX2 && 1) && (TARGET_AVX512VL))
    3322                 :            : #define HAVE_avx2_ashrvv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512VL)))
    3323                 :            : #define HAVE_avx512f_ashrvv8di ((TARGET_AVX2 && 1) && (TARGET_AVX512F))
    3324                 :            : #define HAVE_avx512f_ashrvv8di_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3325                 :            : #define HAVE_avx512vl_ashrvv8hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    3326                 :            : #define HAVE_avx512vl_ashrvv8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3327                 :            : #define HAVE_avx512vl_ashrvv16hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    3328                 :            : #define HAVE_avx512vl_ashrvv16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3329                 :            : #define HAVE_avx512bw_ashrvv32hi (TARGET_AVX512BW)
    3330                 :            : #define HAVE_avx512bw_ashrvv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3331                 :            : #define HAVE_avx512f_ashlvv16si ((TARGET_AVX2 && 1) && (TARGET_AVX512F))
    3332                 :            : #define HAVE_avx512f_ashlvv16si_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3333                 :            : #define HAVE_avx512f_lshrvv16si ((TARGET_AVX2 && 1) && (TARGET_AVX512F))
    3334                 :            : #define HAVE_avx512f_lshrvv16si_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3335                 :            : #define HAVE_avx2_ashlvv8si (TARGET_AVX2 && 1)
    3336                 :            : #define HAVE_avx2_ashlvv8si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)))
    3337                 :            : #define HAVE_avx2_lshrvv8si (TARGET_AVX2 && 1)
    3338                 :            : #define HAVE_avx2_lshrvv8si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)))
    3339                 :            : #define HAVE_avx2_ashlvv4si (TARGET_AVX2 && 1)
    3340                 :            : #define HAVE_avx2_ashlvv4si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (16 == 64 || TARGET_AVX512VL)))
    3341                 :            : #define HAVE_avx2_lshrvv4si (TARGET_AVX2 && 1)
    3342                 :            : #define HAVE_avx2_lshrvv4si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (16 == 64 || TARGET_AVX512VL)))
    3343                 :            : #define HAVE_avx512f_ashlvv8di ((TARGET_AVX2 && 1) && (TARGET_AVX512F))
    3344                 :            : #define HAVE_avx512f_ashlvv8di_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3345                 :            : #define HAVE_avx512f_lshrvv8di ((TARGET_AVX2 && 1) && (TARGET_AVX512F))
    3346                 :            : #define HAVE_avx512f_lshrvv8di_mask ((TARGET_AVX512F) && ((TARGET_AVX2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    3347                 :            : #define HAVE_avx2_ashlvv4di (TARGET_AVX2 && 1)
    3348                 :            : #define HAVE_avx2_ashlvv4di_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)))
    3349                 :            : #define HAVE_avx2_lshrvv4di (TARGET_AVX2 && 1)
    3350                 :            : #define HAVE_avx2_lshrvv4di_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (32 == 64 || TARGET_AVX512VL)))
    3351                 :            : #define HAVE_avx2_ashlvv2di (TARGET_AVX2 && 1)
    3352                 :            : #define HAVE_avx2_ashlvv2di_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (16 == 64 || TARGET_AVX512VL)))
    3353                 :            : #define HAVE_avx2_lshrvv2di (TARGET_AVX2 && 1)
    3354                 :            : #define HAVE_avx2_lshrvv2di_mask ((TARGET_AVX512F) && (TARGET_AVX2 && (16 == 64 || TARGET_AVX512VL)))
    3355                 :            : #define HAVE_avx512vl_ashlvv8hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    3356                 :            : #define HAVE_avx512vl_ashlvv8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3357                 :            : #define HAVE_avx512vl_lshrvv8hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    3358                 :            : #define HAVE_avx512vl_lshrvv8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3359                 :            : #define HAVE_avx512vl_ashlvv16hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    3360                 :            : #define HAVE_avx512vl_ashlvv16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3361                 :            : #define HAVE_avx512vl_lshrvv16hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    3362                 :            : #define HAVE_avx512vl_lshrvv16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3363                 :            : #define HAVE_avx512bw_ashlvv32hi (TARGET_AVX512BW)
    3364                 :            : #define HAVE_avx512bw_ashlvv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3365                 :            : #define HAVE_avx512bw_lshrvv32hi (TARGET_AVX512BW)
    3366                 :            : #define HAVE_avx512bw_lshrvv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3367                 :            : #define HAVE_avx_vec_concatv32qi (TARGET_AVX \
    3368                 :            :    && (operands[2] == CONST0_RTX (V16QImode) \
    3369                 :            :        || !MEM_P (operands[1])))
    3370                 :            : #define HAVE_avx_vec_concatv16hi (TARGET_AVX \
    3371                 :            :    && (operands[2] == CONST0_RTX (V8HImode) \
    3372                 :            :        || !MEM_P (operands[1])))
    3373                 :            : #define HAVE_avx_vec_concatv8si (TARGET_AVX \
    3374                 :            :    && (operands[2] == CONST0_RTX (V4SImode) \
    3375                 :            :        || !MEM_P (operands[1])))
    3376                 :            : #define HAVE_avx_vec_concatv4di (TARGET_AVX \
    3377                 :            :    && (operands[2] == CONST0_RTX (V2DImode) \
    3378                 :            :        || !MEM_P (operands[1])))
    3379                 :            : #define HAVE_avx_vec_concatv8sf (TARGET_AVX \
    3380                 :            :    && (operands[2] == CONST0_RTX (V4SFmode) \
    3381                 :            :        || !MEM_P (operands[1])))
    3382                 :            : #define HAVE_avx_vec_concatv4df (TARGET_AVX \
    3383                 :            :    && (operands[2] == CONST0_RTX (V2DFmode) \
    3384                 :            :        || !MEM_P (operands[1])))
    3385                 :            : #define HAVE_avx_vec_concatv64qi ((TARGET_AVX \
    3386                 :            :    && (operands[2] == CONST0_RTX (V32QImode) \
    3387                 :            :        || !MEM_P (operands[1]))) && (TARGET_AVX512F))
    3388                 :            : #define HAVE_avx_vec_concatv32hi ((TARGET_AVX \
    3389                 :            :    && (operands[2] == CONST0_RTX (V16HImode) \
    3390                 :            :        || !MEM_P (operands[1]))) && (TARGET_AVX512F))
    3391                 :            : #define HAVE_avx_vec_concatv16si ((TARGET_AVX \
    3392                 :            :    && (operands[2] == CONST0_RTX (V8SImode) \
    3393                 :            :        || !MEM_P (operands[1]))) && (TARGET_AVX512F))
    3394                 :            : #define HAVE_avx_vec_concatv8di ((TARGET_AVX \
    3395                 :            :    && (operands[2] == CONST0_RTX (V4DImode) \
    3396                 :            :        || !MEM_P (operands[1]))) && (TARGET_AVX512F))
    3397                 :            : #define HAVE_avx_vec_concatv16sf ((TARGET_AVX \
    3398                 :            :    && (operands[2] == CONST0_RTX (V8SFmode) \
    3399                 :            :        || !MEM_P (operands[1]))) && (TARGET_AVX512F))
    3400                 :            : #define HAVE_avx_vec_concatv8df ((TARGET_AVX \
    3401                 :            :    && (operands[2] == CONST0_RTX (V4DFmode) \
    3402                 :            :        || !MEM_P (operands[1]))) && (TARGET_AVX512F))
    3403                 :            : #define HAVE_vcvtph2ps (TARGET_F16C || TARGET_AVX512VL)
    3404                 :            : #define HAVE_vcvtph2ps_mask ((TARGET_AVX512F) && (TARGET_F16C || TARGET_AVX512VL))
    3405                 :            : #define HAVE_vcvtph2ps256 (TARGET_F16C || TARGET_AVX512VL)
    3406                 :            : #define HAVE_vcvtph2ps256_mask ((TARGET_AVX512F) && (TARGET_F16C || TARGET_AVX512VL))
    3407                 :            : #define HAVE_avx512f_vcvtph2ps512_mask (TARGET_AVX512F)
    3408                 :            : #define HAVE_avx512f_vcvtph2ps512_mask_round (TARGET_AVX512F)
    3409                 :            : #define HAVE_vcvtps2ph256 (TARGET_F16C || TARGET_AVX512VL)
    3410                 :            : #define HAVE_vcvtps2ph256_mask ((TARGET_AVX512F) && (TARGET_F16C || TARGET_AVX512VL))
    3411                 :            : #define HAVE_avx512f_vcvtps2ph512_mask (TARGET_AVX512F)
    3412                 :            : #define HAVE_avx512f_compressv16si_mask (TARGET_AVX512F)
    3413                 :            : #define HAVE_avx512f_compressv16sf_mask (TARGET_AVX512F)
    3414                 :            : #define HAVE_avx512f_compressv8di_mask (TARGET_AVX512F)
    3415                 :            : #define HAVE_avx512f_compressv8df_mask (TARGET_AVX512F)
    3416                 :            : #define HAVE_avx512vl_compressv8si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3417                 :            : #define HAVE_avx512vl_compressv8sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3418                 :            : #define HAVE_avx512vl_compressv4di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3419                 :            : #define HAVE_avx512vl_compressv4df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3420                 :            : #define HAVE_avx512vl_compressv4si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3421                 :            : #define HAVE_avx512vl_compressv4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3422                 :            : #define HAVE_avx512vl_compressv2di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3423                 :            : #define HAVE_avx512vl_compressv2df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3424                 :            : #define HAVE_compressv64qi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512BW))
    3425                 :            : #define HAVE_compressv16qi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3426                 :            : #define HAVE_compressv32qi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL && TARGET_AVX512BW))
    3427                 :            : #define HAVE_compressv32hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512BW))
    3428                 :            : #define HAVE_compressv16hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3429                 :            : #define HAVE_compressv8hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3430                 :            : #define HAVE_avx512f_compressstorev16si_mask (TARGET_AVX512F)
    3431                 :            : #define HAVE_avx512f_compressstorev16sf_mask (TARGET_AVX512F)
    3432                 :            : #define HAVE_avx512f_compressstorev8di_mask (TARGET_AVX512F)
    3433                 :            : #define HAVE_avx512f_compressstorev8df_mask (TARGET_AVX512F)
    3434                 :            : #define HAVE_avx512vl_compressstorev8si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3435                 :            : #define HAVE_avx512vl_compressstorev8sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3436                 :            : #define HAVE_avx512vl_compressstorev4di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3437                 :            : #define HAVE_avx512vl_compressstorev4df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3438                 :            : #define HAVE_avx512vl_compressstorev4si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3439                 :            : #define HAVE_avx512vl_compressstorev4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3440                 :            : #define HAVE_avx512vl_compressstorev2di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3441                 :            : #define HAVE_avx512vl_compressstorev2df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3442                 :            : #define HAVE_compressstorev64qi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512BW))
    3443                 :            : #define HAVE_compressstorev16qi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3444                 :            : #define HAVE_compressstorev32qi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL && TARGET_AVX512BW))
    3445                 :            : #define HAVE_compressstorev32hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512BW))
    3446                 :            : #define HAVE_compressstorev16hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3447                 :            : #define HAVE_compressstorev8hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3448                 :            : #define HAVE_avx512f_expandv16si_mask (TARGET_AVX512F)
    3449                 :            : #define HAVE_avx512f_expandv16sf_mask (TARGET_AVX512F)
    3450                 :            : #define HAVE_avx512f_expandv8di_mask (TARGET_AVX512F)
    3451                 :            : #define HAVE_avx512f_expandv8df_mask (TARGET_AVX512F)
    3452                 :            : #define HAVE_avx512vl_expandv8si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3453                 :            : #define HAVE_avx512vl_expandv8sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3454                 :            : #define HAVE_avx512vl_expandv4di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3455                 :            : #define HAVE_avx512vl_expandv4df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3456                 :            : #define HAVE_avx512vl_expandv4si_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3457                 :            : #define HAVE_avx512vl_expandv4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3458                 :            : #define HAVE_avx512vl_expandv2di_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3459                 :            : #define HAVE_avx512vl_expandv2df_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3460                 :            : #define HAVE_expandv64qi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512BW))
    3461                 :            : #define HAVE_expandv16qi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3462                 :            : #define HAVE_expandv32qi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL && TARGET_AVX512BW))
    3463                 :            : #define HAVE_expandv32hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512BW))
    3464                 :            : #define HAVE_expandv16hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3465                 :            : #define HAVE_expandv8hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3466                 :            : #define HAVE_avx512dq_rangepv16sf (TARGET_AVX512DQ && 1)
    3467                 :            : #define HAVE_avx512dq_rangepv16sf_round ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V16SFmode == V16SFmode \
    3468                 :            :                                                                               || V16SFmode == V8DFmode \
    3469                 :            :                                                                               || V16SFmode == V8DImode \
    3470                 :            :                                                                               || V16SFmode == V16SImode)))
    3471                 :            : #define HAVE_avx512dq_rangepv16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    3472                 :            : #define HAVE_avx512dq_rangepv16sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V16SFmode == V16SFmode \
    3473                 :            :                                                                               || V16SFmode == V8DFmode \
    3474                 :            :                                                                               || V16SFmode == V8DImode \
    3475                 :            :                                                                               || V16SFmode == V16SImode))))
    3476                 :            : #define HAVE_avx512dq_rangepv8sf ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    3477                 :            : #define HAVE_avx512dq_rangepv8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    3478                 :            : #define HAVE_avx512dq_rangepv4sf ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    3479                 :            : #define HAVE_avx512dq_rangepv4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    3480                 :            : #define HAVE_avx512dq_rangepv8df (TARGET_AVX512DQ && 1)
    3481                 :            : #define HAVE_avx512dq_rangepv8df_round ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DFmode == V16SFmode \
    3482                 :            :                                                                               || V8DFmode == V8DFmode \
    3483                 :            :                                                                               || V8DFmode == V8DImode \
    3484                 :            :                                                                               || V8DFmode == V16SImode)))
    3485                 :            : #define HAVE_avx512dq_rangepv8df_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ && 1))
    3486                 :            : #define HAVE_avx512dq_rangepv8df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ && (V8DFmode == V16SFmode \
    3487                 :            :                                                                               || V8DFmode == V8DFmode \
    3488                 :            :                                                                               || V8DFmode == V8DImode \
    3489                 :            :                                                                               || V8DFmode == V16SImode))))
    3490                 :            : #define HAVE_avx512dq_rangepv4df ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    3491                 :            : #define HAVE_avx512dq_rangepv4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    3492                 :            : #define HAVE_avx512dq_rangepv2df ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL))
    3493                 :            : #define HAVE_avx512dq_rangepv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ && 1) && (TARGET_AVX512VL)))
    3494                 :            : #define HAVE_avx512dq_rangesv4sf (TARGET_AVX512DQ)
    3495                 :            : #define HAVE_avx512dq_rangesv4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3496                 :            : #define HAVE_avx512dq_rangesv4sf_round ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3497                 :            : #define HAVE_avx512dq_rangesv4sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512DQ)))
    3498                 :            : #define HAVE_avx512dq_rangesv2df ((TARGET_AVX512DQ) && (TARGET_SSE2))
    3499                 :            : #define HAVE_avx512dq_rangesv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_SSE2)))
    3500                 :            : #define HAVE_avx512dq_rangesv2df_round ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_SSE2)))
    3501                 :            : #define HAVE_avx512dq_rangesv2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_SSE2))))
    3502                 :            : #define HAVE_avx512dq_fpclassv16sf (TARGET_AVX512DQ)
    3503                 :            : #define HAVE_avx512dq_fpclassv16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3504                 :            : #define HAVE_avx512dq_fpclassv8sf ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    3505                 :            : #define HAVE_avx512dq_fpclassv8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    3506                 :            : #define HAVE_avx512dq_fpclassv4sf ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    3507                 :            : #define HAVE_avx512dq_fpclassv4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    3508                 :            : #define HAVE_avx512dq_fpclassv8df (TARGET_AVX512DQ)
    3509                 :            : #define HAVE_avx512dq_fpclassv8df_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3510                 :            : #define HAVE_avx512dq_fpclassv4df ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    3511                 :            : #define HAVE_avx512dq_fpclassv4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    3512                 :            : #define HAVE_avx512dq_fpclassv2df ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    3513                 :            : #define HAVE_avx512dq_fpclassv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_AVX512VL)))
    3514                 :            : #define HAVE_avx512dq_vmfpclassv4sf (TARGET_AVX512DQ)
    3515                 :            : #define HAVE_avx512dq_vmfpclassv4sf_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    3516                 :            : #define HAVE_avx512dq_vmfpclassv2df ((TARGET_AVX512DQ) && (TARGET_SSE2))
    3517                 :            : #define HAVE_avx512dq_vmfpclassv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512DQ) && (TARGET_SSE2)))
    3518                 :            : #define HAVE_avx512f_getmantv16sf (TARGET_AVX512F)
    3519                 :            : #define HAVE_avx512f_getmantv16sf_round (TARGET_AVX512F)
    3520                 :            : #define HAVE_avx512f_getmantv16sf_mask (TARGET_AVX512F)
    3521                 :            : #define HAVE_avx512f_getmantv16sf_mask_round (TARGET_AVX512F)
    3522                 :            : #define HAVE_avx512vl_getmantv8sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3523                 :            : #define HAVE_avx512vl_getmantv8sf_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3524                 :            : #define HAVE_avx512vl_getmantv8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3525                 :            : #define HAVE_avx512vl_getmantv8sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    3526                 :            : #define HAVE_avx512vl_getmantv4sf ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3527                 :            : #define HAVE_avx512vl_getmantv4sf_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3528                 :            : #define HAVE_avx512vl_getmantv4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3529                 :            : #define HAVE_avx512vl_getmantv4sf_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    3530                 :            : #define HAVE_avx512f_getmantv8df (TARGET_AVX512F)
    3531                 :            : #define HAVE_avx512f_getmantv8df_round (TARGET_AVX512F)
    3532                 :            : #define HAVE_avx512f_getmantv8df_mask (TARGET_AVX512F)
    3533                 :            : #define HAVE_avx512f_getmantv8df_mask_round (TARGET_AVX512F)
    3534                 :            : #define HAVE_avx512vl_getmantv4df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3535                 :            : #define HAVE_avx512vl_getmantv4df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3536                 :            : #define HAVE_avx512vl_getmantv4df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3537                 :            : #define HAVE_avx512vl_getmantv4df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    3538                 :            : #define HAVE_avx512vl_getmantv2df ((TARGET_AVX512F) && (TARGET_AVX512VL))
    3539                 :            : #define HAVE_avx512vl_getmantv2df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3540                 :            : #define HAVE_avx512vl_getmantv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    3541                 :            : #define HAVE_avx512vl_getmantv2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL))))
    3542                 :            : #define HAVE_avx512f_vgetmantv4sf (TARGET_AVX512F)
    3543                 :            : #define HAVE_avx512f_vgetmantv4sf_mask (TARGET_AVX512F)
    3544                 :            : #define HAVE_avx512f_vgetmantv4sf_round (TARGET_AVX512F)
    3545                 :            : #define HAVE_avx512f_vgetmantv4sf_mask_round (TARGET_AVX512F)
    3546                 :            : #define HAVE_avx512f_vgetmantv2df ((TARGET_AVX512F) && (TARGET_SSE2))
    3547                 :            : #define HAVE_avx512f_vgetmantv2df_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    3548                 :            : #define HAVE_avx512f_vgetmantv2df_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    3549                 :            : #define HAVE_avx512f_vgetmantv2df_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2))))
    3550                 :            : #define HAVE_avx512bw_dbpsadbwv8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3551                 :            : #define HAVE_avx512bw_dbpsadbwv16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    3552                 :            : #define HAVE_avx512bw_dbpsadbwv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    3553                 :            : #define HAVE_clzv16si2 (TARGET_AVX512CD)
    3554                 :            : #define HAVE_clzv16si2_mask ((TARGET_AVX512F) && (TARGET_AVX512CD))
    3555                 :            : #define HAVE_clzv8si2 ((TARGET_AVX512CD) && (TARGET_AVX512VL))
    3556                 :            : #define HAVE_clzv8si2_mask ((TARGET_AVX512F) && ((TARGET_AVX512CD) && (TARGET_AVX512VL)))
    3557                 :            : #define HAVE_clzv4si2 ((TARGET_AVX512CD) && (TARGET_AVX512VL))
    3558                 :            : #define HAVE_clzv4si2_mask ((TARGET_AVX512F) && ((TARGET_AVX512CD) && (TARGET_AVX512VL)))
    3559                 :            : #define HAVE_clzv8di2 (TARGET_AVX512CD)
    3560                 :            : #define HAVE_clzv8di2_mask ((TARGET_AVX512F) && (TARGET_AVX512CD))
    3561                 :            : #define HAVE_clzv4di2 ((TARGET_AVX512CD) && (TARGET_AVX512VL))
    3562                 :            : #define HAVE_clzv4di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512CD) && (TARGET_AVX512VL)))
    3563                 :            : #define HAVE_clzv2di2 ((TARGET_AVX512CD) && (TARGET_AVX512VL))
    3564                 :            : #define HAVE_clzv2di2_mask ((TARGET_AVX512F) && ((TARGET_AVX512CD) && (TARGET_AVX512VL)))
    3565                 :            : #define HAVE_conflictv16si_mask ((TARGET_AVX512F) && (TARGET_AVX512CD))
    3566                 :            : #define HAVE_conflictv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512CD) && (TARGET_AVX512VL)))
    3567                 :            : #define HAVE_conflictv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512CD) && (TARGET_AVX512VL)))
    3568                 :            : #define HAVE_conflictv8di_mask ((TARGET_AVX512F) && (TARGET_AVX512CD))
    3569                 :            : #define HAVE_conflictv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512CD) && (TARGET_AVX512VL)))
    3570                 :            : #define HAVE_conflictv2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512CD) && (TARGET_AVX512VL)))
    3571                 :            : #define HAVE_sha1msg1 (TARGET_SHA)
    3572                 :            : #define HAVE_sha1msg2 (TARGET_SHA)
    3573                 :            : #define HAVE_sha1nexte (TARGET_SHA)
    3574                 :            : #define HAVE_sha1rnds4 (TARGET_SHA)
    3575                 :            : #define HAVE_sha256msg1 (TARGET_SHA)
    3576                 :            : #define HAVE_sha256msg2 (TARGET_SHA)
    3577                 :            : #define HAVE_sha256rnds2 (TARGET_SHA)
    3578                 :            : #define HAVE_avx512f_si512_si (TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    3579                 :            : #define HAVE_avx512f_ps512_ps (TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    3580                 :            : #define HAVE_avx512f_pd512_pd (TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    3581                 :            : #define HAVE_avx512f_si512_256si (TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    3582                 :            : #define HAVE_avx512f_ps512_256ps (TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    3583                 :            : #define HAVE_avx512f_pd512_256pd (TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    3584                 :            : #define HAVE_vpamdd52luqv8di (TARGET_AVX512IFMA)
    3585                 :            : #define HAVE_vpamdd52luqv8di_maskz_1 (TARGET_AVX512IFMA)
    3586                 :            : #define HAVE_vpamdd52huqv8di (TARGET_AVX512IFMA)
    3587                 :            : #define HAVE_vpamdd52huqv8di_maskz_1 (TARGET_AVX512IFMA)
    3588                 :            : #define HAVE_vpamdd52luqv4di ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3589                 :            : #define HAVE_vpamdd52luqv4di_maskz_1 ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3590                 :            : #define HAVE_vpamdd52huqv4di ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3591                 :            : #define HAVE_vpamdd52huqv4di_maskz_1 ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3592                 :            : #define HAVE_vpamdd52luqv2di ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3593                 :            : #define HAVE_vpamdd52luqv2di_maskz_1 ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3594                 :            : #define HAVE_vpamdd52huqv2di ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3595                 :            : #define HAVE_vpamdd52huqv2di_maskz_1 ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3596                 :            : #define HAVE_vpamdd52luqv8di_mask (TARGET_AVX512IFMA)
    3597                 :            : #define HAVE_vpamdd52huqv8di_mask (TARGET_AVX512IFMA)
    3598                 :            : #define HAVE_vpamdd52luqv4di_mask ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3599                 :            : #define HAVE_vpamdd52huqv4di_mask ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3600                 :            : #define HAVE_vpamdd52luqv2di_mask ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3601                 :            : #define HAVE_vpamdd52huqv2di_mask ((TARGET_AVX512IFMA) && (TARGET_AVX512VL))
    3602                 :            : #define HAVE_vpmultishiftqbv64qi (TARGET_AVX512VBMI)
    3603                 :            : #define HAVE_vpmultishiftqbv64qi_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI))
    3604                 :            : #define HAVE_vpmultishiftqbv16qi ((TARGET_AVX512VBMI) && (TARGET_AVX512VL))
    3605                 :            : #define HAVE_vpmultishiftqbv16qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI) && (TARGET_AVX512VL)))
    3606                 :            : #define HAVE_vpmultishiftqbv32qi ((TARGET_AVX512VBMI) && (TARGET_AVX512VL))
    3607                 :            : #define HAVE_vpmultishiftqbv32qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI) && (TARGET_AVX512VL)))
    3608                 :            : #define HAVE_avx5124fmaddps_4fmaddps (TARGET_AVX5124FMAPS)
    3609                 :            : #define HAVE_avx5124fmaddps_4fmaddps_mask (TARGET_AVX5124FMAPS)
    3610                 :            : #define HAVE_avx5124fmaddps_4fmaddps_maskz (TARGET_AVX5124FMAPS)
    3611                 :            : #define HAVE_avx5124fmaddps_4fmaddss (TARGET_AVX5124FMAPS)
    3612                 :            : #define HAVE_avx5124fmaddps_4fmaddss_mask (TARGET_AVX5124FMAPS)
    3613                 :            : #define HAVE_avx5124fmaddps_4fmaddss_maskz (TARGET_AVX5124FMAPS)
    3614                 :            : #define HAVE_avx5124fmaddps_4fnmaddps (TARGET_AVX5124FMAPS)
    3615                 :            : #define HAVE_avx5124fmaddps_4fnmaddps_mask (TARGET_AVX5124FMAPS)
    3616                 :            : #define HAVE_avx5124fmaddps_4fnmaddps_maskz (TARGET_AVX5124FMAPS)
    3617                 :            : #define HAVE_avx5124fmaddps_4fnmaddss (TARGET_AVX5124FMAPS)
    3618                 :            : #define HAVE_avx5124fmaddps_4fnmaddss_mask (TARGET_AVX5124FMAPS)
    3619                 :            : #define HAVE_avx5124fmaddps_4fnmaddss_maskz (TARGET_AVX5124FMAPS)
    3620                 :            : #define HAVE_avx5124vnniw_vp4dpwssd (TARGET_AVX5124VNNIW)
    3621                 :            : #define HAVE_avx5124vnniw_vp4dpwssd_mask (TARGET_AVX5124VNNIW)
    3622                 :            : #define HAVE_avx5124vnniw_vp4dpwssd_maskz (TARGET_AVX5124VNNIW)
    3623                 :            : #define HAVE_avx5124vnniw_vp4dpwssds (TARGET_AVX5124VNNIW)
    3624                 :            : #define HAVE_avx5124vnniw_vp4dpwssds_mask (TARGET_AVX5124VNNIW)
    3625                 :            : #define HAVE_avx5124vnniw_vp4dpwssds_maskz (TARGET_AVX5124VNNIW)
    3626                 :            : #define HAVE_vpopcountv16si (TARGET_AVX512VPOPCNTDQ)
    3627                 :            : #define HAVE_vpopcountv16si_mask ((TARGET_AVX512F) && (TARGET_AVX512VPOPCNTDQ))
    3628                 :            : #define HAVE_vpopcountv8si ((TARGET_AVX512VPOPCNTDQ) && (TARGET_AVX512VL))
    3629                 :            : #define HAVE_vpopcountv8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512VPOPCNTDQ) && (TARGET_AVX512VL)))
    3630                 :            : #define HAVE_vpopcountv4si ((TARGET_AVX512VPOPCNTDQ) && (TARGET_AVX512VL))
    3631                 :            : #define HAVE_vpopcountv4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512VPOPCNTDQ) && (TARGET_AVX512VL)))
    3632                 :            : #define HAVE_vpopcountv8di (TARGET_AVX512VPOPCNTDQ)
    3633                 :            : #define HAVE_vpopcountv8di_mask ((TARGET_AVX512F) && (TARGET_AVX512VPOPCNTDQ))
    3634                 :            : #define HAVE_vpopcountv4di ((TARGET_AVX512VPOPCNTDQ) && (TARGET_AVX512VL))
    3635                 :            : #define HAVE_vpopcountv4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512VPOPCNTDQ) && (TARGET_AVX512VL)))
    3636                 :            : #define HAVE_vpopcountv2di ((TARGET_AVX512VPOPCNTDQ) && (TARGET_AVX512VL))
    3637                 :            : #define HAVE_vpopcountv2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512VPOPCNTDQ) && (TARGET_AVX512VL)))
    3638                 :            : #define HAVE_vpopcountv64qi (TARGET_AVX512BITALG)
    3639                 :            : #define HAVE_vpopcountv64qi_mask ((TARGET_AVX512F) && (TARGET_AVX512BITALG))
    3640                 :            : #define HAVE_vpopcountv16qi ((TARGET_AVX512BITALG) && (TARGET_AVX512VL))
    3641                 :            : #define HAVE_vpopcountv16qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BITALG) && (TARGET_AVX512VL)))
    3642                 :            : #define HAVE_vpopcountv32qi ((TARGET_AVX512BITALG) && (TARGET_AVX512VL))
    3643                 :            : #define HAVE_vpopcountv32qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BITALG) && (TARGET_AVX512VL)))
    3644                 :            : #define HAVE_vpopcountv32hi (TARGET_AVX512BITALG)
    3645                 :            : #define HAVE_vpopcountv32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BITALG))
    3646                 :            : #define HAVE_vpopcountv16hi ((TARGET_AVX512BITALG) && (TARGET_AVX512VL))
    3647                 :            : #define HAVE_vpopcountv16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BITALG) && (TARGET_AVX512VL)))
    3648                 :            : #define HAVE_vpopcountv8hi ((TARGET_AVX512BITALG) && (TARGET_AVX512VL))
    3649                 :            : #define HAVE_vpopcountv8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BITALG) && (TARGET_AVX512VL)))
    3650                 :            : #define HAVE_vgf2p8affineinvqb_v64qi ((TARGET_GFNI) && (TARGET_AVX512F))
    3651                 :            : #define HAVE_vgf2p8affineinvqb_v64qi_mask ((TARGET_AVX512F) && ((TARGET_GFNI) && (TARGET_AVX512F)))
    3652                 :            : #define HAVE_vgf2p8affineinvqb_v32qi ((TARGET_GFNI) && (TARGET_AVX))
    3653                 :            : #define HAVE_vgf2p8affineinvqb_v32qi_mask ((TARGET_AVX512F) && ((TARGET_GFNI) && (TARGET_AVX)))
    3654                 :            : #define HAVE_vgf2p8affineinvqb_v16qi (TARGET_GFNI)
    3655                 :            : #define HAVE_vgf2p8affineinvqb_v16qi_mask ((TARGET_AVX512F) && (TARGET_GFNI))
    3656                 :            : #define HAVE_vgf2p8affineqb_v64qi ((TARGET_GFNI) && (TARGET_AVX512F))
    3657                 :            : #define HAVE_vgf2p8affineqb_v64qi_mask ((TARGET_AVX512F) && ((TARGET_GFNI) && (TARGET_AVX512F)))
    3658                 :            : #define HAVE_vgf2p8affineqb_v32qi ((TARGET_GFNI) && (TARGET_AVX))
    3659                 :            : #define HAVE_vgf2p8affineqb_v32qi_mask ((TARGET_AVX512F) && ((TARGET_GFNI) && (TARGET_AVX)))
    3660                 :            : #define HAVE_vgf2p8affineqb_v16qi (TARGET_GFNI)
    3661                 :            : #define HAVE_vgf2p8affineqb_v16qi_mask ((TARGET_AVX512F) && (TARGET_GFNI))
    3662                 :            : #define HAVE_vgf2p8mulb_v64qi ((TARGET_GFNI) && (TARGET_AVX512F))
    3663                 :            : #define HAVE_vgf2p8mulb_v64qi_mask ((TARGET_AVX512F) && ((TARGET_GFNI) && (TARGET_AVX512F)))
    3664                 :            : #define HAVE_vgf2p8mulb_v32qi ((TARGET_GFNI) && (TARGET_AVX))
    3665                 :            : #define HAVE_vgf2p8mulb_v32qi_mask ((TARGET_AVX512F) && ((TARGET_GFNI) && (TARGET_AVX)))
    3666                 :            : #define HAVE_vgf2p8mulb_v16qi (TARGET_GFNI)
    3667                 :            : #define HAVE_vgf2p8mulb_v16qi_mask ((TARGET_AVX512F) && (TARGET_GFNI))
    3668                 :            : #define HAVE_vpshrd_v32hi (TARGET_AVX512VBMI2)
    3669                 :            : #define HAVE_vpshrd_v32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI2))
    3670                 :            : #define HAVE_vpshrd_v16si (TARGET_AVX512VBMI2)
    3671                 :            : #define HAVE_vpshrd_v16si_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI2))
    3672                 :            : #define HAVE_vpshrd_v8di (TARGET_AVX512VBMI2)
    3673                 :            : #define HAVE_vpshrd_v8di_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI2))
    3674                 :            : #define HAVE_vpshrd_v16hi ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3675                 :            : #define HAVE_vpshrd_v16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3676                 :            : #define HAVE_vpshrd_v8si ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3677                 :            : #define HAVE_vpshrd_v8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3678                 :            : #define HAVE_vpshrd_v4di ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3679                 :            : #define HAVE_vpshrd_v4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3680                 :            : #define HAVE_vpshrd_v8hi ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3681                 :            : #define HAVE_vpshrd_v8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3682                 :            : #define HAVE_vpshrd_v4si ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3683                 :            : #define HAVE_vpshrd_v4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3684                 :            : #define HAVE_vpshrd_v2di ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3685                 :            : #define HAVE_vpshrd_v2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3686                 :            : #define HAVE_vpshld_v32hi (TARGET_AVX512VBMI2)
    3687                 :            : #define HAVE_vpshld_v32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI2))
    3688                 :            : #define HAVE_vpshld_v16si (TARGET_AVX512VBMI2)
    3689                 :            : #define HAVE_vpshld_v16si_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI2))
    3690                 :            : #define HAVE_vpshld_v8di (TARGET_AVX512VBMI2)
    3691                 :            : #define HAVE_vpshld_v8di_mask ((TARGET_AVX512F) && (TARGET_AVX512VBMI2))
    3692                 :            : #define HAVE_vpshld_v16hi ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3693                 :            : #define HAVE_vpshld_v16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3694                 :            : #define HAVE_vpshld_v8si ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3695                 :            : #define HAVE_vpshld_v8si_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3696                 :            : #define HAVE_vpshld_v4di ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3697                 :            : #define HAVE_vpshld_v4di_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3698                 :            : #define HAVE_vpshld_v8hi ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3699                 :            : #define HAVE_vpshld_v8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3700                 :            : #define HAVE_vpshld_v4si ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3701                 :            : #define HAVE_vpshld_v4si_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3702                 :            : #define HAVE_vpshld_v2di ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3703                 :            : #define HAVE_vpshld_v2di_mask ((TARGET_AVX512F) && ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL)))
    3704                 :            : #define HAVE_vpshrdv_v32hi (TARGET_AVX512VBMI2)
    3705                 :            : #define HAVE_vpshrdv_v16si (TARGET_AVX512VBMI2)
    3706                 :            : #define HAVE_vpshrdv_v8di (TARGET_AVX512VBMI2)
    3707                 :            : #define HAVE_vpshrdv_v16hi ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3708                 :            : #define HAVE_vpshrdv_v8si ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3709                 :            : #define HAVE_vpshrdv_v4di ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3710                 :            : #define HAVE_vpshrdv_v8hi ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3711                 :            : #define HAVE_vpshrdv_v4si ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3712                 :            : #define HAVE_vpshrdv_v2di ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3713                 :            : #define HAVE_vpshrdv_v32hi_mask (TARGET_AVX512VBMI2)
    3714                 :            : #define HAVE_vpshrdv_v16si_mask (TARGET_AVX512VBMI2)
    3715                 :            : #define HAVE_vpshrdv_v8di_mask (TARGET_AVX512VBMI2)
    3716                 :            : #define HAVE_vpshrdv_v16hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3717                 :            : #define HAVE_vpshrdv_v8si_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3718                 :            : #define HAVE_vpshrdv_v4di_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3719                 :            : #define HAVE_vpshrdv_v8hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3720                 :            : #define HAVE_vpshrdv_v4si_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3721                 :            : #define HAVE_vpshrdv_v2di_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3722                 :            : #define HAVE_vpshrdv_v32hi_maskz_1 (TARGET_AVX512VBMI2)
    3723                 :            : #define HAVE_vpshrdv_v16si_maskz_1 (TARGET_AVX512VBMI2)
    3724                 :            : #define HAVE_vpshrdv_v8di_maskz_1 (TARGET_AVX512VBMI2)
    3725                 :            : #define HAVE_vpshrdv_v16hi_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3726                 :            : #define HAVE_vpshrdv_v8si_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3727                 :            : #define HAVE_vpshrdv_v4di_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3728                 :            : #define HAVE_vpshrdv_v8hi_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3729                 :            : #define HAVE_vpshrdv_v4si_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3730                 :            : #define HAVE_vpshrdv_v2di_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3731                 :            : #define HAVE_vpshldv_v32hi (TARGET_AVX512VBMI2)
    3732                 :            : #define HAVE_vpshldv_v16si (TARGET_AVX512VBMI2)
    3733                 :            : #define HAVE_vpshldv_v8di (TARGET_AVX512VBMI2)
    3734                 :            : #define HAVE_vpshldv_v16hi ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3735                 :            : #define HAVE_vpshldv_v8si ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3736                 :            : #define HAVE_vpshldv_v4di ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3737                 :            : #define HAVE_vpshldv_v8hi ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3738                 :            : #define HAVE_vpshldv_v4si ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3739                 :            : #define HAVE_vpshldv_v2di ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3740                 :            : #define HAVE_vpshldv_v32hi_mask (TARGET_AVX512VBMI2)
    3741                 :            : #define HAVE_vpshldv_v16si_mask (TARGET_AVX512VBMI2)
    3742                 :            : #define HAVE_vpshldv_v8di_mask (TARGET_AVX512VBMI2)
    3743                 :            : #define HAVE_vpshldv_v16hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3744                 :            : #define HAVE_vpshldv_v8si_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3745                 :            : #define HAVE_vpshldv_v4di_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3746                 :            : #define HAVE_vpshldv_v8hi_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3747                 :            : #define HAVE_vpshldv_v4si_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3748                 :            : #define HAVE_vpshldv_v2di_mask ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3749                 :            : #define HAVE_vpshldv_v32hi_maskz_1 (TARGET_AVX512VBMI2)
    3750                 :            : #define HAVE_vpshldv_v16si_maskz_1 (TARGET_AVX512VBMI2)
    3751                 :            : #define HAVE_vpshldv_v8di_maskz_1 (TARGET_AVX512VBMI2)
    3752                 :            : #define HAVE_vpshldv_v16hi_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3753                 :            : #define HAVE_vpshldv_v8si_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3754                 :            : #define HAVE_vpshldv_v4di_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3755                 :            : #define HAVE_vpshldv_v8hi_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3756                 :            : #define HAVE_vpshldv_v4si_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3757                 :            : #define HAVE_vpshldv_v2di_maskz_1 ((TARGET_AVX512VBMI2) && (TARGET_AVX512VL))
    3758                 :            : #define HAVE_vpdpbusd_v16si (TARGET_AVX512VNNI)
    3759                 :            : #define HAVE_vpdpbusd_v8si ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3760                 :            : #define HAVE_vpdpbusd_v4si ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3761                 :            : #define HAVE_vpdpbusd_v16si_mask (TARGET_AVX512VNNI)
    3762                 :            : #define HAVE_vpdpbusd_v8si_mask ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3763                 :            : #define HAVE_vpdpbusd_v4si_mask ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3764                 :            : #define HAVE_vpdpbusd_v16si_maskz_1 (TARGET_AVX512VNNI)
    3765                 :            : #define HAVE_vpdpbusd_v8si_maskz_1 ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3766                 :            : #define HAVE_vpdpbusd_v4si_maskz_1 ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3767                 :            : #define HAVE_vpdpbusds_v16si (TARGET_AVX512VNNI)
    3768                 :            : #define HAVE_vpdpbusds_v8si ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3769                 :            : #define HAVE_vpdpbusds_v4si ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3770                 :            : #define HAVE_vpdpbusds_v16si_mask (TARGET_AVX512VNNI)
    3771                 :            : #define HAVE_vpdpbusds_v8si_mask ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3772                 :            : #define HAVE_vpdpbusds_v4si_mask ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3773                 :            : #define HAVE_vpdpbusds_v16si_maskz_1 (TARGET_AVX512VNNI)
    3774                 :            : #define HAVE_vpdpbusds_v8si_maskz_1 ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3775                 :            : #define HAVE_vpdpbusds_v4si_maskz_1 ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3776                 :            : #define HAVE_vpdpwssd_v16si (TARGET_AVX512VNNI)
    3777                 :            : #define HAVE_vpdpwssd_v8si ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3778                 :            : #define HAVE_vpdpwssd_v4si ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3779                 :            : #define HAVE_vpdpwssd_v16si_mask (TARGET_AVX512VNNI)
    3780                 :            : #define HAVE_vpdpwssd_v8si_mask ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3781                 :            : #define HAVE_vpdpwssd_v4si_mask ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3782                 :            : #define HAVE_vpdpwssd_v16si_maskz_1 (TARGET_AVX512VNNI)
    3783                 :            : #define HAVE_vpdpwssd_v8si_maskz_1 ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3784                 :            : #define HAVE_vpdpwssd_v4si_maskz_1 ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3785                 :            : #define HAVE_vpdpwssds_v16si (TARGET_AVX512VNNI)
    3786                 :            : #define HAVE_vpdpwssds_v8si ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3787                 :            : #define HAVE_vpdpwssds_v4si ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3788                 :            : #define HAVE_vpdpwssds_v16si_mask (TARGET_AVX512VNNI)
    3789                 :            : #define HAVE_vpdpwssds_v8si_mask ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3790                 :            : #define HAVE_vpdpwssds_v4si_mask ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3791                 :            : #define HAVE_vpdpwssds_v16si_maskz_1 (TARGET_AVX512VNNI)
    3792                 :            : #define HAVE_vpdpwssds_v8si_maskz_1 ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3793                 :            : #define HAVE_vpdpwssds_v4si_maskz_1 ((TARGET_AVX512VNNI) && (TARGET_AVX512VL))
    3794                 :            : #define HAVE_vaesdec_v32qi (TARGET_VAES)
    3795                 :            : #define HAVE_vaesdec_v16qi ((TARGET_VAES) && (TARGET_AVX512VL))
    3796                 :            : #define HAVE_vaesdec_v64qi ((TARGET_VAES) && (TARGET_AVX512F))
    3797                 :            : #define HAVE_vaesdeclast_v32qi (TARGET_VAES)
    3798                 :            : #define HAVE_vaesdeclast_v16qi ((TARGET_VAES) && (TARGET_AVX512VL))
    3799                 :            : #define HAVE_vaesdeclast_v64qi ((TARGET_VAES) && (TARGET_AVX512F))
    3800                 :            : #define HAVE_vaesenc_v32qi (TARGET_VAES)
    3801                 :            : #define HAVE_vaesenc_v16qi ((TARGET_VAES) && (TARGET_AVX512VL))
    3802                 :            : #define HAVE_vaesenc_v64qi ((TARGET_VAES) && (TARGET_AVX512F))
    3803                 :            : #define HAVE_vaesenclast_v32qi (TARGET_VAES)
    3804                 :            : #define HAVE_vaesenclast_v16qi ((TARGET_VAES) && (TARGET_AVX512VL))
    3805                 :            : #define HAVE_vaesenclast_v64qi ((TARGET_VAES) && (TARGET_AVX512F))
    3806                 :            : #define HAVE_vpclmulqdq_v8di ((TARGET_VPCLMULQDQ) && (TARGET_AVX512F))
    3807                 :            : #define HAVE_vpclmulqdq_v4di (TARGET_VPCLMULQDQ)
    3808                 :            : #define HAVE_vpclmulqdq_v2di ((TARGET_VPCLMULQDQ) && (TARGET_AVX512VL))
    3809                 :            : #define HAVE_avx512vl_vpshufbitqmbv64qi ((TARGET_AVX512BITALG) && (TARGET_AVX512BW))
    3810                 :            : #define HAVE_avx512vl_vpshufbitqmbv64qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BITALG) && (TARGET_AVX512BW)))
    3811                 :            : #define HAVE_avx512vl_vpshufbitqmbv32qi ((TARGET_AVX512BITALG) && (TARGET_AVX512VL))
    3812                 :            : #define HAVE_avx512vl_vpshufbitqmbv32qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BITALG) && (TARGET_AVX512VL)))
    3813                 :            : #define HAVE_avx512vl_vpshufbitqmbv16qi ((TARGET_AVX512BITALG) && (TARGET_AVX512VL))
    3814                 :            : #define HAVE_avx512vl_vpshufbitqmbv16qi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BITALG) && (TARGET_AVX512VL)))
    3815                 :            : #define HAVE_avx512vp2intersect_2intersectv8di (TARGET_AVX512VP2INTERSECT)
    3816                 :            : #define HAVE_avx512vp2intersect_2intersectv4di ((TARGET_AVX512VP2INTERSECT) && (TARGET_AVX512VL))
    3817                 :            : #define HAVE_avx512vp2intersect_2intersectv2di ((TARGET_AVX512VP2INTERSECT) && (TARGET_AVX512VL))
    3818                 :            : #define HAVE_avx512vp2intersect_2intersectv8si ((TARGET_AVX512VP2INTERSECT) && (TARGET_AVX512VL))
    3819                 :            : #define HAVE_avx512vp2intersect_2intersectv4si ((TARGET_AVX512VP2INTERSECT) && (TARGET_AVX512VL))
    3820                 :            : #define HAVE_avx512vp2intersect_2intersectv16si (TARGET_AVX512VP2INTERSECT)
    3821                 :            : #define HAVE_avx512f_cvtne2ps2bf16_v32hi (TARGET_AVX512BF16)
    3822                 :            : #define HAVE_avx512f_cvtne2ps2bf16_v32hi_mask ((TARGET_AVX512F) && (TARGET_AVX512BF16))
    3823                 :            : #define HAVE_avx512f_cvtne2ps2bf16_v16hi ((TARGET_AVX512BF16) && (TARGET_AVX512VL))
    3824                 :            : #define HAVE_avx512f_cvtne2ps2bf16_v16hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BF16) && (TARGET_AVX512VL)))
    3825                 :            : #define HAVE_avx512f_cvtne2ps2bf16_v8hi ((TARGET_AVX512BF16) && (TARGET_AVX512VL))
    3826                 :            : #define HAVE_avx512f_cvtne2ps2bf16_v8hi_mask ((TARGET_AVX512F) && ((TARGET_AVX512BF16) && (TARGET_AVX512VL)))
    3827                 :            : #define HAVE_avx512f_cvtneps2bf16_v16sf (TARGET_AVX512BF16)
    3828                 :            : #define HAVE_avx512f_cvtneps2bf16_v16sf_mask ((TARGET_AVX512F) && (TARGET_AVX512BF16))
    3829                 :            : #define HAVE_avx512f_cvtneps2bf16_v8sf ((TARGET_AVX512BF16) && (TARGET_AVX512VL))
    3830                 :            : #define HAVE_avx512f_cvtneps2bf16_v8sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512BF16) && (TARGET_AVX512VL)))
    3831                 :            : #define HAVE_avx512f_cvtneps2bf16_v4sf ((TARGET_AVX512BF16) && (TARGET_AVX512VL))
    3832                 :            : #define HAVE_avx512f_cvtneps2bf16_v4sf_mask ((TARGET_AVX512F) && ((TARGET_AVX512BF16) && (TARGET_AVX512VL)))
    3833                 :            : #define HAVE_avx512f_dpbf16ps_v16sf (TARGET_AVX512BF16)
    3834                 :            : #define HAVE_avx512f_dpbf16ps_v16sf_maskz_1 (TARGET_AVX512BF16)
    3835                 :            : #define HAVE_avx512f_dpbf16ps_v8sf ((TARGET_AVX512BF16) && (TARGET_AVX512VL))
    3836                 :            : #define HAVE_avx512f_dpbf16ps_v8sf_maskz_1 ((TARGET_AVX512BF16) && (TARGET_AVX512VL))
    3837                 :            : #define HAVE_avx512f_dpbf16ps_v4sf ((TARGET_AVX512BF16) && (TARGET_AVX512VL))
    3838                 :            : #define HAVE_avx512f_dpbf16ps_v4sf_maskz_1 ((TARGET_AVX512BF16) && (TARGET_AVX512VL))
    3839                 :            : #define HAVE_avx512f_dpbf16ps_v16sf_mask (TARGET_AVX512BF16)
    3840                 :            : #define HAVE_avx512f_dpbf16ps_v8sf_mask ((TARGET_AVX512BF16) && (TARGET_AVX512VL))
    3841                 :            : #define HAVE_avx512f_dpbf16ps_v4sf_mask ((TARGET_AVX512BF16) && (TARGET_AVX512VL))
    3842                 :            : #define HAVE_mfence_sse2 (TARGET_64BIT || TARGET_SSE2)
    3843                 :            : #define HAVE_mfence_nosse (!(TARGET_64BIT || TARGET_SSE2))
    3844                 :            : #define HAVE_atomic_loaddi_fpu (!TARGET_64BIT && (TARGET_80387 || TARGET_SSE))
    3845                 :            : #define HAVE_atomic_storeqi_1 1
    3846                 :            : #define HAVE_atomic_storehi_1 1
    3847                 :            : #define HAVE_atomic_storesi_1 1
    3848                 :            : #define HAVE_atomic_storedi_1 (TARGET_64BIT)
    3849                 :            : #define HAVE_atomic_storedi_fpu (!TARGET_64BIT && (TARGET_80387 || TARGET_SSE))
    3850                 :            : #define HAVE_loaddi_via_fpu (TARGET_80387)
    3851                 :            : #define HAVE_storedi_via_fpu (TARGET_80387)
    3852                 :            : #define HAVE_loaddi_via_sse (TARGET_SSE)
    3853                 :            : #define HAVE_storedi_via_sse (TARGET_SSE)
    3854                 :            : #define HAVE_atomic_compare_and_swapdi_doubleword ((TARGET_CMPXCHG8B) && (!TARGET_64BIT))
    3855                 :            : #define HAVE_atomic_compare_and_swapti_doubleword ((TARGET_CMPXCHG16B) && (TARGET_64BIT))
    3856                 :            : #define HAVE_atomic_compare_and_swapqi_1 (TARGET_CMPXCHG)
    3857                 :            : #define HAVE_atomic_compare_and_swaphi_1 (TARGET_CMPXCHG)
    3858                 :            : #define HAVE_atomic_compare_and_swapsi_1 (TARGET_CMPXCHG)
    3859                 :            : #define HAVE_atomic_compare_and_swapdi_1 ((TARGET_CMPXCHG) && (TARGET_64BIT))
    3860                 :            : #define HAVE_atomic_fetch_addqi (TARGET_XADD)
    3861                 :            : #define HAVE_atomic_fetch_addhi (TARGET_XADD)
    3862                 :            : #define HAVE_atomic_fetch_addsi (TARGET_XADD)
    3863                 :            : #define HAVE_atomic_fetch_adddi ((TARGET_XADD) && (TARGET_64BIT))
    3864                 :            : #define HAVE_atomic_exchangeqi 1
    3865                 :            : #define HAVE_atomic_exchangehi 1
    3866                 :            : #define HAVE_atomic_exchangesi 1
    3867                 :            : #define HAVE_atomic_exchangedi (TARGET_64BIT)
    3868                 :            : #define HAVE_atomic_addqi 1
    3869                 :            : #define HAVE_atomic_addhi 1
    3870                 :            : #define HAVE_atomic_addsi 1
    3871                 :            : #define HAVE_atomic_adddi (TARGET_64BIT)
    3872                 :            : #define HAVE_atomic_subqi 1
    3873                 :            : #define HAVE_atomic_subhi 1
    3874                 :            : #define HAVE_atomic_subsi 1
    3875                 :            : #define HAVE_atomic_subdi (TARGET_64BIT)
    3876                 :            : #define HAVE_atomic_andqi 1
    3877                 :            : #define HAVE_atomic_orqi 1
    3878                 :            : #define HAVE_atomic_xorqi 1
    3879                 :            : #define HAVE_atomic_andhi 1
    3880                 :            : #define HAVE_atomic_orhi 1
    3881                 :            : #define HAVE_atomic_xorhi 1
    3882                 :            : #define HAVE_atomic_andsi 1
    3883                 :            : #define HAVE_atomic_orsi 1
    3884                 :            : #define HAVE_atomic_xorsi 1
    3885                 :            : #define HAVE_atomic_anddi (TARGET_64BIT)
    3886                 :            : #define HAVE_atomic_ordi (TARGET_64BIT)
    3887                 :            : #define HAVE_atomic_xordi (TARGET_64BIT)
    3888                 :            : #define HAVE_atomic_bit_test_and_sethi_1 1
    3889                 :            : #define HAVE_atomic_bit_test_and_setsi_1 1
    3890                 :            : #define HAVE_atomic_bit_test_and_setdi_1 (TARGET_64BIT)
    3891                 :            : #define HAVE_atomic_bit_test_and_complementhi_1 1
    3892                 :            : #define HAVE_atomic_bit_test_and_complementsi_1 1
    3893                 :            : #define HAVE_atomic_bit_test_and_complementdi_1 (TARGET_64BIT)
    3894                 :            : #define HAVE_atomic_bit_test_and_resethi_1 1
    3895                 :            : #define HAVE_atomic_bit_test_and_resetsi_1 1
    3896                 :            : #define HAVE_atomic_bit_test_and_resetdi_1 (TARGET_64BIT)
    3897                 :            : #define HAVE_cbranchqi4 (TARGET_QIMODE_MATH)
    3898                 :            : #define HAVE_cbranchhi4 (TARGET_HIMODE_MATH)
    3899                 :            : #define HAVE_cbranchsi4 1
    3900                 :            : #define HAVE_cbranchdi4 1
    3901                 :            : #define HAVE_cbranchti4 (TARGET_64BIT)
    3902                 :            : #define HAVE_cstoreqi4 (TARGET_QIMODE_MATH)
    3903                 :            : #define HAVE_cstorehi4 (TARGET_HIMODE_MATH)
    3904                 :            : #define HAVE_cstoresi4 1
    3905                 :            : #define HAVE_cstoredi4 (TARGET_64BIT)
    3906                 :            : #define HAVE_cmpsi_1 1
    3907                 :            : #define HAVE_cmpdi_1 (TARGET_64BIT)
    3908                 :            : #define HAVE_cmpqi_ext_3 1
    3909                 :            : #define HAVE_cbranchxf4 (TARGET_80387)
    3910                 :            : #define HAVE_cstorexf4 (TARGET_80387)
    3911                 :            : #define HAVE_cbranchsf4 (TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    3912                 :            : #define HAVE_cbranchdf4 (TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    3913                 :            : #define HAVE_cstoresf4 (TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    3914                 :            : #define HAVE_cstoredf4 (TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    3915                 :            : #define HAVE_cbranchcc4 1
    3916                 :            : #define HAVE_cstorecc4 1
    3917                 :            : #define HAVE_reload_noff_store (TARGET_64BIT)
    3918                 :            : #define HAVE_reload_noff_load (TARGET_64BIT)
    3919                 :            : #define HAVE_movxi (TARGET_AVX512F)
    3920                 :            : #define HAVE_movoi (TARGET_AVX)
    3921                 :            : #define HAVE_movti (TARGET_64BIT || TARGET_SSE)
    3922                 :            : #define HAVE_movcdi 1
    3923                 :            : #define HAVE_movqi 1
    3924                 :            : #define HAVE_movhi 1
    3925                 :            : #define HAVE_movsi 1
    3926                 :            : #define HAVE_movdi 1
    3927                 :            : #define HAVE_movstrictqi 1
    3928                 :            : #define HAVE_movstricthi 1
    3929                 :            : #define HAVE_extvhi 1
    3930                 :            : #define HAVE_extvsi 1
    3931                 :            : #define HAVE_extzvhi 1
    3932                 :            : #define HAVE_extzvsi 1
    3933                 :            : #define HAVE_extzvdi (TARGET_64BIT)
    3934                 :            : #define HAVE_insvhi 1
    3935                 :            : #define HAVE_insvsi 1
    3936                 :            : #define HAVE_insvdi (TARGET_64BIT)
    3937                 :            : #define HAVE_movtf (TARGET_64BIT || TARGET_SSE)
    3938                 :            : #define HAVE_movsf 1
    3939                 :            : #define HAVE_movdf 1
    3940                 :            : #define HAVE_movxf 1
    3941                 :            : #define HAVE_zero_extendsidi2 1
    3942                 :            : #define HAVE_zero_extendqisi2 1
    3943                 :            : #define HAVE_zero_extendhisi2 1
    3944                 :            : #define HAVE_zero_extendqihi2 1
    3945                 :            : #define HAVE_extendsidi2 1
    3946                 :            : #define HAVE_extendsfdf2 (TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH))
    3947                 :            : #define HAVE_extendsfxf2 (TARGET_80387)
    3948                 :            : #define HAVE_extenddfxf2 (TARGET_80387)
    3949                 :            : #define HAVE_fix_truncxfdi2 (TARGET_80387)
    3950                 :            : #define HAVE_fix_truncsfdi2 (TARGET_80387 || (TARGET_64BIT && SSE_FLOAT_MODE_P (SFmode)))
    3951                 :            : #define HAVE_fix_truncdfdi2 (TARGET_80387 || (TARGET_64BIT && SSE_FLOAT_MODE_P (DFmode)))
    3952                 :            : #define HAVE_fix_truncxfsi2 (TARGET_80387)
    3953                 :            : #define HAVE_fix_truncsfsi2 (TARGET_80387 || SSE_FLOAT_MODE_P (SFmode))
    3954                 :            : #define HAVE_fix_truncdfsi2 (TARGET_80387 || SSE_FLOAT_MODE_P (DFmode))
    3955                 :            : #define HAVE_fix_truncsfhi2 (TARGET_80387 \
    3956                 :            :    && !(SSE_FLOAT_MODE_P (SFmode) && (!TARGET_FISTTP || TARGET_SSE_MATH)))
    3957                 :            : #define HAVE_fix_truncdfhi2 (TARGET_80387 \
    3958                 :            :    && !(SSE_FLOAT_MODE_P (DFmode) && (!TARGET_FISTTP || TARGET_SSE_MATH)))
    3959                 :            : #define HAVE_fix_truncxfhi2 (TARGET_80387 \
    3960                 :            :    && !(SSE_FLOAT_MODE_P (XFmode) && (!TARGET_FISTTP || TARGET_SSE_MATH)))
    3961                 :            : #define HAVE_fixuns_truncsfsi2 ((!TARGET_64BIT || TARGET_AVX512F) && TARGET_SSE2 && TARGET_SSE_MATH)
    3962                 :            : #define HAVE_fixuns_truncdfsi2 ((!TARGET_64BIT || TARGET_AVX512F) && TARGET_SSE2 && TARGET_SSE_MATH)
    3963                 :            : #define HAVE_fixuns_truncsfhi2 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)
    3964                 :            : #define HAVE_fixuns_truncdfhi2 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)
    3965                 :            : #define HAVE_floatsisf2 ((TARGET_80387 && X87_ENABLE_FLOAT (SFmode, SImode)) \
    3966                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    3967                 :            :        && ((SImode != DImode) || TARGET_64BIT)))
    3968                 :            : #define HAVE_floatsidf2 ((TARGET_80387 && X87_ENABLE_FLOAT (DFmode, SImode)) \
    3969                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    3970                 :            :        && ((SImode != DImode) || TARGET_64BIT)))
    3971                 :            : #define HAVE_floatdisf2 ((TARGET_80387 && X87_ENABLE_FLOAT (SFmode, DImode)) \
    3972                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    3973                 :            :        && ((DImode != DImode) || TARGET_64BIT)))
    3974                 :            : #define HAVE_floatdidf2 ((TARGET_80387 && X87_ENABLE_FLOAT (DFmode, DImode)) \
    3975                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    3976                 :            :        && ((DImode != DImode) || TARGET_64BIT)))
    3977                 :            : #define HAVE_floatunsqisf2 (!TARGET_64BIT \
    3978                 :            :    && SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)
    3979                 :            : #define HAVE_floatunshisf2 (!TARGET_64BIT \
    3980                 :            :    && SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)
    3981                 :            : #define HAVE_floatunsqidf2 (!TARGET_64BIT \
    3982                 :            :    && SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)
    3983                 :            : #define HAVE_floatunshidf2 (!TARGET_64BIT \
    3984                 :            :    && SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)
    3985                 :            : #define HAVE_floatunssisf2 ((!TARGET_64BIT \
    3986                 :            :     && TARGET_80387 && X87_ENABLE_FLOAT (SFmode, DImode) \
    3987                 :            :     && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC) \
    3988                 :            :    || ((!TARGET_64BIT || TARGET_AVX512F) \
    3989                 :            :        && SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    3990                 :            : #define HAVE_floatunssidf2 ((!TARGET_64BIT \
    3991                 :            :     && TARGET_80387 && X87_ENABLE_FLOAT (DFmode, DImode) \
    3992                 :            :     && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC) \
    3993                 :            :    || ((!TARGET_64BIT || TARGET_AVX512F) \
    3994                 :            :        && SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    3995                 :            : #define HAVE_floatunssixf2 ((!TARGET_64BIT \
    3996                 :            :     && TARGET_80387 && X87_ENABLE_FLOAT (XFmode, DImode) \
    3997                 :            :     && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC) \
    3998                 :            :    || ((!TARGET_64BIT || TARGET_AVX512F) \
    3999                 :            :        && SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH))
    4000                 :            : #define HAVE_floatunsdisf2 (TARGET_64BIT && TARGET_SSE && TARGET_SSE_MATH)
    4001                 :            : #define HAVE_floatunsdidf2 (((TARGET_64BIT && TARGET_AVX512F) \
    4002                 :            :     || TARGET_KEEPS_VECTOR_ALIGNED_STACK) \
    4003                 :            :    && TARGET_SSE2 && TARGET_SSE_MATH)
    4004                 :            : #define HAVE_addqi3 (TARGET_QIMODE_MATH)
    4005                 :            : #define HAVE_addhi3 (TARGET_HIMODE_MATH)
    4006                 :            : #define HAVE_addsi3 1
    4007                 :            : #define HAVE_adddi3 1
    4008                 :            : #define HAVE_addti3 (TARGET_64BIT)
    4009                 :            : #define HAVE_addvqi4 1
    4010                 :            : #define HAVE_addvhi4 1
    4011                 :            : #define HAVE_addvsi4 1
    4012                 :            : #define HAVE_addvdi4 1
    4013                 :            : #define HAVE_addvti4 (TARGET_64BIT)
    4014                 :            : #define HAVE_uaddvqi4 1
    4015                 :            : #define HAVE_uaddvhi4 1
    4016                 :            : #define HAVE_uaddvsi4 1
    4017                 :            : #define HAVE_uaddvdi4 1
    4018                 :            : #define HAVE_uaddvti4 (TARGET_64BIT)
    4019                 :            : #define HAVE_subqi3 (TARGET_QIMODE_MATH)
    4020                 :            : #define HAVE_subhi3 (TARGET_HIMODE_MATH)
    4021                 :            : #define HAVE_subsi3 1
    4022                 :            : #define HAVE_subdi3 1
    4023                 :            : #define HAVE_subti3 (TARGET_64BIT)
    4024                 :            : #define HAVE_subvqi4 1
    4025                 :            : #define HAVE_subvhi4 1
    4026                 :            : #define HAVE_subvsi4 1
    4027                 :            : #define HAVE_subvdi4 1
    4028                 :            : #define HAVE_subvti4 (TARGET_64BIT)
    4029                 :            : #define HAVE_usubvqi4 1
    4030                 :            : #define HAVE_usubvhi4 1
    4031                 :            : #define HAVE_usubvsi4 1
    4032                 :            : #define HAVE_usubvdi4 (TARGET_64BIT)
    4033                 :            : #define HAVE_addcarrysi_0 (ix86_binary_operator_ok (PLUS, SImode, operands))
    4034                 :            : #define HAVE_addcarrydi_0 ((ix86_binary_operator_ok (PLUS, DImode, operands)) && (TARGET_64BIT))
    4035                 :            : #define HAVE_subborrowsi_0 (ix86_binary_operator_ok (MINUS, SImode, operands))
    4036                 :            : #define HAVE_subborrowdi_0 ((ix86_binary_operator_ok (MINUS, DImode, operands)) && (TARGET_64BIT))
    4037                 :            : #define HAVE_addqi3_cconly_overflow (!(MEM_P (operands[0]) && MEM_P (operands[1])))
    4038                 :            : #define HAVE_addxf3 (TARGET_80387)
    4039                 :            : #define HAVE_subxf3 (TARGET_80387)
    4040                 :            : #define HAVE_addsf3 ((TARGET_80387 && X87_ENABLE_ARITH (SFmode)) \
    4041                 :            :     || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    4042                 :            : #define HAVE_subsf3 ((TARGET_80387 && X87_ENABLE_ARITH (SFmode)) \
    4043                 :            :     || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    4044                 :            : #define HAVE_adddf3 ((TARGET_80387 && X87_ENABLE_ARITH (DFmode)) \
    4045                 :            :     || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    4046                 :            : #define HAVE_subdf3 ((TARGET_80387 && X87_ENABLE_ARITH (DFmode)) \
    4047                 :            :     || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    4048                 :            : #define HAVE_mulhi3 (TARGET_HIMODE_MATH)
    4049                 :            : #define HAVE_mulsi3 1
    4050                 :            : #define HAVE_muldi3 (TARGET_64BIT)
    4051                 :            : #define HAVE_mulqi3 (TARGET_QIMODE_MATH)
    4052                 :            : #define HAVE_mulvhi4 1
    4053                 :            : #define HAVE_mulvsi4 1
    4054                 :            : #define HAVE_mulvdi4 (TARGET_64BIT)
    4055                 :            : #define HAVE_umulvhi4 1
    4056                 :            : #define HAVE_umulvsi4 1
    4057                 :            : #define HAVE_umulvdi4 (TARGET_64BIT)
    4058                 :            : #define HAVE_mulvqi4 (TARGET_QIMODE_MATH)
    4059                 :            : #define HAVE_umulvqi4 (TARGET_QIMODE_MATH)
    4060                 :            : #define HAVE_mulsidi3 (!TARGET_64BIT)
    4061                 :            : #define HAVE_umulsidi3 (!TARGET_64BIT)
    4062                 :            : #define HAVE_mulditi3 (TARGET_64BIT)
    4063                 :            : #define HAVE_umulditi3 (TARGET_64BIT)
    4064                 :            : #define HAVE_mulqihi3 (TARGET_QIMODE_MATH)
    4065                 :            : #define HAVE_umulqihi3 (TARGET_QIMODE_MATH)
    4066                 :            : #define HAVE_smulsi3_highpart (!TARGET_64BIT)
    4067                 :            : #define HAVE_umulsi3_highpart (!TARGET_64BIT)
    4068                 :            : #define HAVE_smuldi3_highpart (TARGET_64BIT)
    4069                 :            : #define HAVE_umuldi3_highpart (TARGET_64BIT)
    4070                 :            : #define HAVE_mulxf3 (TARGET_80387)
    4071                 :            : #define HAVE_mulsf3 ((TARGET_80387 && X87_ENABLE_ARITH (SFmode)) \
    4072                 :            :     || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    4073                 :            : #define HAVE_muldf3 ((TARGET_80387 && X87_ENABLE_ARITH (DFmode)) \
    4074                 :            :     || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    4075                 :            : #define HAVE_divxf3 (TARGET_80387)
    4076                 :            : #define HAVE_divsf3 ((TARGET_80387 && X87_ENABLE_ARITH (SFmode)) \
    4077                 :            :     || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    4078                 :            : #define HAVE_divdf3 ((TARGET_80387 && X87_ENABLE_ARITH (DFmode)) \
    4079                 :            :     || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    4080                 :            : #define HAVE_divmodhi4 (TARGET_HIMODE_MATH)
    4081                 :            : #define HAVE_udivmodhi4 (TARGET_HIMODE_MATH)
    4082                 :            : #define HAVE_divmodsi4 1
    4083                 :            : #define HAVE_udivmodsi4 1
    4084                 :            : #define HAVE_divmoddi4 (TARGET_64BIT)
    4085                 :            : #define HAVE_udivmoddi4 (TARGET_64BIT)
    4086                 :            : #define HAVE_divmodqi4 (TARGET_QIMODE_MATH)
    4087                 :            : #define HAVE_udivmodqi4 (TARGET_QIMODE_MATH)
    4088                 :            : #define HAVE_testsi_ccno_1 1
    4089                 :            : #define HAVE_testdi_ccno_1 (TARGET_64BIT)
    4090                 :            : #define HAVE_testqi_ccz_1 1
    4091                 :            : #define HAVE_testqi_ext_1_ccno 1
    4092                 :            : #define HAVE_andqi3 (TARGET_QIMODE_MATH)
    4093                 :            : #define HAVE_andhi3 (TARGET_HIMODE_MATH)
    4094                 :            : #define HAVE_andsi3 1
    4095                 :            : #define HAVE_anddi3 (TARGET_64BIT || (TARGET_STV && TARGET_SSE2))
    4096                 :            : #define HAVE_iorqi3 (TARGET_QIMODE_MATH)
    4097                 :            : #define HAVE_xorqi3 (TARGET_QIMODE_MATH)
    4098                 :            : #define HAVE_iorhi3 (TARGET_HIMODE_MATH)
    4099                 :            : #define HAVE_xorhi3 (TARGET_HIMODE_MATH)
    4100                 :            : #define HAVE_iorsi3 1
    4101                 :            : #define HAVE_xorsi3 1
    4102                 :            : #define HAVE_iordi3 (TARGET_64BIT || (TARGET_STV && TARGET_SSE2))
    4103                 :            : #define HAVE_xordi3 (TARGET_64BIT || (TARGET_STV && TARGET_SSE2))
    4104                 :            : #define HAVE_xorqi_ext_1_cc 1
    4105                 :            : #define HAVE_negqi2 (TARGET_QIMODE_MATH)
    4106                 :            : #define HAVE_neghi2 (TARGET_HIMODE_MATH)
    4107                 :            : #define HAVE_negsi2 1
    4108                 :            : #define HAVE_negdi2 1
    4109                 :            : #define HAVE_negti2 (TARGET_64BIT)
    4110                 :            : #define HAVE_negvqi3 1
    4111                 :            : #define HAVE_negvhi3 1
    4112                 :            : #define HAVE_negvsi3 1
    4113                 :            : #define HAVE_negvdi3 (TARGET_64BIT)
    4114                 :            : #define HAVE_abstf2 (TARGET_SSE)
    4115                 :            : #define HAVE_negtf2 (TARGET_SSE)
    4116                 :            : #define HAVE_abssi2 (TARGET_EXPAND_ABS)
    4117                 :            : #define HAVE_absdi2 (TARGET_EXPAND_ABS)
    4118                 :            : #define HAVE_abssf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    4119                 :            : #define HAVE_negsf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    4120                 :            : #define HAVE_absdf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    4121                 :            : #define HAVE_negdf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    4122                 :            : #define HAVE_absxf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH))
    4123                 :            : #define HAVE_negxf2 (TARGET_80387 || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH))
    4124                 :            : #define HAVE_copysignsf3 ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4125                 :            :    || (TARGET_SSE && (SFmode == TFmode)))
    4126                 :            : #define HAVE_copysigndf3 ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4127                 :            :    || (TARGET_SSE && (DFmode == TFmode)))
    4128                 :            : #define HAVE_copysigntf3 ((SSE_FLOAT_MODE_P (TFmode) && TARGET_SSE_MATH) \
    4129                 :            :    || (TARGET_SSE && (TFmode == TFmode)))
    4130                 :            : #define HAVE_xorsignsf3 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)
    4131                 :            : #define HAVE_xorsigndf3 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)
    4132                 :            : #define HAVE_one_cmplqi2 (TARGET_QIMODE_MATH)
    4133                 :            : #define HAVE_one_cmplhi2 (TARGET_HIMODE_MATH)
    4134                 :            : #define HAVE_one_cmplsi2 1
    4135                 :            : #define HAVE_one_cmpldi2 (TARGET_64BIT || (TARGET_STV && TARGET_SSE2))
    4136                 :            : #define HAVE_ashlqi3 (TARGET_QIMODE_MATH)
    4137                 :            : #define HAVE_ashlhi3 (TARGET_HIMODE_MATH)
    4138                 :            : #define HAVE_ashlsi3 1
    4139                 :            : #define HAVE_ashldi3 1
    4140                 :            : #define HAVE_ashlti3 (TARGET_64BIT)
    4141                 :            : #define HAVE_x86_shiftsi_adj_1 (TARGET_CMOVE)
    4142                 :            : #define HAVE_x86_shiftdi_adj_1 ((TARGET_CMOVE) && (TARGET_64BIT))
    4143                 :            : #define HAVE_x86_shiftsi_adj_2 1
    4144                 :            : #define HAVE_x86_shiftdi_adj_2 (TARGET_64BIT)
    4145                 :            : #define HAVE_lshrqi3 (TARGET_QIMODE_MATH)
    4146                 :            : #define HAVE_ashrqi3 (TARGET_QIMODE_MATH)
    4147                 :            : #define HAVE_lshrhi3 (TARGET_HIMODE_MATH)
    4148                 :            : #define HAVE_ashrhi3 (TARGET_HIMODE_MATH)
    4149                 :            : #define HAVE_lshrsi3 1
    4150                 :            : #define HAVE_ashrsi3 1
    4151                 :            : #define HAVE_lshrdi3 1
    4152                 :            : #define HAVE_ashrdi3 1
    4153                 :            : #define HAVE_lshrti3 (TARGET_64BIT)
    4154                 :            : #define HAVE_ashrti3 (TARGET_64BIT)
    4155                 :            : #define HAVE_x86_shiftsi_adj_3 1
    4156                 :            : #define HAVE_x86_shiftdi_adj_3 (TARGET_64BIT)
    4157                 :            : #define HAVE_rotlti3 (TARGET_64BIT)
    4158                 :            : #define HAVE_rotrti3 (TARGET_64BIT)
    4159                 :            : #define HAVE_rotldi3 1
    4160                 :            : #define HAVE_rotrdi3 1
    4161                 :            : #define HAVE_rotlqi3 (TARGET_QIMODE_MATH)
    4162                 :            : #define HAVE_rotrqi3 (TARGET_QIMODE_MATH)
    4163                 :            : #define HAVE_rotlhi3 (TARGET_HIMODE_MATH)
    4164                 :            : #define HAVE_rotrhi3 (TARGET_HIMODE_MATH)
    4165                 :            : #define HAVE_rotlsi3 1
    4166                 :            : #define HAVE_rotrsi3 1
    4167                 :            : #define HAVE_indirect_jump 1
    4168                 :            : #define HAVE_tablejump 1
    4169                 :            : #define HAVE_call 1
    4170                 :            : #define HAVE_sibcall 1
    4171                 :            : #define HAVE_call_pop (!TARGET_64BIT)
    4172                 :            : #define HAVE_call_value 1
    4173                 :            : #define HAVE_sibcall_value 1
    4174                 :            : #define HAVE_call_value_pop (!TARGET_64BIT)
    4175                 :            : #define HAVE_untyped_call 1
    4176                 :            : #define HAVE_memory_blockage 1
    4177                 :            : #define HAVE_return (ix86_can_use_return_insn_p ())
    4178                 :            : #define HAVE_simple_return (!TARGET_SEH && !ix86_static_chain_on_stack)
    4179                 :            : #define HAVE_simple_return_indirect_internal 1
    4180                 :            : #define HAVE_prologue 1
    4181                 :            : #define HAVE_set_got (!TARGET_64BIT)
    4182                 :            : #define HAVE_set_got_labelled (!TARGET_64BIT)
    4183                 :            : #define HAVE_epilogue 1
    4184                 :            : #define HAVE_sibcall_epilogue 1
    4185                 :            : #define HAVE_eh_return 1
    4186                 :            : #define HAVE_leave_si (word_mode == SImode)
    4187                 :            : #define HAVE_leave_di (word_mode == DImode)
    4188                 :            : #define HAVE_split_stack_prologue 1
    4189                 :            : #define HAVE_split_stack_space_check 1
    4190                 :            : #define HAVE_ffssi2 1
    4191                 :            : #define HAVE_ffsdi2 (TARGET_64BIT)
    4192                 :            : #define HAVE_clzsi2 1
    4193                 :            : #define HAVE_clzdi2 (TARGET_64BIT)
    4194                 :            : #define HAVE_bmi2_bzhi_si3 (TARGET_BMI2)
    4195                 :            : #define HAVE_bmi2_bzhi_di3 ((TARGET_BMI2) && (TARGET_64BIT))
    4196                 :            : #define HAVE_tbm_bextri_si (TARGET_TBM)
    4197                 :            : #define HAVE_tbm_bextri_di ((TARGET_TBM) && (TARGET_64BIT))
    4198                 :            : #define HAVE_bswapdi2 (TARGET_64BIT)
    4199                 :            : #define HAVE_bswapsi2 1
    4200                 :            : #define HAVE_bswaphi2 (TARGET_MOVBE)
    4201                 :            : #define HAVE_paritydi2 (! TARGET_POPCNT)
    4202                 :            : #define HAVE_paritysi2 (! TARGET_POPCNT)
    4203                 :            : #define HAVE_tls_global_dynamic_32 1
    4204                 :            : #define HAVE_tls_global_dynamic_64_si ((TARGET_64BIT) && (Pmode == SImode))
    4205                 :            : #define HAVE_tls_global_dynamic_64_di ((TARGET_64BIT) && (Pmode == DImode))
    4206                 :            : #define HAVE_tls_local_dynamic_base_32 1
    4207                 :            : #define HAVE_tls_local_dynamic_base_64_si ((TARGET_64BIT) && (Pmode == SImode))
    4208                 :            : #define HAVE_tls_local_dynamic_base_64_di ((TARGET_64BIT) && (Pmode == DImode))
    4209                 :            : #define HAVE_tls_dynamic_gnu2_32 (!TARGET_64BIT && TARGET_GNU2_TLS)
    4210                 :            : #define HAVE_tls_dynamic_gnu2_64_si ((TARGET_64BIT && TARGET_GNU2_TLS) && (ptr_mode == SImode))
    4211                 :            : #define HAVE_tls_dynamic_gnu2_64_di ((TARGET_64BIT && TARGET_GNU2_TLS) && (ptr_mode == DImode))
    4212                 :            : #define HAVE_rsqrtsf2 (TARGET_SSE && TARGET_SSE_MATH)
    4213                 :            : #define HAVE_sqrtsf2 ((TARGET_USE_FANCY_MATH_387 && X87_ENABLE_ARITH (SFmode)) \
    4214                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    4215                 :            : #define HAVE_sqrtdf2 ((TARGET_USE_FANCY_MATH_387 && X87_ENABLE_ARITH (DFmode)) \
    4216                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    4217                 :            : #define HAVE_hypotsf3 (TARGET_USE_FANCY_MATH_387 \
    4218                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4219                 :            :        || TARGET_MIX_SSE_I387) \
    4220                 :            :    && flag_finite_math_only \
    4221                 :            :    && flag_unsafe_math_optimizations)
    4222                 :            : #define HAVE_hypotdf3 (TARGET_USE_FANCY_MATH_387 \
    4223                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4224                 :            :        || TARGET_MIX_SSE_I387) \
    4225                 :            :    && flag_finite_math_only \
    4226                 :            :    && flag_unsafe_math_optimizations)
    4227                 :            : #define HAVE_fmodxf3 (TARGET_USE_FANCY_MATH_387 \
    4228                 :            :    && flag_finite_math_only)
    4229                 :            : #define HAVE_fmodsf3 (TARGET_USE_FANCY_MATH_387 \
    4230                 :            :    && flag_finite_math_only)
    4231                 :            : #define HAVE_fmoddf3 (TARGET_USE_FANCY_MATH_387 \
    4232                 :            :    && flag_finite_math_only)
    4233                 :            : #define HAVE_remainderxf3 (TARGET_USE_FANCY_MATH_387 \
    4234                 :            :    && flag_finite_math_only)
    4235                 :            : #define HAVE_remaindersf3 (TARGET_USE_FANCY_MATH_387 \
    4236                 :            :    && flag_finite_math_only)
    4237                 :            : #define HAVE_remainderdf3 (TARGET_USE_FANCY_MATH_387 \
    4238                 :            :    && flag_finite_math_only)
    4239                 :            : #define HAVE_sinsf2 (TARGET_USE_FANCY_MATH_387 \
    4240                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4241                 :            :        || TARGET_MIX_SSE_I387) \
    4242                 :            :    && flag_unsafe_math_optimizations)
    4243                 :            : #define HAVE_cossf2 (TARGET_USE_FANCY_MATH_387 \
    4244                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4245                 :            :        || TARGET_MIX_SSE_I387) \
    4246                 :            :    && flag_unsafe_math_optimizations)
    4247                 :            : #define HAVE_sindf2 (TARGET_USE_FANCY_MATH_387 \
    4248                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4249                 :            :        || TARGET_MIX_SSE_I387) \
    4250                 :            :    && flag_unsafe_math_optimizations)
    4251                 :            : #define HAVE_cosdf2 (TARGET_USE_FANCY_MATH_387 \
    4252                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4253                 :            :        || TARGET_MIX_SSE_I387) \
    4254                 :            :    && flag_unsafe_math_optimizations)
    4255                 :            : #define HAVE_sincossf3 (TARGET_USE_FANCY_MATH_387 \
    4256                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4257                 :            :        || TARGET_MIX_SSE_I387) \
    4258                 :            :    && flag_unsafe_math_optimizations)
    4259                 :            : #define HAVE_sincosdf3 (TARGET_USE_FANCY_MATH_387 \
    4260                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4261                 :            :        || TARGET_MIX_SSE_I387) \
    4262                 :            :    && flag_unsafe_math_optimizations)
    4263                 :            : #define HAVE_tanxf2 (TARGET_USE_FANCY_MATH_387 \
    4264                 :            :    && flag_unsafe_math_optimizations)
    4265                 :            : #define HAVE_tansf2 (TARGET_USE_FANCY_MATH_387 \
    4266                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4267                 :            :        || TARGET_MIX_SSE_I387) \
    4268                 :            :    && flag_unsafe_math_optimizations)
    4269                 :            : #define HAVE_tandf2 (TARGET_USE_FANCY_MATH_387 \
    4270                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4271                 :            :        || TARGET_MIX_SSE_I387) \
    4272                 :            :    && flag_unsafe_math_optimizations)
    4273                 :            : #define HAVE_atan2sf3 (TARGET_USE_FANCY_MATH_387 \
    4274                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4275                 :            :        || TARGET_MIX_SSE_I387) \
    4276                 :            :    && flag_unsafe_math_optimizations)
    4277                 :            : #define HAVE_atan2df3 (TARGET_USE_FANCY_MATH_387 \
    4278                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4279                 :            :        || TARGET_MIX_SSE_I387) \
    4280                 :            :    && flag_unsafe_math_optimizations)
    4281                 :            : #define HAVE_atanxf2 (TARGET_USE_FANCY_MATH_387 \
    4282                 :            :    && flag_unsafe_math_optimizations)
    4283                 :            : #define HAVE_atansf2 (TARGET_USE_FANCY_MATH_387 \
    4284                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4285                 :            :        || TARGET_MIX_SSE_I387) \
    4286                 :            :    && flag_unsafe_math_optimizations)
    4287                 :            : #define HAVE_atandf2 (TARGET_USE_FANCY_MATH_387 \
    4288                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4289                 :            :        || TARGET_MIX_SSE_I387) \
    4290                 :            :    && flag_unsafe_math_optimizations)
    4291                 :            : #define HAVE_asinxf2 (TARGET_USE_FANCY_MATH_387 \
    4292                 :            :    && flag_unsafe_math_optimizations)
    4293                 :            : #define HAVE_asinsf2 (TARGET_USE_FANCY_MATH_387 \
    4294                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4295                 :            :        || TARGET_MIX_SSE_I387) \
    4296                 :            :    && flag_unsafe_math_optimizations)
    4297                 :            : #define HAVE_asindf2 (TARGET_USE_FANCY_MATH_387 \
    4298                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4299                 :            :        || TARGET_MIX_SSE_I387) \
    4300                 :            :    && flag_unsafe_math_optimizations)
    4301                 :            : #define HAVE_acosxf2 (TARGET_USE_FANCY_MATH_387 \
    4302                 :            :    && flag_unsafe_math_optimizations)
    4303                 :            : #define HAVE_acossf2 (TARGET_USE_FANCY_MATH_387 \
    4304                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4305                 :            :        || TARGET_MIX_SSE_I387) \
    4306                 :            :    && flag_unsafe_math_optimizations)
    4307                 :            : #define HAVE_acosdf2 (TARGET_USE_FANCY_MATH_387 \
    4308                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4309                 :            :        || TARGET_MIX_SSE_I387) \
    4310                 :            :    && flag_unsafe_math_optimizations)
    4311                 :            : #define HAVE_sinhxf2 (TARGET_USE_FANCY_MATH_387 \
    4312                 :            :    && flag_finite_math_only \
    4313                 :            :    && flag_unsafe_math_optimizations)
    4314                 :            : #define HAVE_sinhsf2 (TARGET_USE_FANCY_MATH_387 \
    4315                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4316                 :            :        || TARGET_MIX_SSE_I387) \
    4317                 :            :    && flag_finite_math_only \
    4318                 :            :    && flag_unsafe_math_optimizations)
    4319                 :            : #define HAVE_sinhdf2 (TARGET_USE_FANCY_MATH_387 \
    4320                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4321                 :            :        || TARGET_MIX_SSE_I387) \
    4322                 :            :    && flag_finite_math_only \
    4323                 :            :    && flag_unsafe_math_optimizations)
    4324                 :            : #define HAVE_coshxf2 (TARGET_USE_FANCY_MATH_387 \
    4325                 :            :    && flag_unsafe_math_optimizations)
    4326                 :            : #define HAVE_coshsf2 (TARGET_USE_FANCY_MATH_387 \
    4327                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4328                 :            :        || TARGET_MIX_SSE_I387) \
    4329                 :            :    && flag_unsafe_math_optimizations)
    4330                 :            : #define HAVE_coshdf2 (TARGET_USE_FANCY_MATH_387 \
    4331                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4332                 :            :        || TARGET_MIX_SSE_I387) \
    4333                 :            :    && flag_unsafe_math_optimizations)
    4334                 :            : #define HAVE_tanhxf2 (TARGET_USE_FANCY_MATH_387 \
    4335                 :            :    && flag_unsafe_math_optimizations)
    4336                 :            : #define HAVE_tanhsf2 (TARGET_USE_FANCY_MATH_387 \
    4337                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4338                 :            :        || TARGET_MIX_SSE_I387) \
    4339                 :            :    && flag_unsafe_math_optimizations)
    4340                 :            : #define HAVE_tanhdf2 (TARGET_USE_FANCY_MATH_387 \
    4341                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4342                 :            :        || TARGET_MIX_SSE_I387) \
    4343                 :            :    && flag_unsafe_math_optimizations)
    4344                 :            : #define HAVE_asinhxf2 (TARGET_USE_FANCY_MATH_387 \
    4345                 :            :    && flag_finite_math_only \
    4346                 :            :    && flag_unsafe_math_optimizations)
    4347                 :            : #define HAVE_asinhsf2 (TARGET_USE_FANCY_MATH_387 \
    4348                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4349                 :            :        || TARGET_MIX_SSE_I387) \
    4350                 :            :    && flag_finite_math_only \
    4351                 :            :    && flag_unsafe_math_optimizations)
    4352                 :            : #define HAVE_asinhdf2 (TARGET_USE_FANCY_MATH_387 \
    4353                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4354                 :            :        || TARGET_MIX_SSE_I387) \
    4355                 :            :    && flag_finite_math_only \
    4356                 :            :    && flag_unsafe_math_optimizations)
    4357                 :            : #define HAVE_acoshxf2 (TARGET_USE_FANCY_MATH_387 \
    4358                 :            :    && flag_unsafe_math_optimizations)
    4359                 :            : #define HAVE_acoshsf2 (TARGET_USE_FANCY_MATH_387 \
    4360                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4361                 :            :        || TARGET_MIX_SSE_I387) \
    4362                 :            :    && flag_unsafe_math_optimizations)
    4363                 :            : #define HAVE_acoshdf2 (TARGET_USE_FANCY_MATH_387 \
    4364                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4365                 :            :        || TARGET_MIX_SSE_I387) \
    4366                 :            :    && flag_unsafe_math_optimizations)
    4367                 :            : #define HAVE_atanhxf2 (TARGET_USE_FANCY_MATH_387 \
    4368                 :            :    && flag_unsafe_math_optimizations)
    4369                 :            : #define HAVE_atanhsf2 (TARGET_USE_FANCY_MATH_387 \
    4370                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4371                 :            :        || TARGET_MIX_SSE_I387) \
    4372                 :            :    && flag_unsafe_math_optimizations)
    4373                 :            : #define HAVE_atanhdf2 (TARGET_USE_FANCY_MATH_387 \
    4374                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4375                 :            :        || TARGET_MIX_SSE_I387) \
    4376                 :            :    && flag_unsafe_math_optimizations)
    4377                 :            : #define HAVE_logxf2 (TARGET_USE_FANCY_MATH_387 \
    4378                 :            :    && flag_unsafe_math_optimizations)
    4379                 :            : #define HAVE_logsf2 (TARGET_USE_FANCY_MATH_387 \
    4380                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4381                 :            :        || TARGET_MIX_SSE_I387) \
    4382                 :            :    && flag_unsafe_math_optimizations)
    4383                 :            : #define HAVE_logdf2 (TARGET_USE_FANCY_MATH_387 \
    4384                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4385                 :            :        || TARGET_MIX_SSE_I387) \
    4386                 :            :    && flag_unsafe_math_optimizations)
    4387                 :            : #define HAVE_log10xf2 (TARGET_USE_FANCY_MATH_387 \
    4388                 :            :    && flag_unsafe_math_optimizations)
    4389                 :            : #define HAVE_log10sf2 (TARGET_USE_FANCY_MATH_387 \
    4390                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4391                 :            :        || TARGET_MIX_SSE_I387) \
    4392                 :            :    && flag_unsafe_math_optimizations)
    4393                 :            : #define HAVE_log10df2 (TARGET_USE_FANCY_MATH_387 \
    4394                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4395                 :            :        || TARGET_MIX_SSE_I387) \
    4396                 :            :    && flag_unsafe_math_optimizations)
    4397                 :            : #define HAVE_log2xf2 (TARGET_USE_FANCY_MATH_387 \
    4398                 :            :    && flag_unsafe_math_optimizations)
    4399                 :            : #define HAVE_log2sf2 (TARGET_USE_FANCY_MATH_387 \
    4400                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4401                 :            :        || TARGET_MIX_SSE_I387) \
    4402                 :            :    && flag_unsafe_math_optimizations)
    4403                 :            : #define HAVE_log2df2 (TARGET_USE_FANCY_MATH_387 \
    4404                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4405                 :            :        || TARGET_MIX_SSE_I387) \
    4406                 :            :    && flag_unsafe_math_optimizations)
    4407                 :            : #define HAVE_log1pxf2 (TARGET_USE_FANCY_MATH_387 \
    4408                 :            :    && flag_unsafe_math_optimizations)
    4409                 :            : #define HAVE_log1psf2 (TARGET_USE_FANCY_MATH_387 \
    4410                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4411                 :            :        || TARGET_MIX_SSE_I387) \
    4412                 :            :    && flag_unsafe_math_optimizations)
    4413                 :            : #define HAVE_log1pdf2 (TARGET_USE_FANCY_MATH_387 \
    4414                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4415                 :            :        || TARGET_MIX_SSE_I387) \
    4416                 :            :    && flag_unsafe_math_optimizations)
    4417                 :            : #define HAVE_logbxf2 (TARGET_USE_FANCY_MATH_387 \
    4418                 :            :    && flag_unsafe_math_optimizations)
    4419                 :            : #define HAVE_logbsf2 (TARGET_USE_FANCY_MATH_387 \
    4420                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4421                 :            :        || TARGET_MIX_SSE_I387) \
    4422                 :            :    && flag_unsafe_math_optimizations)
    4423                 :            : #define HAVE_logbdf2 (TARGET_USE_FANCY_MATH_387 \
    4424                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4425                 :            :        || TARGET_MIX_SSE_I387) \
    4426                 :            :    && flag_unsafe_math_optimizations)
    4427                 :            : #define HAVE_ilogbxf2 (TARGET_USE_FANCY_MATH_387 \
    4428                 :            :    && flag_unsafe_math_optimizations)
    4429                 :            : #define HAVE_ilogbsf2 (TARGET_USE_FANCY_MATH_387 \
    4430                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4431                 :            :        || TARGET_MIX_SSE_I387) \
    4432                 :            :    && flag_unsafe_math_optimizations)
    4433                 :            : #define HAVE_ilogbdf2 (TARGET_USE_FANCY_MATH_387 \
    4434                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4435                 :            :        || TARGET_MIX_SSE_I387) \
    4436                 :            :    && flag_unsafe_math_optimizations)
    4437                 :            : #define HAVE_expNcorexf3 (TARGET_USE_FANCY_MATH_387 \
    4438                 :            :    && flag_unsafe_math_optimizations)
    4439                 :            : #define HAVE_expxf2 (TARGET_USE_FANCY_MATH_387 \
    4440                 :            :    && flag_unsafe_math_optimizations)
    4441                 :            : #define HAVE_expsf2 (TARGET_USE_FANCY_MATH_387 \
    4442                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4443                 :            :        || TARGET_MIX_SSE_I387) \
    4444                 :            :    && flag_unsafe_math_optimizations)
    4445                 :            : #define HAVE_expdf2 (TARGET_USE_FANCY_MATH_387 \
    4446                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4447                 :            :        || TARGET_MIX_SSE_I387) \
    4448                 :            :    && flag_unsafe_math_optimizations)
    4449                 :            : #define HAVE_exp10xf2 (TARGET_USE_FANCY_MATH_387 \
    4450                 :            :    && flag_unsafe_math_optimizations)
    4451                 :            : #define HAVE_exp10sf2 (TARGET_USE_FANCY_MATH_387 \
    4452                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4453                 :            :        || TARGET_MIX_SSE_I387) \
    4454                 :            :    && flag_unsafe_math_optimizations)
    4455                 :            : #define HAVE_exp10df2 (TARGET_USE_FANCY_MATH_387 \
    4456                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4457                 :            :        || TARGET_MIX_SSE_I387) \
    4458                 :            :    && flag_unsafe_math_optimizations)
    4459                 :            : #define HAVE_exp2xf2 (TARGET_USE_FANCY_MATH_387 \
    4460                 :            :    && flag_unsafe_math_optimizations)
    4461                 :            : #define HAVE_exp2sf2 (TARGET_USE_FANCY_MATH_387 \
    4462                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4463                 :            :        || TARGET_MIX_SSE_I387) \
    4464                 :            :    && flag_unsafe_math_optimizations)
    4465                 :            : #define HAVE_exp2df2 (TARGET_USE_FANCY_MATH_387 \
    4466                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4467                 :            :        || TARGET_MIX_SSE_I387) \
    4468                 :            :    && flag_unsafe_math_optimizations)
    4469                 :            : #define HAVE_expm1xf2 (TARGET_USE_FANCY_MATH_387 \
    4470                 :            :    && flag_unsafe_math_optimizations)
    4471                 :            : #define HAVE_expm1sf2 (TARGET_USE_FANCY_MATH_387 \
    4472                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4473                 :            :        || TARGET_MIX_SSE_I387) \
    4474                 :            :    && flag_unsafe_math_optimizations)
    4475                 :            : #define HAVE_expm1df2 (TARGET_USE_FANCY_MATH_387 \
    4476                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4477                 :            :        || TARGET_MIX_SSE_I387) \
    4478                 :            :    && flag_unsafe_math_optimizations)
    4479                 :            : #define HAVE_ldexpxf3 (TARGET_USE_FANCY_MATH_387 \
    4480                 :            :    && flag_unsafe_math_optimizations)
    4481                 :            : #define HAVE_ldexpsf3 (TARGET_USE_FANCY_MATH_387 \
    4482                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4483                 :            :        || TARGET_MIX_SSE_I387) \
    4484                 :            :    && flag_unsafe_math_optimizations)
    4485                 :            : #define HAVE_ldexpdf3 (TARGET_USE_FANCY_MATH_387 \
    4486                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4487                 :            :        || TARGET_MIX_SSE_I387) \
    4488                 :            :    && flag_unsafe_math_optimizations)
    4489                 :            : #define HAVE_scalbxf3 (TARGET_USE_FANCY_MATH_387 \
    4490                 :            :    && flag_unsafe_math_optimizations)
    4491                 :            : #define HAVE_scalbsf3 (TARGET_USE_FANCY_MATH_387 \
    4492                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4493                 :            :        || TARGET_MIX_SSE_I387) \
    4494                 :            :    && flag_unsafe_math_optimizations)
    4495                 :            : #define HAVE_scalbdf3 (TARGET_USE_FANCY_MATH_387 \
    4496                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4497                 :            :        || TARGET_MIX_SSE_I387) \
    4498                 :            :    && flag_unsafe_math_optimizations)
    4499                 :            : #define HAVE_significandxf2 (TARGET_USE_FANCY_MATH_387 \
    4500                 :            :    && flag_unsafe_math_optimizations)
    4501                 :            : #define HAVE_significandsf2 (TARGET_USE_FANCY_MATH_387 \
    4502                 :            :    && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4503                 :            :        || TARGET_MIX_SSE_I387) \
    4504                 :            :    && flag_unsafe_math_optimizations)
    4505                 :            : #define HAVE_significanddf2 (TARGET_USE_FANCY_MATH_387 \
    4506                 :            :    && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4507                 :            :        || TARGET_MIX_SSE_I387) \
    4508                 :            :    && flag_unsafe_math_optimizations)
    4509                 :            : #define HAVE_rintsf2 (TARGET_USE_FANCY_MATH_387 \
    4510                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    4511                 :            : #define HAVE_rintdf2 (TARGET_USE_FANCY_MATH_387 \
    4512                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    4513                 :            : #define HAVE_nearbyintxf2 (TARGET_USE_FANCY_MATH_387 \
    4514                 :            :    && !flag_trapping_math)
    4515                 :            : #define HAVE_nearbyintsf2 ((TARGET_USE_FANCY_MATH_387 \
    4516                 :            :     && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4517                 :            :           || TARGET_MIX_SSE_I387) \
    4518                 :            :     && !flag_trapping_math) \
    4519                 :            :    || (TARGET_SSE4_1 && TARGET_SSE_MATH))
    4520                 :            : #define HAVE_nearbyintdf2 ((TARGET_USE_FANCY_MATH_387 \
    4521                 :            :     && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4522                 :            :           || TARGET_MIX_SSE_I387) \
    4523                 :            :     && !flag_trapping_math) \
    4524                 :            :    || (TARGET_SSE4_1 && TARGET_SSE_MATH))
    4525                 :            : #define HAVE_roundsf2 ((TARGET_USE_FANCY_MATH_387 \
    4526                 :            :     && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4527                 :            :         || TARGET_MIX_SSE_I387) \
    4528                 :            :     && flag_unsafe_math_optimizations \
    4529                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4530                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4531                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4532                 :            : #define HAVE_rounddf2 ((TARGET_USE_FANCY_MATH_387 \
    4533                 :            :     && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4534                 :            :         || TARGET_MIX_SSE_I387) \
    4535                 :            :     && flag_unsafe_math_optimizations \
    4536                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4537                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4538                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4539                 :            : #define HAVE_roundxf2 ((TARGET_USE_FANCY_MATH_387 \
    4540                 :            :     && (!(SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH) \
    4541                 :            :         || TARGET_MIX_SSE_I387) \
    4542                 :            :     && flag_unsafe_math_optimizations \
    4543                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4544                 :            :    || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH \
    4545                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4546                 :            : #define HAVE_lrintsfsi2 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH)
    4547                 :            : #define HAVE_lrintsfdi2 ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) && (TARGET_64BIT))
    4548                 :            : #define HAVE_lrintdfsi2 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)
    4549                 :            : #define HAVE_lrintdfdi2 ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) && (TARGET_64BIT))
    4550                 :            : #define HAVE_lroundsfhi2 ((TARGET_USE_FANCY_MATH_387 \
    4551                 :            :     && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4552                 :            :         || TARGET_MIX_SSE_I387) \
    4553                 :            :     && flag_unsafe_math_optimizations) \
    4554                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4555                 :            :        && HImode != HImode  \
    4556                 :            :        && ((HImode != DImode) || TARGET_64BIT) \
    4557                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4558                 :            : #define HAVE_lrounddfhi2 ((TARGET_USE_FANCY_MATH_387 \
    4559                 :            :     && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4560                 :            :         || TARGET_MIX_SSE_I387) \
    4561                 :            :     && flag_unsafe_math_optimizations) \
    4562                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4563                 :            :        && HImode != HImode  \
    4564                 :            :        && ((HImode != DImode) || TARGET_64BIT) \
    4565                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4566                 :            : #define HAVE_lroundxfhi2 ((TARGET_USE_FANCY_MATH_387 \
    4567                 :            :     && (!(SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH) \
    4568                 :            :         || TARGET_MIX_SSE_I387) \
    4569                 :            :     && flag_unsafe_math_optimizations) \
    4570                 :            :    || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH \
    4571                 :            :        && HImode != HImode  \
    4572                 :            :        && ((HImode != DImode) || TARGET_64BIT) \
    4573                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4574                 :            : #define HAVE_lroundsfsi2 ((TARGET_USE_FANCY_MATH_387 \
    4575                 :            :     && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4576                 :            :         || TARGET_MIX_SSE_I387) \
    4577                 :            :     && flag_unsafe_math_optimizations) \
    4578                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4579                 :            :        && SImode != HImode  \
    4580                 :            :        && ((SImode != DImode) || TARGET_64BIT) \
    4581                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4582                 :            : #define HAVE_lrounddfsi2 ((TARGET_USE_FANCY_MATH_387 \
    4583                 :            :     && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4584                 :            :         || TARGET_MIX_SSE_I387) \
    4585                 :            :     && flag_unsafe_math_optimizations) \
    4586                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4587                 :            :        && SImode != HImode  \
    4588                 :            :        && ((SImode != DImode) || TARGET_64BIT) \
    4589                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4590                 :            : #define HAVE_lroundxfsi2 ((TARGET_USE_FANCY_MATH_387 \
    4591                 :            :     && (!(SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH) \
    4592                 :            :         || TARGET_MIX_SSE_I387) \
    4593                 :            :     && flag_unsafe_math_optimizations) \
    4594                 :            :    || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH \
    4595                 :            :        && SImode != HImode  \
    4596                 :            :        && ((SImode != DImode) || TARGET_64BIT) \
    4597                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4598                 :            : #define HAVE_lroundsfdi2 ((TARGET_USE_FANCY_MATH_387 \
    4599                 :            :     && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4600                 :            :         || TARGET_MIX_SSE_I387) \
    4601                 :            :     && flag_unsafe_math_optimizations) \
    4602                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4603                 :            :        && DImode != HImode  \
    4604                 :            :        && ((DImode != DImode) || TARGET_64BIT) \
    4605                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4606                 :            : #define HAVE_lrounddfdi2 ((TARGET_USE_FANCY_MATH_387 \
    4607                 :            :     && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4608                 :            :         || TARGET_MIX_SSE_I387) \
    4609                 :            :     && flag_unsafe_math_optimizations) \
    4610                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4611                 :            :        && DImode != HImode  \
    4612                 :            :        && ((DImode != DImode) || TARGET_64BIT) \
    4613                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4614                 :            : #define HAVE_lroundxfdi2 ((TARGET_USE_FANCY_MATH_387 \
    4615                 :            :     && (!(SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH) \
    4616                 :            :         || TARGET_MIX_SSE_I387) \
    4617                 :            :     && flag_unsafe_math_optimizations) \
    4618                 :            :    || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH \
    4619                 :            :        && DImode != HImode  \
    4620                 :            :        && ((DImode != DImode) || TARGET_64BIT) \
    4621                 :            :        && !flag_trapping_math && !flag_rounding_math))
    4622                 :            : #define HAVE_roundevenxf2 (TARGET_USE_FANCY_MATH_387 \
    4623                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math))
    4624                 :            : #define HAVE_floorxf2 (TARGET_USE_FANCY_MATH_387 \
    4625                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math))
    4626                 :            : #define HAVE_ceilxf2 (TARGET_USE_FANCY_MATH_387 \
    4627                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math))
    4628                 :            : #define HAVE_btruncxf2 (TARGET_USE_FANCY_MATH_387 \
    4629                 :            :    && (flag_fp_int_builtin_inexact || !flag_trapping_math))
    4630                 :            : #define HAVE_roundevensf2 ((TARGET_USE_FANCY_MATH_387 \
    4631                 :            :     && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4632                 :            :         || TARGET_MIX_SSE_I387) \
    4633                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4634                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4635                 :            :        && (TARGET_SSE4_1 \
    4636                 :            :           || (ROUND_ROUNDEVEN != ROUND_ROUNDEVEN \
    4637                 :            :               && (flag_fp_int_builtin_inexact || !flag_trapping_math)))))
    4638                 :            : #define HAVE_floorsf2 ((TARGET_USE_FANCY_MATH_387 \
    4639                 :            :     && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4640                 :            :         || TARGET_MIX_SSE_I387) \
    4641                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4642                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4643                 :            :        && (TARGET_SSE4_1 \
    4644                 :            :           || (ROUND_FLOOR != ROUND_ROUNDEVEN \
    4645                 :            :               && (flag_fp_int_builtin_inexact || !flag_trapping_math)))))
    4646                 :            : #define HAVE_ceilsf2 ((TARGET_USE_FANCY_MATH_387 \
    4647                 :            :     && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4648                 :            :         || TARGET_MIX_SSE_I387) \
    4649                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4650                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4651                 :            :        && (TARGET_SSE4_1 \
    4652                 :            :           || (ROUND_CEIL != ROUND_ROUNDEVEN \
    4653                 :            :               && (flag_fp_int_builtin_inexact || !flag_trapping_math)))))
    4654                 :            : #define HAVE_btruncsf2 ((TARGET_USE_FANCY_MATH_387 \
    4655                 :            :     && (!(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH) \
    4656                 :            :         || TARGET_MIX_SSE_I387) \
    4657                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4658                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4659                 :            :        && (TARGET_SSE4_1 \
    4660                 :            :           || (ROUND_TRUNC != ROUND_ROUNDEVEN \
    4661                 :            :               && (flag_fp_int_builtin_inexact || !flag_trapping_math)))))
    4662                 :            : #define HAVE_roundevendf2 ((TARGET_USE_FANCY_MATH_387 \
    4663                 :            :     && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4664                 :            :         || TARGET_MIX_SSE_I387) \
    4665                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4666                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4667                 :            :        && (TARGET_SSE4_1 \
    4668                 :            :           || (ROUND_ROUNDEVEN != ROUND_ROUNDEVEN \
    4669                 :            :               && (flag_fp_int_builtin_inexact || !flag_trapping_math)))))
    4670                 :            : #define HAVE_floordf2 ((TARGET_USE_FANCY_MATH_387 \
    4671                 :            :     && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4672                 :            :         || TARGET_MIX_SSE_I387) \
    4673                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4674                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4675                 :            :        && (TARGET_SSE4_1 \
    4676                 :            :           || (ROUND_FLOOR != ROUND_ROUNDEVEN \
    4677                 :            :               && (flag_fp_int_builtin_inexact || !flag_trapping_math)))))
    4678                 :            : #define HAVE_ceildf2 ((TARGET_USE_FANCY_MATH_387 \
    4679                 :            :     && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4680                 :            :         || TARGET_MIX_SSE_I387) \
    4681                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4682                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4683                 :            :        && (TARGET_SSE4_1 \
    4684                 :            :           || (ROUND_CEIL != ROUND_ROUNDEVEN \
    4685                 :            :               && (flag_fp_int_builtin_inexact || !flag_trapping_math)))))
    4686                 :            : #define HAVE_btruncdf2 ((TARGET_USE_FANCY_MATH_387 \
    4687                 :            :     && (!(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH) \
    4688                 :            :         || TARGET_MIX_SSE_I387) \
    4689                 :            :     && (flag_fp_int_builtin_inexact || !flag_trapping_math)) \
    4690                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4691                 :            :        && (TARGET_SSE4_1 \
    4692                 :            :           || (ROUND_TRUNC != ROUND_ROUNDEVEN \
    4693                 :            :               && (flag_fp_int_builtin_inexact || !flag_trapping_math)))))
    4694                 :            : #define HAVE_lfloorxfhi2 (TARGET_USE_FANCY_MATH_387 \
    4695                 :            :    && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \
    4696                 :            :    && flag_unsafe_math_optimizations)
    4697                 :            : #define HAVE_lceilxfhi2 (TARGET_USE_FANCY_MATH_387 \
    4698                 :            :    && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \
    4699                 :            :    && flag_unsafe_math_optimizations)
    4700                 :            : #define HAVE_lfloorxfsi2 (TARGET_USE_FANCY_MATH_387 \
    4701                 :            :    && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \
    4702                 :            :    && flag_unsafe_math_optimizations)
    4703                 :            : #define HAVE_lceilxfsi2 (TARGET_USE_FANCY_MATH_387 \
    4704                 :            :    && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \
    4705                 :            :    && flag_unsafe_math_optimizations)
    4706                 :            : #define HAVE_lfloorxfdi2 (TARGET_USE_FANCY_MATH_387 \
    4707                 :            :    && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \
    4708                 :            :    && flag_unsafe_math_optimizations)
    4709                 :            : #define HAVE_lceilxfdi2 (TARGET_USE_FANCY_MATH_387 \
    4710                 :            :    && (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) \
    4711                 :            :    && flag_unsafe_math_optimizations)
    4712                 :            : #define HAVE_lfloorsfsi2 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4713                 :            :    && (TARGET_SSE4_1 || !flag_trapping_math))
    4714                 :            : #define HAVE_lceilsfsi2 (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4715                 :            :    && (TARGET_SSE4_1 || !flag_trapping_math))
    4716                 :            : #define HAVE_lfloorsfdi2 ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4717                 :            :    && (TARGET_SSE4_1 || !flag_trapping_math)) && (TARGET_64BIT))
    4718                 :            : #define HAVE_lceilsfdi2 ((SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH \
    4719                 :            :    && (TARGET_SSE4_1 || !flag_trapping_math)) && (TARGET_64BIT))
    4720                 :            : #define HAVE_lfloordfsi2 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4721                 :            :    && (TARGET_SSE4_1 || !flag_trapping_math))
    4722                 :            : #define HAVE_lceildfsi2 (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4723                 :            :    && (TARGET_SSE4_1 || !flag_trapping_math))
    4724                 :            : #define HAVE_lfloordfdi2 ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4725                 :            :    && (TARGET_SSE4_1 || !flag_trapping_math)) && (TARGET_64BIT))
    4726                 :            : #define HAVE_lceildfdi2 ((SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH \
    4727                 :            :    && (TARGET_SSE4_1 || !flag_trapping_math)) && (TARGET_64BIT))
    4728                 :            : #define HAVE_signbittf2 (TARGET_SSE)
    4729                 :            : #define HAVE_signbitxf2 (TARGET_USE_FANCY_MATH_387)
    4730                 :            : #define HAVE_signbitdf2 (TARGET_USE_FANCY_MATH_387 \
    4731                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    4732                 :            : #define HAVE_signbitsf2 (TARGET_USE_FANCY_MATH_387 \
    4733                 :            :    && !(SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    4734                 :            : #define HAVE_cpymemsi 1
    4735                 :            : #define HAVE_cpymemdi (TARGET_64BIT)
    4736                 :            : #define HAVE_strmov 1
    4737                 :            : #define HAVE_strmov_singleop 1
    4738                 :            : #define HAVE_rep_mov 1
    4739                 :            : #define HAVE_setmemsi 1
    4740                 :            : #define HAVE_setmemdi (TARGET_64BIT)
    4741                 :            : #define HAVE_strset 1
    4742                 :            : #define HAVE_strset_singleop 1
    4743                 :            : #define HAVE_rep_stos 1
    4744                 :            : #define HAVE_cmpstrnsi 1
    4745                 :            : #define HAVE_cmpintqi 1
    4746                 :            : #define HAVE_cmpstrnqi_nz_1 1
    4747                 :            : #define HAVE_cmpstrnqi_1 1
    4748                 :            : #define HAVE_strlensi (Pmode == SImode)
    4749                 :            : #define HAVE_strlendi (Pmode == DImode)
    4750                 :            : #define HAVE_strlenqi_1 1
    4751                 :            : #define HAVE_movqicc (TARGET_QIMODE_MATH)
    4752                 :            : #define HAVE_movhicc (TARGET_HIMODE_MATH)
    4753                 :            : #define HAVE_movsicc 1
    4754                 :            : #define HAVE_movdicc (TARGET_64BIT)
    4755                 :            : #define HAVE_x86_movsicc_0_m1 1
    4756                 :            : #define HAVE_x86_movdicc_0_m1 (TARGET_64BIT)
    4757                 :            : #define HAVE_movsfcc ((TARGET_80387 && TARGET_CMOVE) \
    4758                 :            :    || (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH))
    4759                 :            : #define HAVE_movdfcc ((TARGET_80387 && TARGET_CMOVE) \
    4760                 :            :    || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH))
    4761                 :            : #define HAVE_movxfcc ((TARGET_80387 && TARGET_CMOVE) \
    4762                 :            :    || (SSE_FLOAT_MODE_P (XFmode) && TARGET_SSE_MATH))
    4763                 :            : #define HAVE_addqicc 1
    4764                 :            : #define HAVE_addhicc 1
    4765                 :            : #define HAVE_addsicc 1
    4766                 :            : #define HAVE_adddicc (TARGET_64BIT)
    4767                 :            : #define HAVE_smaxsi3 ((TARGET_STV) && (TARGET_SSE4_1))
    4768                 :            : #define HAVE_sminsi3 ((TARGET_STV) && (TARGET_SSE4_1))
    4769                 :            : #define HAVE_umaxsi3 ((TARGET_STV) && (TARGET_SSE4_1))
    4770                 :            : #define HAVE_uminsi3 ((TARGET_STV) && (TARGET_SSE4_1))
    4771                 :            : #define HAVE_smaxdi3 ((TARGET_STV) && (TARGET_AVX512VL))
    4772                 :            : #define HAVE_smindi3 ((TARGET_STV) && (TARGET_AVX512VL))
    4773                 :            : #define HAVE_umaxdi3 ((TARGET_STV) && (TARGET_AVX512VL))
    4774                 :            : #define HAVE_umindi3 ((TARGET_STV) && (TARGET_AVX512VL))
    4775                 :            : #define HAVE_allocate_stack (ix86_target_stack_probe ())
    4776                 :            : #define HAVE_probe_stack 1
    4777                 :            : #define HAVE_builtin_setjmp_receiver (!TARGET_64BIT && flag_pic)
    4778                 :            : #define HAVE_save_stack_nonlocal 1
    4779                 :            : #define HAVE_restore_stack_nonlocal 1
    4780                 :            : #define HAVE_prefetch (TARGET_3DNOW || TARGET_PREFETCH_SSE || TARGET_PRFCHW || TARGET_PREFETCHWT1)
    4781                 :            : #define HAVE_stack_protect_set 1
    4782                 :            : #define HAVE_stack_protect_test 1
    4783                 :            : #define HAVE_lwp_llwpcb (TARGET_LWP)
    4784                 :            : #define HAVE_lwp_slwpcb (TARGET_LWP)
    4785                 :            : #define HAVE_lwp_lwpvalsi3 (TARGET_LWP)
    4786                 :            : #define HAVE_lwp_lwpvaldi3 ((TARGET_LWP) && (TARGET_64BIT))
    4787                 :            : #define HAVE_lwp_lwpinssi3 (TARGET_LWP)
    4788                 :            : #define HAVE_lwp_lwpinsdi3 ((TARGET_LWP) && (TARGET_64BIT))
    4789                 :            : #define HAVE_pause 1
    4790                 :            : #define HAVE_rstorssp (TARGET_SHSTK)
    4791                 :            : #define HAVE_clrssbsy (TARGET_SHSTK)
    4792                 :            : #define HAVE_xbegin (TARGET_RTM)
    4793                 :            : #define HAVE_xtest (TARGET_RTM)
    4794                 :            : #define HAVE_rdpkru (TARGET_PKU)
    4795                 :            : #define HAVE_wrpkru (TARGET_PKU)
    4796                 :            : #define HAVE_movv8qi (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4797                 :            : #define HAVE_movv4hi (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4798                 :            : #define HAVE_movv2si (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4799                 :            : #define HAVE_movv1di (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4800                 :            : #define HAVE_movv2sf (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4801                 :            : #define HAVE_movmisalignv8qi (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4802                 :            : #define HAVE_movmisalignv4hi (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4803                 :            : #define HAVE_movmisalignv2si (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4804                 :            : #define HAVE_movmisalignv1di (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4805                 :            : #define HAVE_movmisalignv2sf (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4806                 :            : #define HAVE_mmx_addv2sf3 (TARGET_3DNOW)
    4807                 :            : #define HAVE_mmx_subv2sf3 (TARGET_3DNOW)
    4808                 :            : #define HAVE_mmx_subrv2sf3 (TARGET_3DNOW)
    4809                 :            : #define HAVE_mmx_mulv2sf3 (TARGET_3DNOW)
    4810                 :            : #define HAVE_mmx_smaxv2sf3 (TARGET_3DNOW)
    4811                 :            : #define HAVE_mmx_sminv2sf3 (TARGET_3DNOW)
    4812                 :            : #define HAVE_mmx_eqv2sf3 (TARGET_3DNOW)
    4813                 :            : #define HAVE_vec_setv2sf (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4814                 :            : #define HAVE_vec_extractv2sfsf (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4815                 :            : #define HAVE_vec_initv2sfsf ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE)
    4816                 :            : #define HAVE_mmx_addv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4817                 :            : #define HAVE_mmx_subv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4818                 :            : #define HAVE_mmx_addv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4819                 :            : #define HAVE_mmx_subv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4820                 :            : #define HAVE_mmx_addv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4821                 :            : #define HAVE_mmx_subv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4822                 :            : #define HAVE_mmx_addv1di3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && (TARGET_SSE2))
    4823                 :            : #define HAVE_mmx_subv1di3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && (TARGET_SSE2))
    4824                 :            : #define HAVE_addv8qi3 (TARGET_MMX_WITH_SSE)
    4825                 :            : #define HAVE_subv8qi3 (TARGET_MMX_WITH_SSE)
    4826                 :            : #define HAVE_addv4hi3 (TARGET_MMX_WITH_SSE)
    4827                 :            : #define HAVE_subv4hi3 (TARGET_MMX_WITH_SSE)
    4828                 :            : #define HAVE_addv2si3 (TARGET_MMX_WITH_SSE)
    4829                 :            : #define HAVE_subv2si3 (TARGET_MMX_WITH_SSE)
    4830                 :            : #define HAVE_mmx_ssaddv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4831                 :            : #define HAVE_mmx_usaddv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4832                 :            : #define HAVE_mmx_sssubv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4833                 :            : #define HAVE_mmx_ussubv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4834                 :            : #define HAVE_mmx_ssaddv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4835                 :            : #define HAVE_mmx_usaddv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4836                 :            : #define HAVE_mmx_sssubv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4837                 :            : #define HAVE_mmx_ussubv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4838                 :            : #define HAVE_mmx_mulv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4839                 :            : #define HAVE_mulv4hi3 (TARGET_MMX_WITH_SSE)
    4840                 :            : #define HAVE_mmx_smulv4hi3_highpart (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4841                 :            : #define HAVE_mmx_umulv4hi3_highpart ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
    4842                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
    4843                 :            : #define HAVE_mmx_pmaddwd (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4844                 :            : #define HAVE_mmx_pmulhrwv4hi3 (TARGET_3DNOW)
    4845                 :            : #define HAVE_sse2_umulv1siv1di3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE2)
    4846                 :            : #define HAVE_mmx_smaxv4hi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
    4847                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
    4848                 :            : #define HAVE_mmx_sminv4hi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
    4849                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
    4850                 :            : #define HAVE_smaxv4hi3 (TARGET_MMX_WITH_SSE)
    4851                 :            : #define HAVE_sminv4hi3 (TARGET_MMX_WITH_SSE)
    4852                 :            : #define HAVE_mmx_umaxv8qi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
    4853                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
    4854                 :            : #define HAVE_mmx_uminv8qi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
    4855                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
    4856                 :            : #define HAVE_umaxv8qi3 (TARGET_MMX_WITH_SSE)
    4857                 :            : #define HAVE_uminv8qi3 (TARGET_MMX_WITH_SSE)
    4858                 :            : #define HAVE_ashrv4hi3 (TARGET_MMX_WITH_SSE)
    4859                 :            : #define HAVE_ashrv2si3 (TARGET_MMX_WITH_SSE)
    4860                 :            : #define HAVE_ashlv4hi3 (TARGET_MMX_WITH_SSE)
    4861                 :            : #define HAVE_lshrv4hi3 (TARGET_MMX_WITH_SSE)
    4862                 :            : #define HAVE_ashlv2si3 (TARGET_MMX_WITH_SSE)
    4863                 :            : #define HAVE_lshrv2si3 (TARGET_MMX_WITH_SSE)
    4864                 :            : #define HAVE_ashlv1di3 (TARGET_MMX_WITH_SSE)
    4865                 :            : #define HAVE_lshrv1di3 (TARGET_MMX_WITH_SSE)
    4866                 :            : #define HAVE_mmx_eqv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4867                 :            : #define HAVE_mmx_eqv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4868                 :            : #define HAVE_mmx_eqv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4869                 :            : #define HAVE_one_cmplv8qi2 (TARGET_MMX_WITH_SSE)
    4870                 :            : #define HAVE_one_cmplv4hi2 (TARGET_MMX_WITH_SSE)
    4871                 :            : #define HAVE_one_cmplv2si2 (TARGET_MMX_WITH_SSE)
    4872                 :            : #define HAVE_mmx_andv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4873                 :            : #define HAVE_mmx_iorv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4874                 :            : #define HAVE_mmx_xorv8qi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4875                 :            : #define HAVE_mmx_andv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4876                 :            : #define HAVE_mmx_iorv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4877                 :            : #define HAVE_mmx_xorv4hi3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4878                 :            : #define HAVE_mmx_andv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4879                 :            : #define HAVE_mmx_iorv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4880                 :            : #define HAVE_mmx_xorv2si3 (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4881                 :            : #define HAVE_andv8qi3 (TARGET_MMX_WITH_SSE)
    4882                 :            : #define HAVE_iorv8qi3 (TARGET_MMX_WITH_SSE)
    4883                 :            : #define HAVE_xorv8qi3 (TARGET_MMX_WITH_SSE)
    4884                 :            : #define HAVE_andv4hi3 (TARGET_MMX_WITH_SSE)
    4885                 :            : #define HAVE_iorv4hi3 (TARGET_MMX_WITH_SSE)
    4886                 :            : #define HAVE_xorv4hi3 (TARGET_MMX_WITH_SSE)
    4887                 :            : #define HAVE_andv2si3 (TARGET_MMX_WITH_SSE)
    4888                 :            : #define HAVE_iorv2si3 (TARGET_MMX_WITH_SSE)
    4889                 :            : #define HAVE_xorv2si3 (TARGET_MMX_WITH_SSE)
    4890                 :            : #define HAVE_mmx_pinsrw ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
    4891                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
    4892                 :            : #define HAVE_mmx_pshufw ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
    4893                 :            :    && (TARGET_SSE || TARGET_3DNOW_A))
    4894                 :            : #define HAVE_vec_setv2si (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4895                 :            : #define HAVE_vec_extractv2sisi (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4896                 :            : #define HAVE_vec_initv2sisi ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE)
    4897                 :            : #define HAVE_vec_setv4hi (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4898                 :            : #define HAVE_vec_extractv4hihi (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4899                 :            : #define HAVE_vec_initv4hihi ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE)
    4900                 :            : #define HAVE_vec_setv8qi (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4901                 :            : #define HAVE_vec_extractv8qiqi (TARGET_MMX || TARGET_MMX_WITH_SSE)
    4902                 :            : #define HAVE_vec_initv8qiqi ((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE)
    4903                 :            : #define HAVE_mmx_uavgv8qi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
    4904                 :            :    && (TARGET_SSE || TARGET_3DNOW))
    4905                 :            : #define HAVE_mmx_uavgv4hi3 ((TARGET_MMX || TARGET_MMX_WITH_SSE) \
    4906                 :            :    && (TARGET_SSE || TARGET_3DNOW))
    4907                 :            : #define HAVE_uavgv8qi3_ceil (TARGET_MMX_WITH_SSE)
    4908                 :            : #define HAVE_uavgv4hi3_ceil (TARGET_MMX_WITH_SSE)
    4909                 :            : #define HAVE_reduc_plus_scal_v8qi (TARGET_MMX_WITH_SSE)
    4910                 :            : #define HAVE_usadv8qi (TARGET_MMX_WITH_SSE)
    4911                 :            : #define HAVE_mmx_maskmovq (TARGET_SSE || TARGET_3DNOW_A)
    4912                 :            : #define HAVE_mmx_emms ((TARGET_MMX || TARGET_MMX_WITH_SSE) && (TARGET_MMX))
    4913                 :            : #define HAVE_mmx_femms ((TARGET_MMX || TARGET_MMX_WITH_SSE) && (TARGET_3DNOW))
    4914                 :            : #define HAVE_movv64qi ((TARGET_SSE) && (TARGET_AVX512F))
    4915                 :            : #define HAVE_movv32qi ((TARGET_SSE) && (TARGET_AVX))
    4916                 :            : #define HAVE_movv16qi (TARGET_SSE)
    4917                 :            : #define HAVE_movv32hi ((TARGET_SSE) && (TARGET_AVX512F))
    4918                 :            : #define HAVE_movv16hi ((TARGET_SSE) && (TARGET_AVX))
    4919                 :            : #define HAVE_movv8hi (TARGET_SSE)
    4920                 :            : #define HAVE_movv16si ((TARGET_SSE) && (TARGET_AVX512F))
    4921                 :            : #define HAVE_movv8si ((TARGET_SSE) && (TARGET_AVX))
    4922                 :            : #define HAVE_movv4si (TARGET_SSE)
    4923                 :            : #define HAVE_movv8di ((TARGET_SSE) && (TARGET_AVX512F))
    4924                 :            : #define HAVE_movv4di ((TARGET_SSE) && (TARGET_AVX))
    4925                 :            : #define HAVE_movv2di (TARGET_SSE)
    4926                 :            : #define HAVE_movv4ti ((TARGET_SSE) && (TARGET_AVX512F))
    4927                 :            : #define HAVE_movv2ti ((TARGET_SSE) && (TARGET_AVX))
    4928                 :            : #define HAVE_movv1ti (TARGET_SSE)
    4929                 :            : #define HAVE_movv16sf ((TARGET_SSE) && (TARGET_AVX512F))
    4930                 :            : #define HAVE_movv8sf ((TARGET_SSE) && (TARGET_AVX))
    4931                 :            : #define HAVE_movv4sf (TARGET_SSE)
    4932                 :            : #define HAVE_movv8df ((TARGET_SSE) && (TARGET_AVX512F))
    4933                 :            : #define HAVE_movv4df ((TARGET_SSE) && (TARGET_AVX))
    4934                 :            : #define HAVE_movv2df (TARGET_SSE)
    4935                 :            : #define HAVE_avx512f_loadsf_mask (TARGET_AVX512F)
    4936                 :            : #define HAVE_avx512f_loaddf_mask (TARGET_AVX512F)
    4937                 :            : #define HAVE_movmisalignv64qi ((TARGET_SSE) && (TARGET_AVX512F))
    4938                 :            : #define HAVE_movmisalignv32qi ((TARGET_SSE) && (TARGET_AVX))
    4939                 :            : #define HAVE_movmisalignv16qi (TARGET_SSE)
    4940                 :            : #define HAVE_movmisalignv32hi ((TARGET_SSE) && (TARGET_AVX512F))
    4941                 :            : #define HAVE_movmisalignv16hi ((TARGET_SSE) && (TARGET_AVX))
    4942                 :            : #define HAVE_movmisalignv8hi (TARGET_SSE)
    4943                 :            : #define HAVE_movmisalignv16si ((TARGET_SSE) && (TARGET_AVX512F))
    4944                 :            : #define HAVE_movmisalignv8si ((TARGET_SSE) && (TARGET_AVX))
    4945                 :            : #define HAVE_movmisalignv4si (TARGET_SSE)
    4946                 :            : #define HAVE_movmisalignv8di ((TARGET_SSE) && (TARGET_AVX512F))
    4947                 :            : #define HAVE_movmisalignv4di ((TARGET_SSE) && (TARGET_AVX))
    4948                 :            : #define HAVE_movmisalignv2di (TARGET_SSE)
    4949                 :            : #define HAVE_movmisalignv4ti ((TARGET_SSE) && (TARGET_AVX512F))
    4950                 :            : #define HAVE_movmisalignv2ti ((TARGET_SSE) && (TARGET_AVX))
    4951                 :            : #define HAVE_movmisalignv1ti (TARGET_SSE)
    4952                 :            : #define HAVE_movmisalignv16sf ((TARGET_SSE) && (TARGET_AVX512F))
    4953                 :            : #define HAVE_movmisalignv8sf ((TARGET_SSE) && (TARGET_AVX))
    4954                 :            : #define HAVE_movmisalignv4sf (TARGET_SSE)
    4955                 :            : #define HAVE_movmisalignv8df ((TARGET_SSE) && (TARGET_AVX512F))
    4956                 :            : #define HAVE_movmisalignv4df ((TARGET_SSE) && (TARGET_AVX))
    4957                 :            : #define HAVE_movmisalignv2df (TARGET_SSE)
    4958                 :            : #define HAVE_storentdi ((TARGET_SSE) && (TARGET_SSE2 && TARGET_64BIT))
    4959                 :            : #define HAVE_storentsi ((TARGET_SSE) && (TARGET_SSE2))
    4960                 :            : #define HAVE_storentsf ((TARGET_SSE) && (TARGET_SSE4A))
    4961                 :            : #define HAVE_storentdf ((TARGET_SSE) && (TARGET_SSE4A))
    4962                 :            : #define HAVE_storentv8di ((TARGET_SSE) && (TARGET_AVX512F))
    4963                 :            : #define HAVE_storentv4di ((TARGET_SSE) && (TARGET_AVX))
    4964                 :            : #define HAVE_storentv2di ((TARGET_SSE) && (TARGET_SSE2))
    4965                 :            : #define HAVE_storentv16sf ((TARGET_SSE) && (TARGET_AVX512F))
    4966                 :            : #define HAVE_storentv8sf ((TARGET_SSE) && (TARGET_AVX))
    4967                 :            : #define HAVE_storentv4sf (TARGET_SSE)
    4968                 :            : #define HAVE_storentv8df ((TARGET_SSE) && (TARGET_AVX512F))
    4969                 :            : #define HAVE_storentv4df ((TARGET_SSE) && (TARGET_AVX))
    4970                 :            : #define HAVE_storentv2df ((TARGET_SSE) && (TARGET_SSE2))
    4971                 :            : #define HAVE_kmovb ((TARGET_AVX512F \
    4972                 :            :    && !(MEM_P (operands[0]) && MEM_P (operands[1]))) && (TARGET_AVX512DQ))
    4973                 :            : #define HAVE_kmovw (TARGET_AVX512F \
    4974                 :            :    && !(MEM_P (operands[0]) && MEM_P (operands[1])))
    4975                 :            : #define HAVE_kmovd ((TARGET_AVX512F \
    4976                 :            :    && !(MEM_P (operands[0]) && MEM_P (operands[1]))) && (TARGET_AVX512BW))
    4977                 :            : #define HAVE_kmovq ((TARGET_AVX512F \
    4978                 :            :    && !(MEM_P (operands[0]) && MEM_P (operands[1]))) && (TARGET_AVX512BW))
    4979                 :            : #define HAVE_absv16sf2 ((TARGET_SSE) && (TARGET_AVX512F))
    4980                 :            : #define HAVE_negv16sf2 ((TARGET_SSE) && (TARGET_AVX512F))
    4981                 :            : #define HAVE_absv8sf2 ((TARGET_SSE) && (TARGET_AVX))
    4982                 :            : #define HAVE_negv8sf2 ((TARGET_SSE) && (TARGET_AVX))
    4983                 :            : #define HAVE_absv4sf2 (TARGET_SSE)
    4984                 :            : #define HAVE_negv4sf2 (TARGET_SSE)
    4985                 :            : #define HAVE_absv8df2 ((TARGET_SSE) && (TARGET_AVX512F))
    4986                 :            : #define HAVE_negv8df2 ((TARGET_SSE) && (TARGET_AVX512F))
    4987                 :            : #define HAVE_absv4df2 ((TARGET_SSE) && (TARGET_AVX))
    4988                 :            : #define HAVE_negv4df2 ((TARGET_SSE) && (TARGET_AVX))
    4989                 :            : #define HAVE_absv2df2 ((TARGET_SSE) && (TARGET_SSE2))
    4990                 :            : #define HAVE_negv2df2 ((TARGET_SSE) && (TARGET_SSE2))
    4991                 :            : #define HAVE_addv16sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
    4992                 :            : #define HAVE_addv16sf3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V16SFmode == V16SFmode \
    4993                 :            :                                                               || V16SFmode == V8DFmode \
    4994                 :            :                                                               || V16SFmode == V8DImode \
    4995                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F)))
    4996                 :            : #define HAVE_addv16sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    4997                 :            : #define HAVE_addv16sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    4998                 :            :                                                               || V16SFmode == V8DFmode \
    4999                 :            :                                                               || V16SFmode == V8DImode \
    5000                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F))))
    5001                 :            : #define HAVE_subv16sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
    5002                 :            : #define HAVE_subv16sf3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V16SFmode == V16SFmode \
    5003                 :            :                                                               || V16SFmode == V8DFmode \
    5004                 :            :                                                               || V16SFmode == V8DImode \
    5005                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F)))
    5006                 :            : #define HAVE_subv16sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    5007                 :            : #define HAVE_subv16sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    5008                 :            :                                                               || V16SFmode == V8DFmode \
    5009                 :            :                                                               || V16SFmode == V8DImode \
    5010                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F))))
    5011                 :            : #define HAVE_addv8sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
    5012                 :            : #define HAVE_addv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    5013                 :            : #define HAVE_subv8sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
    5014                 :            : #define HAVE_subv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    5015                 :            : #define HAVE_addv4sf3 (TARGET_SSE && 1 && 1)
    5016                 :            : #define HAVE_addv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1))
    5017                 :            : #define HAVE_subv4sf3 (TARGET_SSE && 1 && 1)
    5018                 :            : #define HAVE_subv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1))
    5019                 :            : #define HAVE_addv8df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
    5020                 :            : #define HAVE_addv8df3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V8DFmode == V16SFmode \
    5021                 :            :                                                               || V8DFmode == V8DFmode \
    5022                 :            :                                                               || V8DFmode == V8DImode \
    5023                 :            :                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F)))
    5024                 :            : #define HAVE_addv8df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    5025                 :            : #define HAVE_addv8df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    5026                 :            :                                                               || V8DFmode == V8DFmode \
    5027                 :            :                                                               || V8DFmode == V8DImode \
    5028                 :            :                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F))))
    5029                 :            : #define HAVE_subv8df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
    5030                 :            : #define HAVE_subv8df3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V8DFmode == V16SFmode \
    5031                 :            :                                                               || V8DFmode == V8DFmode \
    5032                 :            :                                                               || V8DFmode == V8DImode \
    5033                 :            :                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F)))
    5034                 :            : #define HAVE_subv8df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    5035                 :            : #define HAVE_subv8df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    5036                 :            :                                                               || V8DFmode == V8DFmode \
    5037                 :            :                                                               || V8DFmode == V8DImode \
    5038                 :            :                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F))))
    5039                 :            : #define HAVE_addv4df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
    5040                 :            : #define HAVE_addv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    5041                 :            : #define HAVE_subv4df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
    5042                 :            : #define HAVE_subv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    5043                 :            : #define HAVE_addv2df3 ((TARGET_SSE && 1 && 1) && (TARGET_SSE2))
    5044                 :            : #define HAVE_addv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_SSE2)))
    5045                 :            : #define HAVE_subv2df3 ((TARGET_SSE && 1 && 1) && (TARGET_SSE2))
    5046                 :            : #define HAVE_subv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_SSE2)))
    5047                 :            : #define HAVE_mulv16sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
    5048                 :            : #define HAVE_mulv16sf3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V16SFmode == V16SFmode \
    5049                 :            :                                                               || V16SFmode == V8DFmode \
    5050                 :            :                                                               || V16SFmode == V8DImode \
    5051                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F)))
    5052                 :            : #define HAVE_mulv16sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    5053                 :            : #define HAVE_mulv16sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    5054                 :            :                                                               || V16SFmode == V8DFmode \
    5055                 :            :                                                               || V16SFmode == V8DImode \
    5056                 :            :                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F))))
    5057                 :            : #define HAVE_mulv8sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
    5058                 :            : #define HAVE_mulv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    5059                 :            : #define HAVE_mulv4sf3 (TARGET_SSE && 1 && 1)
    5060                 :            : #define HAVE_mulv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1))
    5061                 :            : #define HAVE_mulv8df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
    5062                 :            : #define HAVE_mulv8df3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V8DFmode == V16SFmode \
    5063                 :            :                                                               || V8DFmode == V8DFmode \
    5064                 :            :                                                               || V8DFmode == V8DImode \
    5065                 :            :                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F)))
    5066                 :            : #define HAVE_mulv8df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    5067                 :            : #define HAVE_mulv8df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    5068                 :            :                                                               || V8DFmode == V8DFmode \
    5069                 :            :                                                               || V8DFmode == V8DImode \
    5070                 :            :                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F))))
    5071                 :            : #define HAVE_mulv4df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
    5072                 :            : #define HAVE_mulv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    5073                 :            : #define HAVE_mulv2df3 ((TARGET_SSE && 1 && 1) && (TARGET_SSE2))
    5074                 :            : #define HAVE_mulv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_SSE2)))
    5075                 :            : #define HAVE_divv8df3 ((TARGET_SSE2) && (TARGET_AVX512F))
    5076                 :            : #define HAVE_divv4df3 ((TARGET_SSE2) && (TARGET_AVX))
    5077                 :            : #define HAVE_divv2df3 (TARGET_SSE2)
    5078                 :            : #define HAVE_divv16sf3 ((TARGET_SSE) && (TARGET_AVX512F))
    5079                 :            : #define HAVE_divv8sf3 ((TARGET_SSE) && (TARGET_AVX))
    5080                 :            : #define HAVE_divv4sf3 (TARGET_SSE)
    5081                 :            : #define HAVE_sqrtv8df2 ((TARGET_SSE2) && (TARGET_AVX512F))
    5082                 :            : #define HAVE_sqrtv4df2 ((TARGET_SSE2) && (TARGET_AVX))
    5083                 :            : #define HAVE_sqrtv2df2 (TARGET_SSE2)
    5084                 :            : #define HAVE_sqrtv16sf2 ((TARGET_SSE) && (TARGET_AVX512F))
    5085                 :            : #define HAVE_sqrtv8sf2 ((TARGET_SSE) && (TARGET_AVX))
    5086                 :            : #define HAVE_sqrtv4sf2 (TARGET_SSE)
    5087                 :            : #define HAVE_rsqrtv8sf2 ((TARGET_SSE && TARGET_SSE_MATH) && (TARGET_AVX))
    5088                 :            : #define HAVE_rsqrtv4sf2 (TARGET_SSE && TARGET_SSE_MATH)
    5089                 :            : #define HAVE_rsqrtv16sf2 (TARGET_AVX512ER && TARGET_SSE_MATH)
    5090                 :            : #define HAVE_smaxv16sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
    5091                 :            : #define HAVE_smaxv16sf3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V16SFmode == V16SFmode \
    5092                 :            :                                                                               || V16SFmode == V8DFmode \
    5093                 :            :                                                                               || V16SFmode == V8DImode \
    5094                 :            :                                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F)))
    5095                 :            : #define HAVE_smaxv16sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    5096                 :            : #define HAVE_smaxv16sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    5097                 :            :                                                                               || V16SFmode == V8DFmode \
    5098                 :            :                                                                               || V16SFmode == V8DImode \
    5099                 :            :                                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F))))
    5100                 :            : #define HAVE_sminv16sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
    5101                 :            : #define HAVE_sminv16sf3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V16SFmode == V16SFmode \
    5102                 :            :                                                                               || V16SFmode == V8DFmode \
    5103                 :            :                                                                               || V16SFmode == V8DImode \
    5104                 :            :                                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F)))
    5105                 :            : #define HAVE_sminv16sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    5106                 :            : #define HAVE_sminv16sf3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V16SFmode == V16SFmode \
    5107                 :            :                                                                               || V16SFmode == V8DFmode \
    5108                 :            :                                                                               || V16SFmode == V8DImode \
    5109                 :            :                                                                               || V16SFmode == V16SImode)) && (TARGET_AVX512F))))
    5110                 :            : #define HAVE_smaxv8sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
    5111                 :            : #define HAVE_smaxv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    5112                 :            : #define HAVE_sminv8sf3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
    5113                 :            : #define HAVE_sminv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    5114                 :            : #define HAVE_smaxv4sf3 (TARGET_SSE && 1 && 1)
    5115                 :            : #define HAVE_smaxv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1))
    5116                 :            : #define HAVE_sminv4sf3 (TARGET_SSE && 1 && 1)
    5117                 :            : #define HAVE_sminv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1))
    5118                 :            : #define HAVE_smaxv8df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
    5119                 :            : #define HAVE_smaxv8df3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V8DFmode == V16SFmode \
    5120                 :            :                                                                               || V8DFmode == V8DFmode \
    5121                 :            :                                                                               || V8DFmode == V8DImode \
    5122                 :            :                                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F)))
    5123                 :            : #define HAVE_smaxv8df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    5124                 :            : #define HAVE_smaxv8df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    5125                 :            :                                                                               || V8DFmode == V8DFmode \
    5126                 :            :                                                                               || V8DFmode == V8DImode \
    5127                 :            :                                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F))))
    5128                 :            : #define HAVE_sminv8df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX512F))
    5129                 :            : #define HAVE_sminv8df3_round ((TARGET_AVX512F) && ((TARGET_SSE && 1 && (V8DFmode == V16SFmode \
    5130                 :            :                                                                               || V8DFmode == V8DFmode \
    5131                 :            :                                                                               || V8DFmode == V8DImode \
    5132                 :            :                                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F)))
    5133                 :            : #define HAVE_sminv8df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX512F)))
    5134                 :            : #define HAVE_sminv8df3_mask_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && ((TARGET_SSE && (64 == 64 || TARGET_AVX512VL) && (V8DFmode == V16SFmode \
    5135                 :            :                                                                               || V8DFmode == V8DFmode \
    5136                 :            :                                                                               || V8DFmode == V8DImode \
    5137                 :            :                                                                               || V8DFmode == V16SImode)) && (TARGET_AVX512F))))
    5138                 :            : #define HAVE_smaxv4df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
    5139                 :            : #define HAVE_smaxv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    5140                 :            : #define HAVE_sminv4df3 ((TARGET_SSE && 1 && 1) && (TARGET_AVX))
    5141                 :            : #define HAVE_sminv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (32 == 64 || TARGET_AVX512VL) && 1) && (TARGET_AVX)))
    5142                 :            : #define HAVE_smaxv2df3 ((TARGET_SSE && 1 && 1) && (TARGET_SSE2))
    5143                 :            : #define HAVE_smaxv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_SSE2)))
    5144                 :            : #define HAVE_sminv2df3 ((TARGET_SSE && 1 && 1) && (TARGET_SSE2))
    5145                 :            : #define HAVE_sminv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && (16 == 64 || TARGET_AVX512VL) && 1) && (TARGET_SSE2)))
    5146                 :            : #define HAVE_sse3_haddv2df3 (TARGET_SSE3)
    5147                 :            : #define HAVE_reduc_plus_scal_v2df (TARGET_SSE)
    5148                 :            : #define HAVE_reduc_plus_scal_v4sf (TARGET_SSE)
    5149                 :            : #define HAVE_reduc_plus_scal_v16qi (TARGET_SSE2)
    5150                 :            : #define HAVE_reduc_plus_scal_v4df (TARGET_AVX)
    5151                 :            : #define HAVE_reduc_plus_scal_v8sf (TARGET_AVX)
    5152                 :            : #define HAVE_reduc_plus_scal_v8df (TARGET_AVX512F)
    5153                 :            : #define HAVE_reduc_plus_scal_v16sf (TARGET_AVX512F)
    5154                 :            : #define HAVE_reduc_plus_scal_v32qi (TARGET_AVX)
    5155                 :            : #define HAVE_reduc_plus_scal_v64qi (TARGET_AVX512F)
    5156                 :            : #define HAVE_reduc_smax_scal_v4sf (TARGET_SSE)
    5157                 :            : #define HAVE_reduc_smin_scal_v4sf (TARGET_SSE)
    5158                 :            : #define HAVE_reduc_smax_scal_v2df (TARGET_SSE)
    5159                 :            : #define HAVE_reduc_smin_scal_v2df (TARGET_SSE)
    5160                 :            : #define HAVE_reduc_smax_scal_v2di (TARGET_SSE4_2)
    5161                 :            : #define HAVE_reduc_smin_scal_v2di (TARGET_SSE4_2)
    5162                 :            : #define HAVE_reduc_smax_scal_v4si (TARGET_SSE)
    5163                 :            : #define HAVE_reduc_smin_scal_v4si (TARGET_SSE)
    5164                 :            : #define HAVE_reduc_smax_scal_v8hi (TARGET_SSE)
    5165                 :            : #define HAVE_reduc_smin_scal_v8hi (TARGET_SSE)
    5166                 :            : #define HAVE_reduc_smax_scal_v16qi (TARGET_SSE)
    5167                 :            : #define HAVE_reduc_smin_scal_v16qi (TARGET_SSE)
    5168                 :            : #define HAVE_reduc_smax_scal_v32qi (TARGET_AVX2)
    5169                 :            : #define HAVE_reduc_smin_scal_v32qi (TARGET_AVX2)
    5170                 :            : #define HAVE_reduc_smax_scal_v16hi (TARGET_AVX2)
    5171                 :            : #define HAVE_reduc_smin_scal_v16hi (TARGET_AVX2)
    5172                 :            : #define HAVE_reduc_smax_scal_v8si (TARGET_AVX2)
    5173                 :            : #define HAVE_reduc_smin_scal_v8si (TARGET_AVX2)
    5174                 :            : #define HAVE_reduc_smax_scal_v4di (TARGET_AVX2)
    5175                 :            : #define HAVE_reduc_smin_scal_v4di (TARGET_AVX2)
    5176                 :            : #define HAVE_reduc_smax_scal_v8sf (TARGET_AVX)
    5177                 :            : #define HAVE_reduc_smin_scal_v8sf (TARGET_AVX)
    5178                 :            : #define HAVE_reduc_smax_scal_v4df (TARGET_AVX)
    5179                 :            : #define HAVE_reduc_smin_scal_v4df (TARGET_AVX)
    5180                 :            : #define HAVE_reduc_smax_scal_v64qi (TARGET_AVX512BW)
    5181                 :            : #define HAVE_reduc_smin_scal_v64qi (TARGET_AVX512BW)
    5182                 :            : #define HAVE_reduc_smax_scal_v32hi (TARGET_AVX512BW)
    5183                 :            : #define HAVE_reduc_smin_scal_v32hi (TARGET_AVX512BW)
    5184                 :            : #define HAVE_reduc_smax_scal_v16si (TARGET_AVX512F)
    5185                 :            : #define HAVE_reduc_smin_scal_v16si (TARGET_AVX512F)
    5186                 :            : #define HAVE_reduc_smax_scal_v8di (TARGET_AVX512F)
    5187                 :            : #define HAVE_reduc_smin_scal_v8di (TARGET_AVX512F)
    5188                 :            : #define HAVE_reduc_smax_scal_v16sf (TARGET_AVX512F)
    5189                 :            : #define HAVE_reduc_smin_scal_v16sf (TARGET_AVX512F)
    5190                 :            : #define HAVE_reduc_smax_scal_v8df (TARGET_AVX512F)
    5191                 :            : #define HAVE_reduc_smin_scal_v8df (TARGET_AVX512F)
    5192                 :            : #define HAVE_reduc_umax_scal_v16si (TARGET_AVX512F)
    5193                 :            : #define HAVE_reduc_umin_scal_v16si (TARGET_AVX512F)
    5194                 :            : #define HAVE_reduc_umax_scal_v8di (TARGET_AVX512F)
    5195                 :            : #define HAVE_reduc_umin_scal_v8di (TARGET_AVX512F)
    5196                 :            : #define HAVE_reduc_umax_scal_v32hi ((TARGET_AVX512F) && (TARGET_AVX512BW))
    5197                 :            : #define HAVE_reduc_umin_scal_v32hi ((TARGET_AVX512F) && (TARGET_AVX512BW))
    5198                 :            : #define HAVE_reduc_umax_scal_v64qi ((TARGET_AVX512F) && (TARGET_AVX512BW))
    5199                 :            : #define HAVE_reduc_umin_scal_v64qi ((TARGET_AVX512F) && (TARGET_AVX512BW))
    5200                 :            : #define HAVE_reduc_umax_scal_v32qi (TARGET_AVX2)
    5201                 :            : #define HAVE_reduc_umin_scal_v32qi (TARGET_AVX2)
    5202                 :            : #define HAVE_reduc_umax_scal_v16hi (TARGET_AVX2)
    5203                 :            : #define HAVE_reduc_umin_scal_v16hi (TARGET_AVX2)
    5204                 :            : #define HAVE_reduc_umax_scal_v8si (TARGET_AVX2)
    5205                 :            : #define HAVE_reduc_umin_scal_v8si (TARGET_AVX2)
    5206                 :            : #define HAVE_reduc_umax_scal_v4di (TARGET_AVX2)
    5207                 :            : #define HAVE_reduc_umin_scal_v4di (TARGET_AVX2)
    5208                 :            : #define HAVE_reduc_umin_scal_v8hi (TARGET_SSE4_1)
    5209                 :            : #define HAVE_vec_cmpv16sihi (TARGET_AVX512F)
    5210                 :            : #define HAVE_vec_cmpv8siqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5211                 :            : #define HAVE_vec_cmpv4siqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5212                 :            : #define HAVE_vec_cmpv8diqi (TARGET_AVX512F)
    5213                 :            : #define HAVE_vec_cmpv4diqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5214                 :            : #define HAVE_vec_cmpv2diqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5215                 :            : #define HAVE_vec_cmpv16sfhi (TARGET_AVX512F)
    5216                 :            : #define HAVE_vec_cmpv8sfqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5217                 :            : #define HAVE_vec_cmpv4sfqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5218                 :            : #define HAVE_vec_cmpv8dfqi (TARGET_AVX512F)
    5219                 :            : #define HAVE_vec_cmpv4dfqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5220                 :            : #define HAVE_vec_cmpv2dfqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5221                 :            : #define HAVE_vec_cmpv64qidi (TARGET_AVX512BW)
    5222                 :            : #define HAVE_vec_cmpv16qihi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5223                 :            : #define HAVE_vec_cmpv32qisi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5224                 :            : #define HAVE_vec_cmpv32hisi (TARGET_AVX512BW)
    5225                 :            : #define HAVE_vec_cmpv16hihi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5226                 :            : #define HAVE_vec_cmpv8hiqi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5227                 :            : #define HAVE_vec_cmpv32qiv32qi (TARGET_AVX2)
    5228                 :            : #define HAVE_vec_cmpv16hiv16hi (TARGET_AVX2)
    5229                 :            : #define HAVE_vec_cmpv8siv8si (TARGET_AVX2)
    5230                 :            : #define HAVE_vec_cmpv4div4di (TARGET_AVX2)
    5231                 :            : #define HAVE_vec_cmpv16qiv16qi (TARGET_SSE2)
    5232                 :            : #define HAVE_vec_cmpv8hiv8hi (TARGET_SSE2)
    5233                 :            : #define HAVE_vec_cmpv4siv4si (TARGET_SSE2)
    5234                 :            : #define HAVE_vec_cmpv2div2di (TARGET_SSE4_2)
    5235                 :            : #define HAVE_vec_cmpv8sfv8si (TARGET_AVX)
    5236                 :            : #define HAVE_vec_cmpv4dfv4di (TARGET_AVX)
    5237                 :            : #define HAVE_vec_cmpv4sfv4si (TARGET_SSE)
    5238                 :            : #define HAVE_vec_cmpv2dfv2di ((TARGET_SSE) && (TARGET_SSE2))
    5239                 :            : #define HAVE_vec_cmpuv16sihi (TARGET_AVX512F)
    5240                 :            : #define HAVE_vec_cmpuv8siqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5241                 :            : #define HAVE_vec_cmpuv4siqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5242                 :            : #define HAVE_vec_cmpuv8diqi (TARGET_AVX512F)
    5243                 :            : #define HAVE_vec_cmpuv4diqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5244                 :            : #define HAVE_vec_cmpuv2diqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5245                 :            : #define HAVE_vec_cmpuv64qidi (TARGET_AVX512BW)
    5246                 :            : #define HAVE_vec_cmpuv16qihi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5247                 :            : #define HAVE_vec_cmpuv32qisi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5248                 :            : #define HAVE_vec_cmpuv32hisi (TARGET_AVX512BW)
    5249                 :            : #define HAVE_vec_cmpuv16hihi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5250                 :            : #define HAVE_vec_cmpuv8hiqi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5251                 :            : #define HAVE_vec_cmpuv32qiv32qi (TARGET_AVX2)
    5252                 :            : #define HAVE_vec_cmpuv16hiv16hi (TARGET_AVX2)
    5253                 :            : #define HAVE_vec_cmpuv8siv8si (TARGET_AVX2)
    5254                 :            : #define HAVE_vec_cmpuv4div4di (TARGET_AVX2)
    5255                 :            : #define HAVE_vec_cmpuv16qiv16qi (TARGET_SSE2)
    5256                 :            : #define HAVE_vec_cmpuv8hiv8hi (TARGET_SSE2)
    5257                 :            : #define HAVE_vec_cmpuv4siv4si (TARGET_SSE2)
    5258                 :            : #define HAVE_vec_cmpuv2div2di (TARGET_SSE4_2)
    5259                 :            : #define HAVE_vec_cmpeqv2div2di (TARGET_SSE4_1)
    5260                 :            : #define HAVE_vcondv64qiv16sf (TARGET_AVX512F \
    5261                 :            :    && (GET_MODE_NUNITS (V64QImode) \
    5262                 :            :        == GET_MODE_NUNITS (V16SFmode)))
    5263                 :            : #define HAVE_vcondv32hiv16sf (TARGET_AVX512F \
    5264                 :            :    && (GET_MODE_NUNITS (V32HImode) \
    5265                 :            :        == GET_MODE_NUNITS (V16SFmode)))
    5266                 :            : #define HAVE_vcondv16siv16sf (TARGET_AVX512F \
    5267                 :            :    && (GET_MODE_NUNITS (V16SImode) \
    5268                 :            :        == GET_MODE_NUNITS (V16SFmode)))
    5269                 :            : #define HAVE_vcondv8div16sf (TARGET_AVX512F \
    5270                 :            :    && (GET_MODE_NUNITS (V8DImode) \
    5271                 :            :        == GET_MODE_NUNITS (V16SFmode)))
    5272                 :            : #define HAVE_vcondv16sfv16sf (TARGET_AVX512F \
    5273                 :            :    && (GET_MODE_NUNITS (V16SFmode) \
    5274                 :            :        == GET_MODE_NUNITS (V16SFmode)))
    5275                 :            : #define HAVE_vcondv8dfv16sf (TARGET_AVX512F \
    5276                 :            :    && (GET_MODE_NUNITS (V8DFmode) \
    5277                 :            :        == GET_MODE_NUNITS (V16SFmode)))
    5278                 :            : #define HAVE_vcondv64qiv8df (TARGET_AVX512F \
    5279                 :            :    && (GET_MODE_NUNITS (V64QImode) \
    5280                 :            :        == GET_MODE_NUNITS (V8DFmode)))
    5281                 :            : #define HAVE_vcondv32hiv8df (TARGET_AVX512F \
    5282                 :            :    && (GET_MODE_NUNITS (V32HImode) \
    5283                 :            :        == GET_MODE_NUNITS (V8DFmode)))
    5284                 :            : #define HAVE_vcondv16siv8df (TARGET_AVX512F \
    5285                 :            :    && (GET_MODE_NUNITS (V16SImode) \
    5286                 :            :        == GET_MODE_NUNITS (V8DFmode)))
    5287                 :            : #define HAVE_vcondv8div8df (TARGET_AVX512F \
    5288                 :            :    && (GET_MODE_NUNITS (V8DImode) \
    5289                 :            :        == GET_MODE_NUNITS (V8DFmode)))
    5290                 :            : #define HAVE_vcondv16sfv8df (TARGET_AVX512F \
    5291                 :            :    && (GET_MODE_NUNITS (V16SFmode) \
    5292                 :            :        == GET_MODE_NUNITS (V8DFmode)))
    5293                 :            : #define HAVE_vcondv8dfv8df (TARGET_AVX512F \
    5294                 :            :    && (GET_MODE_NUNITS (V8DFmode) \
    5295                 :            :        == GET_MODE_NUNITS (V8DFmode)))
    5296                 :            : #define HAVE_vcondv32qiv8sf (TARGET_AVX \
    5297                 :            :    && (GET_MODE_NUNITS (V32QImode) \
    5298                 :            :        == GET_MODE_NUNITS (V8SFmode)))
    5299                 :            : #define HAVE_vcondv32qiv4df (TARGET_AVX \
    5300                 :            :    && (GET_MODE_NUNITS (V32QImode) \
    5301                 :            :        == GET_MODE_NUNITS (V4DFmode)))
    5302                 :            : #define HAVE_vcondv16hiv8sf (TARGET_AVX \
    5303                 :            :    && (GET_MODE_NUNITS (V16HImode) \
    5304                 :            :        == GET_MODE_NUNITS (V8SFmode)))
    5305                 :            : #define HAVE_vcondv16hiv4df (TARGET_AVX \
    5306                 :            :    && (GET_MODE_NUNITS (V16HImode) \
    5307                 :            :        == GET_MODE_NUNITS (V4DFmode)))
    5308                 :            : #define HAVE_vcondv8siv8sf (TARGET_AVX \
    5309                 :            :    && (GET_MODE_NUNITS (V8SImode) \
    5310                 :            :        == GET_MODE_NUNITS (V8SFmode)))
    5311                 :            : #define HAVE_vcondv8siv4df (TARGET_AVX \
    5312                 :            :    && (GET_MODE_NUNITS (V8SImode) \
    5313                 :            :        == GET_MODE_NUNITS (V4DFmode)))
    5314                 :            : #define HAVE_vcondv4div8sf (TARGET_AVX \
    5315                 :            :    && (GET_MODE_NUNITS (V4DImode) \
    5316                 :            :        == GET_MODE_NUNITS (V8SFmode)))
    5317                 :            : #define HAVE_vcondv4div4df (TARGET_AVX \
    5318                 :            :    && (GET_MODE_NUNITS (V4DImode) \
    5319                 :            :        == GET_MODE_NUNITS (V4DFmode)))
    5320                 :            : #define HAVE_vcondv8sfv8sf (TARGET_AVX \
    5321                 :            :    && (GET_MODE_NUNITS (V8SFmode) \
    5322                 :            :        == GET_MODE_NUNITS (V8SFmode)))
    5323                 :            : #define HAVE_vcondv8sfv4df (TARGET_AVX \
    5324                 :            :    && (GET_MODE_NUNITS (V8SFmode) \
    5325                 :            :        == GET_MODE_NUNITS (V4DFmode)))
    5326                 :            : #define HAVE_vcondv4dfv8sf (TARGET_AVX \
    5327                 :            :    && (GET_MODE_NUNITS (V4DFmode) \
    5328                 :            :        == GET_MODE_NUNITS (V8SFmode)))
    5329                 :            : #define HAVE_vcondv4dfv4df (TARGET_AVX \
    5330                 :            :    && (GET_MODE_NUNITS (V4DFmode) \
    5331                 :            :        == GET_MODE_NUNITS (V4DFmode)))
    5332                 :            : #define HAVE_vcondv16qiv4sf (TARGET_SSE \
    5333                 :            :    && (GET_MODE_NUNITS (V16QImode) \
    5334                 :            :        == GET_MODE_NUNITS (V4SFmode)))
    5335                 :            : #define HAVE_vcondv16qiv2df ((TARGET_SSE \
    5336                 :            :    && (GET_MODE_NUNITS (V16QImode) \
    5337                 :            :        == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2))
    5338                 :            : #define HAVE_vcondv8hiv4sf (TARGET_SSE \
    5339                 :            :    && (GET_MODE_NUNITS (V8HImode) \
    5340                 :            :        == GET_MODE_NUNITS (V4SFmode)))
    5341                 :            : #define HAVE_vcondv8hiv2df ((TARGET_SSE \
    5342                 :            :    && (GET_MODE_NUNITS (V8HImode) \
    5343                 :            :        == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2))
    5344                 :            : #define HAVE_vcondv4siv4sf (TARGET_SSE \
    5345                 :            :    && (GET_MODE_NUNITS (V4SImode) \
    5346                 :            :        == GET_MODE_NUNITS (V4SFmode)))
    5347                 :            : #define HAVE_vcondv4siv2df ((TARGET_SSE \
    5348                 :            :    && (GET_MODE_NUNITS (V4SImode) \
    5349                 :            :        == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2))
    5350                 :            : #define HAVE_vcondv2div4sf (TARGET_SSE \
    5351                 :            :    && (GET_MODE_NUNITS (V2DImode) \
    5352                 :            :        == GET_MODE_NUNITS (V4SFmode)))
    5353                 :            : #define HAVE_vcondv2div2df ((TARGET_SSE \
    5354                 :            :    && (GET_MODE_NUNITS (V2DImode) \
    5355                 :            :        == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2))
    5356                 :            : #define HAVE_vcondv4sfv4sf (TARGET_SSE \
    5357                 :            :    && (GET_MODE_NUNITS (V4SFmode) \
    5358                 :            :        == GET_MODE_NUNITS (V4SFmode)))
    5359                 :            : #define HAVE_vcondv4sfv2df ((TARGET_SSE \
    5360                 :            :    && (GET_MODE_NUNITS (V4SFmode) \
    5361                 :            :        == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2))
    5362                 :            : #define HAVE_vcondv2dfv4sf ((TARGET_SSE \
    5363                 :            :    && (GET_MODE_NUNITS (V2DFmode) \
    5364                 :            :        == GET_MODE_NUNITS (V4SFmode))) && (TARGET_SSE2))
    5365                 :            : #define HAVE_vcondv2dfv2df ((TARGET_SSE \
    5366                 :            :    && (GET_MODE_NUNITS (V2DFmode) \
    5367                 :            :        == GET_MODE_NUNITS (V2DFmode))) && (TARGET_SSE2))
    5368                 :            : #define HAVE_vcond_mask_v16sihi (TARGET_AVX512F)
    5369                 :            : #define HAVE_vcond_mask_v8siqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5370                 :            : #define HAVE_vcond_mask_v4siqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5371                 :            : #define HAVE_vcond_mask_v8diqi (TARGET_AVX512F)
    5372                 :            : #define HAVE_vcond_mask_v4diqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5373                 :            : #define HAVE_vcond_mask_v2diqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5374                 :            : #define HAVE_vcond_mask_v16sfhi (TARGET_AVX512F)
    5375                 :            : #define HAVE_vcond_mask_v8sfqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5376                 :            : #define HAVE_vcond_mask_v4sfqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5377                 :            : #define HAVE_vcond_mask_v8dfqi (TARGET_AVX512F)
    5378                 :            : #define HAVE_vcond_mask_v4dfqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5379                 :            : #define HAVE_vcond_mask_v2dfqi ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5380                 :            : #define HAVE_vcond_mask_v64qidi (TARGET_AVX512BW)
    5381                 :            : #define HAVE_vcond_mask_v16qihi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5382                 :            : #define HAVE_vcond_mask_v32qisi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5383                 :            : #define HAVE_vcond_mask_v32hisi (TARGET_AVX512BW)
    5384                 :            : #define HAVE_vcond_mask_v16hihi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5385                 :            : #define HAVE_vcond_mask_v8hiqi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5386                 :            : #define HAVE_vcond_mask_v32qiv32qi ((TARGET_AVX) && (TARGET_AVX2))
    5387                 :            : #define HAVE_vcond_mask_v16hiv16hi ((TARGET_AVX) && (TARGET_AVX2))
    5388                 :            : #define HAVE_vcond_mask_v8siv8si (TARGET_AVX)
    5389                 :            : #define HAVE_vcond_mask_v4div4di (TARGET_AVX)
    5390                 :            : #define HAVE_vcond_mask_v16qiv16qi (TARGET_SSE2)
    5391                 :            : #define HAVE_vcond_mask_v8hiv8hi (TARGET_SSE2)
    5392                 :            : #define HAVE_vcond_mask_v4siv4si (TARGET_SSE2)
    5393                 :            : #define HAVE_vcond_mask_v2div2di (TARGET_SSE4_2)
    5394                 :            : #define HAVE_vcond_mask_v8sfv8si (TARGET_AVX)
    5395                 :            : #define HAVE_vcond_mask_v4dfv4di (TARGET_AVX)
    5396                 :            : #define HAVE_vcond_mask_v4sfv4si (TARGET_SSE)
    5397                 :            : #define HAVE_vcond_mask_v2dfv2di ((TARGET_SSE) && (TARGET_SSE2))
    5398                 :            : #define HAVE_andv8sf3 ((TARGET_SSE && 1) && (TARGET_AVX))
    5399                 :            : #define HAVE_andv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_AVX)))
    5400                 :            : #define HAVE_iorv8sf3 ((TARGET_SSE && 1) && (TARGET_AVX))
    5401                 :            : #define HAVE_iorv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_AVX)))
    5402                 :            : #define HAVE_xorv8sf3 ((TARGET_SSE && 1) && (TARGET_AVX))
    5403                 :            : #define HAVE_xorv8sf3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_AVX)))
    5404                 :            : #define HAVE_andv4sf3 (TARGET_SSE && 1)
    5405                 :            : #define HAVE_andv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE && TARGET_AVX512VL))
    5406                 :            : #define HAVE_iorv4sf3 (TARGET_SSE && 1)
    5407                 :            : #define HAVE_iorv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE && TARGET_AVX512VL))
    5408                 :            : #define HAVE_xorv4sf3 (TARGET_SSE && 1)
    5409                 :            : #define HAVE_xorv4sf3_mask ((TARGET_AVX512F) && (TARGET_SSE && TARGET_AVX512VL))
    5410                 :            : #define HAVE_andv4df3 ((TARGET_SSE && 1) && (TARGET_AVX))
    5411                 :            : #define HAVE_andv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_AVX)))
    5412                 :            : #define HAVE_iorv4df3 ((TARGET_SSE && 1) && (TARGET_AVX))
    5413                 :            : #define HAVE_iorv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_AVX)))
    5414                 :            : #define HAVE_xorv4df3 ((TARGET_SSE && 1) && (TARGET_AVX))
    5415                 :            : #define HAVE_xorv4df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_AVX)))
    5416                 :            : #define HAVE_andv2df3 ((TARGET_SSE && 1) && (TARGET_SSE2))
    5417                 :            : #define HAVE_andv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_SSE2)))
    5418                 :            : #define HAVE_iorv2df3 ((TARGET_SSE && 1) && (TARGET_SSE2))
    5419                 :            : #define HAVE_iorv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_SSE2)))
    5420                 :            : #define HAVE_xorv2df3 ((TARGET_SSE && 1) && (TARGET_SSE2))
    5421                 :            : #define HAVE_xorv2df3_mask ((TARGET_AVX512F) && ((TARGET_SSE && TARGET_AVX512VL) && (TARGET_SSE2)))
    5422                 :            : #define HAVE_andv16sf3 (TARGET_AVX512F)
    5423                 :            : #define HAVE_andv16sf3_mask (TARGET_AVX512F)
    5424                 :            : #define HAVE_iorv16sf3 (TARGET_AVX512F)
    5425                 :            : #define HAVE_iorv16sf3_mask (TARGET_AVX512F)
    5426                 :            : #define HAVE_xorv16sf3 (TARGET_AVX512F)
    5427                 :            : #define HAVE_xorv16sf3_mask (TARGET_AVX512F)
    5428                 :            : #define HAVE_andv8df3 (TARGET_AVX512F)
    5429                 :            : #define HAVE_andv8df3_mask (TARGET_AVX512F)
    5430                 :            : #define HAVE_iorv8df3 (TARGET_AVX512F)
    5431                 :            : #define HAVE_iorv8df3_mask (TARGET_AVX512F)
    5432                 :            : #define HAVE_xorv8df3 (TARGET_AVX512F)
    5433                 :            : #define HAVE_xorv8df3_mask (TARGET_AVX512F)
    5434                 :            : #define HAVE_copysignv16sf3 ((TARGET_SSE) && (TARGET_AVX512F))
    5435                 :            : #define HAVE_copysignv8sf3 ((TARGET_SSE) && (TARGET_AVX))
    5436                 :            : #define HAVE_copysignv4sf3 (TARGET_SSE)
    5437                 :            : #define HAVE_copysignv8df3 ((TARGET_SSE) && (TARGET_AVX512F))
    5438                 :            : #define HAVE_copysignv4df3 ((TARGET_SSE) && (TARGET_AVX))
    5439                 :            : #define HAVE_copysignv2df3 ((TARGET_SSE) && (TARGET_SSE2))
    5440                 :            : #define HAVE_xorsignv16sf3 ((TARGET_SSE) && (TARGET_AVX512F))
    5441                 :            : #define HAVE_xorsignv8sf3 ((TARGET_SSE) && (TARGET_AVX))
    5442                 :            : #define HAVE_xorsignv4sf3 (TARGET_SSE)
    5443                 :            : #define HAVE_xorsignv8df3 ((TARGET_SSE) && (TARGET_AVX512F))
    5444                 :            : #define HAVE_xorsignv4df3 ((TARGET_SSE) && (TARGET_AVX))
    5445                 :            : #define HAVE_xorsignv2df3 ((TARGET_SSE) && (TARGET_SSE2))
    5446                 :            : #define HAVE_signbitv16sf2 ((TARGET_SSE2) && (TARGET_AVX512F))
    5447                 :            : #define HAVE_signbitv8sf2 ((TARGET_SSE2) && (TARGET_AVX2))
    5448                 :            : #define HAVE_signbitv4sf2 (TARGET_SSE2)
    5449                 :            : #define HAVE_andtf3 (TARGET_SSE)
    5450                 :            : #define HAVE_iortf3 (TARGET_SSE)
    5451                 :            : #define HAVE_xortf3 (TARGET_SSE)
    5452                 :            : #define HAVE_fmasf4 (TARGET_SSE_MATH && (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F))
    5453                 :            : #define HAVE_fmadf4 (TARGET_SSE_MATH && (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F))
    5454                 :            : #define HAVE_fmav4sf4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5455                 :            : #define HAVE_fmav2df4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5456                 :            : #define HAVE_fmav8sf4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5457                 :            : #define HAVE_fmav4df4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5458                 :            : #define HAVE_fmav16sf4 (TARGET_AVX512F)
    5459                 :            : #define HAVE_fmav8df4 (TARGET_AVX512F)
    5460                 :            : #define HAVE_fmssf4 (TARGET_SSE_MATH && (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F))
    5461                 :            : #define HAVE_fmsdf4 (TARGET_SSE_MATH && (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F))
    5462                 :            : #define HAVE_fmsv4sf4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5463                 :            : #define HAVE_fmsv2df4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5464                 :            : #define HAVE_fmsv8sf4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5465                 :            : #define HAVE_fmsv4df4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5466                 :            : #define HAVE_fmsv16sf4 (TARGET_AVX512F)
    5467                 :            : #define HAVE_fmsv8df4 (TARGET_AVX512F)
    5468                 :            : #define HAVE_fnmasf4 (TARGET_SSE_MATH && (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F))
    5469                 :            : #define HAVE_fnmadf4 (TARGET_SSE_MATH && (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F))
    5470                 :            : #define HAVE_fnmav4sf4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5471                 :            : #define HAVE_fnmav2df4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5472                 :            : #define HAVE_fnmav8sf4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5473                 :            : #define HAVE_fnmav4df4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5474                 :            : #define HAVE_fnmav16sf4 (TARGET_AVX512F)
    5475                 :            : #define HAVE_fnmav8df4 (TARGET_AVX512F)
    5476                 :            : #define HAVE_fnmssf4 (TARGET_SSE_MATH && (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F))
    5477                 :            : #define HAVE_fnmsdf4 (TARGET_SSE_MATH && (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F))
    5478                 :            : #define HAVE_fnmsv4sf4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5479                 :            : #define HAVE_fnmsv2df4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5480                 :            : #define HAVE_fnmsv8sf4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5481                 :            : #define HAVE_fnmsv4df4 (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5482                 :            : #define HAVE_fnmsv16sf4 (TARGET_AVX512F)
    5483                 :            : #define HAVE_fnmsv8df4 (TARGET_AVX512F)
    5484                 :            : #define HAVE_fma4i_fmadd_sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F)
    5485                 :            : #define HAVE_fma4i_fmadd_df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F)
    5486                 :            : #define HAVE_fma4i_fmadd_v4sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5487                 :            : #define HAVE_fma4i_fmadd_v2df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5488                 :            : #define HAVE_fma4i_fmadd_v8sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5489                 :            : #define HAVE_fma4i_fmadd_v4df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5490                 :            : #define HAVE_fma4i_fmadd_v16sf (TARGET_AVX512F)
    5491                 :            : #define HAVE_fma4i_fmadd_v8df (TARGET_AVX512F)
    5492                 :            : #define HAVE_fma4i_fmsub_sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F)
    5493                 :            : #define HAVE_fma4i_fmsub_df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F)
    5494                 :            : #define HAVE_fma4i_fmsub_v4sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5495                 :            : #define HAVE_fma4i_fmsub_v2df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5496                 :            : #define HAVE_fma4i_fmsub_v8sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5497                 :            : #define HAVE_fma4i_fmsub_v4df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5498                 :            : #define HAVE_fma4i_fmsub_v16sf (TARGET_AVX512F)
    5499                 :            : #define HAVE_fma4i_fmsub_v8df (TARGET_AVX512F)
    5500                 :            : #define HAVE_fma4i_fnmadd_sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F)
    5501                 :            : #define HAVE_fma4i_fnmadd_df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F)
    5502                 :            : #define HAVE_fma4i_fnmadd_v4sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5503                 :            : #define HAVE_fma4i_fnmadd_v2df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5504                 :            : #define HAVE_fma4i_fnmadd_v8sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5505                 :            : #define HAVE_fma4i_fnmadd_v4df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5506                 :            : #define HAVE_fma4i_fnmadd_v16sf (TARGET_AVX512F)
    5507                 :            : #define HAVE_fma4i_fnmadd_v8df (TARGET_AVX512F)
    5508                 :            : #define HAVE_fma4i_fnmsub_sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F)
    5509                 :            : #define HAVE_fma4i_fnmsub_df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F)
    5510                 :            : #define HAVE_fma4i_fnmsub_v4sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5511                 :            : #define HAVE_fma4i_fnmsub_v2df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5512                 :            : #define HAVE_fma4i_fnmsub_v8sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5513                 :            : #define HAVE_fma4i_fnmsub_v4df (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512VL)
    5514                 :            : #define HAVE_fma4i_fnmsub_v16sf (TARGET_AVX512F)
    5515                 :            : #define HAVE_fma4i_fnmsub_v8df (TARGET_AVX512F)
    5516                 :            : #define HAVE_avx512f_fmadd_v16sf_maskz (TARGET_AVX512F && 1)
    5517                 :            : #define HAVE_avx512f_fmadd_v16sf_maskz_round ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
    5518                 :            : #define HAVE_avx512vl_fmadd_v8sf_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5519                 :            : #define HAVE_avx512vl_fmadd_v8sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5520                 :            : #define HAVE_avx512vl_fmadd_v4sf_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5521                 :            : #define HAVE_avx512vl_fmadd_v4sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5522                 :            : #define HAVE_avx512f_fmadd_v8df_maskz (TARGET_AVX512F && 1)
    5523                 :            : #define HAVE_avx512f_fmadd_v8df_maskz_round ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
    5524                 :            : #define HAVE_avx512vl_fmadd_v4df_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5525                 :            : #define HAVE_avx512vl_fmadd_v4df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5526                 :            : #define HAVE_avx512vl_fmadd_v2df_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5527                 :            : #define HAVE_avx512vl_fmadd_v2df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5528                 :            : #define HAVE_avx512f_fmsub_v16sf_maskz (TARGET_AVX512F && 1)
    5529                 :            : #define HAVE_avx512f_fmsub_v16sf_maskz_round ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
    5530                 :            : #define HAVE_avx512vl_fmsub_v8sf_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5531                 :            : #define HAVE_avx512vl_fmsub_v8sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5532                 :            : #define HAVE_avx512vl_fmsub_v4sf_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5533                 :            : #define HAVE_avx512vl_fmsub_v4sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5534                 :            : #define HAVE_avx512f_fmsub_v8df_maskz (TARGET_AVX512F && 1)
    5535                 :            : #define HAVE_avx512f_fmsub_v8df_maskz_round ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
    5536                 :            : #define HAVE_avx512vl_fmsub_v4df_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5537                 :            : #define HAVE_avx512vl_fmsub_v4df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5538                 :            : #define HAVE_avx512vl_fmsub_v2df_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5539                 :            : #define HAVE_avx512vl_fmsub_v2df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5540                 :            : #define HAVE_avx512f_fnmadd_v16sf_maskz (TARGET_AVX512F && 1)
    5541                 :            : #define HAVE_avx512f_fnmadd_v16sf_maskz_round ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
    5542                 :            : #define HAVE_avx512vl_fnmadd_v8sf_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5543                 :            : #define HAVE_avx512vl_fnmadd_v8sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5544                 :            : #define HAVE_avx512vl_fnmadd_v4sf_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5545                 :            : #define HAVE_avx512vl_fnmadd_v4sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5546                 :            : #define HAVE_avx512f_fnmadd_v8df_maskz (TARGET_AVX512F && 1)
    5547                 :            : #define HAVE_avx512f_fnmadd_v8df_maskz_round ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
    5548                 :            : #define HAVE_avx512vl_fnmadd_v4df_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5549                 :            : #define HAVE_avx512vl_fnmadd_v4df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5550                 :            : #define HAVE_avx512vl_fnmadd_v2df_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5551                 :            : #define HAVE_avx512vl_fnmadd_v2df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5552                 :            : #define HAVE_avx512f_fnmsub_v16sf_maskz (TARGET_AVX512F && 1)
    5553                 :            : #define HAVE_avx512f_fnmsub_v16sf_maskz_round ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
    5554                 :            : #define HAVE_avx512vl_fnmsub_v8sf_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5555                 :            : #define HAVE_avx512vl_fnmsub_v8sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5556                 :            : #define HAVE_avx512vl_fnmsub_v4sf_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5557                 :            : #define HAVE_avx512vl_fnmsub_v4sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5558                 :            : #define HAVE_avx512f_fnmsub_v8df_maskz (TARGET_AVX512F && 1)
    5559                 :            : #define HAVE_avx512f_fnmsub_v8df_maskz_round ((TARGET_AVX512F) && (TARGET_AVX512F && 1))
    5560                 :            : #define HAVE_avx512vl_fnmsub_v4df_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5561                 :            : #define HAVE_avx512vl_fnmsub_v4df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5562                 :            : #define HAVE_avx512vl_fnmsub_v2df_maskz ((TARGET_AVX512F && 1) && (TARGET_AVX512VL))
    5563                 :            : #define HAVE_avx512vl_fnmsub_v2df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F && 1) && (TARGET_AVX512VL)))
    5564                 :            : #define HAVE_fmaddsub_v16sf ((TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F) && (TARGET_AVX512F))
    5565                 :            : #define HAVE_fmaddsub_v8sf ((TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F) && (TARGET_AVX))
    5566                 :            : #define HAVE_fmaddsub_v4sf (TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F)
    5567                 :            : #define HAVE_fmaddsub_v8df ((TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F) && (TARGET_AVX512F))
    5568                 :            : #define HAVE_fmaddsub_v4df ((TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F) && (TARGET_AVX))
    5569                 :            : #define HAVE_fmaddsub_v2df ((TARGET_FMA || TARGET_FMA4 || TARGET_AVX512F) && (TARGET_SSE2))
    5570                 :            : #define HAVE_avx512f_fmaddsub_v16sf_maskz (TARGET_AVX512F)
    5571                 :            : #define HAVE_avx512f_fmaddsub_v16sf_maskz_round (TARGET_AVX512F)
    5572                 :            : #define HAVE_avx512vl_fmaddsub_v8sf_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5573                 :            : #define HAVE_avx512vl_fmaddsub_v8sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    5574                 :            : #define HAVE_avx512vl_fmaddsub_v4sf_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5575                 :            : #define HAVE_avx512vl_fmaddsub_v4sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    5576                 :            : #define HAVE_avx512f_fmaddsub_v8df_maskz (TARGET_AVX512F)
    5577                 :            : #define HAVE_avx512f_fmaddsub_v8df_maskz_round (TARGET_AVX512F)
    5578                 :            : #define HAVE_avx512vl_fmaddsub_v4df_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5579                 :            : #define HAVE_avx512vl_fmaddsub_v4df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    5580                 :            : #define HAVE_avx512vl_fmaddsub_v2df_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5581                 :            : #define HAVE_avx512vl_fmaddsub_v2df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    5582                 :            : #define HAVE_fmai_vmfmadd_v4sf (TARGET_FMA)
    5583                 :            : #define HAVE_fmai_vmfmadd_v4sf_round ((TARGET_AVX512F) && (TARGET_FMA))
    5584                 :            : #define HAVE_fmai_vmfmadd_v2df ((TARGET_FMA) && (TARGET_SSE2))
    5585                 :            : #define HAVE_fmai_vmfmadd_v2df_round ((TARGET_AVX512F) && ((TARGET_FMA) && (TARGET_SSE2)))
    5586                 :            : #define HAVE_fmai_vmfmsub_v4sf (TARGET_FMA)
    5587                 :            : #define HAVE_fmai_vmfmsub_v4sf_round ((TARGET_AVX512F) && (TARGET_FMA))
    5588                 :            : #define HAVE_fmai_vmfmsub_v2df ((TARGET_FMA) && (TARGET_SSE2))
    5589                 :            : #define HAVE_fmai_vmfmsub_v2df_round ((TARGET_AVX512F) && ((TARGET_FMA) && (TARGET_SSE2)))
    5590                 :            : #define HAVE_fmai_vmfnmadd_v4sf (TARGET_FMA)
    5591                 :            : #define HAVE_fmai_vmfnmadd_v4sf_round ((TARGET_AVX512F) && (TARGET_FMA))
    5592                 :            : #define HAVE_fmai_vmfnmadd_v2df ((TARGET_FMA) && (TARGET_SSE2))
    5593                 :            : #define HAVE_fmai_vmfnmadd_v2df_round ((TARGET_AVX512F) && ((TARGET_FMA) && (TARGET_SSE2)))
    5594                 :            : #define HAVE_fmai_vmfnmsub_v4sf (TARGET_FMA)
    5595                 :            : #define HAVE_fmai_vmfnmsub_v4sf_round ((TARGET_AVX512F) && (TARGET_FMA))
    5596                 :            : #define HAVE_fmai_vmfnmsub_v2df ((TARGET_FMA) && (TARGET_SSE2))
    5597                 :            : #define HAVE_fmai_vmfnmsub_v2df_round ((TARGET_AVX512F) && ((TARGET_FMA) && (TARGET_SSE2)))
    5598                 :            : #define HAVE_avx512f_vmfmadd_v4sf_maskz (TARGET_AVX512F)
    5599                 :            : #define HAVE_avx512f_vmfmadd_v4sf_maskz_round (TARGET_AVX512F)
    5600                 :            : #define HAVE_avx512f_vmfmadd_v2df_maskz ((TARGET_AVX512F) && (TARGET_SSE2))
    5601                 :            : #define HAVE_avx512f_vmfmadd_v2df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    5602                 :            : #define HAVE_fma4i_vmfmadd_v4sf (TARGET_FMA4)
    5603                 :            : #define HAVE_fma4i_vmfmadd_v2df ((TARGET_FMA4) && (TARGET_SSE2))
    5604                 :            : #define HAVE_floatunsv16siv16sf2 ((TARGET_SSE2 && (V16SFmode == V4SFmode || TARGET_AVX2)) && (TARGET_AVX512F))
    5605                 :            : #define HAVE_floatunsv8siv8sf2 ((TARGET_SSE2 && (V8SFmode == V4SFmode || TARGET_AVX2)) && (TARGET_AVX))
    5606                 :            : #define HAVE_floatunsv4siv4sf2 (TARGET_SSE2 && (V4SFmode == V4SFmode || TARGET_AVX2))
    5607                 :            : #define HAVE_fixuns_truncv16sfv16si2 ((TARGET_SSE2) && (TARGET_AVX512F))
    5608                 :            : #define HAVE_fixuns_truncv8sfv8si2 ((TARGET_SSE2) && (TARGET_AVX))
    5609                 :            : #define HAVE_fixuns_truncv4sfv4si2 (TARGET_SSE2)
    5610                 :            : #define HAVE_floatv2div2sf2 (TARGET_AVX512DQ && TARGET_AVX512VL)
    5611                 :            : #define HAVE_floatunsv2div2sf2 (TARGET_AVX512DQ && TARGET_AVX512VL)
    5612                 :            : #define HAVE_vec_packs_float_v8di (TARGET_AVX512DQ)
    5613                 :            : #define HAVE_vec_packu_float_v8di (TARGET_AVX512DQ)
    5614                 :            : #define HAVE_vec_packs_float_v4di ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5615                 :            : #define HAVE_vec_packu_float_v4di ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5616                 :            : #define HAVE_vec_packs_float_v2di ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5617                 :            : #define HAVE_vec_packu_float_v2di ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5618                 :            : #define HAVE_floatv2div2sf2_mask (TARGET_AVX512DQ && TARGET_AVX512VL)
    5619                 :            : #define HAVE_floatunsv2div2sf2_mask (TARGET_AVX512DQ && TARGET_AVX512VL)
    5620                 :            : #define HAVE_avx_cvtpd2dq256_2 (TARGET_AVX)
    5621                 :            : #define HAVE_vec_unpack_sfix_trunc_lo_v16sf (TARGET_AVX512DQ)
    5622                 :            : #define HAVE_vec_unpack_ufix_trunc_lo_v16sf (TARGET_AVX512DQ)
    5623                 :            : #define HAVE_vec_unpack_sfix_trunc_lo_v8sf ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5624                 :            : #define HAVE_vec_unpack_ufix_trunc_lo_v8sf ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5625                 :            : #define HAVE_vec_unpack_sfix_trunc_lo_v4sf ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5626                 :            : #define HAVE_vec_unpack_ufix_trunc_lo_v4sf ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5627                 :            : #define HAVE_vec_unpack_sfix_trunc_hi_v16sf (TARGET_AVX512DQ)
    5628                 :            : #define HAVE_vec_unpack_ufix_trunc_hi_v16sf (TARGET_AVX512DQ)
    5629                 :            : #define HAVE_vec_unpack_sfix_trunc_hi_v8sf ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5630                 :            : #define HAVE_vec_unpack_ufix_trunc_hi_v8sf ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5631                 :            : #define HAVE_vec_unpack_sfix_trunc_hi_v4sf ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5632                 :            : #define HAVE_vec_unpack_ufix_trunc_hi_v4sf ((TARGET_AVX512DQ) && (TARGET_AVX512VL))
    5633                 :            : #define HAVE_avx_cvttpd2dq256_2 (TARGET_AVX)
    5634                 :            : #define HAVE_sse2_cvtpd2ps (TARGET_SSE2)
    5635                 :            : #define HAVE_sse2_cvtpd2ps_mask (TARGET_SSE2)
    5636                 :            : #define HAVE_avx512bw_cvtmask2bv64qi (TARGET_AVX512BW)
    5637                 :            : #define HAVE_avx512vl_cvtmask2bv16qi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5638                 :            : #define HAVE_avx512vl_cvtmask2bv32qi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5639                 :            : #define HAVE_avx512bw_cvtmask2wv32hi (TARGET_AVX512BW)
    5640                 :            : #define HAVE_avx512vl_cvtmask2wv16hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5641                 :            : #define HAVE_avx512vl_cvtmask2wv8hi ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5642                 :            : #define HAVE_avx512f_cvtmask2dv16si (TARGET_AVX512F)
    5643                 :            : #define HAVE_avx512vl_cvtmask2dv8si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5644                 :            : #define HAVE_avx512vl_cvtmask2dv4si ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5645                 :            : #define HAVE_avx512f_cvtmask2qv8di (TARGET_AVX512F)
    5646                 :            : #define HAVE_avx512vl_cvtmask2qv4di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5647                 :            : #define HAVE_avx512vl_cvtmask2qv2di ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5648                 :            : #define HAVE_vec_unpacks_hi_v4sf (TARGET_SSE2)
    5649                 :            : #define HAVE_vec_unpacks_hi_v8sf (TARGET_AVX)
    5650                 :            : #define HAVE_vec_unpacks_hi_v16sf (TARGET_AVX512F)
    5651                 :            : #define HAVE_vec_unpacks_lo_v4sf (TARGET_SSE2)
    5652                 :            : #define HAVE_vec_unpacks_lo_v8sf (TARGET_AVX)
    5653                 :            : #define HAVE_vec_unpacks_float_hi_v32hi ((TARGET_SSE2) && (TARGET_AVX512F))
    5654                 :            : #define HAVE_vec_unpacks_float_hi_v16hi ((TARGET_SSE2) && (TARGET_AVX2))
    5655                 :            : #define HAVE_vec_unpacks_float_hi_v8hi (TARGET_SSE2)
    5656                 :            : #define HAVE_vec_unpacks_float_lo_v32hi ((TARGET_SSE2) && (TARGET_AVX512F))
    5657                 :            : #define HAVE_vec_unpacks_float_lo_v16hi ((TARGET_SSE2) && (TARGET_AVX2))
    5658                 :            : #define HAVE_vec_unpacks_float_lo_v8hi (TARGET_SSE2)
    5659                 :            : #define HAVE_vec_unpacku_float_hi_v32hi ((TARGET_SSE2) && (TARGET_AVX512F))
    5660                 :            : #define HAVE_vec_unpacku_float_hi_v16hi ((TARGET_SSE2) && (TARGET_AVX2))
    5661                 :            : #define HAVE_vec_unpacku_float_hi_v8hi (TARGET_SSE2)
    5662                 :            : #define HAVE_vec_unpacku_float_lo_v32hi ((TARGET_SSE2) && (TARGET_AVX512F))
    5663                 :            : #define HAVE_vec_unpacku_float_lo_v16hi ((TARGET_SSE2) && (TARGET_AVX2))
    5664                 :            : #define HAVE_vec_unpacku_float_lo_v8hi (TARGET_SSE2)
    5665                 :            : #define HAVE_vec_unpacks_float_hi_v4si (TARGET_SSE2)
    5666                 :            : #define HAVE_vec_unpacks_float_lo_v4si (TARGET_SSE2)
    5667                 :            : #define HAVE_vec_unpacks_float_hi_v8si (TARGET_AVX)
    5668                 :            : #define HAVE_vec_unpacks_float_lo_v8si (TARGET_AVX)
    5669                 :            : #define HAVE_vec_unpacks_float_hi_v16si (TARGET_AVX512F)
    5670                 :            : #define HAVE_vec_unpacks_float_lo_v16si (TARGET_AVX512F)
    5671                 :            : #define HAVE_vec_unpacku_float_hi_v4si (TARGET_SSE2)
    5672                 :            : #define HAVE_vec_unpacku_float_lo_v4si (TARGET_SSE2)
    5673                 :            : #define HAVE_vec_unpacku_float_hi_v8si (TARGET_AVX)
    5674                 :            : #define HAVE_vec_unpacku_float_hi_v16si (TARGET_AVX512F)
    5675                 :            : #define HAVE_vec_unpacku_float_lo_v8si (TARGET_AVX)
    5676                 :            : #define HAVE_vec_unpacku_float_lo_v16si (TARGET_AVX512F)
    5677                 :            : #define HAVE_vec_pack_trunc_v8df ((TARGET_AVX) && (TARGET_AVX512F))
    5678                 :            : #define HAVE_vec_pack_trunc_v4df (TARGET_AVX)
    5679                 :            : #define HAVE_vec_pack_trunc_v2df (TARGET_SSE2)
    5680                 :            : #define HAVE_vec_pack_sfix_trunc_v8df (TARGET_AVX512F)
    5681                 :            : #define HAVE_vec_pack_sfix_trunc_v4df (TARGET_AVX)
    5682                 :            : #define HAVE_vec_pack_sfix_trunc_v2df (TARGET_SSE2)
    5683                 :            : #define HAVE_vec_pack_ufix_trunc_v8df ((TARGET_SSE2) && (TARGET_AVX512F))
    5684                 :            : #define HAVE_vec_pack_ufix_trunc_v4df ((TARGET_SSE2) && (TARGET_AVX))
    5685                 :            : #define HAVE_vec_pack_ufix_trunc_v2df (TARGET_SSE2)
    5686                 :            : #define HAVE_avx512f_vec_pack_sfix_v8df (TARGET_AVX512F)
    5687                 :            : #define HAVE_vec_pack_sfix_v4df (TARGET_AVX)
    5688                 :            : #define HAVE_vec_pack_sfix_v2df (TARGET_SSE2)
    5689                 :            : #define HAVE_sse_movhlps_exp (TARGET_SSE)
    5690                 :            : #define HAVE_sse_movlhps_exp (TARGET_SSE)
    5691                 :            : #define HAVE_vec_interleave_highv8sf (TARGET_AVX)
    5692                 :            : #define HAVE_vec_interleave_lowv8sf (TARGET_AVX)
    5693                 :            : #define HAVE_avx_shufps256 (TARGET_AVX)
    5694                 :            : #define HAVE_avx_shufps256_mask ((TARGET_AVX512VL) && (TARGET_AVX))
    5695                 :            : #define HAVE_sse_shufps (TARGET_SSE)
    5696                 :            : #define HAVE_sse_shufps_mask ((TARGET_AVX512VL) && (TARGET_SSE))
    5697                 :            : #define HAVE_sse_loadhps_exp (TARGET_SSE)
    5698                 :            : #define HAVE_sse_loadlps_exp (TARGET_SSE)
    5699                 :            : #define HAVE_vec_setv64qi ((TARGET_SSE) && (TARGET_AVX512F))
    5700                 :            : #define HAVE_vec_setv32qi ((TARGET_SSE) && (TARGET_AVX))
    5701                 :            : #define HAVE_vec_setv16qi (TARGET_SSE)
    5702                 :            : #define HAVE_vec_setv32hi ((TARGET_SSE) && (TARGET_AVX512F))
    5703                 :            : #define HAVE_vec_setv16hi ((TARGET_SSE) && (TARGET_AVX))
    5704                 :            : #define HAVE_vec_setv8hi (TARGET_SSE)
    5705                 :            : #define HAVE_vec_setv16si ((TARGET_SSE) && (TARGET_AVX512F))
    5706                 :            : #define HAVE_vec_setv8si ((TARGET_SSE) && (TARGET_AVX))
    5707                 :            : #define HAVE_vec_setv4si (TARGET_SSE)
    5708                 :            : #define HAVE_vec_setv8di ((TARGET_SSE) && (TARGET_AVX512F))
    5709                 :            : #define HAVE_vec_setv4di ((TARGET_SSE) && (TARGET_AVX))
    5710                 :            : #define HAVE_vec_setv2di (TARGET_SSE)
    5711                 :            : #define HAVE_vec_setv16sf ((TARGET_SSE) && (TARGET_AVX512F))
    5712                 :            : #define HAVE_vec_setv8sf ((TARGET_SSE) && (TARGET_AVX))
    5713                 :            : #define HAVE_vec_setv4sf (TARGET_SSE)
    5714                 :            : #define HAVE_vec_setv8df ((TARGET_SSE) && (TARGET_AVX512F))
    5715                 :            : #define HAVE_vec_setv4df ((TARGET_SSE) && (TARGET_AVX))
    5716                 :            : #define HAVE_vec_setv2df ((TARGET_SSE) && (TARGET_SSE2))
    5717                 :            : #define HAVE_avx512dq_vextractf64x2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    5718                 :            : #define HAVE_avx512dq_vextracti64x2_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    5719                 :            : #define HAVE_avx512f_vextractf32x4_mask (TARGET_AVX512F)
    5720                 :            : #define HAVE_avx512f_vextracti32x4_mask (TARGET_AVX512F)
    5721                 :            : #define HAVE_avx512dq_vextractf32x8_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    5722                 :            : #define HAVE_avx512dq_vextracti32x8_mask ((TARGET_AVX512F) && (TARGET_AVX512DQ))
    5723                 :            : #define HAVE_avx512f_vextractf64x4_mask (TARGET_AVX512F)
    5724                 :            : #define HAVE_avx512f_vextracti64x4_mask (TARGET_AVX512F)
    5725                 :            : #define HAVE_avx512vl_vextractf128v8si (TARGET_AVX512VL)
    5726                 :            : #define HAVE_avx512vl_vextractf128v8sf (TARGET_AVX512VL)
    5727                 :            : #define HAVE_avx512vl_vextractf128v4di ((TARGET_AVX512VL) && (TARGET_AVX512DQ))
    5728                 :            : #define HAVE_avx512vl_vextractf128v4df ((TARGET_AVX512VL) && (TARGET_AVX512DQ))
    5729                 :            : #define HAVE_avx_vextractf128v32qi (TARGET_AVX)
    5730                 :            : #define HAVE_avx_vextractf128v16hi (TARGET_AVX)
    5731                 :            : #define HAVE_avx_vextractf128v8si (TARGET_AVX)
    5732                 :            : #define HAVE_avx_vextractf128v4di (TARGET_AVX)
    5733                 :            : #define HAVE_avx_vextractf128v8sf (TARGET_AVX)
    5734                 :            : #define HAVE_avx_vextractf128v4df (TARGET_AVX)
    5735                 :            : #define HAVE_vec_extractv64qiqi ((TARGET_SSE) && (TARGET_AVX512BW))
    5736                 :            : #define HAVE_vec_extractv32qiqi ((TARGET_SSE) && (TARGET_AVX))
    5737                 :            : #define HAVE_vec_extractv16qiqi (TARGET_SSE)
    5738                 :            : #define HAVE_vec_extractv32hihi ((TARGET_SSE) && (TARGET_AVX512BW))
    5739                 :            : #define HAVE_vec_extractv16hihi ((TARGET_SSE) && (TARGET_AVX))
    5740                 :            : #define HAVE_vec_extractv8hihi (TARGET_SSE)
    5741                 :            : #define HAVE_vec_extractv16sisi ((TARGET_SSE) && (TARGET_AVX512F))
    5742                 :            : #define HAVE_vec_extractv8sisi ((TARGET_SSE) && (TARGET_AVX))
    5743                 :            : #define HAVE_vec_extractv4sisi (TARGET_SSE)
    5744                 :            : #define HAVE_vec_extractv8didi ((TARGET_SSE) && (TARGET_AVX512F))
    5745                 :            : #define HAVE_vec_extractv4didi ((TARGET_SSE) && (TARGET_AVX))
    5746                 :            : #define HAVE_vec_extractv2didi (TARGET_SSE)
    5747                 :            : #define HAVE_vec_extractv16sfsf ((TARGET_SSE) && (TARGET_AVX512F))
    5748                 :            : #define HAVE_vec_extractv8sfsf ((TARGET_SSE) && (TARGET_AVX))
    5749                 :            : #define HAVE_vec_extractv4sfsf (TARGET_SSE)
    5750                 :            : #define HAVE_vec_extractv8dfdf ((TARGET_SSE) && (TARGET_AVX512F))
    5751                 :            : #define HAVE_vec_extractv4dfdf ((TARGET_SSE) && (TARGET_AVX))
    5752                 :            : #define HAVE_vec_extractv2dfdf (TARGET_SSE)
    5753                 :            : #define HAVE_vec_extractv4titi ((TARGET_SSE) && (TARGET_AVX512F))
    5754                 :            : #define HAVE_vec_extractv2titi ((TARGET_SSE) && (TARGET_AVX))
    5755                 :            : #define HAVE_vec_extractv32qiv16qi (TARGET_AVX)
    5756                 :            : #define HAVE_vec_extractv16hiv8hi (TARGET_AVX)
    5757                 :            : #define HAVE_vec_extractv8siv4si (TARGET_AVX)
    5758                 :            : #define HAVE_vec_extractv4div2di (TARGET_AVX)
    5759                 :            : #define HAVE_vec_extractv8sfv4sf (TARGET_AVX)
    5760                 :            : #define HAVE_vec_extractv4dfv2df (TARGET_AVX)
    5761                 :            : #define HAVE_vec_extractv64qiv32qi ((TARGET_AVX) && (TARGET_AVX512F))
    5762                 :            : #define HAVE_vec_extractv32hiv16hi ((TARGET_AVX) && (TARGET_AVX512F))
    5763                 :            : #define HAVE_vec_extractv16siv8si ((TARGET_AVX) && (TARGET_AVX512F))
    5764                 :            : #define HAVE_vec_extractv8div4di ((TARGET_AVX) && (TARGET_AVX512F))
    5765                 :            : #define HAVE_vec_extractv16sfv8sf ((TARGET_AVX) && (TARGET_AVX512F))
    5766                 :            : #define HAVE_vec_extractv8dfv4df ((TARGET_AVX) && (TARGET_AVX512F))
    5767                 :            : #define HAVE_vec_interleave_highv4df (TARGET_AVX)
    5768                 :            : #define HAVE_vec_interleave_highv2df (TARGET_SSE2)
    5769                 :            : #define HAVE_avx512f_movddup512 (TARGET_AVX512F)
    5770                 :            : #define HAVE_avx512f_movddup512_mask (TARGET_AVX512F)
    5771                 :            : #define HAVE_avx512f_unpcklpd512 (TARGET_AVX512F)
    5772                 :            : #define HAVE_avx512f_unpcklpd512_mask (TARGET_AVX512F)
    5773                 :            : #define HAVE_avx_movddup256 (TARGET_AVX && 1)
    5774                 :            : #define HAVE_avx_movddup256_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    5775                 :            : #define HAVE_avx_unpcklpd256 (TARGET_AVX && 1)
    5776                 :            : #define HAVE_avx_unpcklpd256_mask ((TARGET_AVX512F) && (TARGET_AVX && TARGET_AVX512VL))
    5777                 :            : #define HAVE_vec_interleave_lowv4df (TARGET_AVX)
    5778                 :            : #define HAVE_vec_interleave_lowv2df (TARGET_SSE2)
    5779                 :            : #define HAVE_avx512f_vternlogv16si_maskz (TARGET_AVX512F)
    5780                 :            : #define HAVE_avx512vl_vternlogv8si_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5781                 :            : #define HAVE_avx512vl_vternlogv4si_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5782                 :            : #define HAVE_avx512f_vternlogv8di_maskz (TARGET_AVX512F)
    5783                 :            : #define HAVE_avx512vl_vternlogv4di_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5784                 :            : #define HAVE_avx512vl_vternlogv2di_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5785                 :            : #define HAVE_avx512f_shufps512_mask (TARGET_AVX512F)
    5786                 :            : #define HAVE_avx512f_fixupimmv16sf_maskz (TARGET_AVX512F)
    5787                 :            : #define HAVE_avx512f_fixupimmv16sf_maskz_round (TARGET_AVX512F)
    5788                 :            : #define HAVE_avx512vl_fixupimmv8sf_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5789                 :            : #define HAVE_avx512vl_fixupimmv8sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    5790                 :            : #define HAVE_avx512vl_fixupimmv4sf_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5791                 :            : #define HAVE_avx512vl_fixupimmv4sf_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    5792                 :            : #define HAVE_avx512f_fixupimmv8df_maskz (TARGET_AVX512F)
    5793                 :            : #define HAVE_avx512f_fixupimmv8df_maskz_round (TARGET_AVX512F)
    5794                 :            : #define HAVE_avx512vl_fixupimmv4df_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5795                 :            : #define HAVE_avx512vl_fixupimmv4df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    5796                 :            : #define HAVE_avx512vl_fixupimmv2df_maskz ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5797                 :            : #define HAVE_avx512vl_fixupimmv2df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    5798                 :            : #define HAVE_avx512f_sfixupimmv4sf_maskz (TARGET_AVX512F)
    5799                 :            : #define HAVE_avx512f_sfixupimmv4sf_maskz_round (TARGET_AVX512F)
    5800                 :            : #define HAVE_avx512f_sfixupimmv2df_maskz ((TARGET_AVX512F) && (TARGET_SSE2))
    5801                 :            : #define HAVE_avx512f_sfixupimmv2df_maskz_round ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_SSE2)))
    5802                 :            : #define HAVE_avx512f_shufpd512_mask (TARGET_AVX512F)
    5803                 :            : #define HAVE_avx_shufpd256 (TARGET_AVX)
    5804                 :            : #define HAVE_avx_shufpd256_mask ((TARGET_AVX512VL) && (TARGET_AVX))
    5805                 :            : #define HAVE_sse2_shufpd (TARGET_SSE2)
    5806                 :            : #define HAVE_sse2_shufpd_mask ((TARGET_AVX512VL) && (TARGET_SSE2))
    5807                 :            : #define HAVE_sse2_loadhpd_exp (TARGET_SSE2)
    5808                 :            : #define HAVE_sse2_loadlpd_exp (TARGET_SSE2)
    5809                 :            : #define HAVE_avx512f_ss_truncatev16siv16qi2_mask_store (TARGET_AVX512F)
    5810                 :            : #define HAVE_avx512f_truncatev16siv16qi2_mask_store (TARGET_AVX512F)
    5811                 :            : #define HAVE_avx512f_us_truncatev16siv16qi2_mask_store (TARGET_AVX512F)
    5812                 :            : #define HAVE_avx512f_ss_truncatev16siv16hi2_mask_store (TARGET_AVX512F)
    5813                 :            : #define HAVE_avx512f_truncatev16siv16hi2_mask_store (TARGET_AVX512F)
    5814                 :            : #define HAVE_avx512f_us_truncatev16siv16hi2_mask_store (TARGET_AVX512F)
    5815                 :            : #define HAVE_avx512f_ss_truncatev8div8si2_mask_store (TARGET_AVX512F)
    5816                 :            : #define HAVE_avx512f_truncatev8div8si2_mask_store (TARGET_AVX512F)
    5817                 :            : #define HAVE_avx512f_us_truncatev8div8si2_mask_store (TARGET_AVX512F)
    5818                 :            : #define HAVE_avx512f_ss_truncatev8div8hi2_mask_store (TARGET_AVX512F)
    5819                 :            : #define HAVE_avx512f_truncatev8div8hi2_mask_store (TARGET_AVX512F)
    5820                 :            : #define HAVE_avx512f_us_truncatev8div8hi2_mask_store (TARGET_AVX512F)
    5821                 :            : #define HAVE_avx512bw_ss_truncatev32hiv32qi2_mask_store (TARGET_AVX512BW)
    5822                 :            : #define HAVE_avx512bw_truncatev32hiv32qi2_mask_store (TARGET_AVX512BW)
    5823                 :            : #define HAVE_avx512bw_us_truncatev32hiv32qi2_mask_store (TARGET_AVX512BW)
    5824                 :            : #define HAVE_avx512vl_ss_truncatev4div4si2_mask_store (TARGET_AVX512VL)
    5825                 :            : #define HAVE_avx512vl_truncatev4div4si2_mask_store (TARGET_AVX512VL)
    5826                 :            : #define HAVE_avx512vl_us_truncatev4div4si2_mask_store (TARGET_AVX512VL)
    5827                 :            : #define HAVE_avx512vl_ss_truncatev8siv8hi2_mask_store (TARGET_AVX512VL)
    5828                 :            : #define HAVE_avx512vl_truncatev8siv8hi2_mask_store (TARGET_AVX512VL)
    5829                 :            : #define HAVE_avx512vl_us_truncatev8siv8hi2_mask_store (TARGET_AVX512VL)
    5830                 :            : #define HAVE_avx512vl_ss_truncatev16hiv16qi2_mask_store ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    5831                 :            : #define HAVE_avx512vl_truncatev16hiv16qi2_mask_store ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    5832                 :            : #define HAVE_avx512vl_us_truncatev16hiv16qi2_mask_store ((TARGET_AVX512VL) && (TARGET_AVX512BW))
    5833                 :            : #define HAVE_negv64qi2 ((TARGET_SSE2) && (TARGET_AVX512BW))
    5834                 :            : #define HAVE_negv32qi2 ((TARGET_SSE2) && (TARGET_AVX2))
    5835                 :            : #define HAVE_negv16qi2 (TARGET_SSE2)
    5836                 :            : #define HAVE_negv32hi2 ((TARGET_SSE2) && (TARGET_AVX512BW))
    5837                 :            : #define HAVE_negv16hi2 ((TARGET_SSE2) && (TARGET_AVX2))
    5838                 :            : #define HAVE_negv8hi2 (TARGET_SSE2)
    5839                 :            : #define HAVE_negv16si2 ((TARGET_SSE2) && (TARGET_AVX512F))
    5840                 :            : #define HAVE_negv8si2 ((TARGET_SSE2) && (TARGET_AVX2))
    5841                 :            : #define HAVE_negv4si2 (TARGET_SSE2)
    5842                 :            : #define HAVE_negv8di2 ((TARGET_SSE2) && (TARGET_AVX512F))
    5843                 :            : #define HAVE_negv4di2 ((TARGET_SSE2) && (TARGET_AVX2))
    5844                 :            : #define HAVE_negv2di2 (TARGET_SSE2)
    5845                 :            : #define HAVE_addv64qi3 ((TARGET_SSE2) && (TARGET_AVX512BW))
    5846                 :            : #define HAVE_subv64qi3 ((TARGET_SSE2) && (TARGET_AVX512BW))
    5847                 :            : #define HAVE_addv32qi3 ((TARGET_SSE2) && (TARGET_AVX2))
    5848                 :            : #define HAVE_subv32qi3 ((TARGET_SSE2) && (TARGET_AVX2))
    5849                 :            : #define HAVE_addv16qi3 (TARGET_SSE2)
    5850                 :            : #define HAVE_subv16qi3 (TARGET_SSE2)
    5851                 :            : #define HAVE_addv32hi3 ((TARGET_SSE2) && (TARGET_AVX512BW))
    5852                 :            : #define HAVE_subv32hi3 ((TARGET_SSE2) && (TARGET_AVX512BW))
    5853                 :            : #define HAVE_addv16hi3 ((TARGET_SSE2) && (TARGET_AVX2))
    5854                 :            : #define HAVE_subv16hi3 ((TARGET_SSE2) && (TARGET_AVX2))
    5855                 :            : #define HAVE_addv8hi3 (TARGET_SSE2)
    5856                 :            : #define HAVE_subv8hi3 (TARGET_SSE2)
    5857                 :            : #define HAVE_addv16si3 ((TARGET_SSE2) && (TARGET_AVX512F))
    5858                 :            : #define HAVE_subv16si3 ((TARGET_SSE2) && (TARGET_AVX512F))
    5859                 :            : #define HAVE_addv8si3 ((TARGET_SSE2) && (TARGET_AVX2))
    5860                 :            : #define HAVE_subv8si3 ((TARGET_SSE2) && (TARGET_AVX2))
    5861                 :            : #define HAVE_addv4si3 (TARGET_SSE2)
    5862                 :            : #define HAVE_subv4si3 (TARGET_SSE2)
    5863                 :            : #define HAVE_addv8di3 ((TARGET_SSE2) && (TARGET_AVX512F))
    5864                 :            : #define HAVE_subv8di3 ((TARGET_SSE2) && (TARGET_AVX512F))
    5865                 :            : #define HAVE_addv4di3 ((TARGET_SSE2) && (TARGET_AVX2))
    5866                 :            : #define HAVE_subv4di3 ((TARGET_SSE2) && (TARGET_AVX2))
    5867                 :            : #define HAVE_addv2di3 (TARGET_SSE2)
    5868                 :            : #define HAVE_subv2di3 (TARGET_SSE2)
    5869                 :            : #define HAVE_addv16si3_mask (TARGET_AVX512F)
    5870                 :            : #define HAVE_subv16si3_mask (TARGET_AVX512F)
    5871                 :            : #define HAVE_addv8si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5872                 :            : #define HAVE_subv8si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5873                 :            : #define HAVE_addv4si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5874                 :            : #define HAVE_subv4si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5875                 :            : #define HAVE_addv8di3_mask (TARGET_AVX512F)
    5876                 :            : #define HAVE_subv8di3_mask (TARGET_AVX512F)
    5877                 :            : #define HAVE_addv4di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5878                 :            : #define HAVE_subv4di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5879                 :            : #define HAVE_addv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5880                 :            : #define HAVE_subv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    5881                 :            : #define HAVE_addv64qi3_mask (TARGET_AVX512BW)
    5882                 :            : #define HAVE_subv64qi3_mask (TARGET_AVX512BW)
    5883                 :            : #define HAVE_addv16qi3_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5884                 :            : #define HAVE_subv16qi3_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5885                 :            : #define HAVE_addv32qi3_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5886                 :            : #define HAVE_subv32qi3_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5887                 :            : #define HAVE_addv32hi3_mask (TARGET_AVX512BW)
    5888                 :            : #define HAVE_subv32hi3_mask (TARGET_AVX512BW)
    5889                 :            : #define HAVE_addv16hi3_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5890                 :            : #define HAVE_subv16hi3_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5891                 :            : #define HAVE_addv8hi3_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5892                 :            : #define HAVE_subv8hi3_mask ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    5893                 :            : #define HAVE_avx512bw_ssaddv64qi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    5894                 :            : #define HAVE_avx512bw_ssaddv64qi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5895                 :            : #define HAVE_avx512bw_usaddv64qi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    5896                 :            : #define HAVE_avx512bw_usaddv64qi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5897                 :            : #define HAVE_avx512bw_sssubv64qi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    5898                 :            : #define HAVE_avx512bw_sssubv64qi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5899                 :            : #define HAVE_avx512bw_ussubv64qi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    5900                 :            : #define HAVE_avx512bw_ussubv64qi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5901                 :            : #define HAVE_avx2_ssaddv32qi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    5902                 :            : #define HAVE_avx2_ssaddv32qi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5903                 :            : #define HAVE_avx2_usaddv32qi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    5904                 :            : #define HAVE_avx2_usaddv32qi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5905                 :            : #define HAVE_avx2_sssubv32qi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    5906                 :            : #define HAVE_avx2_sssubv32qi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5907                 :            : #define HAVE_avx2_ussubv32qi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    5908                 :            : #define HAVE_avx2_ussubv32qi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5909                 :            : #define HAVE_sse2_ssaddv16qi3 (TARGET_SSE2 && 1 && 1)
    5910                 :            : #define HAVE_sse2_ssaddv16qi3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5911                 :            : #define HAVE_sse2_usaddv16qi3 (TARGET_SSE2 && 1 && 1)
    5912                 :            : #define HAVE_sse2_usaddv16qi3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5913                 :            : #define HAVE_sse2_sssubv16qi3 (TARGET_SSE2 && 1 && 1)
    5914                 :            : #define HAVE_sse2_sssubv16qi3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5915                 :            : #define HAVE_sse2_ussubv16qi3 (TARGET_SSE2 && 1 && 1)
    5916                 :            : #define HAVE_sse2_ussubv16qi3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5917                 :            : #define HAVE_avx512bw_ssaddv32hi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    5918                 :            : #define HAVE_avx512bw_ssaddv32hi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5919                 :            : #define HAVE_avx512bw_usaddv32hi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    5920                 :            : #define HAVE_avx512bw_usaddv32hi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5921                 :            : #define HAVE_avx512bw_sssubv32hi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    5922                 :            : #define HAVE_avx512bw_sssubv32hi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5923                 :            : #define HAVE_avx512bw_ussubv32hi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    5924                 :            : #define HAVE_avx512bw_ussubv32hi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5925                 :            : #define HAVE_avx2_ssaddv16hi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    5926                 :            : #define HAVE_avx2_ssaddv16hi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5927                 :            : #define HAVE_avx2_usaddv16hi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    5928                 :            : #define HAVE_avx2_usaddv16hi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5929                 :            : #define HAVE_avx2_sssubv16hi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    5930                 :            : #define HAVE_avx2_sssubv16hi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5931                 :            : #define HAVE_avx2_ussubv16hi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    5932                 :            : #define HAVE_avx2_ussubv16hi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5933                 :            : #define HAVE_sse2_ssaddv8hi3 (TARGET_SSE2 && 1 && 1)
    5934                 :            : #define HAVE_sse2_ssaddv8hi3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5935                 :            : #define HAVE_sse2_usaddv8hi3 (TARGET_SSE2 && 1 && 1)
    5936                 :            : #define HAVE_sse2_usaddv8hi3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5937                 :            : #define HAVE_sse2_sssubv8hi3 (TARGET_SSE2 && 1 && 1)
    5938                 :            : #define HAVE_sse2_sssubv8hi3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5939                 :            : #define HAVE_sse2_ussubv8hi3 (TARGET_SSE2 && 1 && 1)
    5940                 :            : #define HAVE_sse2_ussubv8hi3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5941                 :            : #define HAVE_mulv64qi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    5942                 :            : #define HAVE_mulv64qi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5943                 :            : #define HAVE_mulv32qi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    5944                 :            : #define HAVE_mulv32qi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5945                 :            : #define HAVE_mulv16qi3 (TARGET_SSE2 && 1 && 1)
    5946                 :            : #define HAVE_mulv16qi3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5947                 :            : #define HAVE_mulv32hi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX512BW))
    5948                 :            : #define HAVE_mulv32hi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5949                 :            : #define HAVE_mulv16hi3 ((TARGET_SSE2 && 1 && 1) && (TARGET_AVX2))
    5950                 :            : #define HAVE_mulv16hi3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5951                 :            : #define HAVE_mulv8hi3 (TARGET_SSE2 && 1 && 1)
    5952                 :            : #define HAVE_mulv8hi3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5953                 :            : #define HAVE_smulv32hi3_highpart ((TARGET_SSE2 \
    5954                 :            :    && 1 && 1) && (TARGET_AVX512BW))
    5955                 :            : #define HAVE_smulv32hi3_highpart_mask ((TARGET_AVX512F) && ((TARGET_SSE2 \
    5956                 :            :    && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5957                 :            : #define HAVE_umulv32hi3_highpart ((TARGET_SSE2 \
    5958                 :            :    && 1 && 1) && (TARGET_AVX512BW))
    5959                 :            : #define HAVE_umulv32hi3_highpart_mask ((TARGET_AVX512F) && ((TARGET_SSE2 \
    5960                 :            :    && (64 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX512BW)))
    5961                 :            : #define HAVE_smulv16hi3_highpart ((TARGET_SSE2 \
    5962                 :            :    && 1 && 1) && (TARGET_AVX2))
    5963                 :            : #define HAVE_smulv16hi3_highpart_mask ((TARGET_AVX512F) && ((TARGET_SSE2 \
    5964                 :            :    && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5965                 :            : #define HAVE_umulv16hi3_highpart ((TARGET_SSE2 \
    5966                 :            :    && 1 && 1) && (TARGET_AVX2))
    5967                 :            : #define HAVE_umulv16hi3_highpart_mask ((TARGET_AVX512F) && ((TARGET_SSE2 \
    5968                 :            :    && (32 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW) && (TARGET_AVX2)))
    5969                 :            : #define HAVE_smulv8hi3_highpart (TARGET_SSE2 \
    5970                 :            :    && 1 && 1)
    5971                 :            : #define HAVE_smulv8hi3_highpart_mask ((TARGET_AVX512F) && (TARGET_SSE2 \
    5972                 :            :    && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5973                 :            : #define HAVE_umulv8hi3_highpart (TARGET_SSE2 \
    5974                 :            :    && 1 && 1)
    5975                 :            : #define HAVE_umulv8hi3_highpart_mask ((TARGET_AVX512F) && (TARGET_SSE2 \
    5976                 :            :    && (16 == 64 || TARGET_AVX512VL) && TARGET_AVX512BW))
    5977                 :            : #define HAVE_vec_widen_umult_even_v16si (TARGET_AVX512F)
    5978                 :            : #define HAVE_vec_widen_umult_even_v16si_mask (TARGET_AVX512F)
    5979                 :            : #define HAVE_vec_widen_umult_even_v8si (TARGET_AVX2 && 1)
    5980                 :            : #define HAVE_vec_widen_umult_even_v8si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    5981                 :            : #define HAVE_vec_widen_umult_even_v4si (TARGET_SSE2 && 1)
    5982                 :            : #define HAVE_vec_widen_umult_even_v4si_mask ((TARGET_AVX512F) && (TARGET_SSE2 && TARGET_AVX512VL))
    5983                 :            : #define HAVE_vec_widen_smult_even_v16si (TARGET_AVX512F)
    5984                 :            : #define HAVE_vec_widen_smult_even_v16si_mask (TARGET_AVX512F)
    5985                 :            : #define HAVE_vec_widen_smult_even_v8si (TARGET_AVX2 && 1)
    5986                 :            : #define HAVE_vec_widen_smult_even_v8si_mask ((TARGET_AVX512F) && (TARGET_AVX2 && TARGET_AVX512VL))
    5987                 :            : #define HAVE_sse4_1_mulv2siv2di3 (TARGET_SSE4_1 && 1)
    5988                 :            : #define HAVE_sse4_1_mulv2siv2di3_mask ((TARGET_AVX512F) && (TARGET_SSE4_1 && TARGET_AVX512VL))
    5989                 :            : #define HAVE_avx2_pmaddwd (TARGET_AVX2)
    5990                 :            : #define HAVE_sse2_pmaddwd (TARGET_SSE2)
    5991                 :            : #define HAVE_mulv16si3 ((TARGET_SSE2 && 1) && (TARGET_AVX512F))
    5992                 :            : #define HAVE_mulv16si3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (64 == 64 || TARGET_AVX512VL)) && (TARGET_AVX512F)))
    5993                 :            : #define HAVE_mulv8si3 ((TARGET_SSE2 && 1) && (TARGET_AVX2))
    5994                 :            : #define HAVE_mulv8si3_mask ((TARGET_AVX512F) && ((TARGET_SSE2 && (32 == 64 || TARGET_AVX512VL)) && (TARGET_AVX2)))
    5995                 :            : #define HAVE_mulv4si3 (TARGET_SSE2 && 1)
    5996                 :            : #define HAVE_mulv4si3_mask ((TARGET_AVX512F) && (TARGET_SSE2 && (16 == 64 || TARGET_AVX512VL)))
    5997                 :            : #define HAVE_mulv8di3 ((TARGET_SSE2) && (TARGET_AVX512F))
    5998                 :            : #define HAVE_mulv4di3 ((TARGET_SSE2) && (TARGET_AVX2))
    5999                 :            : #define HAVE_mulv2di3 (TARGET_SSE2)
    6000                 :            : #define HAVE_vec_widen_smult_hi_v32qi ((TARGET_SSE2) && (TARGET_AVX2))
    6001                 :            : #define HAVE_vec_widen_umult_hi_v32qi ((TARGET_SSE2) && (TARGET_AVX2))
    6002                 :            : #define HAVE_vec_widen_smult_hi_v16qi (TARGET_SSE2)
    6003                 :            : #define HAVE_vec_widen_umult_hi_v16qi (TARGET_SSE2)
    6004                 :            : #define HAVE_vec_widen_smult_hi_v16hi ((TARGET_SSE2) && (TARGET_AVX2))
    6005                 :            : #define HAVE_vec_widen_umult_hi_v16hi ((TARGET_SSE2) && (TARGET_AVX2))
    6006                 :            : #define HAVE_vec_widen_smult_hi_v8hi (TARGET_SSE2)
    6007                 :            : #define HAVE_vec_widen_umult_hi_v8hi (TARGET_SSE2)
    6008                 :            : #define HAVE_vec_widen_smult_hi_v8si ((TARGET_SSE2) && (TARGET_AVX2))
    6009                 :            : #define HAVE_vec_widen_umult_hi_v8si ((TARGET_SSE2) && (TARGET_AVX2))
    6010                 :            : #define HAVE_vec_widen_smult_hi_v4si (TARGET_SSE2)
    6011                 :            : #define HAVE_vec_widen_umult_hi_v4si (TARGET_SSE2)
    6012                 :            : #define HAVE_vec_widen_smult_lo_v32qi ((TARGET_SSE2) && (TARGET_AVX2))
    6013                 :            : #define HAVE_vec_widen_umult_lo_v32qi ((TARGET_SSE2) && (TARGET_AVX2))
    6014                 :            : #define HAVE_vec_widen_smult_lo_v16qi (TARGET_SSE2)
    6015                 :            : #define HAVE_vec_widen_umult_lo_v16qi (TARGET_SSE2)
    6016                 :            : #define HAVE_vec_widen_smult_lo_v16hi ((TARGET_SSE2) && (TARGET_AVX2))
    6017                 :            : #define HAVE_vec_widen_umult_lo_v16hi ((TARGET_SSE2) && (TARGET_AVX2))
    6018                 :            : #define HAVE_vec_widen_smult_lo_v8hi (TARGET_SSE2)
    6019                 :            : #define HAVE_vec_widen_umult_lo_v8hi (TARGET_SSE2)
    6020                 :            : #define HAVE_vec_widen_smult_lo_v8si ((TARGET_SSE2) && (TARGET_AVX2))
    6021                 :            : #define HAVE_vec_widen_umult_lo_v8si ((TARGET_SSE2) && (TARGET_AVX2))
    6022                 :            : #define HAVE_vec_widen_smult_lo_v4si (TARGET_SSE2)
    6023                 :            : #define HAVE_vec_widen_umult_lo_v4si (TARGET_SSE2)
    6024                 :            : #define HAVE_vec_widen_smult_even_v4si (TARGET_SSE2)
    6025                 :            : #define HAVE_vec_widen_smult_odd_v16si ((TARGET_SSE2) && (TARGET_AVX512F))
    6026                 :            : #define HAVE_vec_widen_umult_odd_v16si ((TARGET_SSE2) && (TARGET_AVX512F))
    6027                 :            : #define HAVE_vec_widen_smult_odd_v8si ((TARGET_SSE2) && (TARGET_AVX2))
    6028                 :            : #define HAVE_vec_widen_umult_odd_v8si ((TARGET_SSE2) && (TARGET_AVX2))
    6029                 :            : #define HAVE_vec_widen_smult_odd_v4si (TARGET_SSE2)
    6030                 :            : #define HAVE_vec_widen_umult_odd_v4si (TARGET_SSE2)
    6031                 :            : #define HAVE_sdot_prodv32hi ((TARGET_SSE2) && (TARGET_AVX512BW))
    6032                 :            : #define HAVE_sdot_prodv16hi ((TARGET_SSE2) && (TARGET_AVX2))
    6033                 :            : #define HAVE_sdot_prodv8hi (TARGET_SSE2)
    6034                 :            : #define HAVE_sdot_prodv4si (TARGET_XOP)
    6035                 :            : #define HAVE_uavgv64qi3_ceil ((TARGET_SSE2) && (TARGET_AVX512BW))
    6036                 :            : #define HAVE_uavgv32qi3_ceil ((TARGET_SSE2) && (TARGET_AVX2))
    6037                 :            : #define HAVE_uavgv16qi3_ceil (TARGET_SSE2)
    6038                 :            : #define HAVE_uavgv32hi3_ceil ((TARGET_SSE2) && (TARGET_AVX512BW))
    6039                 :            : #define HAVE_uavgv16hi3_ceil ((TARGET_SSE2) && (TARGET_AVX2))
    6040                 :            : #define HAVE_uavgv8hi3_ceil (TARGET_SSE2)
    6041                 :            : #define HAVE_usadv16qi (TARGET_SSE2)
    6042                 :            : #define HAVE_usadv32qi (TARGET_AVX2)
    6043                 :            : #define HAVE_usadv64qi (TARGET_AVX512BW)
    6044                 :            : #define HAVE_vec_shl_v16qi (TARGET_SSE2)
    6045                 :            : #define HAVE_vec_shl_v8hi (TARGET_SSE2)
    6046                 :            : #define HAVE_vec_shl_v4si (TARGET_SSE2)
    6047                 :            : #define HAVE_vec_shl_v2di (TARGET_SSE2)
    6048                 :            : #define HAVE_vec_shl_v4sf (TARGET_SSE2)
    6049                 :            : #define HAVE_vec_shl_v2df (TARGET_SSE2)
    6050                 :            : #define HAVE_vec_shr_v16qi (TARGET_SSE2)
    6051                 :            : #define HAVE_vec_shr_v8hi (TARGET_SSE2)
    6052                 :            : #define HAVE_vec_shr_v4si (TARGET_SSE2)
    6053                 :            : #define HAVE_vec_shr_v2di (TARGET_SSE2)
    6054                 :            : #define HAVE_vec_shr_v4sf (TARGET_SSE2)
    6055                 :            : #define HAVE_vec_shr_v2df (TARGET_SSE2)
    6056                 :            : #define HAVE_smaxv32qi3 (TARGET_AVX2)
    6057                 :            : #define HAVE_sminv32qi3 (TARGET_AVX2)
    6058                 :            : #define HAVE_umaxv32qi3 (TARGET_AVX2)
    6059                 :            : #define HAVE_uminv32qi3 (TARGET_AVX2)
    6060                 :            : #define HAVE_smaxv16hi3 (TARGET_AVX2)
    6061                 :            : #define HAVE_sminv16hi3 (TARGET_AVX2)
    6062                 :            : #define HAVE_umaxv16hi3 (TARGET_AVX2)
    6063                 :            : #define HAVE_uminv16hi3 (TARGET_AVX2)
    6064                 :            : #define HAVE_smaxv8si3 (TARGET_AVX2)
    6065                 :            : #define HAVE_sminv8si3 (TARGET_AVX2)
    6066                 :            : #define HAVE_umaxv8si3 (TARGET_AVX2)
    6067                 :            : #define HAVE_uminv8si3 (TARGET_AVX2)
    6068                 :            : #define HAVE_smaxv64qi3 ((TARGET_AVX2) && (TARGET_AVX512BW))
    6069                 :            : #define HAVE_sminv64qi3 ((TARGET_AVX2) && (TARGET_AVX512BW))
    6070                 :            : #define HAVE_umaxv64qi3 ((TARGET_AVX2) && (TARGET_AVX512BW))
    6071                 :            : #define HAVE_uminv64qi3 ((TARGET_AVX2) && (TARGET_AVX512BW))
    6072                 :            : #define HAVE_smaxv32hi3 ((TARGET_AVX2) && (TARGET_AVX512BW))
    6073                 :            : #define HAVE_sminv32hi3 ((TARGET_AVX2) && (TARGET_AVX512BW))
    6074                 :            : #define HAVE_umaxv32hi3 ((TARGET_AVX2) && (TARGET_AVX512BW))
    6075                 :            : #define HAVE_uminv32hi3 ((TARGET_AVX2) && (TARGET_AVX512BW))
    6076                 :            : #define HAVE_smaxv16si3 ((TARGET_AVX2) && (TARGET_AVX512F))
    6077                 :            : #define HAVE_sminv16si3 ((TARGET_AVX2) && (TARGET_AVX512F))
    6078                 :            : #define HAVE_umaxv16si3 ((TARGET_AVX2) && (TARGET_AVX512F))
    6079                 :            : #define HAVE_uminv16si3 ((TARGET_AVX2) && (TARGET_AVX512F))
    6080                 :            : #define HAVE_smaxv16si3_mask (TARGET_AVX512F)
    6081                 :            : #define HAVE_sminv16si3_mask (TARGET_AVX512F)
    6082                 :            : #define HAVE_umaxv16si3_mask (TARGET_AVX512F)
    6083                 :            : #define HAVE_uminv16si3_mask (TARGET_AVX512F)
    6084                 :            : #define HAVE_smaxv8si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6085                 :            : #define HAVE_sminv8si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6086                 :            : #define HAVE_umaxv8si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6087                 :            : #define HAVE_uminv8si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6088                 :            : #define HAVE_smaxv4si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6089                 :            : #define HAVE_sminv4si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6090                 :            : #define HAVE_umaxv4si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6091                 :            : #define HAVE_uminv4si3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6092                 :            : #define HAVE_smaxv8di3_mask (TARGET_AVX512F)
    6093                 :            : #define HAVE_sminv8di3_mask (TARGET_AVX512F)
    6094                 :            : #define HAVE_umaxv8di3_mask (TARGET_AVX512F)
    6095                 :            : #define HAVE_uminv8di3_mask (TARGET_AVX512F)
    6096                 :            : #define HAVE_smaxv4di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6097                 :            : #define HAVE_sminv4di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6098                 :            : #define HAVE_umaxv4di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6099                 :            : #define HAVE_uminv4di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6100                 :            : #define HAVE_smaxv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6101                 :            : #define HAVE_sminv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6102                 :            : #define HAVE_umaxv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6103                 :            : #define HAVE_uminv2di3_mask ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6104                 :            : #define HAVE_smaxv8di3 ((TARGET_SSE4_2) && (TARGET_AVX512F))
    6105                 :            : #define HAVE_sminv8di3 ((TARGET_SSE4_2) && (TARGET_AVX512F))
    6106                 :            : #define HAVE_umaxv8di3 ((TARGET_SSE4_2) && (TARGET_AVX512F))
    6107                 :            : #define HAVE_uminv8di3 ((TARGET_SSE4_2) && (TARGET_AVX512F))
    6108                 :            : #define HAVE_smaxv4di3 ((TARGET_SSE4_2) && (TARGET_AVX2))
    6109                 :            : #define HAVE_sminv4di3 ((TARGET_SSE4_2) && (TARGET_AVX2))
    6110                 :            : #define HAVE_umaxv4di3 ((TARGET_SSE4_2) && (TARGET_AVX2))
    6111                 :            : #define HAVE_uminv4di3 ((TARGET_SSE4_2) && (TARGET_AVX2))
    6112                 :            : #define HAVE_smaxv2di3 (TARGET_SSE4_2)
    6113                 :            : #define HAVE_sminv2di3 (TARGET_SSE4_2)
    6114                 :            : #define HAVE_umaxv2di3 (TARGET_SSE4_2)
    6115                 :            : #define HAVE_uminv2di3 (TARGET_SSE4_2)
    6116                 :            : #define HAVE_smaxv16qi3 (TARGET_SSE2)
    6117                 :            : #define HAVE_sminv16qi3 (TARGET_SSE2)
    6118                 :            : #define HAVE_smaxv8hi3 (TARGET_SSE2)
    6119                 :            : #define HAVE_sminv8hi3 (TARGET_SSE2)
    6120                 :            : #define HAVE_smaxv4si3 (TARGET_SSE2)
    6121                 :            : #define HAVE_sminv4si3 (TARGET_SSE2)
    6122                 :            : #define HAVE_umaxv16qi3 (TARGET_SSE2)
    6123                 :            : #define HAVE_uminv16qi3 (TARGET_SSE2)
    6124                 :            : #define HAVE_umaxv8hi3 (TARGET_SSE2)
    6125                 :            : #define HAVE_uminv8hi3 (TARGET_SSE2)
    6126                 :            : #define HAVE_umaxv4si3 (TARGET_SSE2)
    6127                 :            : #define HAVE_uminv4si3 (TARGET_SSE2)
    6128                 :            : #define HAVE_avx2_eqv32qi3 (TARGET_AVX2)
    6129                 :            : #define HAVE_avx2_eqv16hi3 (TARGET_AVX2)
    6130                 :            : #define HAVE_avx2_eqv8si3 (TARGET_AVX2)
    6131                 :            : #define HAVE_avx2_eqv4di3 (TARGET_AVX2)
    6132                 :            : #define HAVE_avx512bw_eqv64qi3 (TARGET_AVX512BW)
    6133                 :            : #define HAVE_avx512bw_eqv64qi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    6134                 :            : #define HAVE_avx512vl_eqv16qi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    6135                 :            : #define HAVE_avx512vl_eqv16qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    6136                 :            : #define HAVE_avx512vl_eqv32qi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    6137                 :            : #define HAVE_avx512vl_eqv32qi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    6138                 :            : #define HAVE_avx512bw_eqv32hi3 (TARGET_AVX512BW)
    6139                 :            : #define HAVE_avx512bw_eqv32hi3_mask ((TARGET_AVX512F) && (TARGET_AVX512BW))
    6140                 :            : #define HAVE_avx512vl_eqv16hi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    6141                 :            : #define HAVE_avx512vl_eqv16hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    6142                 :            : #define HAVE_avx512vl_eqv8hi3 ((TARGET_AVX512BW) && (TARGET_AVX512VL))
    6143                 :            : #define HAVE_avx512vl_eqv8hi3_mask ((TARGET_AVX512F) && ((TARGET_AVX512BW) && (TARGET_AVX512VL)))
    6144                 :            : #define HAVE_avx512f_eqv16si3 (TARGET_AVX512F)
    6145                 :            : #define HAVE_avx512f_eqv16si3_mask (TARGET_AVX512F)
    6146                 :            : #define HAVE_avx512vl_eqv8si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6147                 :            : #define HAVE_avx512vl_eqv8si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    6148                 :            : #define HAVE_avx512vl_eqv4si3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6149                 :            : #define HAVE_avx512vl_eqv4si3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    6150                 :            : #define HAVE_avx512f_eqv8di3 (TARGET_AVX512F)
    6151                 :            : #define HAVE_avx512f_eqv8di3_mask (TARGET_AVX512F)
    6152                 :            : #define HAVE_avx512vl_eqv4di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6153                 :            : #define HAVE_avx512vl_eqv4di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    6154                 :            : #define HAVE_avx512vl_eqv2di3 ((TARGET_AVX512F) && (TARGET_AVX512VL))
    6155                 :            : #define HAVE_avx512vl_eqv2di3_mask ((TARGET_AVX512F) && ((TARGET_AVX512F) && (TARGET_AVX512VL)))
    6156                 :            : #define HAVE_sse2_eqv16qi3 (TARGET_SSE2 && !TARGET_XOP )
    6157                 :            : #define HAVE_sse2_eqv8hi3 (TARGET_SSE2 && !TARGET_XOP )
    6158                 :            : #define HAVE_sse2_eqv4si3 (TARGET_SSE2 && !TARGET_XOP )
    6159                 :            : #define HAVE_sse4_1_eqv2di3 (TARGET_SSE4_1)
    6160                 :            : #define HAVE_vcondv64qiv16si (TARGET_AVX512F \
    6161                 :            :    && (GET_MODE_NUNITS (V64QImode) \
    6162                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6163                 :            : #define HAVE_vcondv32hiv16si (TARGET_AVX512F \
    6164                 :            :    && (GET_MODE_NUNITS (V32HImode) \
    6165                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6166                 :            : #define HAVE_vcondv16siv16si (TARGET_AVX512F \
    6167                 :            :    && (GET_MODE_NUNITS (V16SImode) \
    6168                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6169                 :            : #define HAVE_vcondv8div16si (TARGET_AVX512F \
    6170                 :            :    && (GET_MODE_NUNITS (V8DImode) \
    6171                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6172                 :            : #define HAVE_vcondv16sfv16si (TARGET_AVX512F \
    6173                 :            :    && (GET_MODE_NUNITS (V16SFmode) \
    6174                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6175                 :            : #define HAVE_vcondv8dfv16si (TARGET_AVX512F \
    6176                 :            :    && (GET_MODE_NUNITS (V8DFmode) \
    6177                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6178                 :            : #define HAVE_vcondv64qiv8di (TARGET_AVX512F \
    6179                 :            :    && (GET_MODE_NUNITS (V64QImode) \
    6180                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6181                 :            : #define HAVE_vcondv32hiv8di (TARGET_AVX512F \
    6182                 :            :    && (GET_MODE_NUNITS (V32HImode) \
    6183                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6184                 :            : #define HAVE_vcondv16siv8di (TARGET_AVX512F \
    6185                 :            :    && (GET_MODE_NUNITS (V16SImode) \
    6186                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6187                 :            : #define HAVE_vcondv8div8di (TARGET_AVX512F \
    6188                 :            :    && (GET_MODE_NUNITS (V8DImode) \
    6189                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6190                 :            : #define HAVE_vcondv16sfv8di (TARGET_AVX512F \
    6191                 :            :    && (GET_MODE_NUNITS (V16SFmode) \
    6192                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6193                 :            : #define HAVE_vcondv8dfv8di (TARGET_AVX512F \
    6194                 :            :    && (GET_MODE_NUNITS (V8DFmode) \
    6195                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6196                 :            : #define HAVE_vcondv64qiv32hi ((TARGET_AVX512F \
    6197                 :            :    && (GET_MODE_NUNITS (V64QImode) \
    6198                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6199                 :            : #define HAVE_vcondv32hiv32hi ((TARGET_AVX512F \
    6200                 :            :    && (GET_MODE_NUNITS (V32HImode) \
    6201                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6202                 :            : #define HAVE_vcondv16siv32hi ((TARGET_AVX512F \
    6203                 :            :    && (GET_MODE_NUNITS (V16SImode) \
    6204                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6205                 :            : #define HAVE_vcondv8div32hi ((TARGET_AVX512F \
    6206                 :            :    && (GET_MODE_NUNITS (V8DImode) \
    6207                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6208                 :            : #define HAVE_vcondv16sfv32hi ((TARGET_AVX512F \
    6209                 :            :    && (GET_MODE_NUNITS (V16SFmode) \
    6210                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6211                 :            : #define HAVE_vcondv8dfv32hi ((TARGET_AVX512F \
    6212                 :            :    && (GET_MODE_NUNITS (V8DFmode) \
    6213                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6214                 :            : #define HAVE_vcondv64qiv64qi ((TARGET_AVX512F \
    6215                 :            :    && (GET_MODE_NUNITS (V64QImode) \
    6216                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6217                 :            : #define HAVE_vcondv32hiv64qi ((TARGET_AVX512F \
    6218                 :            :    && (GET_MODE_NUNITS (V32HImode) \
    6219                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6220                 :            : #define HAVE_vcondv16siv64qi ((TARGET_AVX512F \
    6221                 :            :    && (GET_MODE_NUNITS (V16SImode) \
    6222                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6223                 :            : #define HAVE_vcondv8div64qi ((TARGET_AVX512F \
    6224                 :            :    && (GET_MODE_NUNITS (V8DImode) \
    6225                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6226                 :            : #define HAVE_vcondv16sfv64qi ((TARGET_AVX512F \
    6227                 :            :    && (GET_MODE_NUNITS (V16SFmode) \
    6228                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6229                 :            : #define HAVE_vcondv8dfv64qi ((TARGET_AVX512F \
    6230                 :            :    && (GET_MODE_NUNITS (V8DFmode) \
    6231                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6232                 :            : #define HAVE_vcondv32qiv32qi (TARGET_AVX2 \
    6233                 :            :    && (GET_MODE_NUNITS (V32QImode) \
    6234                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6235                 :            : #define HAVE_vcondv32qiv16hi (TARGET_AVX2 \
    6236                 :            :    && (GET_MODE_NUNITS (V32QImode) \
    6237                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6238                 :            : #define HAVE_vcondv32qiv8si (TARGET_AVX2 \
    6239                 :            :    && (GET_MODE_NUNITS (V32QImode) \
    6240                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6241                 :            : #define HAVE_vcondv32qiv4di (TARGET_AVX2 \
    6242                 :            :    && (GET_MODE_NUNITS (V32QImode) \
    6243                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6244                 :            : #define HAVE_vcondv16hiv32qi (TARGET_AVX2 \
    6245                 :            :    && (GET_MODE_NUNITS (V16HImode) \
    6246                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6247                 :            : #define HAVE_vcondv16hiv16hi (TARGET_AVX2 \
    6248                 :            :    && (GET_MODE_NUNITS (V16HImode) \
    6249                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6250                 :            : #define HAVE_vcondv16hiv8si (TARGET_AVX2 \
    6251                 :            :    && (GET_MODE_NUNITS (V16HImode) \
    6252                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6253                 :            : #define HAVE_vcondv16hiv4di (TARGET_AVX2 \
    6254                 :            :    && (GET_MODE_NUNITS (V16HImode) \
    6255                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6256                 :            : #define HAVE_vcondv8siv32qi (TARGET_AVX2 \
    6257                 :            :    && (GET_MODE_NUNITS (V8SImode) \
    6258                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6259                 :            : #define HAVE_vcondv8siv16hi (TARGET_AVX2 \
    6260                 :            :    && (GET_MODE_NUNITS (V8SImode) \
    6261                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6262                 :            : #define HAVE_vcondv8siv8si (TARGET_AVX2 \
    6263                 :            :    && (GET_MODE_NUNITS (V8SImode) \
    6264                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6265                 :            : #define HAVE_vcondv8siv4di (TARGET_AVX2 \
    6266                 :            :    && (GET_MODE_NUNITS (V8SImode) \
    6267                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6268                 :            : #define HAVE_vcondv4div32qi (TARGET_AVX2 \
    6269                 :            :    && (GET_MODE_NUNITS (V4DImode) \
    6270                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6271                 :            : #define HAVE_vcondv4div16hi (TARGET_AVX2 \
    6272                 :            :    && (GET_MODE_NUNITS (V4DImode) \
    6273                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6274                 :            : #define HAVE_vcondv4div8si (TARGET_AVX2 \
    6275                 :            :    && (GET_MODE_NUNITS (V4DImode) \
    6276                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6277                 :            : #define HAVE_vcondv4div4di (TARGET_AVX2 \
    6278                 :            :    && (GET_MODE_NUNITS (V4DImode) \
    6279                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6280                 :            : #define HAVE_vcondv8sfv32qi (TARGET_AVX2 \
    6281                 :            :    && (GET_MODE_NUNITS (V8SFmode) \
    6282                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6283                 :            : #define HAVE_vcondv8sfv16hi (TARGET_AVX2 \
    6284                 :            :    && (GET_MODE_NUNITS (V8SFmode) \
    6285                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6286                 :            : #define HAVE_vcondv8sfv8si (TARGET_AVX2 \
    6287                 :            :    && (GET_MODE_NUNITS (V8SFmode) \
    6288                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6289                 :            : #define HAVE_vcondv8sfv4di (TARGET_AVX2 \
    6290                 :            :    && (GET_MODE_NUNITS (V8SFmode) \
    6291                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6292                 :            : #define HAVE_vcondv4dfv32qi (TARGET_AVX2 \
    6293                 :            :    && (GET_MODE_NUNITS (V4DFmode) \
    6294                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6295                 :            : #define HAVE_vcondv4dfv16hi (TARGET_AVX2 \
    6296                 :            :    && (GET_MODE_NUNITS (V4DFmode) \
    6297                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6298                 :            : #define HAVE_vcondv4dfv8si (TARGET_AVX2 \
    6299                 :            :    && (GET_MODE_NUNITS (V4DFmode) \
    6300                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6301                 :            : #define HAVE_vcondv4dfv4di (TARGET_AVX2 \
    6302                 :            :    && (GET_MODE_NUNITS (V4DFmode) \
    6303                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6304                 :            : #define HAVE_vcondv16qiv16qi (TARGET_SSE2 \
    6305                 :            :    && (GET_MODE_NUNITS (V16QImode) \
    6306                 :            :        == GET_MODE_NUNITS (V16QImode)))
    6307                 :            : #define HAVE_vcondv8hiv16qi (TARGET_SSE2 \
    6308                 :            :    && (GET_MODE_NUNITS (V8HImode) \
    6309                 :            :        == GET_MODE_NUNITS (V16QImode)))
    6310                 :            : #define HAVE_vcondv4siv16qi (TARGET_SSE2 \
    6311                 :            :    && (GET_MODE_NUNITS (V4SImode) \
    6312                 :            :        == GET_MODE_NUNITS (V16QImode)))
    6313                 :            : #define HAVE_vcondv2div16qi (TARGET_SSE2 \
    6314                 :            :    && (GET_MODE_NUNITS (V2DImode) \
    6315                 :            :        == GET_MODE_NUNITS (V16QImode)))
    6316                 :            : #define HAVE_vcondv4sfv16qi (TARGET_SSE2 \
    6317                 :            :    && (GET_MODE_NUNITS (V4SFmode) \
    6318                 :            :        == GET_MODE_NUNITS (V16QImode)))
    6319                 :            : #define HAVE_vcondv2dfv16qi ((TARGET_SSE2 \
    6320                 :            :    && (GET_MODE_NUNITS (V2DFmode) \
    6321                 :            :        == GET_MODE_NUNITS (V16QImode))) && (TARGET_SSE2))
    6322                 :            : #define HAVE_vcondv16qiv8hi (TARGET_SSE2 \
    6323                 :            :    && (GET_MODE_NUNITS (V16QImode) \
    6324                 :            :        == GET_MODE_NUNITS (V8HImode)))
    6325                 :            : #define HAVE_vcondv8hiv8hi (TARGET_SSE2 \
    6326                 :            :    && (GET_MODE_NUNITS (V8HImode) \
    6327                 :            :        == GET_MODE_NUNITS (V8HImode)))
    6328                 :            : #define HAVE_vcondv4siv8hi (TARGET_SSE2 \
    6329                 :            :    && (GET_MODE_NUNITS (V4SImode) \
    6330                 :            :        == GET_MODE_NUNITS (V8HImode)))
    6331                 :            : #define HAVE_vcondv2div8hi (TARGET_SSE2 \
    6332                 :            :    && (GET_MODE_NUNITS (V2DImode) \
    6333                 :            :        == GET_MODE_NUNITS (V8HImode)))
    6334                 :            : #define HAVE_vcondv4sfv8hi (TARGET_SSE2 \
    6335                 :            :    && (GET_MODE_NUNITS (V4SFmode) \
    6336                 :            :        == GET_MODE_NUNITS (V8HImode)))
    6337                 :            : #define HAVE_vcondv2dfv8hi ((TARGET_SSE2 \
    6338                 :            :    && (GET_MODE_NUNITS (V2DFmode) \
    6339                 :            :        == GET_MODE_NUNITS (V8HImode))) && (TARGET_SSE2))
    6340                 :            : #define HAVE_vcondv16qiv4si (TARGET_SSE2 \
    6341                 :            :    && (GET_MODE_NUNITS (V16QImode) \
    6342                 :            :        == GET_MODE_NUNITS (V4SImode)))
    6343                 :            : #define HAVE_vcondv8hiv4si (TARGET_SSE2 \
    6344                 :            :    && (GET_MODE_NUNITS (V8HImode) \
    6345                 :            :        == GET_MODE_NUNITS (V4SImode)))
    6346                 :            : #define HAVE_vcondv4siv4si (TARGET_SSE2 \
    6347                 :            :    && (GET_MODE_NUNITS (V4SImode) \
    6348                 :            :        == GET_MODE_NUNITS (V4SImode)))
    6349                 :            : #define HAVE_vcondv2div4si (TARGET_SSE2 \
    6350                 :            :    && (GET_MODE_NUNITS (V2DImode) \
    6351                 :            :        == GET_MODE_NUNITS (V4SImode)))
    6352                 :            : #define HAVE_vcondv4sfv4si (TARGET_SSE2 \
    6353                 :            :    && (GET_MODE_NUNITS (V4SFmode) \
    6354                 :            :        == GET_MODE_NUNITS (V4SImode)))
    6355                 :            : #define HAVE_vcondv2dfv4si ((TARGET_SSE2 \
    6356                 :            :    && (GET_MODE_NUNITS (V2DFmode) \
    6357                 :            :        == GET_MODE_NUNITS (V4SImode))) && (TARGET_SSE2))
    6358                 :            : #define HAVE_vcondv2div2di (TARGET_SSE4_2)
    6359                 :            : #define HAVE_vcondv2dfv2di (TARGET_SSE4_2)
    6360                 :            : #define HAVE_vconduv64qiv16si (TARGET_AVX512F \
    6361                 :            :    && (GET_MODE_NUNITS (V64QImode) \
    6362                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6363                 :            : #define HAVE_vconduv32hiv16si (TARGET_AVX512F \
    6364                 :            :    && (GET_MODE_NUNITS (V32HImode) \
    6365                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6366                 :            : #define HAVE_vconduv16siv16si (TARGET_AVX512F \
    6367                 :            :    && (GET_MODE_NUNITS (V16SImode) \
    6368                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6369                 :            : #define HAVE_vconduv8div16si (TARGET_AVX512F \
    6370                 :            :    && (GET_MODE_NUNITS (V8DImode) \
    6371                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6372                 :            : #define HAVE_vconduv16sfv16si (TARGET_AVX512F \
    6373                 :            :    && (GET_MODE_NUNITS (V16SFmode) \
    6374                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6375                 :            : #define HAVE_vconduv8dfv16si (TARGET_AVX512F \
    6376                 :            :    && (GET_MODE_NUNITS (V8DFmode) \
    6377                 :            :        == GET_MODE_NUNITS (V16SImode)))
    6378                 :            : #define HAVE_vconduv64qiv8di (TARGET_AVX512F \
    6379                 :            :    && (GET_MODE_NUNITS (V64QImode) \
    6380                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6381                 :            : #define HAVE_vconduv32hiv8di (TARGET_AVX512F \
    6382                 :            :    && (GET_MODE_NUNITS (V32HImode) \
    6383                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6384                 :            : #define HAVE_vconduv16siv8di (TARGET_AVX512F \
    6385                 :            :    && (GET_MODE_NUNITS (V16SImode) \
    6386                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6387                 :            : #define HAVE_vconduv8div8di (TARGET_AVX512F \
    6388                 :            :    && (GET_MODE_NUNITS (V8DImode) \
    6389                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6390                 :            : #define HAVE_vconduv16sfv8di (TARGET_AVX512F \
    6391                 :            :    && (GET_MODE_NUNITS (V16SFmode) \
    6392                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6393                 :            : #define HAVE_vconduv8dfv8di (TARGET_AVX512F \
    6394                 :            :    && (GET_MODE_NUNITS (V8DFmode) \
    6395                 :            :        == GET_MODE_NUNITS (V8DImode)))
    6396                 :            : #define HAVE_vconduv64qiv32hi ((TARGET_AVX512F \
    6397                 :            :    && (GET_MODE_NUNITS (V64QImode) \
    6398                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6399                 :            : #define HAVE_vconduv32hiv32hi ((TARGET_AVX512F \
    6400                 :            :    && (GET_MODE_NUNITS (V32HImode) \
    6401                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6402                 :            : #define HAVE_vconduv16siv32hi ((TARGET_AVX512F \
    6403                 :            :    && (GET_MODE_NUNITS (V16SImode) \
    6404                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6405                 :            : #define HAVE_vconduv8div32hi ((TARGET_AVX512F \
    6406                 :            :    && (GET_MODE_NUNITS (V8DImode) \
    6407                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6408                 :            : #define HAVE_vconduv16sfv32hi ((TARGET_AVX512F \
    6409                 :            :    && (GET_MODE_NUNITS (V16SFmode) \
    6410                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6411                 :            : #define HAVE_vconduv8dfv32hi ((TARGET_AVX512F \
    6412                 :            :    && (GET_MODE_NUNITS (V8DFmode) \
    6413                 :            :        == GET_MODE_NUNITS (V32HImode))) && (TARGET_AVX512BW))
    6414                 :            : #define HAVE_vconduv64qiv64qi ((TARGET_AVX512F \
    6415                 :            :    && (GET_MODE_NUNITS (V64QImode) \
    6416                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6417                 :            : #define HAVE_vconduv32hiv64qi ((TARGET_AVX512F \
    6418                 :            :    && (GET_MODE_NUNITS (V32HImode) \
    6419                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6420                 :            : #define HAVE_vconduv16siv64qi ((TARGET_AVX512F \
    6421                 :            :    && (GET_MODE_NUNITS (V16SImode) \
    6422                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6423                 :            : #define HAVE_vconduv8div64qi ((TARGET_AVX512F \
    6424                 :            :    && (GET_MODE_NUNITS (V8DImode) \
    6425                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6426                 :            : #define HAVE_vconduv16sfv64qi ((TARGET_AVX512F \
    6427                 :            :    && (GET_MODE_NUNITS (V16SFmode) \
    6428                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6429                 :            : #define HAVE_vconduv8dfv64qi ((TARGET_AVX512F \
    6430                 :            :    && (GET_MODE_NUNITS (V8DFmode) \
    6431                 :            :        == GET_MODE_NUNITS (V64QImode))) && (TARGET_AVX512BW))
    6432                 :            : #define HAVE_vconduv32qiv32qi (TARGET_AVX2 \
    6433                 :            :    && (GET_MODE_NUNITS (V32QImode) \
    6434                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6435                 :            : #define HAVE_vconduv32qiv16hi (TARGET_AVX2 \
    6436                 :            :    && (GET_MODE_NUNITS (V32QImode) \
    6437                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6438                 :            : #define HAVE_vconduv32qiv8si (TARGET_AVX2 \
    6439                 :            :    && (GET_MODE_NUNITS (V32QImode) \
    6440                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6441                 :            : #define HAVE_vconduv32qiv4di (TARGET_AVX2 \
    6442                 :            :    && (GET_MODE_NUNITS (V32QImode) \
    6443                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6444                 :            : #define HAVE_vconduv16hiv32qi (TARGET_AVX2 \
    6445                 :            :    && (GET_MODE_NUNITS (V16HImode) \
    6446                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6447                 :            : #define HAVE_vconduv16hiv16hi (TARGET_AVX2 \
    6448                 :            :    && (GET_MODE_NUNITS (V16HImode) \
    6449                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6450                 :            : #define HAVE_vconduv16hiv8si (TARGET_AVX2 \
    6451                 :            :    && (GET_MODE_NUNITS (V16HImode) \
    6452                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6453                 :            : #define HAVE_vconduv16hiv4di (TARGET_AVX2 \
    6454                 :            :    && (GET_MODE_NUNITS (V16HImode) \
    6455                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6456                 :            : #define HAVE_vconduv8siv32qi (TARGET_AVX2 \
    6457                 :            :    && (GET_MODE_NUNITS (V8SImode) \
    6458                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6459                 :            : #define HAVE_vconduv8siv16hi (TARGET_AVX2 \
    6460                 :            :    && (GET_MODE_NUNITS (V8SImode) \
    6461                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6462                 :            : #define HAVE_vconduv8siv8si (TARGET_AVX2 \
    6463                 :            :    && (GET_MODE_NUNITS (V8SImode) \
    6464                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6465                 :            : #define HAVE_vconduv8siv4di (TARGET_AVX2 \
    6466                 :            :    && (GET_MODE_NUNITS (V8SImode) \
    6467                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6468                 :            : #define HAVE_vconduv4div32qi (TARGET_AVX2 \
    6469                 :            :    && (GET_MODE_NUNITS (V4DImode) \
    6470                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6471                 :            : #define HAVE_vconduv4div16hi (TARGET_AVX2 \
    6472                 :            :    && (GET_MODE_NUNITS (V4DImode) \
    6473                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6474                 :            : #define HAVE_vconduv4div8si (TARGET_AVX2 \
    6475                 :            :    && (GET_MODE_NUNITS (V4DImode) \
    6476                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6477                 :            : #define HAVE_vconduv4div4di (TARGET_AVX2 \
    6478                 :            :    && (GET_MODE_NUNITS (V4DImode) \
    6479                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6480                 :            : #define HAVE_vconduv8sfv32qi (TARGET_AVX2 \
    6481                 :            :    && (GET_MODE_NUNITS (V8SFmode) \
    6482                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6483                 :            : #define HAVE_vconduv8sfv16hi (TARGET_AVX2 \
    6484                 :            :    && (GET_MODE_NUNITS (V8SFmode) \
    6485                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6486                 :            : #define HAVE_vconduv8sfv8si (TARGET_AVX2 \
    6487                 :            :    && (GET_MODE_NUNITS (V8SFmode) \
    6488                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6489                 :            : #define HAVE_vconduv8sfv4di (TARGET_AVX2 \
    6490                 :            :    && (GET_MODE_NUNITS (V8SFmode) \
    6491                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6492                 :            : #define HAVE_vconduv4dfv32qi (TARGET_AVX2 \
    6493                 :            :    && (GET_MODE_NUNITS (V4DFmode) \
    6494                 :            :        == GET_MODE_NUNITS (V32QImode)))
    6495                 :            : #define HAVE_vconduv4dfv16hi (TARGET_AVX2 \
    6496                 :            :    && (GET_MODE_NUNITS (V4DFmode) \
    6497                 :            :        == GET_MODE_NUNITS (V16HImode)))
    6498                 :            : #define HAVE_vconduv4dfv8si (TARGET_AVX2 \
    6499                 :            :    && (GET_MODE_NUNITS (V4DFmode) \
    6500                 :            :        == GET_MODE_NUNITS (V8SImode)))
    6501                 :            : #define HAVE_vconduv4dfv4di (TARGET_AVX2 \
    6502                 :            :    && (GET_MODE_NUNITS (V4DFmode) \
    6503                 :            :        == GET_MODE_NUNITS (V4DImode)))
    6504                 :            : #define HAVE_vconduv16qiv16qi (TARGET_SSE2 \
    6505                 :            :    && (GET_MODE_NUNITS (V16QImode) \
    6506                 :            :        == GET_MODE_NUNITS (V16QImode)))
    6507                 :            : #define HAVE_vconduv8hiv16qi (TARGET_SSE2 \
    6508                 :            :    && (GET_MODE_NUNITS (V8HImode) \
    6509                 :            :        == GET_MODE_NUNITS (V16QImode)))
    6510                 :            : #define HAVE_vconduv4siv16qi (TARGET_SSE2 \
    6511                 :            :    && (GET_MODE_NUNITS (V4SImode) \
    6512                 :            :        == GET_MODE_NUNITS (V16QImode)))
    6513                 :            : #define HAVE_vconduv2div16qi (TARGET_SSE2 \
    6514                 :            :    && (GET_MODE_NUNITS (V2DImode) \
    6515                 :            :        == GET_MODE_NUNITS (V16QImode)))
    6516                 :            : #define HAVE_vconduv4sfv16qi (TARGET_SSE2 \
    6517                 :            :    && (GET_MODE_NUNITS (V4SFmode) \
    6518                 :            :        == GET_MODE_NUNITS (V16QImode)))
    6519                 :            : #define HAVE_vconduv2dfv16qi ((TARGET_SSE2 \
    6520                 :            :    && (GET_MODE_NUNITS (V2DFmode) \
    6521                 :            :        == GET_MODE_NUNITS (V16QImode))) && (TARGET_SSE2))
    6522                 :            : #define HAVE_vconduv16qiv8hi (TARGET_SSE2 \
    6523                 :            :    && (GET_MODE_NUNITS (V16QImode) \
    6524                 :            :        == GET_MODE_NUNITS (V8HImode)))
    6525                 :            : #define HAVE_vconduv8hiv8hi (TARGET_SSE2 \
    6526                 :            :    && (GET_MODE_NUNITS (V8HImode) \
    6527                 :            :        == GET_MODE_NUNITS (V8HImode)))
    6528                 :            : #define HAVE_vconduv4siv8hi (TARGET_SSE2 \
    6529                 :            :    && (GET_MODE_NUNITS (V4SImode) \
    6530                 :            :        == GET_MODE_NUNITS (V8HImode)))
    6531                 :            : #define HAVE_vconduv2div8hi (TARGET_SSE2 \
    6532                 :            :    && (GET_MODE_NUNITS (V2DImode) \
    6533                 :            :        == GET_MODE_NUNITS (V8HImode)))
    6534                 :            : #define HAVE_vconduv4sfv8hi (TARGET_SSE2 \
    6535                 :            :    && (GET_MODE_NUNITS (V4SFmode) \
    6536                 :            :        == GET_MODE_NUNITS (V8HImode)))
    6537                 :            : #define HAVE_vconduv2dfv8hi ((TARGET_SSE2 \
    6538                 :            :    && (GET_MODE_NUNITS (V2DFmode) \
    6539                 :            :        == GET_MODE_NUNITS (V8HImode))) && (TARGET_SSE2))
    6540                 :            : #define HAVE_vconduv16qiv4si (TARGET_SSE2 \
    6541                 :            :    && (GET_MODE_NUNITS (V16QImode) \
    6542                 :            :        == GET_MODE_NUNITS (V4SImode)))
    6543                 :            : #define HAVE_vconduv8hiv4si (TARGET_SSE2 \
    6544                 :            :    && (GET_MODE_NUNITS (V8HImode) \
    6545                 :            :        == GET_MODE_NUNITS (V4SImode)))
    6546                 :            : #define HAVE_vconduv4siv4si (TARGET_SSE2 \
    6547                 :            :    && (GET_MODE_NUNITS (V4SImode) \
    6548                 :            :        == GET_MODE_NUNITS (V4SImode)))
    6549                 :            : #define HAVE_vconduv2div4si (TARGET_SSE2 \
    6550                 :            :    && (GET_MODE_NUNITS (V2DImode) \
    6551                 :            :        == GET_MODE_NUNITS (V4SImode)))
    6552                 :            : #define HAVE_vconduv4sfv4si (TARGET_SSE2 \
    6553                 :            :    && (GET_MODE_NUNITS (V4SFmode) \
    6554                 :            :        == GET_MODE_NUNITS (V4SImode)))
    6555                 :            : #define HAVE_vconduv2dfv4si ((TARGET_SSE2 \
    6556                 :            :    && (GET_MODE_NUNITS (V2DFmode) \
    6557                 :            :        == GET_MODE_NUNITS (V4SImode))) && (TARGET_SSE2))
    6558                 :            : #define HAVE_vconduv2div2di (TARGET_SSE4_2)
    6559                 :            : #define HAVE_vconduv2dfv2di (TARGET_SSE4_2)
    6560                 :            : #define HAVE_vcondeqv2div2di (TARGET_SSE4_1)
    6561                 :            : #define HAVE_vcondeqv2dfv2di (TARGET_SSE4_1)
    6562                 :            : #define HAVE_vec_permv16qi (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP)
    6563                 :            : #define HAVE_vec_permv8hi (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP)
    6564                 :            : #define HAVE_vec_permv4si (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP)
    6565                 :            : #define HAVE_vec_permv2di (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP)
    6566                 :            : #define HAVE_vec_permv4sf (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP)
    6567                 :            : #define HAVE_vec_permv2df (TARGET_SSSE3 || TARGET_AVX || TARGET_XOP)
    6568                 :            : #define HAVE_vec_permv32qi ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2))
    6569                 :            : #define HAVE_vec_permv16hi ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2))
    6570                 :            : #define HAVE_vec_permv8si ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2))
    6571                 :            : #define HAVE_vec_permv4di ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2))
    6572                 :            : #define HAVE_vec_permv8sf ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2))
    6573                 :            : #define HAVE_vec_permv4df ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX2))
    6574                 :            : #define HAVE_vec_permv16sf ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX512F))
    6575                 :            : #define HAVE_vec_permv8df ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX512F))
    6576                 :            : #define HAVE_vec_permv16si ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX512F))
    6577                 :            : #define HAVE_vec_permv8di ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX512F))
    6578                 :            : #define HAVE_vec_permv32hi ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX512BW))
    6579                 :            : #define HAVE_vec_permv64qi ((TARGET_SSSE3 || TARGET_AVX || TARGET_XOP) && (TARGET_AVX512VBMI))
    6580                 :            : #define HAVE_one_cmplv16si2 ((TARGET_SSE) && (TARGET_AVX512F))
    6581                 :            : #define HAVE_one_cmplv8di2 ((TARGET_SSE) && (TARGET_AVX512F))
    6582                 :            : #define HAVE_one_cmplv64qi2 ((TARGET_SSE) && (TARGET_